ADP124ACPZ-3.3 [ADI]
3.3V FIXED POSITIVE LDO REGULATOR, 0.23V DROPOUT, PDSO8;型号: | ADP124ACPZ-3.3 |
厂家: | ADI |
描述: | 3.3V FIXED POSITIVE LDO REGULATOR, 0.23V DROPOUT, PDSO8 光电二极管 输出元件 调节器 |
文件: | 总20页 (文件大小:1150K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
5.5 V Input, 500 mA, Low Quiescent
Current, CMOS Linear Regulators
Data Sheet
ADP124/ADP125
FEATURES
TYPICAL APPLICATION CIRCUITS
Input voltage supply range: 2.3 V to 5.5 V
500 mA maximum output current
Fixed and adjustable output voltage versions
1% initial accuracy
Up to 31 fixed-output voltage options available
from 1.75 V to 3.3 V
Adjustable-output voltage range from 0.8 V to 5.0 V
Very low dropout voltage: 130 mV
1
2
3
4
8
7
6
5
VOUT
VIN
V
OUT
= 3.3V
V
= 5.5V
C1
IN
ADP124
VOUT
VIN
C2
VOUT
SENSE
NC
EN
ON
GND
OFF
Figure 1. ADP124 with Fixed Output Voltage
Low quiescent current: 45 µA
Low shutdown current: <1 µA
V
OUT
= 3.3V
1
2
3
4
8
7
6
5
VOUT
VIN
V
= 5.5V
C1
Excellent PSRR performance: 60 dB at 100 kHz
Excellent load/line transient response
Optimized for small 1.0 μF ceramic capacitors
Current limit and thermal overload protection
Logic controlled enable
IN
ADP125
VOUT
VIN
C2
R1
R2
NC
EN
ADJ
ON
GND
OFF
Compact 8-lead exposed paddle MSOP and LFCSP packages
APPLICATIONS
Figure 2. ADP125 with Adjustable Output Voltage
Digital camera and audio devices
Portable and battery-powered equipment
Automatic meter reading (AMR) meters
GPS and location management units
Medical instrumentation
Point of load power
GENERAL DESCRIPTION
The ADP124/ADP125 are low quiescent current, low dropout
linear regulators. They are designed to operate from an input
voltage between 2.3 V and 5.5 V and to provide up to 500 mA
of output current. The low 130 mV dropout voltage at a 500 mA
load improves efficiency and allows operation over a wide input
voltage range.
The ADP124/ADP125 are specifically designed for stable
operation with tiny 1 µF ceramic input and output capacitors to
meet the requirements of high performance, space constrained
applications.
The ADP124/ADP125 have an internal soft start that gives a
constant start-up time of 350 µs. Short-circuit protection and
thermal overload protection circuits prevent damage in adverse
conditions. The ADP124/ADP125 are available in 8-lead
exposed paddle MSOP and LFCSP packages. When compared
with the standard MSOP and LFCSP packages, the exposed
paddle MSOP and LFCSP packages have lower thermal resistance
(θJA). The lower thermal resistance package allows the ADP124/
ADP125 to meet the needs of a variety of portable applications
while minimizing the rise in junction temperature.
The low 210 μA of quiescent current with a 500 mA load makes the
ADP124/ADP125 ideal for battery-operated portable equipment.
The ADP124 is capable of 31 fixed-output voltages from 1.75 V
to 3.3 V. The ADP125 is the adjustable version of the device and
allows the output voltage to be set between 0.8 V and 5.0 V by
an external voltage divider.
Rev. D
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ADP124/ADP125
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 11
Applications Information .............................................................. 12
Capacitor Selection .................................................................... 12
Undervoltage Lockout ............................................................... 13
Enable Feature ............................................................................ 13
Current Limit and Thermal Overload Protection ................. 14
Thermal Considerations............................................................ 14
Junction Temperature Calculations......................................... 15
Printed Circuit Board Layout Considerations........................ 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
Typical Application Circuits............................................................ 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Recommended Capacitor Specifications................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Data ................................................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
12/14—Rev. C to Rev. D
Updated Figure 46; Outline Dimensions..................................... 17
Changes to Ordering Guide .......................................................... 18
6/12—Rev. B to Rev. C
Changes to Table 3............................................................................ 5
Updated Outline Dimensions....................................................... 17
4/12—Rev. A to Rev. B
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 18
9/10—Rev. 0 to Rev. A
Added 8-Lead LFCSP Package..................................... Throughout
Added Figure 4 and Figure 6 (Renumbered Sequentially) ......... 6
Changes to Thermal Conditions Section and Table 6 ............... 14
Added Table 7.................................................................................. 14
Changes to Junction Temperature Calculations Section........... 15
Added Figure 44.............................................................................. 16
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 18
12/09—Revision 0: Initial Version
Rev. D | Page 2 of 20
Data Sheet
ADP124/ADP125
SPECIFICATIONS
Unless otherwise noted, VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; ADJ connected to VOUT; IOUT = 10 mA; CIN = 1.0 µF;
C
OUT = 1.0 µF; TA = 25°C.
Table 1.
Parameter
Symbol
VIN
Test Conditions
Min
Typ
45
Max
Unit
V
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT1
2.3
5.5
IGND
IOUT = 0 µA
IOUT = 0 µA, TJ = −40°C to +125°C
IOUT = 1 mA
IOUT = 1 mA, TJ = −40°C to +125°C
IOUT = 250 mA
IOUT = 250 mA, TJ = −40°C to +125°C
IOUT = 500 mA
IOUT = 500 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
105
120
210
280
1
60
160
210
0.1
SHUTDOWN CURRENT
ISD
OUTPUT VOLTAGE ACCURACY2
Fixed Output
VOUT
IOUT = 10 mA
100 µA < IOUT < 500 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
−1
−2
+1
+1.5
%
%
Adjustable Output
IOUT = 10 mA
100 µA < IOUT < 500 mA, VIN = 2.3 V to 5.5 V,
TJ = −40°C to +125°C
0.495 0.500
0.485 0.500
0.505
0.515
V
V
LINE REGULATION
LOAD REGULATION3
∆VOUT/∆VIN
VIN = VIN = 2.3 V to 5.5 V, TJ = −40°C to +125°C
−0.05
+0.05 %/V
%/mA
0.001 %/mA
nA
∆VOUT/∆IOUT IOUT = 1 mA to 500 mA
IOUT = 1 mA to 500 mA, TJ = −40°C to +125°C
0.0005
ADJ INPUT BIAS CURRENT
DROPOUT VOLTAGE4
ADJI-BIAS
VDROPOUT
2.3 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
15
3
IOUT = 10 mA, VOUT > 2.3 V
mV
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 250 mA, VOUT > 2.3 V
IOUT = 250 mA, TJ = −40°C to +125°C
IOUT = 500 mA, VOUT > 2.3V
IOUT = 500 mA, TJ = −40°C to +125°C
VOUT = 3.0 V
5
mV
mV
mV
mV
mV
µs
65
130
350
120
230
1000
START-UP TIME5
CURRENT LIMIT THRESHOLD6
tSTART-UP
ILIMIT
550
1.2
750
mA
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
TSSD
TJ rising
150
15
°C
°C
TSSD-HYS
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
VIH
VIL
VI-LEAKAGE
2.3 V ≤ VIN ≤ 5.5 V
2.3 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
V
V
µA
µA
0.4
1
0.1
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
UVLO
UVLORISE
UVLOFALL
UVLOHYS
TJ = −40°C to +125°C
TJ = −40°C to +125°C
TA = 25°C
2.1
V
V
mV
1.5
125
Rev. D | Page 3 of 20
ADP124/ADP125
Data Sheet
Parameter
Symbol
Test Conditions
Min
Typ
25
35
45
55
65
60
Max
Unit
OUTPUT NOISE
OUTNOISE
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 1.2 V
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 1.8 V
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 2.5 V
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 3.3 V
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 4.2V
10 kHz to 100 kHz, VOUT = 1.8 V, 2.5 V, 3.3 V
µV rms
µV rms
µV rms
µV rms
µV rms
dB
POWER SUPPLY REJECTION RATIO
(VIN = VOUT +1V)
PSRR
1 The current from the external resistor divider network in the case of adjustable voltage output (as with the ADP125) should be subtracted from the ground current measured.
2 Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of
the resistors used.
3 Based on an endpoint calculation using 1 mA and 500 mA loads.
4 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages
greater than 2.3 V.
5 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
6 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.3 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.3 V, or 2.97 V.
RECOMMENDED CAPACITOR SPECIFICATIONS
Table 2.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Minimum Input and Output
Capacitance1
CAPMIN
TA = −40°C to +125°C
0.70
µF
Capacitor ESR
RESR
TA = −40°C to +125°C
0.001
1
Ω
1 The minimum input and output capacitance should be greater than 0.70 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with this LDO.
Rev. D | Page 4 of 20
Data Sheet
ADP124/ADP125
ABSOLUTE MAXIMUM RATINGS
application and board layout. In applications in which high maxi-
mum power dissipation exists, close attention to thermal board
design is required. The value of θJA may vary, depending on PCB
material, layout, and environmental conditions. The specified
values of θJA are based on a 4-layer, 4 inch × 3 inch circuit board.
Refer to JESD 51-7 for detailed information on the board
construction.
Table 3.
Parameter
Rating
VIN to GND
ADJ to GND
EN to GND
VOUT to GND
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to VIN
Storage Temperature Range
Operating Ambient Temperature Range
Operating Junction Temperature Range
Soldering Conditions
−65°C to +150°C
−40°C to +85°C
−40°C to +125°C
JEDEC J-STD-020
ΨJB is the junction-to-board thermal characterization parameter
and is measured in °C /W. The ΨJB of the package is based on
modeling and calculation using a 4-layer board. The Guidelines for
Reporting and Using Package Thermal Information: JESD51-12
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package—factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP124/ADP125 can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ will remain within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be limited.
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
Table 4. Thermal Resistance
Package Type
8-Lead MSOP
8-Lead LFCSP
θJA
ΨJB
Unit
°C/W
°C/W
102.8
68.9
31.8
44.1
ESD CAUTION
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
formula
TJ = TA + (PD × θJA)
The junction-to-ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
Rev. D | Page 5 of 20
ADP124/ADP125
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VOUT
VOUT
1
2
3
4
8
7
6
5
VIN
VIN
NC
EN
VOUT
VOUT
ADJ
1
2
3
4
8
7
6
5
VIN
VIN
NC
EN
ADP124
ADP125
TOP VIEW
TOP VIEW
VOUT SENSE
GND
(Not to Scale)
(Not to Scale)
GND
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
Figure 3. ADP124 Fixed Output MSOP Pin Configuration
Figure 5. ADP125 Adjustable Output MSOP Pin Configuration
VOUT
VOUT
1
2
3
4
8
7
6
5
VIN
VIN
NC
EN
VOUT
VOUT
ADJ
1
2
3
4
8
7
6
5
VIN
VIN
NC
EN
ADP124
TOP VIEW
(Not to Scale)
ADP125
TOP VIEW
(Not to Scale)
VOUT SENSE
GND
GND
NOTES
1. NC = NO CONNECT.
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
Figure 4. ADP124 Fixed Output LFCSP Pin Configuration
Figure 6. ADP125 Adjustable Output LFCSP Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic
Pin No. ADP124
ADP125 Description
1
2
3
VOUT
VOUT
VOUT SENSE N/A
VOUT
VOUT
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Feedback Node for the Error Amplifier. Connect to VOUT.
N/A
ADJ
Feedback Node for the Error Amplifier. Connect the midpoint of an external divider from VOUT to GND
to this pin to set the output voltage.
4
5
GND
EN
GND
EN
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For
automatic startup, connect EN to VIN.
6
7
8
NC
NC
No Connect. This pin is not connected internally.
VIN
VIN
EPAD
VIN
VIN
EPAD
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
The exposed pad must be connected to ground.
Rev. D | Page 6 of 20
Data Sheet
ADP124/ADP125
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, V OUT = 3.3V, IOUT = 10 mA, CIN = 1.0 µF, COUT = 1.0 µF, TA = 25°C, unless otherwise noted.
3.310
3.305
3.300
3.295
3.290
3.285
3.280
3.275
3.270
300
250
200
150
100
50
I
I
= 500mA
= 300mA
OUT
OUT
I
I
I
I
I
I
= 100µA
= 1mA
= 10mA
= 100mA
= 300mA
= 500mA
OUT
OUT
OUT
OUT
OUT
OUT
I
I
= 100mA
= 10mA
OUT
OUT
I
= 100µA
OUT
I
= 1mA
OUT
+25
–40
–5
+85
+125
–40
–5
+25
+85
+125
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
3.309
3.308
3.307
3.306
3.305
3.304
3.303
250
200
150
100
50
0
0.1
0.1
1
10
(mA)
100
1000
1
10
(mA)
100
1000
I
I
OUT
LOAD
Figure 8. Output Voltage vs. Load Current
Figure 11. Ground Current vs. Load Current
3.310
3.308
3.306
3.304
3.302
3.300
3.298
3.296
3.294
3.292
250
230
210
190
170
150
130
110
90
I
I
= 500mA
= 300mA
OUT
OUT
I
I
I
I
I
I
= 100µA
= 1mA
= 10mA
= 100mA
= 300mA
= 500mA
OUT
OUT
OUT
OUT
OUT
OUT
I
I
= 100mA
= 10mA
OUT
I
= 1mA
OUT
I
= 100µA
5.00
OUT
OUT
70
50
3.50
3.50
4.00
4.50
(V)
5.00
5.50
4.00
4.50
(V)
5.50
V
V
IN
IN
Figure 9. Output Voltage vs. Input Voltage
Figure 12. Ground Current vs. Input Voltage
Rev. D | Page 7 of 20
ADP124/ADP125
Data Sheet
0.7
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
2.95
I
I
I
I
= 10mA
OUT
OUT
OUT
OUT
0.6
= 100mA
= 300mA
= 500mA
0.5
0.4
0.3
0.2
0.1
0
V
V
V
V
V
V
V
= 5.50
= 5.40
= 5.20
= 5.00
= 4.40
= 4.20
= 3.80
IN
IN
IN
IN
IN
IN
IN
–50
–25
0
25
50
75
100
125
3.00
3.10
3.20
3.30
(V)
3.40
3.50
3.60
TEMPERATURE (°C)
V
IN
Figure 13. Shutdown Current vs. Temperature at Various Input Voltages
Figure 16. Output Voltage vs. Input Voltage (in Dropout)
120
100
80
60
40
20
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
I
I
I
I
I
I
= 100µA
= 1mA
= 10mA
= 100mA
= 300mA
= 500mA
OUT
OUT
OUT
OUT
OUT
OUT
V
V
C
= V
+1V
= 50mV
IN
RIPPLE
= C
OUT
= 1µF
IN
OUT
1
10
100
1000
10
100
1k
10k
100k
1M
10M
I
(mA)
OUT
FREQUENCY (Hz)
Figure 14. Dropout Voltage vs. Load Current
Figure 17. Power Supply Rejection Ratio vs. Frequency, VOUT = 2.8 V, VIN = 3.8 V
450
400
350
300
250
200
150
100
50
–10
–20
I
I
I
I
I
I
= 100µA
= 1mA
= 10mA
= 100mA
= 300mA
= 500mA
OUT
OUT
OUT
OUT
OUT
OUT
–30
–40
–50
–60
–70
–80
–90
–100
I
I
I
I
= 10mA
OUT
OUT
OUT
OUT
= 100mA
= 300mA
= 500mA
V
V
C
= V
+1V
= 50mV
IN
RIPPLE
= C
OUT
= 1µF
IN
OUT
0
3.00
3.10
3.20
3.30
3.40
(V)
3.50
3.60
3.70
10
100
1k
10k
100k
1M
10M
V
FREQUENCY (Hz)
IN
Figure 15. Ground Current vs. Input Voltage (in Dropout)
Figure 18. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.3 V, VIN = 4.3 V
Rev. D | Page 8 of 20
Data Sheet
ADP124/ADP125
–10
5
4
3
2
1
0
–20
I
I
I
I
I
I
= 100µA
= 1mA
= 10mA
= 100mA
= 300mA
= 500mA
OUT
OUT
OUT
OUT
OUT
OUT
V
= 4.2V
OUT
V
–30
–40
–50
–60
–70
–80
–90
–100
= 3.3V
OUT
V
= 2.8V
OUT
V
V
C
= V
+ 1V
= 50mV
IN
RIPPLE
= C
OUT
= 1µF
IN
OUT
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 19. Power Supply Rejection Ratio vs. Frequency, VOUT = 4.2 V, VIN = 5.2 V
Figure 22. Output Noise Spectrum, VIN = 5 V
–10
70
65
60
55
50
45
40
35
30
25
20
V
V
V
V
V
V
= 2.8V, I
= 3.3V, I
= 4.2V, I
= 2.8V, I
= 3.3V, I
= 4.2V, I
= 10mA
= 10mA
= 10mA
= 500mA
= 500mA
= 500mA
V
V
= 4.2V
= 3.3V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
–20
–30
–40
–50
–60
–70
–80
–90
–100
OUT
V
= 2.8V
OUT
V
V
C
= V
+ 1V
= 50mV
IN
RIPPLE
= C
OUT
= 1µF
IN
OUT
10
100
1k
10k
100k
1M
10M
0.001
0.01
0.1
1
10
100
1k
I
LOAD
(mA)
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency,
Various Output Voltages and Load Currents
Figure 23. Output Noise vs. Load Current and Output Voltage, VIN = 5 V
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
I
OUT
V
V
V
V
= 3.1V, I
= 3.3V, I
= 3.8V, I
= 4.8V, I
= 10mA
= 10mA
= 10mA
= 10mA
IN
IN
IN
IN
OUT
OUT
OUT
OUT
1mA TO 500mA LOAD STEP
1
V
OUT
2
V
V
V
V
= 3.1V, I
= 3.3V, I
= 3.8V, I
= 4.8V, I
= 500mA
= 500mA
= 500mA
= 500mA
IN
IN
IN
IN
OUT
OUT
OUT
OUT
V
V
= 4V
= 3.3V
IN
OUT
CH1 500mA Ω B CH2 50.0mV
M40.0µs
9.800%
A CH1 200mA
B
W
W
10
100
1k
10k
100k
1M
10M
T
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ratio vs. Headroom Voltage (VIN − VOUT),
VOUT = 2.8 V
Figure 24. Load Transient Response, COUT = 1 μF
Rev. D | Page 9 of 20
ADP124/ADP125
Data Sheet
I
OUT
V
IN
1mA TO 500mA LOAD STEP
4V TO 4.5V VOLTAGE STEP
1
V
OUT
2
1
2
V
OUT
V
V
= 4V
= 3.3V
IN
OUT
B
B
W
CH1 500mA Ω B CH2 50.0mV
M40.0µs
9.800%
A
CH1 200mA
CH1 1.00V B
CH2 2.00mV
M10.0µs
T 9.800%
A
CH3 200mA
W
W
W
T
Figure 25. Load Transient Response, COUT = 4.7 μF
Figure 27. Line Transient Response, Load Current = 500 mA
V
IN
4V TO 4.5V VOLTAGE STEP
V
OUT
2
1
B
CH1 1.00V B
CH2 2.00mV
M10.0µs
9.600%
A CH3 2.36V
W
W
T
Figure 26. Line Transient Response, Load Current = 1 mA
Rev. D | Page 10 of 20
Data Sheet
ADP124/ADP125
THEORY OF OPERATION
The ADP124/ADP125 are low quiescent current, low dropout
linear regulators that operate from 2.3 V to 5.5 V and can provide
up to 500 mA of output current. Drawing a low 210 µA of quies-
cent current (typical) at full load makes the ADP124/ADP125
ideal for battery-operated portable equipment. Shutdown current
consumption is typically 100 nA.
The ADP124/ADP125 use the EN pin to enable and disable the
VOUT pin under normal operating conditions. When EN is high,
VOUT turns on; when EN is low, VOUT turns off. For automatic
startup, EN can be tied to VIN.
ADP124
VIN
VOUT
Optimized for use with small 1 µF ceramic capacitors, the
ADP124/ADP125 provide excellent transient performance.
VOUT SENSE
SHORT CIRCUIT,
UVLO, AND
THERMAL
R1
R2
Internally, the ADP124/ADP125 consist of a reference, an error
amplifier, a feedback voltage divider, and a PMOS pass transistor.
Output current is delivered via the PMOS pass device, which is
controlled by the error amplifier. The error amplifier compares
the reference voltage with the feedback voltage from the output
and amplifies the difference. If the feedback voltage is lower than
the reference voltage, the gate of the PMOS device is pulled lower,
allowing more current to pass and increasing the output voltage.
If the feedback voltage is higher than the reference voltage, the
gate of the PMOS device is pulled higher, allowing less current
to pass and decreasing the output voltage.
GND
PROTECT
EN
SHUTDOWN
0.5V REFERENCE
NOTES
1. R1 AND R2 ARE INTERNAL RESISTORS, AVAILABLE ON
THE ADP124 ONLY.
Figure 28. ADP124 Internal Block Diagram (Fixed Output)
The adjustable ADP125 has an output voltage range of 0.8 V to
5.0 V. The output voltage is set by the ratio of two external resistors,
as shown in Figure 2. The device servos the output to maintain
the voltage at the ADJ pin at 0.5 V referenced to ground. The
current in R1 is then equal to 0.5 V/R2 and the current in R1 is
the current in R2 plus the ADJ pin bias current. The ADJ pin
bias current, 15 nA at 25°C, flows through R1 into the ADJ pin.
ADP125
VIN
VOUT
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
EN
PROTECT
The output voltage can be calculated using the equation:
ADJ
SHUTDOWN
V
OUT = 0.5 V(1 + R1/R2) + (ADJI-BIAS)(R1)
0.5V REFERENCE
The value of R1 should be less than 200 kΩ to minimize errors
in the output voltage caused by the ADJ pin bias current. For
example, when R1 and R2 each equal 200 kΩ, the output voltage
is 1.0 V. The output voltage error introduced by the ADJ pin
bias current is 3 mV or 0.3%, assuming a typical ADJ pin bias
current of 15 nA at 25°C.
Figure 29. ADP125 Internal Block Diagram (Adjustable Output)
Note that in shutdown, the output is turned off and the divider
current is 0.
Rev. D | Page 11 of 20
ADP124/ADP125
Data Sheet
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
Input Bypass Capacitor
Connecting a 1 µF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when a long input trace or high source impedance is encountered.
If greater than 1 µF of output capacitance is required, the input
capacitor should be increased to match it.
The ADP124/ADP125 are designed for operation with small,
space-saving ceramic capacitors, but these devices can function
with most commonly used capacitors as long as care is taken to
ensure an appropriate effective series resistance (ESR) value. The
ESR of the output capacitor affects the stability of the LDO control
loop. A minimum of 0.70 µF capacitance with an ESR of 1 Ω or
less is recommended to ensure stability of the ADP124/ADP125.
The transient response to changes in load current is also affected by
the output capacitance. Using a larger value of output capacitance
improves the transient response of the ADP124/ADP125 to
dynamic changes in load current. Figure 30 and Figure 31 show
the transient responses for output capacitance values of 1 µF and
4.7 µF, respectively.
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the
ADP124/ADP125, as long as the capacitor meets the minimum
capacitance and maximum ESR requirements. Ceramic capacitors
are manufactured with a variety of dielectrics, each with different
behavior over temperature and applied voltage. Capacitors must
have an adequate dielectric to ensure the minimum capacitance
over the necessary temperature range and dc bias conditions.
Using an X5R or X7R dielectric with a voltage rating of 6.3 V or
10 V is recommended. However, using Y5V and Z5U dielectrics
are not recommended for any LDO, due to their poor temperature
and dc bias characteristics.
I
OUT
1mA TO 500mA LOAD STEP
1
Figure 32 depicts the capacitance vs. capacitor voltage bias charac-
teristics of an 0402, 1 µF, 10 V X5R capacitor. The voltage stability
of a capacitor is strongly influenced by the capacitor size and the
voltage rating. In general, a capacitor in a larger package or of a
higher voltage rating exhibits better stability. The temperature
variation of the X5R dielectric is about 15% over the −40°C to
+85°C temperature range and is not a function of package or
voltage rating.
2
V
OUT
V
V
= 4V
= 3.3V
IN
OUT
1.10
B
CH1 500mA Ω B CH2 50.0mV
M400ns
W
A CH1 200mA
W
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
T
13.20%
Figure 30. Output Transient Response, COUT = 1 µF
I
OUT
1mA TO 500mA LOAD STEP
1
2
0
1
2
3
4
5
6
7
V
OUT
BIAS VOLTAGE (V)
Figure 32. Capacitance vs. Capacitor Voltage Bias Characteristics
V
V
= 4V
= 3.3V
IN
OUT
Equation 1 can be used to determine the worst-case capacitance,
accounting for capacitor variation over temperature, component
tolerance, and voltage.
B
CH1 500mA Ω B CH2 50.0mV
M400ns A CH1 200mA
13.60%
W
W
T
Figure 31. Output Transient Response, COUT = 4.7 µF
CEFF = C × (1 − TEMPCO) × (1 − TOL)
(1)
where:
C
EFF is the effective capacitance at the operating voltage.
C is the rated capacitance value.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
Rev. D | Page 12 of 20
Data Sheet
ADP124/ADP125
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
C is 0.94 μF at 4.2 V from the graph in Figure 32.
The active and inactive thresholds of the EN pin are derived from
the VIN voltage. Therefore, these thresholds vary as the input
voltage changes. Figure 34 shows typical EN active and inactive
thresholds when the VIN voltage varies from 2.3 V to 5.5 V.
1.05
Substituting these values in Equation 1 yields
1.00
0.95
C
EFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over tem-
perature and tolerance at the chosen output voltage.
RISING
0.90
0.85
0.80
0.75
0.70
0.65
To guarantee the performance of the ADP124/ADP125, it is
imperative that the effects of dc bias, temperature, and tolerances
on the behavior of the capacitors are evaluated for each application.
FALLING
UNDERVOLTAGE LOCKOUT
The ADP124/ADP125 have an internal undervoltage lockout
circuit that disables all inputs and the output when the input
voltage is less than approximately 2 V. This ensures that the
ADP124/ADP125 inputs and the output behave in a predictable
manner during power-up.
0.60
2.2
2.7
3.2
3.7
4.2
4.7
5.2
V
(V)
IN
Figure 34. Typical EN Pin Thresholds vs. Input Voltage
The ADP124/ADP125 use an internal soft start to limit the
inrush current when the output is enabled. The start-up time
for the 2.8 V option is approximately 350 µs from the time the
EN active threshold is crossed to when the output reaches 90%
of its final value. As shown in Figure 35, the start-up time is
dependent on the output voltage setting and increases slightly
as the output voltage increases.
ENABLE FEATURE
The ADP124/ADP125 uses the EN pin to enable and disable the
VOUT pin under normal operating conditions. As shown in
Figure 33, when a rising voltage on EN crosses the active threshold,
VOUT turns on. Conversely, when a falling voltage on EN crosses
the inactive threshold, VOUT turns off.
3.5
V
V
= 5V
IN
3.0
2.5
2.0
1.5
1.0
0.5
0
= 4.2V
= 3.3V
OUT
OUT
V
V
= 2.8V
OUT
1
2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
B
CH1 1.00V CH2 1.00V
M100µs
296.800µs
A
CH1
2.00V
W
V
EN
T
Figure 33. Typical EN Pin Operation
Figure 35. Typical Start-Up Time
As shown in Figure 33, the EN pin has built-in hysteresis. This
prevents on/off oscillations that may occur due to noise on the
EN pin as it passes through the threshold points.
Rev. D | Page 13 of 20
ADP124/ADP125
Data Sheet
Table 6. Typical θJA Values for Specified PCB Copper Sizes
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
θJA (°C/W)
Copper
Size (mm2) MSOP
The ADP124/ADP125 are protected from damage due to excessive
power dissipation by current and thermal overload protection
circuits. The ADP124/ADP125 are designed to limit the current
when the output load reaches 750 mA (typical). When the output
load exceeds 750 mA, the output voltage is reduced to maintain
a constant current limit.
LFCSP
177.8
138.2
79.8
67.8
53.5
25
108.6
75.5
42.5
34.7
26.1
100
500
1000
6400
Thermal overload protection is included, which limits the junction
temperature to a maximum of 150°C typical. Under extreme con-
ditions (that is, high ambient temperature and power dissipation),
when the junction temperature starts to rise above 150°C, the
output is turned off, reducing output current to zero. When the
junction temperature cools to less than 135°C, the output is turned
on again and the output current is restored to its nominal value.
Table 7. Typical ΨJB Values
ΨJB (°C/W)
MSOP
LFCSP
31.7
44.1
The junction temperature of the ADP124/ADP125 can be
calculated from the following equation:
Consider the case where a hard short from VOUT to GND occurs.
At first, the ADP124/ADP125 limit the current so that only
750 mA is conducted into the short. If self-heating causes the
junction temperature to rise above 150°C, thermal shutdown
activates, turning off the output and reducing the output
current to zero. When the junction temperature cools to less
than 135°C, the output turns on and conducts 750 mA into the
short, again causing the junction temperature to rise above
150°C. This thermal oscillation between 135°C and 150°C results
in a current oscillation between 750 mA and 0 mA that
continues as long as the short remains at the output.
TJ = TA + (PD × θJA)
(2)
(3)
where:
TA is the ambient temperature.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND
)
where:
I
I
LOAD is the load current.
GND is the ground current.
VIN and VOUT are input and output voltages, respectively.
Current and thermal limit protections are intended to protect the
device from damage due to accidental overload conditions. For
reliable operation, the device power dissipation must be externally
limited so that the junction temperature does not exceed 125°C.
The power dissipation due to ground current is quite small and
can be ignored. Therefore, the junction temperature equation
can be simplified as follows:
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
THERMAL CONSIDERATIONS
As shown in Equation 4, for a given ambient temperature, input-
to-output voltage differential, and continuous load current, there
exists a minimum copper size requirement for the PCB to ensure
that the junction temperature does not rise above 125°C. Figure 36
through Figure 41 show junction temperature calculations for
different ambient temperatures, load currents, VIN to VOUT
differentials, and areas of PCB copper.
To guarantee reliable operation, the junction temperature of the
ADP124/ADP125 must not exceed 125°C. To ensure that the
junction temperature is less than this maximum value, the user
needs to be aware of the parameters that contribute to junction
temperature changes. These parameters include ambient tem-
perature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θJA). The value
of θJA is dependent on the package assembly compounds used
and the amount of copper to which the GND pins of the package
are soldered on the PCB. Table 6 shows typical θJA values of the
8-lead MSOP package for various PCB copper sizes. Table 7
shows typical ΨJB values of the 8-lead MSOP and 8-lead 3 mm ×
3 mm LFCSP package.
In cases where the board temperature is known, the thermal
characterization parameter, ΨJB, can be used to estimate the jun-
ction temperature rise. The maximum junction temperature (TJ) is
calculated from the board temperature (TB) and power dissipation
(PD) using the formula
TJ = TB + (PD × ΨJB)
(5)
Rev. D | Page 14 of 20
Data Sheet
ADP124/ADP125
JUNCTION TEMPERATURE CALCULATIONS
140
130
120
110
100
90
145
135
125
115
105
95
85
75
80
65
2
2
55
6400 mm
6400 mm
70
2
2
500 mm
500 mm
45
2
2
25 mm
25 mm
60
35
25
T
MAX
T
MAX
J
J
50
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
TOTAL POWER DISSIPATION (W)
TOTAL POWER DISSIPATION (W)
Figure 36. Junction Temperature vs. Power Dissipation and copper area,
MSOP, TA = 25°C
Figure 39. Junction Temperature vs. Power Dissipation and copper area,
LFCSP, TA = 50°C
140
120
100
80
145
135
125
115
105
95
85
60
75
T
T
T
T
= 25°C
= 50°C
= 65°C
= 85°C
MAX
65
B
B
B
B
40
20
0
2
55
45
35
25
6400 mm
2
500 mm
2
25 mm
T
J
T
MAX
J
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
TOTAL POWER DISSIPATION (W)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
TOTAL POWER DISSIPATION (W)
Figure 40. Junction Temperature vs. Power Dissipation, MSOP package
at various Board Temperatures
Figure 37. Junction Temperature vs. Power Dissipation and copper area,
LFCSP, TA = 25°C
140
120
100
80
140
130
120
110
100
90
60
T
T
T
T
= 25°C
= 50°C
= 65°C
= 85°C
MAX
80
B
B
B
B
40
20
0
2
6400 mm
70
2
500 mm
2
25 mm
MAX
60
50
T
J
T
J
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
TOTAL POWER DISSIPATION (W)
TOTAL POWER DISSIPATION (W)
Figure 38. Junction Temperature vs. Power Dissipation and copper area,
MSOP, TA = 50°C
Figure 41. Junction Temperature vs. Power Dissipation, LFCSP package
at various Board Temperatures
Rev. D | Page 15 of 20
ADP124/ADP125
Data Sheet
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP124/
ADP125. However, as shown in Table 6, a point of diminishing
returns eventually is reached, beyond which an increase in the
copper size does not yield significant heat dissipation benefits.
The input capacitor should be placed as close as possible to the
VIN and GND pins, and the output capacitor should be placed
as close as possible to the VOUT and GND pins. Use of 0402 or
0603 size capacitors and resistors achieves the smallest possible
footprint solution on boards where the area is limited.
Figure 43. Example ADP125 MSOP PCB Layout
Figure 42. Example ADP124 MSOP PCB Layout
Figure 44. Example ADP124/ADP125 LFCSP PCB Layout
Rev. D | Page 16 of 20
Data Sheet
ADP124/ADP125
OUTLINE DIMENSIONS
3.10
3.00
2.90
1.825
1.725
1.625
8
5
4
5.05
4.90
4.75
1.760
1.660
1.560
3.10
3.00
2.90
EXPOSED
PAD
1
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.65
BSC
SECTION OF THIS DATA SHEET.
1.95 BSC
0.94
0.86
0.78
1.10
MAX
0.25 GAGE
0.23
0.08
PLANE
END VIEW
6°
0°
0.13
MAX
0.40
0.33
0.25
0.70
0.55
0.40
0.95
REF
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA-T
Figure 45. 8-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP]
(RH-8-1)
Dimensions shown in millimeters
1.70
1.60
1.50
2.10
2.00 SQ
0.50 BSC
1.90
8
5
0.15 REF
PIN 1 INDEX
AREA
EXPOSED
PAD
1.10
1.00
0.90
0.425
0.350
0.275
4
1
PIN 1
INDICATOR
(R 0.15)
TOP VIEW
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.60
0.55
0.50
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.30
0.25
0.20
0.20 REF
Figure 46. 8-Lead Lead Frame Chip Scale Package [LFCSP_UD]
2 mm × 2 mm Body, Ultra Thin, Dual Lead
(CP-8-10)
Dimensions shown in millimeters
Rev. D | Page 17 of 20
ADP124/ADP125
Data Sheet
ORDERING GUIDE
Model1
Temperature Range (TJ) Output Voltage (V)2
Package Description
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead MINI_SO_EP
8-Lead LFCSP_UD
8-Lead LFCSP_UD
8-Lead LFCSP_UD
8-Lead LFCSP_UD
8-Lead LFCSP_UD
Package Option
Branding
37
3T
3U
3Z
40
41
49
4F
LHH
LHJ
LM2
LHK
LHL
LHM
38
ADP124ARHZ-1.8-R7
ADP124ARHZ-2.5-R7
ADP124ARHZ-2.7-R7
ADP124ARHZ-2.8-R7
ADP124ARHZ-2.85-R7
ADP124ARHZ-2.9-R7
ADP124ARHZ-3.0-R7
ADP124ARHZ-3.3-R7
ADP124ACPZ-1.8-R7
ADP124ACPZ-2.8-R7
ADP124ACPZ-2.9-R7
ADP124ACPZ-3.0-R7
ADP124ACPZ-3.3-R7
ADP125ACPZ-R7
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
1.8
2.5
2.7
2.8
2.85
2.9
3.0
3.3
1.8
2.8
2.9
3.0
3.3
RH-8-1
RH-8-1
RH-8-1
RH-8-1
RH-8-1
RH-8-1
RH-8-1
RH-8-1
CP-8-10
CP-8-10
CP-8-10
CP-8-10
CP-8-10
CP-8-10
RH-8-1
RH-8-1
0.8 to 5.0 (Adjustable) 8-Lead LFCSP_UD
0.8 to 5.0 (Adjustable) 8-Lead MINI_SO_EP
0.8 to 5.0 (Adjustable) 8-Lead MINI_SO_EP
ADP125ARHZ-R7
ADP125ARHZ
38
ADP125-EVALZ
Adjustable
Adjustable
MSOP Evaluation Board
LFCSP Evaluation Board
REDYKIT
ADP125CP-EVALZ
ADP124RHZ-REDYKIT
ADP124CPZ-REDYKIT
REDYKIT
1 Z = RoHS Compliant Part.
2 Up to 31 fixed-output voltage options from 1.75 V to 3.3 V are available. For additional voltage options, contact a local Analog Devices, Inc., sales or distribution
representative.
Rev. D | Page 18 of 20
Data Sheet
NOTES
ADP124/ADP125
Rev. D | Page 19 of 20
ADP124/ADP125
NOTES
Data Sheet
©2009–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08476-0-12/14(D)
Rev. D | Page 20 of 20
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