ADP1711AUJZ-0.8-R7_技术文档

150 mA, Low Dropout,

CMOS Linear Regulator

ADP1710/ADP1711

FEATURES

TYPICAL APPLICATION CIRCUITS

Maximum output current: 150 mA

Input voltage range: 2.5 V to 5.5 V

Light load efficient

ADP1710

V

= 5V

V

= 3.3V

1µF

IN

1µF

OUT

1

2

3

5

IN

OUT

I

_GND= 35 μA with zero load

_GND= 40 μA with 100 μA load

GND

EN

4

NC

Low shutdown current: <1 μA

Low dropout voltage: 150 mV @ 150 mA load

Initial accuracy: 1ꢀ

NC = NO CONNECT

Figure 1. ADP1710 with Fixed Output Voltage, 3.3 V

Accuracy over line, load, and temperature: 2ꢀ

Stable with small 1μF ceramic output capacitor

16 fixed output voltage options: 0.75 V to 3.3 V (ADP1710)

Adjustable output voltage option: 0.8 V to 5.0 V

(ADP1710 Adjustable)

16 fixed output voltage options with reference bypass:

0.75 V to 3.3 V (ADP1711)

High PSRR: 69 dB @ 1 kHz

ADP1710

ADJUSTABLE

V

= 5.5V

V

= 0.8V(1 + R1/R2)

1µF

IN

OUT

1

2

3

5

4

IN

OUT

ADJ

1µF

GND

EN

R1

R2

Low noise: 40 μV_RMS

Excellent load/line transient response

Current limit and thermal overload protection

Logic controlled enable

Figure 2. ADP1710 with Adjustable Output Voltage, 0.8 V to 5.0 V

ADP1711

5-lead TSOT package

V

= 5V

V

= 3.3V

1µF

IN

OUT

1

2

3

5

IN

OUT

APPLICATIONS

1µF

Mobile phones

GND

EN

Digital camera and audio devices

Portable and battery-powered equipment

Post dc-dc regulation

10nF

4

BYP

Figure 3. ADP1711 with Fixed Output Voltage and Bypass Capacitor, 3.3 V

GENERAL DESCRIPTION

The ADP1710/ADP1711 are low dropout linear regulators

that operate from 2.5 V to 5.5 V and provide up to 150 mA of

output current. Utilizing a novel scaling architecture, ground

current drawn is a very low 40 μA, when driving a 100 μA

load, making the ADP1710/ADP1711 ideal for battery-

operated portable equipment.

The ADP1710/ADP1711 are optimized for stable operation with

small 1 μF ceramic output capacitors, allowing for good transient

performance while occupying minimal board space. An enable

pin controls the output voltage on both devices. There is also an

under-voltage lockout circuit on both devices, which disables the

regulator if IN drops below a minimum threshold.

The ADP1710 and the ADP1711 are each available in sixteen

fixed output voltage options. The ADP1710 is also available in

an adjustable version, which allows output voltages that range

from 0.8 V to 5 V via an external divider. The ADP1711 allows

for a reference bypass capacitor to be connected, which reduces

output voltage noise and improves power supply rejection.

An internal soft start gives a typical start-up time of 80 μs.

Short-circuit protection and thermal overload protection

circuits prevent damage to the devices in adverse conditions.

Both the ADP1710 and the ADP1711 are available in tiny

5lead TSOT packages, for the smallest footprint solution to all

your power needs.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

ADP1710/ADP1711

TABLE OF CONTENTS

Features .............................................................................................. 1

Enable Feature ...............................................................................8

Undervoltage Lockout (UVLO) ..................................................9

Application Information................................................................ 10

Capacitor Selection .................................................................... 10

Current Limit and Thermal Overload Protection ................. 10

Thermal Considerations............................................................ 11

Printed Circuit Board Layout Considerations ....................... 12

Outline Dimensions....................................................................... 13

Ordering Guide .......................................................................... 14

Applications....................................................................................... 1

Typical Application Circuits............................................................ 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution.................................................................................. 4

Pin Configurations and Function Descriptions ........................... 5

Typical Performance Characteristics ............................................. 6

Theory of Operation ........................................................................ 8

Adjustable Output Voltage (ADP1710 Adjustable) ................. 8

Bypass Capacitor (ADP1711) ..................................................... 8

REVISION HISTORY

10/06—Revision 0: Initial Version

Rev. 0 | Page 2 of 16

ADP1710/ADP1711

SPECIFICATIONS

V_IN= (V_OUT+ 0.5 V) or 2.5 V (whichever is greater), I_OUT= 1 mA, C_IN= C_OUT= 1 μF, T_A= 25°C, unless otherwise noted.

Table 1.

Parameter

Symbol

V_IN

Conditions

Min

Typ

35

Max

Unit

V

INPUT VOLTAGE RANGE

OPERATING SUPPLY CURRENT

T_J= –40°C to +125°C

2.5

5.5

I_GND

I_OUT= 0 μA

μA

mA

μA

%

I_OUT= 0 μA, T_J= –40°C to +125°C

I_OUT= 100 μA

50

40

I_OUT= 100 μA, T_J= –40°C to +125°C

I_OUT= 100 mA

80

665

1

I_OUT= 100 mA, T_J= –40°C to +125°C

I_OUT= 150 mA

860

1.3

I_OUT= 150 mA, T_J= –40°C to +125°C

EN = GND

SHUTDOWN CURRENT

I_GND-SD

V_OUT

0.1

EN = GND, T_J= –40°C to +125°C

I_OUT= 1 mA

1.0

FIXED OUTPUT VOLTAGE ACCURACY

(ADP1710 AND ADP1711)

–1

–2

+1

100 μA < I_OUT< 150 mA, T_J= –40°C to +125°C

I_OUT= 1 mA

+2

%

ADJUSTABLE OUTPUT VOLTAGE

ACCURACY (ADP1710 ADJUSTABLE)¹

LINE REGULATION

V_OUT

0.792 0.8

0.784

0.808

0.816

+0.1

V

100 μA < I_OUT< 150 mA, T_J= –40°C to +125°C

V_IN= (V_OUT+ 0.5 V) to 5.5 V, T_J= –40°C to +125°C

I_OUT= 10 mA to 150 mA

V

∆V_OUT/∆V_IN

∆V_OUT/∆I_OUT

–0.1

%/ V

%/mA

LOAD REGULATION²

0.002

I_OUT= 10 mA to 150 mA, T_J= –40°C to +125°C

I_OUT= 100 mA, V_OUT≥ 3.0 V

0.004 %/mA

mV

DROPOUT VOLTAGE³

V_DROPOUT

100

150

120

180

I_OUT= 100 mA, V_OUT≥ 3.0 V, T_J= –40°C to +125°C

I_OUT= 150 mA, V_OUT≥ 3.0 V

175

250

200

300

mV

I_OUT= 150 mA, V_OUT≥ 3.0 V, T_J= –40°C to +125°C

I_OUT= 100 mA, 2.5 V ≤ V_OUT< 3.0 V

I_OUT= 100 mA, 2.5 V ≤ V_OUT< 3.0 V, T_J= –40°C to +125°C

I_OUT= 150 mA, 2.5 V ≤ V_OUT< 3.0 V

I_OUT= 150 mA, 2.5 V ≤ V_OUT< 3.0 V, T_J= –40°C to +125°C

START-UP TIME⁴

T_START-UP

ADP1710

80

μs

ADP1711

CURRENT LIMIT THRESHOLD⁵

With 10 nF bypass capacitor

T_Jrising

100

270

150

μs

I_LIMIT

180

360

mA

THERMAL SHUTDOWN THRESHOLD

TS_SD

°C

V

THERMAL SHUTDOWN HYSTERESIS

UVLO ACTIVE THRESHOLD

UVLO INACTIVE THRESHOLD

UVLO HYSTERESIS

TS_SD-HYS

UVLO_ACTIVE

15

V_INfalling

1.95

1.8

UVLO_INACTIVEV_INrising

UVLO_HYS

2.45

V

250

mV

V

EN INPUT LOGIC HIGH

V_IH

2.5 V ≤ V_IN≤ 5.5 V

EN INPUT LOGIC LOW

V_IL

2.5 V ≤ V_IN≤ 5.5 V

EN = IN or GND

0.4

1

V

EN INPUT LEAKAGE CURRENT

V_I-LEAKAGE

0.1

30

μA

ADJ INPUT BIAS CURRENT

(ADP1710 ADJUSTABLE)

ADJ_I-BIAS

OUT_NOISE

100

nA

OUTPUT NOISE

ADP1710

10 Hz to 100 kHz, V_OUT= 3.3 V

330

40

μVrms

ADP1711

10 Hz to 100 kHz, V_OUT= 0.75 V, with 10 nF bypass capacitor

POWER SUPPLY REJECTION RATIO

ADP1710

PSRR

1 kHz, V_OUT= 3.3 V

58

69

dB

ADP1711

1 kHz, V_OUT= 0.75 V, with 10 nF bypass capacitor

¹Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances

of resistors used.

²Based on an end-point calculation using 10 mA and 150 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA.

³Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.5 V.

⁴Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of its nominal value.

⁵Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.

Rev. 0 | Page 3 of 16

ADP1710/ADP1711

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

Table 2.

θ_JAis specified for the worst-case conditions, that is, a device

soldered in a circuit board for surface-mount packages.

Parameter

Rating

IN to GND

OUT to GND

–0.3 V to +6 V

–0.3 V to IN

Table 3. Thermal Resistance

Package Type

5-Lead TSOT

EN to GND

ADJ/BYP to GND

Storage Temperature Range

Operating Junction Temperature Range

Soldering Conditions

–0.3 V to +6 V

–65°C to +150°C

–40°C to +125°C

JEDEC J-STD-020

θ_JA

Unit

170

°C/W

ESD CAUTION

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Rev. 0 | Page 4 of 16

ADP1710/ADP1711

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1

2

3

5

IN

GND

EN

OUT

1

2

3

5

4

IN

GND

EN

OUT

BYP

1

2

3

5

IN

GND

EN

OUT

ADP1710

ADP1711

FIXED

ADJUSTABLE

TOP VIEW

(Not to Scale)

TOP VIEW

(Not to Scale)

TOP VIEW

(Not to Scale)

4

NC

4

ADJ

NC = NO CONNECT

Figure 4. 5-Lead TSOT (UJ-Suffix)

Figure 5. 5-Lead TSOT (UJ-Suffix)

Figure 6. 5-Lead TSOT (UJ-Suffix)

Table 4. Pin Function Descriptions

ADP1710 ADP1710

Fixed

Pin No.

Adjustable ADP1711

Pin No.

Mnemonic Description

1

2

3

1

2

3

1

2

3

IN

GND

EN

Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor.

Ground.

Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the

regulator. For automatic startup, connect EN to IN.

4

NC

No Connect.

4

5

ADJ

BYP

Adjust. A resistor divider from OUT to ADJ sets the output voltage.

Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND

to reduce the internal reference noise for low noise applications.

4

5

OUT

Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor.

Rev. 0 | Page 5 of 16

ADP1710/ADP1711

TYPICAL PERFORMANCE CHARACTERISTICS

V_IN= 3.8 V, I_OUT= 1 mA, C_IN= C_OUT= 1 μF, T_A= 25°C, unless otherwise noted.

3.34

3.33

3.32

3.31

3.30

3.29

3.28

3.27

3.26

3.25

3.24

3.23

1100

1000

900

800

700

600

500

400

300

200

100

0

I

= 150mA

= 100mA

LOAD

I

= 10mA

LOAD

I

= 1mA

LOAD

I

= 100µA

LOAD

I

= 50mA

I

= 50mA

LOAD

I

= 100mA

I

LOAD

I

= 1mA

25

I

= 100µA

LOAD

I

= 10mA

–5

= 150mA

125

LOAD

–40

–5

25

(°C)

85

–40

85

125

T

T (°C)

J

Figure 7. Output Voltage vs. Junction Temperature

Figure 10. Ground Current vs. Junction Temperature

3.32

3.31

3.30

3.29

3.28

3.27

3.26

1100

1000

900

800

700

600

500

400

300

200

100

0

0.1

1

10

(mA)

100

1000

0.1

1

10

(mA)

100

1000

I

LOAD

Figure 8. Output Voltage vs. Load Current

Figure 11. Ground Current vs. Load Current

3.32

3.31

3.30

3.29

3.28

3.27

3.26

1500

1400

1300

1200

1100

1000

900

800

700

600

500

400

300

200

100

0

I

= 100µA

I

= 1mA

I

= 10mA

LOAD

I

= 150mA

= 100mA

LOAD

I

= 50mA

LOAD

I

= 100mA

= 50mA

I

LOAD

I

= 150mA

LOAD

= 1mA

I

= 100µA

LOAD

I

= 10mA

LOAD

3.3

3.8

4.3

4.8

5.3

3.3

3.8

4.3

4.8

5.3

V

(V)

V

(V)

IN

Figure 9. Output Voltage vs. Input Voltage

Figure 12. Ground Current vs. Input Voltage

Rev. 0 | Page 6 of 16

ADP1710/ADP1711

180

160

140

120

100

80

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

V

= 50mV

RIPPLE

= 5V

IN

OUT

= 0.75V

= 1µF

C

OUT

I

= 50mA

LOAD

I

=

LOAD

10mA

60

40

I

= 100µA

LOAD

20

0

0.1

10

100

1k

10k

FREQUENCY (Hz)

100k

1M

10M

1

10

(mA)

100

1000

I

LOAD

Figure 16. ADP1711 Power Supply Rejection Ratio vs. Frequency

(10 nF Bypass Capacitor)

Figure 13. Dropout Voltage vs. Load Current

3.35

3.30

3.25

3.20

3.15

3.10

3.05

3.00

2.95

0

V

= 50mV

RIPPLE

= 5V

IN

OUT

–10

–20

–30

–40

–50

–60

–70

–80

–90

= 3.3V

= 1µF

C

OUT

I

= 50mA

LOAD

I

= 10mA

LOAD

I

= 100µA

= 1mA

= 10mA

= 50mA

= 100mA

= 150mA

LOAD

I

= 100µA

100k

LOAD

3.2

3.3

3.4

(V)

3.5

3.6

10

100

1k

10k

FREQUENCY (Hz)

1M

10M

V

IN

Figure 17. ADP1710 Power Supply Rejection Ratio vs. Frequency

Figure 14. Output Voltage vs. Input Voltage (in Dropout)

7

6

5

I

= 150mA

LOAD

4

3

2

1

I

= 100mA

LOAD

I

=

LOAD

10mA

I

=

LOAD

50mA

I

LOAD

1mA

I

LOAD

100µA

0

3.20

3.25

3.30

3.35

3.40

(V)

3.45

3.50

3.55

3.60

V

IN

Figure 15. Ground Current vs. Input Voltage (In Dropout)

Rev. 0 | Page 7 of 16

ADP1710/ADP1711

THEORY OF OPERATION

The ADP1710/ADP1711 are low dropout, CMOS linear

regulators that use an advanced, proprietary architecture to

provide high power supply rejection ratio (PSRR) and excellent

line and load transient response with just a small 1 μF ceramic

output capacitor. Both devices operate from a 2.5 V to 5.5 V

input rail and provide up to 150 mA of output current.

Incorporating a novel scaling architecture, ground current is

very low when driving light loads. Ground current in shutdown

mode is typically 100 nA.

ADJUSTABLE OUTPUT VOLTAGE

(ADP1710 ADJUSTABLE)

The ADP1710 adjustable version can have its output voltage

set over a 0.8 V to 5.0 V range. The output voltage is set by

connecting a resistive voltage divider from OUT to ADJ. The

output voltage is calculated using the equation

V

_OUT= 0.8 V (1 + R1/R2)

(1)

where:

R1 is the resistor from OUT to ADJ.

R2 is the resistor from ADJ to GND.

IN

OUT

The maximum bias current into ADJ is 100 nA, so for less

than 0.5% error due to the bias current, use values less than

60 kΩ for R2.

CURRENT LIMIT

THERMAL PROTECT

+

BYPASS CAPACITOR (ADP1711)

SHUTDOWN

AND UVLO

The ADP1711 allows for an external bypass capacitor to be

connected to the internal reference, which reduces output

voltage noise and improves power supply rejection. A low

leakage capacitor of 1 nF or greater (10 nF is recommended)

must be connected between the BYP and GND pins.

NC/

ADJ/

BYP

EN

REFERENCE

GND

NC = NO CONNECT

Figure 18. Internal Block Diagram

ENABLE FEATURE

Internally, the ADP1710/ADP1711 each consist of a reference,

an error amplifier, a feedback voltage divider, and a PMOS pass

transistor. Output current is delivered via the PMOS pass

device, which is controlled by the error amplifier. The error

amplifier compares the reference voltage with the feedback

voltage from the output and amplifies the difference. If the

feedback voltage is lower than the reference voltage, the gate of

the PMOS device is pulled lower, allowing more current to pass

and increasing the output voltage. If the feedback voltage is

higher than the reference voltage, the gate of the PMOS device

is pulled higher, allowing less current to pass and decreasing the

output voltage.

The ADP1710/ADP1711 use the EN pin to enable and disable

the OUT pin under normal operating conditions. As shown in

Figure 19, when a rising voltage on EN crosses the active

threshold, OUT turns on. When a falling voltage on EN crosses

the inactive threshold, OUT turns off.

EN

The ADP1710 is available in two versions, one with fixed output

voltage options and one with an adjustable output voltage. The

fixed output voltage option is set internally to one of sixteen

values between 0.75 V and 3.3 V, using an internal feedback

network. The adjustable output voltage can be set to between 0.8

V and 5.0 V by an external voltage divider connected from OUT

to ADJ. The ADP1711 is available with fixed output voltage

options and features a bypass pin, which allows an external

capacitor to be connected, which reduces internal reference

noise. All devices are controlled by an enable pin (EN).

2

OUT

V

= 5V

IN

= 1.6V

= 1µF

OUT

C

IN

= 1µF

= 10mA

OUT

LOAD

I

TIME (1ms/DIV)

Figure 19. ADP1710 Adjustable Typical EN Pin Operation

Rev. 0 | Page 8 of 16

ADP1710/ADP1711

As can be seen, the EN pin has hysteresis built in. This prevents

on/off oscillations that can occur due to noise on the EN pin as

it passes through the threshold points.

UNDERVOLTAGE LOCKOUT (UVLO)

The ADP1710/ADP1711 have an undervoltage lockout circuit,

which monitors the voltage on the IN pin. When the voltage on

IN drops below 1.95 V (minimum), the circuit activates, disabling

the OUT pin.

The EN pin active/inactive thresholds are derived from the IN

voltage. Therefore, these thresholds vary with changing input

voltage. Figure 20 shows typical EN active/inactive thresholds

when the input voltage varies from 2.5 V to 5.5 V.

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

EN ACTIVE

HYSTERESIS

EN INACTIVE

2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50

V

(V)

IN

Figure 20. Typical EN Pin Thresholds vs. Input Voltage

Rev. 0 | Page 9 of 16

ADP1710/ADP1711

APPLICATION INFORMATION

CAPACITOR SELECTION

Output Capacitor

Input Bypass Capacitor

Connecting a 1 μF capacitor from IN to GND reduces the

circuit sensitivity to printed circuit board (PCB) layout,

especially when long input traces or high source impedance are

encountered. If greater than 1 μF of output capacitance is

required, the input capacitor should be increased to match it.

The ADP1710/ADP1711 are designed for operation with small,

space-saving ceramic capacitors, but they will function with most

commonly used capacitors as long as care is taken about the

effective series resistance (ESR) value. The ESR of the output

capacitor affects stability of the LDO control loop. A minimum of

1 μF capacitance with an ESR of 500 mΩ or less is recommended

to ensure stability of the ADP1710/ADP1711. Transient response

to changes in load current is also affected by output capacitance.

Using a larger value of output capacitance improves the transient

response of the ADP1710/ADP1711 to large changes in load

current. Figure 21 and Figure 22 show the transient responses for

output capacitance values of 1 μF and 22 μF, respectively.

Input and Output Capacitor Properties

Any good quality ceramic capacitors can be used with the

ADP1710/ADP1711, as long as they meet the minimum

capacitance and maximum ESR requirements. Ceramic

capacitors are manufactured with a variety of dielectrics, each

with different behavior over temperature and applied voltage.

Capacitors must have a dielectric adequate to ensure the

minimum capacitance over the necessary temperature range

and dc bias conditions. X5R or X7R dielectrics with a voltage

rating of 6.3 V or 10 V are recommended. Y5V and Z5U

dielectrics are not recommended, due to their poor temperature

and dc bias characteristics.

V

RESPONSE TO LOAD STEP

OUT

FROM 7.5mA TO 142.5mA

CURRENT LIMIT AND THERMAL OVERLOAD

PROTECTION

1

The ADP1710/ADP1711 are protected against damage due to

excessive power dissipation by current and thermal overload

protection circuits. The ADP1710/ADP1711 are designed to

current limit when the output load reaches 270 mA (typical).

When the output load exceeds 270 mA, the output voltage is

reduced to maintain a constant current limit.

V

C

= 5V

IN

= 3.3V

= 1µF

OUT

IN

= 1µF

OUT

TIME (4µs/DIV)

Thermal overload protection is included, which limits the

junction temperature to a maximum of 150°C (typical). Under

extreme conditions (that is, high ambient temperature and

power dissipation) when the junction temperature starts to rise

above 150°C, the output is turned off, reducing the output

current to zero. When the junction temperature drops below

135°C, the output is turned on again and output current is

restored to its nominal value.

Figure 21. Output Transient Response, C_OUT= 1 μF

V

RESPONSE TO LOAD STEP

OUT

FROM 7.5mA TO 142.5mA

1

Consider the case where a hard short from OUT to ground

occurs. At first the ADP1710/ADP1711 current limits, so that

only 270 mA is conducted into the short. If self heating of the

junction is great enough to cause its temperature to rise above

150°C, thermal shutdown activates, turning off the output and

reducing the output current to zero. As the junction

temperature cools and drops below 135°C, the output turns on

and conducts 270 mA into the short, again causing the

junction temperature to rise above 150°C. This thermal

oscillation between 135°C and 150°C causes a current

oscillation between 270 mA and 0 mA, which continues as

long as the short remains at the output.

V

C

= 5V

IN

= 3.3V

= 22µF

OUT

IN

C

= 22µF

OUT

TIME (4µs/DIV)

Figure 22. Output Transient Response, C_OUT= 22 μF

Rev. 0 | Page 10 of 16

ADP1710/ADP1711

140

120

100

80

Current and thermal limit protections are intended to protect

the device against accidental overload conditions. For reliable

operation, device power dissipation must be externally limited

so junction temperatures do not exceed 125°C.

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

THERMAL CONSIDERATIONS

To guarantee reliable operation, the junction temperature of the

ADP1710/ADP1711 must not exceed 125°C. To ensure the

junction temperature stays below this maximum value, the user

needs to be aware of the parameters that contribute to junction

temperature changes. These parameters include ambient

temperature, power dissipation in the power device, and thermal

resistances between the junction and ambient air (θ_JA). The θ_JA

number is dependent on the package assembly compounds used

and the amount of copper to which the GND pins of the package

are soldered on the PCB. Table 5 shows typical θ_JAvalues of the

5lead TSOT package for various PCB copper sizes.

60

40

20

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

5.0

V

– V

IN

Figure 23. 500 mm²of PCB Copper, T_A= 25°C

140

120

100

80

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

Table 5.

Copper Size (mm²)

0¹

θ_JA(°C/W)

170

152

146

134

131

50

100

300

500

60

40

¹Device soldered to minimum size pin traces.

20

The junction temperature of the ADP1710/ADP1711 can be

calculated from the following equation:

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

T_J= T_A+ (P_D× θ_JA)

(2)

(3)

V

– V

IN

Figure 24. 100 mm²of PCB Copper, T_A= 25°C

where:

T_Ais the ambient temperature.

P_Dis the power dissipation in the die, given by

140

120

100

80

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

P_D= [(V_IN– V_OUT) × I_LOAD] + (V_IN× I_GND

)

where:

I

_LOADis the load current.

_GNDis the ground current.

60

V_INand V_OUTare the input voltage and output voltage,

respectively.

40

Power dissipation due to ground current is quite small and can

be ignored. Therefore, the junction temperature equation

simplifies to the following:

20

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

T_J= T_A+ {[(V_IN– V_OUT) × I_LOAD] × θ_JA}

(4)

V

– V

IN

As shown in Equation 4, for a given ambient temperature, input

to output voltage differential, and continuous load current,

there exists a minimum copper size requirement for the PCB to

ensure the junction temperature does not rise above 125°C. The

following figures show junction temperature calculations for

different ambient temperatures, load currents, V_INto V_OUT

differentials, and areas of PCB copper.

Figure 25. 0 mm²of PCB Copper, T_A= 25°C

Rev. 0 | Page 11 of 16

ADP1710/ADP1711

140

PRINTED CIRCUIT BOARD LAYOUT

CONSIDERATIONS

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

120

100

80

60

40

20

0

Heat dissipation from the package can be improved by increasing

the amount of copper attached to the pins of the ADP1710/

ADP1711. However, as can be seen from Table 5, a point of

diminishing returns eventually is reached, beyond which an

increase in the copper size does not yield significant heat

dissipation benefits.

Place the input capacitor as close as possible to the IN and GND

pins. Place the output capacitor as close as possible to the OUT

and GND pins. For ADP1711, place the internal reference

bypass capacitor as close as possible to the BYP pin. Use of 0402

or 0603 size capacitors and resistors achieves the smallest

possible footprint solution on boards where area is limited.

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

5.0

V

– V

IN

Figure 26. 500 mm²of PCB Copper, T_A= 50°C

GND (BOTTOM)

GND (TOP)

140

120

100

80

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

ADP1710/

ADP1711

C1

C2

60

40

20

IN

OUT

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

V

– V

IN

R1

C3

Figure 27. 100 mm²of PCB Copper, T_A= 50°C

EN

140

120

100

80

R2

MAX T_J(DO NOT OPERATE ABOVE THIS POINT)

Figure 29. Example PCB Layout

60

40

20

1mA

10mA

30mA

80mA

100mA

150mA

125mA (LOAD CURRENT)

0

0.5

1.0

1.5

2.0

2.5

3.0 3.5 4.0 4.5

(V)

OUT

V

– V

IN

Figure 28. 0 mm²of PCB Copper, T_A= 50°C

Rev. 0 | Page 12 of 16

ADP1710/ADP1711

OUTLINE DIMENSIONS

2.90 BSC

5

1

4

3

2.80 BSC

1.60 BSC

2

PIN 1

0.95 BSC

1.90

BSC

*

0.90

0.87

0.84

*

1.00 MAX

0.20

0.08

8°

4°

0°

0.10 MAX

0.60

0.45

0.30

0.50

0.30

SEATING

PLANE

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

Figure 30. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions show in millimeters

Rev. 0 | Page 13 of 16

ADP1710/ADP1711

ORDERING GUIDE

Temperature

Range

Output

Voltage (V)

Package

Description

Package

Option

Model

Branding

L4S

L0D

L40

L41

L42

L0E

L43

L47

L44

L45

L46

L0F

L0G

L0H

L0J

ADP1710AUJZ-0.75R7¹

ADP1710AUJZ-0.8-R7¹

ADP1710AUJZ-0.85R7¹

ADP1710AUJZ-0.9-R7¹

ADP1710AUJZ-0.95R7¹

ADP1710AUJZ-1.0-R7¹

ADP1710AUJZ-1.05R7¹

ADP1710AUJZ-1.10R7¹

ADP1710AUJZ-1.15R7¹

ADP1710AUJZ-1.2-R7¹

ADP1710AUJZ-1.3-R7¹

ADP1710AUJZ-1.5-R7¹

ADP1710AUJZ-1.8-R7¹

ADP1710AUJZ-2.5-R7¹

ADP1710AUJZ-3.0-R7¹

ADP1710AUJZ-3.3-R7¹

ADP1710AUJZ-R7¹

ADP1711AUJZ-0.75R7¹

ADP1711AUJZ-0.8-R7¹

ADP1711AUJZ-0.85R7¹

ADP1711AUJZ-0.9-R7¹

ADP1711AUJZ-0.95R7¹

ADP1711AUJZ-1.0-R7¹

ADP1711AUJZ-1.05R7¹

ADP1711AUJZ-1.10R7¹

ADP1711AUJZ-1.15R7¹

ADP1711AUJZ-1.2-R7¹

ADP1711AUJZ-1.3-R7¹

ADP1711AUJZ-1.5-R7¹

ADP1711AUJZ-1.8-R7¹

ADP1711AUJZ-2.5-R7¹

ADP1711AUJZ-3.0-R7¹

ADP1711AUJZ-3.3-R7¹

–40°C to +125°C

0.75

0.80

0.85

0.90

0.95

1.00

1.05

1.10

1.15

1.20

1.30

1.50

1.80

2.50

3.00

3.30

0.8 to 5.0

0.75

0.80

0.85

0.90

0.95

1.00

1.05

1.10

1.15

1.20

1.30

1.50

1.80

2.50

3.00

3.30

5-Lead TSOT

UJ-5

L0K

L0L

L4T

L0M

L48

L49

L4A

L0N

L4C

L4G

L4D

L4E

L4F

L0P

L0Q

L0R

L0S

L0U

¹Z = Pb-free part.

Rev. 0 | Page 14 of 16

ADP1710/ADP1711

NOTES

Rev. 0 | Page 15 of 16

ADP1710/ADP1711

NOTES

registered trademarks are the property of their respective owners.

D06310-0-10/06(0)

Rev. 0 | Page 16 of 16


型号：	ADP1711AUJZ-0.8-R7
厂家：	ADI
描述：	150 mA, Low Dropout, CMOS Linear Regulator 150毫安，低压差， CMOS线性稳压器稳压器
文件：	总16页 (文件大小：422K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ADP1711AUJZ-0.8-R7 [ADI]

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