ADP175ARMZ-1.05R7 [ADI]
500 mA, Low Dropout, CMOS Linear Regulator; 500毫安，低压差， CMOS线性稳压器
| 型号： | ADP175ARMZ-1.05R7 |
| 厂家： | 
ADI |
| 描述： | 500 mA, Low Dropout, CMOS Linear Regulator |
| 文件： | 总20页 (文件大小：600K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
500 mA, Low Dropout,
CMOS Linear Regulator
ADP1715/ADP1716
FEATURES
TYPICAL APPLICATION CIRCUITS
Maximum output current: 500 mA
Input voltage range: 2.5 V to 5.5 V
Low shutdown current: <1 μA
Low dropout voltage:
250 mV @ 500 mA load
ADP1715
1
2
3
4
8
7
6
5
EN
IN
GND
GND
GND
GND
V
= 5V
IN
OUT
SS
2.2µF
= 3.3V
V
OUT
50 mV @ 100 mA load
2.2µF
10nF
Initial accuracy: 1ꢀ
Accuracy over line, load, and temperature: 3ꢀ
16 fixed output voltage options with soft start:
0.75 V to 3.3 V (ADP1715)
Figure 1. ADP1715 with Fixed Output Voltage, 3.3 V
ADP1715
ADJUSTABLE
Adjustable output voltage option: 0.8 V to 5.0 V
(ADP1715 Adjustable)
16 fixed output voltage options with tracking:
0.75 V to 3.3 V (ADP1716)
1
2
3
4
8
7
6
5
EN
GND
GND
GND
GND
V
= 5V
IN
IN
OUT
ADJ
2.2µF
= 0.8(1 + R1/R2)
R1
V
OUT
Stable with small 2.2 μF ceramic output capacitor
Excellent load/line transient response
Current limit and thermal overload protection
Logic controlled enable
R2
2.2µF
Figure 2. ADP1715 with Adjustable Output Voltage, 0.8 V to 5.0 V
8-lead thermally enhanced MSOP package
ADP1716
V
(V)
OUT
APPLICATIONS
1
2
3
4
8
7
6
5
EN
GND
GND
GND
GND
3
2
1
V
= 5V
IN
IN
Notebook computers
Memory components
Telecommunications equipment
Network equipment
OUT
TRK
2.2µF
OUT
V
0
1
2
3
4
5
2.2µF
V
= 0V TO 5V
V
(V)
TRK
TRK
DSP/FPGA/μP supplies
Figure 3. ADP1716 with Output Voltage Tracking
Instrumentation equipment/data acquisition systems
GENERAL DESCRIPTION
between 0.75 V and 3.3 V; the adjustable output voltage can
be set to any value between 0.8 V and 5.0 V by an external
voltage divider connected from OUT to ADJ. The variable
soft start uses an external capacitor at SS to control the
output voltage ramp. Tracking limits the output voltage to
the at-or-below voltage at the TRK pin.
The ADP1715/ADP1716 are low dropout, CMOS linear
regulators that operate from 2.5 V to 5.5 V and provide up to
500 mA of output current. Using an advanced proprietary
architecture, they provide high power supply rejection and
achieve excellent line and load transient response with just a
small 2.2 μF ceramic output capacitor.
The ADP1715/ADP1716 are available in 8-lead thermally
enhanced MSOP packages, making them not only a very
compact solution but also providing excellent thermal
performance for applications requiring up to 500 mA of output
current in a small, low profile footprint.
Three versions of this part are available, one with fixed
output voltage options and variable soft start (ADP1715),
one with adjustable output voltage and fixed soft start
(ADP1715 Adjustable), and one with voltage tracking in
fixed output voltage options (ADP1716). The fixed output
voltage options are internally set to one of sixteen values
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADP1715/ADP1716
TABLE OF CONTENTS
Features .............................................................................................. 1
Track Mode (ADP1716) ............................................................ 11
Enable Feature ............................................................................ 11
Application Information................................................................ 12
Capacitor Selection .................................................................... 12
Current Limit and Thermal Overload Protection ................. 12
Thermal Considerations............................................................ 12
Printed Circuit Board Layout Considerations ....................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 17
Applications....................................................................................... 1
Typical Application Circuits............................................................ 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
Soft-Start Function (ADP1715)................................................ 10
Adjustable Output Voltage (ADP1715 Adjustable) ............... 11
REVISION HISTORY
9/06—Rev. 0: Initial Version
Rev. 0 | Page 2 of 20
ADP1715/ADP1716
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.5 V (whichever is greater), IOUT = 10 mA, CIN = COUT = 2.2 μF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VIN
Conditions
Min
Typ
65
Max
Unit
V
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
TJ = –40°C to +125°C
2.5
5.5
IGND
IOUT = 100 μA
μA
μA
μA
μA
μA
μA
μA
%
IOUT = 100 μA, TJ = –40°C to +125°C
IOUT = 100 mA
100
160
IOUT = 100 mA, TJ = –40°C to +125°C
100 μA < IOUT < 500 mA, TJ = –40°C to +125°C
EN = GND
220
650
SHUTDOWN CURRENT
IGND-SD
VOUT
0.1
EN = GND, TJ = –40°C to +125°C
IOUT = 10 mA
1.0
FIXED OUTPUT VOLTAGE ACCURACY
(ADP1715 and ADP1716 ONLY)
–1
–2
–3
+1
IOUT = 10 mA to 500 mA
+2
%
100 μA < IOUT < 500 mA, TJ = –40°C to +125°C
IOUT = 10 mA
+3
%
ADJUSTABLE OUTPUT VOLTAGE
ACCURACY (ADP1715 ADJUSTABLE)1
VOUT
0.792 0.8
0.784
0.808
0.816
0.824
V
IOUT = 10 mA to 500 mA
V
100 μA < IOUT < 500 mA, TJ = –40°C to +125°C
VIN = (VOUT + 0.5 V) to 5.5 V, TJ = –40°C to +125°C
0.776
V
LINE REGULATION
LOAD REGULATION2
∆VOUT/∆VIN
–0.15
+0.15 %/ V
%/mA
∆VOUT/∆IOUT IOUT = 10 mA to 500 mA
IOUT = 10 mA to 500 mA, TJ = –40°C to +125°C
IOUT = 100 mA, VOUT ≥ 3.3 V
0.002
0.004 %/mA
mV
DROPOUT VOLTAGE3
VDROPOUT
50
IOUT = 100 mA, VOUT ≥ 3.3 V, TJ = –40°C to +125°C
IOUT = 500 mA, VOUT ≥ 3.3 V
100
300
400
mV
mV
mV
mV
mV
mV
mV
250
60
IOUT = 500 mA, VOUT ≥ 3.3 V, TJ = –40°C to +125°C
IOUT = 100 mA, 2.5 V ≤ VOUT < 3.3 V
IOUT = 100 mA, 2.5 V ≤ VOUT < 3.3 V, TJ = –40°C to +125°C
IOUT = 500 mA, 2.5 V ≤ VOUT < 3.3 V
100
400
500
320
IOUT = 500 mA, 2.5 V ≤ VOUT < 3.3 V, TJ = –40°C to +125°C
START-UP TIME4
TSTART-UP
ADP1715 Adjustable and ADP1716
ADP1715 with External Soft Start
CURRENT LIMIT THRESHOLD5
THERMAL SHUTDOWN THRESHOLD
100
7.3
μs
CSS = 10 nF
TJ rising
ms
mA
ILIMIT
550
0.7
750
150
1200
1.7
TSSD
°C
°C
μA
THERMAL SHUTDOWN HYSTERESIS
TSSD-HYS
SSI-SOURCE
15
SOFT-START SOURCE CURRENT
(ADP1715 WITH EXTERNAL
SOFT START)
SS = GND
1.2
VOUT to VTRK ACCURACY
(ADP1716)
VTRK-ERROR
0 V ≤ VTRK ≤ (0.5 × VOUT(NOM)), VOUT(NOM) ≤ 1.8 V, TJ = –40°C to +125°C
–50
–100
1.8
+50
mV
mV
V
0 V ≤ VTRK ≤ (0.5 × VOUT(NOM)), VOUT(NOM) > 1.8 V, TJ = –40°C to +125°C
+100
EN INPUT LOGIC HIGH
EN INPUT LOGIC LOW
EN INPUT LEAKAGE CURRENT
VIH
2.5 V ≤ VIN ≤ 5.5 V
2.5 V ≤ VIN ≤ 5.5 V
EN = IN or GND
VIL
0.4
1
V
VI-LEAKAGE
ADJI-BIAS
0.1
30
μA
nA
ADJ INPUT BIAS CURRENT
(ADP1715 ADJUSTABLE)
100
OUTPUT NOISE
OUTNOISE
PSRR
10 Hz to 100 kHz, VOUT = 0.75 V
10 Hz to 100 kHz, VOUT = 3.3 V
1 kHz, VOUT = 0.75 V
125
450
67
μVrms
μVrms
dB
POWER SUPPLY REJECTION RATIO
1 kHz, VOUT = 3.3 V
53
dB
1 Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2 Based on an end-point calculation using 10 mA and 500 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA.
3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
Rev. 0 | Page 3 of 20
ADP1715/ADP1716
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Parameter
Rating
IN to GND
OUT to GND
–0.3 V to +6 V
–0.3 V to IN
Table 3. Thermal Resistance
Package Type
EN to GND
–0.3 V to +6 V
–0.3 V to +6 V
–65°C to +150°C
–40°C to +125°C
JEDEC J-STD-020
θJA
Unit
SS/ADJ/TRK to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
8-Lead MSOP
118
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 20
ADP1715/ADP1716
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
EN
GND
GND
GND
GND
EN
GND
GND
GND
GND
EN
IN
GND
GND
GND
GND
ADP1715
ADP1715
IN
IN
ADP1716
FIXED
ADJUSTABLE
OUT
SS
OUT
ADJ
OUT
TRK
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
Figure 4. 8-Lead MSOP (RM-Suffix)
Figure 5. 8-Lead MSOP (RM-Suffix)
Figure 6. 8-Lead MSOP (RM-Suffix)
Table 4. Pin Function Descriptions
ADP1715
Fixed
Pin No.
ADP1715
Adjustable
Pin No.
ADP1716
Pin No.
1
Mnemonic Description
1
1
EN
Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the
regulator. For automatic startup, connect EN to IN.
2
3
2
3
2
3
IN
OUT
Regulator Input Supply. Bypass IN to GND with a 2.2 μF or greater capacitor.
Regulated Output Voltage. Bypass OUT to GND with a 2.2 μF or greater
capacitor.
4
SS
ADJ
TRK
Soft Start. A capacitor connected to this pin determines the soft-start time.
Adjust. A resistor divider from OUT to ADJ sets the output voltage.
Track. The output will follow the voltage placed on the TRK pin. (See the
Theory of Operation section for a more detailed description.)
4
4
5, 6, 7, 8
5, 6, 7, 8
5, 6, 7, 8
GND
Ground.
Rev. 0 | Page 5 of 20
ADP1715/ADP1716
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, IOUT = 10 mA, CIN = 2.2 μF, COUT = 2.2 μF, TA = 25°C, unless otherwise noted.
3.364
3.354
3.344
3.334
3.324
3.314
3.304
3.294
3.284
3.274
3.264
3.254
3.244
3.234
500
450
400
350
300
250
200
150
100
50
I
= 500mA
LOAD
I
= 100mA
LOAD
I
= 10mA
LOAD
I
= 360mA
LOAD
I
= 100µA
= 500mA
LOAD
LOAD
I
= 250mA
LOAD
I
= 100mA
LOAD
I
I
= 10mA
LOAD
I
= 360mA
LOAD
25
I
= 250mA
125
LOAD
I
= 100µA
125
LOAD
0
–40
–5
85
–40
–5
25
(°C)
85
T
(°C)
T
J
J
Figure 7. Output Voltage vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
3.325
3.315
3.305
3.295
3.285
3.275
3.265
500
450
400
350
300
250
200
150
100
50
0
0.1
0.1
1
10
(mA)
100
1000
1
10
(mA)
100
1000
I
I
LOAD
LOAD
Figure 8. Output Voltage vs. Load Current
Figure 11. Ground Current vs. Load Current
3.325
3.315
3.305
3.295
3.285
3.275
3.265
600
500
400
300
200
100
0
I
= 100µA
LOAD
I
= 500mA
LOAD
I
= 10mA
LOAD
I
= 360mA
LOAD
I
= 100mA
LOAD
I
= 250mA
LOAD
I
= 250mA
LOAD
I
= 100mA
LOAD
I
= 10mA
I
= 360mA
LOAD
LOAD
I
= 500mA
4.3
LOAD
I
= 100µA
LOAD
3.3
3.8
4.8
5.3
3.3
3.8
4.3
4.8
5.3
V
(V)
V
(V)
IN
IN
Figure 9. Output Voltage vs. Input Voltage
Figure 12. Ground Current vs. Input Voltage
Rev. 0 | Page 6 of 20
ADP1715/ADP1716
350
300
250
200
150
100
50
1
SWITCH SIGNAL TO CHANGE
OUTPUT LOAD FROM 25mA TO 475mA
V
OUT
2
V
V
= 5V
IN
= 3.3V
OUT
C
C
= 2.2µF
IN
0
0.1
= 2.2µF
OUT
1
10
(mA)
100
1000
I
TIME (10µs/DIV)
LOAD
Figure 13. Dropout Voltage vs. Load Current
Figure 16. Load Transient Response
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
2.95
1
SWITCH SIGNAL TO CHANGE
OUTPUT LOAD FROM 25mA TO 475mA
I
I
I
I
I
I
= 100µA
= 10mA
V
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
OUT
2
= 100mA
= 250mA
= 360mA
= 500mA
V
V
C
= 5V
IN
= 3.3V
OUT
= 22µF
IN
C
= 22µF
OUT
3.2
3.3
3.4
(V)
3.5
3.6
V
TIME (10µs/DIV)
IN
Figure 17. Load Transient Response
Figure 14. Output Voltage vs. Input Voltage (in Dropout)
700
I
=
LOAD
500mA
600
500
400
300
200
100
0
I
=
LOAD
V
STEP FROM 4V TO 5V
360mA
IN
I
=
LOAD
250mA
1
2
I
=
V
LOAD
OUT
100mA
I
=
LOAD
10mA
I
=
V
V
= 5V
LOAD
IN
100µA
= 3.3V
OUT
C
C
I
= 2.2µF
IN
= 2.2µF
OUT
LOAD
= 500mA
3.20
3.25
3.30
3.35
3.40
(V)
3.45
3.50
3.55
3.60
V
TIME (100µs/DIV)
IN
Figure 18. Line Transient Response
Figure 15. Ground Current vs. Input Voltage (in Dropout)
Rev. 0 | Page 7 of 20
ADP1715/ADP1716
18
16
14
12
10
8
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
V
V
V
= 50mV p-p
RIPPLE
= 5V
IN
= 0.75V
= 2.2µF
= 10mA
OUT
C
OUT
I
LOAD
6
4
2
0
0
5
10
15
20
25
10
100
1k
10k
100k
1M
10M
C
(nF)
SS
FREQUENCY (Hz)
Figure 19. Output Voltage Ramp-Up Time vs. Soft-Start Capacitor Value
Figure 21. Power Supply Rejection Ratio vs. Frequency
0
0
V
V
V
= 50mV p-p
V
V
V
= 50mV p-p
RIPPLE
RIPPLE
= 5V
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
= 5V
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
IN
IN
= 0.75V
= 2.2µF
= 100mA
= 0.75V
= 2.2µF
= 100µA
OUT
OUT
C
I
C
OUT
OUT
I
LOAD
LOAD
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency
Figure 22. Power Supply Rejection Ratio vs. Frequency
Rev. 0 | Page 8 of 20
ADP1715/ADP1716
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
V
V
V
= 50mV p-p
V
V
V
= 50mV p-p
RIPPLE
RIPPLE
= 5V
= 5V
IN
OUT
IN
OUT
= 3.3V
= 2.2µF
= 100µA
= 3.3V
= 2.2µF
= 100mA
C
C
OUT
OUT
I
I
LOAD
LOAD
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Power Supply Rejection Ratio vs. Frequency
Figure 25. Power Supply Rejection Ratio vs. Frequency
0
V
V
V
= 50mV p-p
RIPPLE
= 5V
IN
–10
–20
–30
–40
–50
–60
–70
–80
–90
= 3.3V
OUT
C
= 2.2µF
= 10mA
OUT
I
LOAD
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 24. Power Supply Rejection Ratio vs. Frequency
Rev. 0 | Page 9 of 20
ADP1715/ADP1716
THEORY OF OPERATION
connect a small ceramic capacitor from SS to GND. Upon
startup, a 1.2 μA current source charges this capacitor. The
ADP1715 start-up output voltage is limited by the voltage at SS,
providing a smooth ramp up to the nominal output voltage. The
soft-start time is calculated by
The ADP1715/ADP1716 are low dropout, CMOS linear
regulators that use an advanced, proprietary architecture to
provide high power supply rejection ratio (PSRR) and excellent
line and load transient response with just a small 2.2 μF ceramic
output capacitor. Both devices operate from a 2.5 V to 5.5 V
input rail and provide up to 500 mA of output current. Supply
current in shutdown mode is typically 100 nA.
T
SS = VREF ×(CSS/ISS)
where:
SS is the soft-start period.
(1)
T
IN
OUT
V
C
I
REF is the 0.8 V reference voltage.
SS is the soft-start capacitance from SS to GND.
SS is the current sourced from SS (1.2 μA).
CURRENT LIMIT
THERMAL PROTECT
When the ADP1715 is disabled (using EN), the soft-start capacitor
is discharged to GND through an internal 100 Ω resistor.
SHUTDOWN
SS/
ADJ/
TRK
EN
EN
SOFT
START
REFERENCE
GND
Figure 26. Internal Block Diagram
1
Internally, the ADP1715/ADP1716 consist of a reference, an
error amplifier, a feedback voltage divider, and a PMOS pass
transistor. Output current is delivered via the PMOS pass
device, which is controlled by the error amplifier. The error
amplifier compares the reference voltage with the feedback
voltage from the output and amplifies the difference. If the
feedback voltage is lower than the reference voltage, the gate of
the PMOS device is pulled lower, allowing more current to pass
and increasing the output voltage. If the feedback voltage is
higher than the reference voltage, the gate of the PMOS device
is pulled higher, allowing less current to pass and decreasing the
output voltage.
OUT
V
V
C
C
= 5V
IN
= 3.3V
OUT
= 2.2µF
OUT
2
= 22nF
SS
I
= 500mA
LOAD
TIME (4ms/DIV)
Figure 27. OUT Ramp-Up with External Soft-Start Capacitor
The ADP1715 adjustable version and the ADP1716 have no
pins for soft start, so the function is switched to an internal soft-
start capacitor. This sets the soft-start ramp-up period to
approximately 24 μs. For the worst-case output voltage of 5 V,
using the suggested 2.2 μF output capacitor, the resulting input
inrush current is approximately 460 mA, which is less than the
maximum 500 mA load current.
The ADP1715 is available in two versions, one with fixed output
voltage options and one with an adjustable output voltage. The
fixed output voltage options are set internally to one of sixteen
values between 0.75 V and 3.3 V, using an internal feedback
network. The adjustable output voltage can be set to between
0.8 V and 5.0 V by an external voltage divider connected from
OUT to ADJ. The fixed output version of ADP1715 allows for
connection of an external soft-start capacitor, which controls
the output voltage ramp during startup. The ADP1716 features
a track pin and is available with fixed output voltage options. All
devices are controlled by an enable pin (EN).
EN
1
SOFT-START FUNCTION (ADP1715)
V
V
C
= 5V
= 1.6V
IN
OUT
OUT
For applications that require a controlled startup, the ADP1715
provides a programmable soft-start function. Programmable
soft start is useful for reducing inrush current upon startup and
for providing voltage sequencing. To implement soft start,
2
= 2.2µF
= 10mA
OUT
I
LOAD
TIME (20µs/DIV)
Figure 28. OUT Ramp-Up with Internal Soft-Start
Rev. 0 | Page 10 of 20
ADP1715/ADP1716
ADJUSTABLE OUTPUT VOLTAGE
(ADP1715 ADJUSTABLE)
ENABLE FEATURE
The ADP1715/ADP1716 use the EN pin to enable and disable
the OUT pin under normal operating conditions. As shown in
Figure 30, when a rising voltage on EN crosses the active
threshold, OUT turns on. When a falling voltage on EN crosses
the inactive threshold, OUT turns off.
The ADP1715 adjustable version can have its output voltage
set over a 0.8 V to 5.0 V range. The output voltage is set by
connecting a resistive voltage divider from OUT to ADJ. The
output voltage is calculated using the equation
V
OUT = 0.8 V (1 + R1/R2)
(2)
where:
R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.
EN
The maximum bias current into ADJ is 100 nA, so for less
than 0.5% error due to the bias current, use values less than
60 kΩ for R2.
1
OUT
V
V
C
= 5V
= 1.6V
IN
OUT
TRACK MODE (ADP1716)
= 2.2µF
= 10mA
OUT
The ADP1716 includes a tracking mode feature. As shown in
I
LOAD
Figure 29, if the voltage applied at the TRK pin is less than the
nominal output voltage, OUT is equal to the voltage at TRK.
TIME (1ms/DIV)
Figure 30. ADP1715 Adjustable Typical EN Pin Operation
Otherwise, OUT regulates to its nominal output value.
4
As can be seen, the EN pin has hysteresis built in. This prevents
on/off oscillations that can occur due to noise on the EN pin as
it passes through the threshold points.
3
2
1
0
The EN pin active/inactive thresholds are derived from the IN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 31 shows typical EN active/inactive thresholds
when the input voltage varies from 2.5 V to 5.5 V.
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
EN ACTIVE
0
1
2
3
4
5
HYSTERESIS
V
(V)
TRK
Figure 29. ADP1716 Output Voltage vs. Tracking Voltage
with Nominal Output Voltage Set to 3 V
For example, consider an ADP1716 with a nominal output
voltage of 3 V. If the voltage applied to its TRK pin is greater
than 3 V, OUT maintains a nominal output voltage of 3 V. If
the voltage applied to TRK is reduced below 3 V, OUT tracks
this voltage. OUT can track the TRK pin voltage from the
nominal value all the way down to 0 V. A voltage divider is
present from TRK to the error amplifier input with a divider
ratio equal to the divider from OUT to the error amplifier.
This sets the output voltage equal to the tracking voltage. Both
divider ratios are set by post-package trim, depending on the
desired output voltage.
EN INACTIVE
2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
V
(V)
IN
Figure 31. Typical EN Pin Thresholds vs. Input Voltage
Rev. 0 | Page 11 of 20
ADP1715/ADP1716
APPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the
ADP1715/ADP1716, as long as they meet the minimum
capacitance and maximum ESR requirements. Ceramic
capacitors are manufactured with a variety of dielectrics, each
with different behavior over temperature and applied voltage.
Capacitors must have a dielectric adequate to ensure the
minimum capacitance over the necessary temperature range
and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended. Y5V and Z5U
dielectrics are not recommended, due to their poor temperature
and dc bias characteristics.
The ADP1715/ADP1716 are designed for operation with small,
space-saving ceramic capacitors, but they will function with most
commonly used capacitors as long as care is taken about the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum of
2.2 μF capacitance with an ESR of 500 mΩ or less is recommended
to ensure stability of the ADP1715/ADP1716. Transient response
to changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP1715/ADP1716 to large changes in load
current. Figure 32 and Figure 33 show the transient responses for
output capacitance values of 2.2 μF and 22 μF.
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
The ADP1715/ADP1716 are protected against damage due to
excessive power dissipation by current and thermal overload
protection circuits. The ADP1715/ADP1716 are designed to
current limit when the output load reaches 750 mA (typical).
When the output load exceeds 750 mA, the output voltage is
reduced to maintain a constant current limit.
SWITCH SIGNAL TO CHANGE
OUTPUT LOAD FROM 25mA TO 475mA
1
2
Thermal overload protection is included, which limits the
junction temperature to a maximum of 150°C (typical). Under
extreme conditions (that is, high ambient temperature and
power dissipation) when the junction temperature starts to rise
above 150°C, the output is turned off, reducing the output
current to zero. When the junction temperature drops below
135°C, the output is turned on again and output current is
restored to its nominal value.
V
OUT
V
V
C
C
= 5V
IN
= 3.3V
OUT
= 2.2µF
IN
= 2.2µF
OUT
TIME (2µs/DIV)
Figure 32. Output Transient Response
Consider the case where a hard short from OUT to ground
occurs. At first the ADP1715/ADP1716 will current limit, so
that only 750 mA is conducted into the short. If self heating of
the junction is great enough to cause its temperature to rise
above 150°C, thermal shutdown will activate, turning off the
output and reducing the output current to zero. As the
junction temperature cools and drops below 135°C, the output
turns on and conducts 750 mA into the short, again causing
the junction temperature to rise above 150°C. This thermal
oscillation between 135°C and 150°C causes a current
oscillation between 750 mA and 0 mA that continues as long
as the short remains at the output.
SWITCH SIGNAL TO CHANGE
OUTPUT LOAD FROM 25mA TO 475mA
1
2
V
OUT
V
V
C
= 5V
IN
= 3.3V
OUT
= 22µF
IN
C
= 22µF
OUT
TIME (2µs/DIV)
Figure 33. Output Transient Response
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation should be externally limited
so junction temperatures do not exceed 125°C.
Input Bypass Capacitor
Connecting a 2.2 μF capacitor from the IN pin to GND reduces
the circuit sensitivity to printed circuit board (PCB) layout,
especially when long input traces, or high source impedance, is
encountered. If greater than 2.2 μF of output capacitance is
required, the input capacitor should be increased to match it.
THERMAL CONSIDERATIONS
To guarantee reliable operation, the junction temperature of the
ADP1715/ADP1716 should not exceed 125°C. To ensure the
junction temperature stays below this maximum value, the user
Rev. 0 | Page 12 of 20
ADP1715/ADP1716
140
120
100
80
should be aware of the parameters that contribute to junction
temperature changes. These parameters include ambient
temperature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θJA). The θJA
number is dependent on the package assembly compounds used
and the amount of copper to which the GND pins of the package
are soldered to on the PCB. Table 5 shows typical θJA values of the
8-lead thermally enhanced MSOP package for various PCB
copper sizes.
DO NOT OPERATE ABOVE THIS POINT
MAX T
J
60
40
20
Table 5.
1mA
10mA
50mA
100mA
250mA
500mA
Copper Size (mm2)
360mA (LOAD CURRENT)
θJA (°C/W)
0
01
118
99
77
75
74
0
0
0
1
2
3
4
5
5
5
V
– V
(V)
IN
OUT
100
300
500
700
Figure 34. 700 mm2 of PCB Copper, TA = 25°C
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
1 Device soldered to minimum size pin traces.
MAX T
J
The junction temperature of the ADP1715/ADP1716 can be
calculated from the following equation:
TJ = TA + (PD × θJA)
(3)
(4)
60
where:
40
TA is the ambient temperature.
PD is the power dissipation in the die, given by
20
1mA
50mA
250mA
500mA
10mA
100mA
360mA (LOAD CURRENT)
0
PD = [(VIN – VOUT) × ILOAD] + (VIN × IGND
)
1
2
3
4
V
– V
(V)
IN
OUT
where:
Figure 35. 300 mm2 of PCB Copper, TA = 25°C
I
I
V
LOAD is the load current.
GND is ground current.
IN and VOUT are input and output voltages, respectively.
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
MAX T
J
Power dissipation due to ground current is quite small and can
be ignored. Therefore, the junction temperature equation
simplifies to the following:
TJ = TA + {[(VIN – VOUT) × ILOAD] × θJA}
(5)
60
As shown in Equation 5, for a given ambient temperature, input
to output voltage differential, and continuous load current,
there exists a minimum copper size requirement for the PCB to
ensure the junction temperature does not rise above 125°C. The
following figures show junction temperature calculations for
different ambient temperatures, load currents, VIN to VOUT
differentials, and areas of PCB copper.
40
20
1mA
50mA
250mA
500mA
10mA
100mA
360mA (LOAD CURRENT)
0
1
2
3
4
V
– V
(V)
IN
OUT
Figure 36. 100 mm2 of PCB Copper, TA = 25°C
Rev. 0 | Page 13 of 20
ADP1715/ADP1716
140
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
DO NOT OPERATE ABOVE THIS POINT
120
100
80
60
40
20
0
MAX T
MAX T
J
J
60
40
20
1mA
50mA
250mA
500mA
1mA
50mA
250mA
500mA
10mA
100mA
360mA (LOAD CURRENT)
10mA
100mA
360mA (LOAD CURRENT)
0
0
0
0
1
2
3
4
5
5
5
0
0
0
1
2
3
4
5
5
5
V
– V
(V)
V
– V (V)
OUT
IN
OUT
IN
Figure 37. 0 mm2 of PCB Copper, TA = 25°C
Figure 40. 100 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
DO NOT OPERATE ABOVE THIS POINT
MAX T
MAX T
J
J
60
60
40
40
20
20
1mA
10mA
50mA
100mA
250mA
500mA
1mA
50mA
250mA
500mA
360mA (LOAD CURRENT)
10mA
100mA
360mA (LOAD CURRENT)
0
0
1
2
3
4
1
2
3
4
V
– V
(V)
V
– V (V)
OUT
IN
OUT
IN
Figure 38. 700 mm2 of PCB Copper, TA = 50°C
Figure 41. 0 mm2 of PCB Copper, TA = 50°C
140
120
100
80
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
DO NOT OPERATE ABOVE THIS POINT
MAX T
MAX T
J
J
60
60
40
40
20
20
1mA
10mA
50mA
100mA
250mA
500mA
1mA
50mA
250mA
500mA
360mA (LOAD CURRENT)
10mA
100mA
360mA (LOAD CURRENT)
0
0
1
2
3
4
1
2
3
4
V
– V
(V)
V
– V (V)
OUT
IN
OUT
IN
Figure 39. 300 mm2 of PCB Copper, TA = 50°C
Figure 42. 700 mm2 of PCB Copper, TA = 85°C
Rev. 0 | Page 14 of 20
ADP1715/ADP1716
140
120
100
80
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
DO NOT OPERATE ABOVE THIS POINT
MAX T
J
The 8-lead MSOP package has the four GND pins fused together
internally, which enhances its thermal characteristics. Heat
dissipation from the package is increased by connecting as much
copper as possible to the four GND pins of the ADP1715/
ADP1716. From Table 5 it can be seen that a point of
diminishing returns eventually is reached, beyond which an
increase in the copper size does not yield additional heat
dissipation benefits.
60
40
20
1mA
50mA
250mA
500mA
10mA
100mA
360mA (LOAD CURRENT)
Figure 46 shows a typical layout for the ADP1715/ADP1716.
The four GND pins are connected to a large copper pad. If a
second layer is available, multiple vias can be used to connect
them, increasing the overall copper area. The input capacitor
should be placed as close as possible to the IN and GND pins.
The output capacitor should be placed as close as possible to the
OUT and GND pins. 0603 or 0402 size capacitors and resistors
should be used to achieve the smallest possible footprint
solution on boards where area is limited.
0
0
0
0
1
2
3
4
5
5
5
V
– V
(V)
IN
OUT
Figure 43. 300 mm2 of PCB Copper, TA = 85°C
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
MAX T
J
GND (TOP)
60
40
20
1mA
10mA
50mA
100mA
250mA
500mA
360mA (LOAD CURRENT)
ADP1715/
ADP1716
0
C1
C2
1
2
3
4
V
– V
(V)
IN
OUT
Figure 44. 100 mm2 of PCB Copper, TA = 85°C
IN
OUT
140
120
100
80
DO NOT OPERATE ABOVE THIS POINT
MAX T
J
R1
R2
C3
60
EN
GND (BOTTOM)
40
Figure 46. Example PCB Layout
20
1mA
10mA
50mA
100mA
250mA
500mA
360mA (LOAD CURRENT)
0
1
2
3
4
V
– V
(V)
IN
OUT
Figure 45. 0 mm2 of PCB Copper, TA = 85°C
Rev. 0 | Page 15 of 20
ADP1715/ADP1716
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 47. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions show in millimeters
Rev. 0 | Page 16 of 20
ADP1715/ADP1716
ORDERING GUIDE
Output Voltage
(V)
Package
Description
Package
Model
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Option
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
Branding
L29
L2A
L2C
L2D
L2E
ADP1715ARMZ-0.75R71
ADP1715ARMZ-0.8-R71
ADP1715ARMZ-0.85R71
ADP1715ARMZ-0.9-R71
ADP1715ARMZ-0.95R71
ADP1715ARMZ-1.0-R71
ADP1715ARMZ-1.05R71
ADP1715ARMZ-1.1-R71
ADP1715ARMZ-1.15R71
ADP1715ARMZ-1.2-R71
ADP1715ARMZ-1.3-R71
ADP1715ARMZ-1.5-R71
ADP1715ARMZ-1.8-R71
ADP1715ARMZ-2.5-R71
ADP1715ARMZ-3.0-R71
ADP1715ARMZ-3.3-R71
ADP1715ARMZ-R71
ADP1716ARMZ-0.75R71
ADP1716ARMZ-0.8-R71
ADP1716ARMZ-0.85R71
ADP1716ARMZ-0.9-R71
ADP1716ARMZ-0.95R71
ADP1716ARMZ-1.0-R71
ADP1716ARMZ-1.05R71
ADP1716ARMZ-1.1-R71
ADP1716ARMZ-1.15R71
ADP1716ARMZ-1.2-R71
ADP1716ARMZ-1.3-R71
ADP1716ARMZ-1.5-R71
ADP1716ARMZ-1.8-R71
ADP1716ARMZ-2.5-R71
ADP1716ARMZ-3.0-R71
ADP1716ARMZ-3.3-R71
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.30
1.50
1.80
2.50
3.00
3.30
0.8 to 5.0
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.30
1.50
1.80
2.50
3.00
3.30
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
L2F
L2G
L2H
L2J
L2K
L32
L2L
L3R
L33
L34
L35
L3K
L2N
L2P
L2Q
L2R
L2S
L2T
L3D
L2U
L2 V
L2W
L2X
L2Y
L31
L37
L38
L39
1 Z = Pb-free part.
Rev. 0 | Page 17 of 20
ADP1715/ADP1716
NOTES
Rev. 0 | Page 18 of 20
ADP1715/ADP1716
NOTES
Rev. 0 | Page 19 of 20
ADP1715/ADP1716
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06110-0-9/06(0)
Rev. 0 | Page 20 of 20
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