ADP2108-1.1-EVALZ [ADI]
Compact, 600 mA, 3 MHz, Step-Down DC-to-DC Converter; 小巧的600毫安， 3 MHz的降压型DC - DC转换器
| 型号： | ADP2108-1.1-EVALZ |
| 厂家： | 
ADI |
| 描述： | Compact, 600 mA, 3 MHz, Step-Down DC-to-DC Converter |
| 文件： | 总16页 (文件大小：1088K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Compact, 600 mA, 3 MHz,
Step-Down DC-to-DC Converter
ADP2108
FEATURES
GENERAL DESCRIPTION
Peak efficiency: 95%
The ADP2108 is a high efficiency, low quiescent current step-
down dc-to-dc converter in an ultrasmall 5-ball WLCSP
package. The total solution requires only three tiny external
components. It uses a proprietary, high speed current mode,
constant frequency PWM control scheme for excellent stability
and transient response. To ensure the longest battery life in
portable applications, the ADP2108 has a power save mode that
reduces the switching frequency under light load conditions.
3 MHz fixed frequency operation
Typical quiescent current: 18 μA
Maximum load current: 600 mA
Input voltage: 2.3 V to 5.5 V
Uses tiny multilayer inductors and capacitors
Current mode architecture for fast load and line
transient response
100% duty cycle low dropout mode
Internal synchronous rectifier
Internal compensation
The ADP2108 runs on input voltages of 2.3 V to 5.5 V, which
allows for single lithium or lithium polymer cell, multiple alkaline
or NiMH cell, PCMCIA, USB, and other standard power sources.
The maximum load current of 600 mA is achievable across the
input voltage range.
Internal soft start
Current overload protection
Thermal shutdown protection
Shutdown supply current: 0.2 μA
5-ball WLCSP
The ADP2108 is available in fixed output voltages of 3.3 V, 3.0 V,
2.5 V, 2.3 V, 1.82 V, 1.8 V, 1.5 V, 1.3 V, 1.2 V, 1.1 V, and 1.0 V. All
versions include an internal power switch and synchronous rect-
ifier for minimal external part count and high efficiency. The
ADP2108 has an internal soft start and is internally compensated.
During logic controlled shutdown, the input is disconnected
from the output and the ADP2108 draws less than 1 μA from
the input source.
APPLICATIONS
PDAs and palmtop computers
Wireless handsets
Digital audio, portable media players
Digital cameras, GPS navigation units
Other key features include undervoltage lockout to prevent deep
battery discharge and soft start to prevent input current over-
shoot at startup. The ADP2108 is available in a 5-ball WLCSP.
TYPICAL APPLICATIONS CIRCUIT
ADP2108
1µH
2.3V TO 5.5V
4.7µF
1.0V TO 3.3V
10µF
SW
VIN
ON
OFF
EN
FB
GND
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADP2108
TABLE OF CONTENTS
Features .............................................................................................. 1
Enable/Shutdown ....................................................................... 11
Short-Circuit Protection............................................................ 12
Undervoltage Lockout ............................................................... 12
Thermal Protection.................................................................... 12
Soft Start ...................................................................................... 12
Current Limit.............................................................................. 12
100% Duty Operation................................................................ 12
Applications Information.............................................................. 13
External Component Selection ................................................ 13
Thermal Considerations............................................................ 14
PCB Layout Guidelines.............................................................. 14
Evaluation Board ............................................................................ 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
General Description......................................................................... 1
Typical Applications Circuit............................................................ 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
Control Scheme .......................................................................... 11
PWM Mode................................................................................. 11
Power Save Mode........................................................................ 11
REVISION HISTORY
12/08—Rev. 0 to Rev. A
Changes to Figure 4.......................................................................... 6
Updated Outline Dimensions....................................................... 16
9/08—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADP2108
SPECIFICATIONS
VIN = 3.6 V, VOUT = 1.8 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless
otherwise noted.1
Table 1.
Parameter
Test Conditions/Comments
Min
2.3
Typ
Max
Unit
INPUT CHARACTERISTICS
Input Voltage Range
Undervoltage Lockout Threshold
5.5
V
V
V
VIN rising
VIN falling
2.3
2.05
2.15
2.25
OUTPUT CHARACTERISTICS
Output Voltage Accuracy
PWM mode
−2
+2
%
VIN = 2.3 V to 5.5 V, PWM mode
−2.5
+2.5
%
POWER SAVE MODE TO PWM CURRENT THRESHOLD
PWM TO POWER SAVE MODE CURRENT THRESHOLD
INPUT CURRENT CHARACTERISTICS
DC Operating Current
85
80
mA
mA
ILOAD = 0 mA, device not switching
EN = 0 V, TA = TJ = −40°C to +85°C
18
30
μA
μA
Shutdown Current
0.2
1.0
SW CHARACTERISTICS
SW On Resistance
PFET
320
mΩ
mΩ
mA
NFET
300
Current Limit
PFET switch peak current limit
1100
1.2
1300
1500
ENABLE CHARACTERISTICS
EN Input High Threshold
EN Input Low Threshold
EN Input Leakage Current
OSCILLATOR FREQUENCY
START-UP TIME
V
0.4
+1
V
EN = 0 V, 3.6 V
ILOAD = 200 mA
−1
0
μA
MHz
μs
2.5
3.0
3.5
550
THERMAL CHARACTERISTICS
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
150
20
°C
°C
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Rev. A | Page 3 of 16
ADP2108
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
θJA is specified for a device mounted on a JEDEC 2S2P PCB.
Parameter
Rating
VIN, EN
FB, SW to GND
−0.4 V to +6.5 V
−1.0 V to (VIN + 0.2 V)
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
−65°C to +150°C
300°C
Table 3. Thermal Resistance
Package Type
θJA
Unit
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
Lead Temperature Range
Soldering (10 sec)
5-Ball WLCSP
105
°C/W
ESD CAUTION
Vapor Phase (60 sec)
Infrared (15 sec)
215°C
220°C
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
1500 V
500 V
100 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 4 of 16
ADP2108
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
INDICATOR
1
2
VIN GND
SW
A
B
C
EN
FB
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
A1
VIN
Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater
capacitor as close to the ADP2108 as possible.
A2
B
C1
C2
GND
SW
EN
Ground. Connect all the input and output capacitors to GND.
Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier.
Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.2 μA.
Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.
FB
Rev. A | Page 5 of 16
ADP2108
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.6 V, TA = 25°C, VEN = VIN, unless otherwise noted.
24
1400
1300
1200
1100
1000
900
+85°C
22
20
+25°C
18
–40°C
16
800
14
12
700
600
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 3. Quiescent Supply Current vs. Input Voltage
Figure 6. PMOS Current Limit vs. Input Voltage
3500
3400
3300
3200
3100
3000
2900
2800
2700
2600
2500
0.15
0.14
0.13
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
–40°C
+25°C
+85°C
–40°C
PWM TO PSM
PSM TO PWM
+85°C
2.3
2.8
3.3
3.8
4.3
4.8
5.3
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 4. Switching Frequency vs. Input Voltage
Figure 7. Mode Transition Across Temperature
1.840
1.835
1.830
1.825
1.820
1.815
1.810
1.805
1.800
1.795
0.15
0.14
0.13
0.12
0.11
0.10
0.09
0.08
0.07
0.06
I
= 10mA
OUT
I
= 150mA
= 500mA
OUT
I
OUT
PSM TO PWM
PWM TO PSM
–45
–25
–5
15
35
55
75
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Temperature
Figure 8. Mode Transition
Rev. A | Page 6 of 16
ADP2108
1.825
1.815
1.805
1.795
1.785
1.775
100
90
80
70
60
50
40
30
20
10
0
V
V
V
V
= 2.7V
= 3.6V
= 4.5V
= 5.5V
V
V
V
V
= 2.7V
= 3.6V
= 4.5V
= 5.5V
IN
IN
IN
IN
IN
IN
IN
IN
0
0.1
0.2
0.3
0.4
0.5
0.6
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 9. Load Regulation, VOUT = 1.8 V
Figure 12. Efficiency, VOUT = 1.8 V
1.025
1.020
1.015
1.010
1.005
1.000
0.995
0.990
0.985
100
90
80
70
60
50
40
30
20
10
0
V
V
V
V
= 2.7V
= 3.6V
= 4.5V
= 5.5V
IN
IN
IN
IN
V
V
V
V
= 2.7V
= 3.6V
= 4.5V
= 5.5V
IN
IN
IN
IN
0
0.1
0.2
0.3
0.4
0.5
0.6
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 10. Load Regulation, VOUT = 1.0 V
Figure 13. Efficiency, VOUT = 1.0 V
100
90
80
70
60
50
40
30
20
10
0
3.3775
3.3575
3.3375
3.3175
3.2975
3.2775
3.2575
3.2375
3.2175
V
V
V
= 3.6V
= 4.5V
= 5.5V
IN
IN
IN
V
V
V
= 3.6V
= 4.5V
= 5.5V
IN
IN
IN
0
0.1
0.2
0.3
0.4
0.5
0.6
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 11. Load Regulation, VOUT = 3.3 V
Figure 14. Efficiency, VOUT = 3.3 V
Rev. A | Page 7 of 16
ADP2108
V
IN
V
3
IN
3
SW
SW
4
1
4
1
V
OUT
V
OUT
CH1 50mV
CH3 1V
M 40µs
10.80%
A CH3
4.4V
CH1 50mV
CH3 1V
M 40µs
10.80%
A CH3
3.26V
CH4 2V
CH4 2V
T
T
Figure 15. Line Transient, VOUT = 1.8 V, Power Save Mode, 20 mA
Figure 18. Line Transient, VOUT = 3.3 V, PWM, 200 mA
SW
V
IN
4
1
SW
V
OUT
3
4
V
OUT
I
OUT
2
1
CH1 50mV CH2 200mA Ω
M 40µs
19.80%
A CH2
36mA
CH1 20mV
CH3 1V
M 40µs
10.80%
A CH3
3.26V
CH4 2V
CH4 2V
T
T
Figure 16. Line Transient, VOUT = 1.8 V, PWM, 200 mA
Figure 19. Load Transient, VOUT = 1.8 V, 300 mA to 600 mA
V
IN
4
1
SW
SW
3
4
V
OUT
I
OUT
V
OUT
2
1
CH1 50mV
CH3 1V
M 40µs
10.80%
A CH3
3.26V
CH1 50mV CH2 250mA
CH4 2V
M 40µs
25.4%
A CH2
5mA
CH4 2V
T
T
Figure 17. Line Transient, VOUT = 1.0 V, PWM, 200 mA
Figure 20. Load Transient, VOUT = 1.8 V, 50 mA to 300 mA
Rev. A | Page 8 of 16
ADP2108
SW
SW
4
4
1
V
OUT
I
L
2
V
I
OUT
OUT
1
3
EN
2
CH1 50mV CH2 50mA Ω
M 40µs
25.4%
A CH2
12mA
CH1 500mV CH2 500mA
CH3 5V CH4 5V
M 40µs
19.80%
A CH3
2.1V
CH4 2V
T
T
Figure 21. Load Transient, VOUT = 1.8 V, 5 mA to 50 mA
Figure 24. Start-Up, VOUT = 1.0 V, 600 mA
SW
SW
4
4
2
I
I
L
L
2
V
V
OUT
OUT
EN
EN
1
3
1
3
CH1 1V
CH3 5V
CH2 250mA
CH4 5V
M 40µs
10.80%
A CH3
2V
CH2 250mA
CH4 5V
CH1 2V
CH3 5V
M 40µs
10.80%
A CH3
2V
T
T
Figure 22. Start-Up, VOUT = 1.8 V, 400 mA
Figure 25. Start-Up, VOUT = 3.3 V, 150 mA
SW
4
SW
4
I
L
2
I
L
2
1
V
OUT
EN
1
3
V
OUT
CH1 1V
CH3 5V
CH2 250mA
CH4 5V
M 40µs
10.80%
A CH3
2V
CH1 50mV CH2 500mA
CH4 2V
M 2µs
A CH4
2.64mA
T
T
20%
Figure 26. Typical Power Save Mode Waveform, 50 mA
Figure 23. Start-Up, VOUT = 1.8 V, 5 mA
Rev. A | Page 9 of 16
ADP2108
SW
4
I
L
2
1
V
OUT
CH1 20mV CH2 200mA
CH4 2V
M 200ns
A CH4
2.64V
T
20%
Figure 27. Typical PWM Waveform, 200 mA
Rev. A | Page 10 of 16
ADP2108
THEORY OF OPERATION
PWM
COMP
GM ERROR
AMP
VIN
SOFT START
I
LIMIT
LOW
FB
PSM
COMP
PWM/
PSM
CONTROL
CURRENT
SW
DRIVER
AND
OSCILLATOR
ANTISHOOT-
THROUGH
UNDERVOLTAGE
LOCKOUT
GND
THERMAL
SHUTDOWN
ADP2108
EN
Figure 28. Functional Block Diagram
The ADP2108 is a step-down dc-to-dc converter that uses a
fixed frequency and high speed current mode architecture. The
high switching frequency and tiny 5-ball WLCSP package allow
for a small step-down dc-to-dc converter solution.
POWER SAVE MODE
The ADP2108 smoothly transitions to the power save mode of
operation when the load current decreases below the power
save mode current threshold. When the ADP2108 enters power
save mode, an offset is induced in the PWM regulation level,
which makes the output voltage rise. When the output voltage
reaches a level approximately 1.5% above the PWM regulation
level, PWM operation is turned off. At this point, both power
switches are off, and the ADP2108 enters an idle mode. COUT
discharges until VOUT falls to the PWM regulation voltage, at
which point the device drives the inductor to make VOUT rise
again to the upper threshold. This process is repeated while the
load current is below the power save mode current threshold.
The ADP2108 operates with an input voltage of 2.3 V to 5.5 V
and regulates an output voltage down to 1.0 V.
CONTROL SCHEME
The ADP2108 operates with a fixed frequency, current mode
PWM control architecture at medium to high loads for high
efficiency, but shifts to a power save mode control scheme at
light loads to lower the regulation power losses. When operating
in fixed frequency PWM mode, the duty cycle of the integrated
switches is adjusted and regulates the output voltage. When
operating in power save mode at light loads, the output voltage
is controlled in a hysteretic manner, with higher VOUT ripple.
During part of this time, the converter is able to stop switching
and enters an idle mode, which improves conversion efficiency.
Power Save Mode Current Threshold
The power save mode current threshold is set to 80 mA. The
ADP2108 employs a scheme that enables this current to remain
accurately controlled, independent of VIN and VOUT levels. This
scheme also ensures that there is very little hysteresis between
the power save mode current threshold for entry to and exit from
the power save mode. The power save mode current threshold
is optimized for excellent efficiency over all load currents.
PWM MODE
In PWM mode, the ADP2108 operates at a fixed frequency of
3 MHz, set by an internal oscillator. At the start of each oscillator
cycle, the PFET switch is turned on, sending a positive voltage
across the inductor. Current in the inductor increases until the
current sense signal crosses the peak inductor current threshold
that turns off the PFET switch and turns on the NFET synchronous
rectifier. This sends a negative voltage across the inductor, causing
the inductor current to decrease. The synchronous rectifier stays
on for the rest of the cycle. The ADP2108 regulates the output
voltage by adjusting the peak inductor current threshold.
ENABLE/SHUTDOWN
The ADP2108 starts operation with soft start when the EN pin
is toggled from logic low to logic high. Pulling the EN pin low
forces the device into shutdown mode, reducing the shutdown
current below 1 μA.
Rev. A | Page 11 of 16
ADP2108
After the EN pin is driven high, internal circuits start to power
up. The time required to settle after the EN pin is driven high is
called the power-up time. After the internal circuits are powered
up, the soft start ramp is initiated and the output capacitor is
charged linearly until the output voltage is in regulation. The
time required for the output voltage to ramp is called the soft
start time.
SHORT-CIRCUIT PROTECTION
The ADP2108 includes frequency foldback to prevent output
current runaway on a hard short. When the voltage at the
feedback pin falls below half the target output voltage, indicat-
ing the possibility of a hard short at the output, the switching
frequency is reduced to half the internal oscillator frequency.
The reduction in the switching frequency allows more time for
the inductor to discharge, preventing a runaway of output current.
Start-up time in the ADP2108 is the measure of when the
output is in regulation after the EN pin is driven high. Start-up
time consists of the power-up time and the soft start time.
UNDERVOLTAGE LOCKOUT
To protect against battery discharge, undervoltage lockout
(UVLO) circuitry is integrated on the ADP2108. If the input
voltage drops below the 2.15 V UVLO threshold, the ADP2108
shuts down, and both the power switch and the synchronous
rectifier turn off. When the voltage rises above the UVLO thresh-
old, the soft start period is initiated, and the part is enabled.
CURRENT LIMIT
The ADP2108 has protection circuitry to limit the amount of
positive current flowing through the PFET switch and the
synchronous rectifier. The positive current limit on the power
switch limits the amount of current that can flow from the input
to the output. The negative current limit prevents the inductor
current from reversing direction and flowing out of the load.
THERMAL PROTECTION
In the event that the ADP2108 junction temperature rises above
150°C, the thermal shutdown circuit turns off the converter.
Extreme junction temperatures can be the result of high current
operation, poor circuit board design, or high ambient temperature.
A 20°C hysteresis is included so that when thermal shutdown
occurs, the ADP2108 does not return to operation until the
on-chip temperature drops below 130°C. When coming out
of thermal shutdown, soft start is initiated.
100% DUTY OPERATION
With a drop in VIN or with an increase in ILOAD, the ADP2108
reaches a limit where, even with the PFET switch on 100% of
the time, VOUT drops below the desired output voltage. At this
limit, the ADP2108 smoothly transitions to a mode where the
PFET switch stays on 100% of the time. When the input conditions
change again and the required duty cycle falls, the ADP2108
immediately restarts PWM regulation without allowing over-
SOFT START
shoot on VOUT
.
The ADP2108 has an internal soft start function that ramps the
output voltage in a controlled manner upon startup, thereby
limiting the inrush current. This prevents possible input voltage
drops when a battery or a high impedance power source is
connected to the input of the converter.
Rev. A | Page 12 of 16
ADP2108
APPLICATIONS INFORMATION
Y5V and Z5U dielectrics are not recommended for use with any
dc-to-dc converter because of their poor temperature and dc
bias characteristics.
EXTERNAL COMPONENT SELECTION
Trade-offs between performance parameters such as efficiency
and transient response can be made by varying the choice of
external components in the applications circuit, as shown in
Figure 1.
The worst-case capacitance accounting for capacitor variation
over temperature, component tolerance, and voltage is calcu-
lated using the following equation:
Inductor
C
EFF = COUT × (1 − TEMPCO) × (1 − TOL)
The high switching frequency of the ADP2108 allows for the
selection of small chip inductors. For best performance, use
inductor values between 0.7 μH and 3 μH. Recommended
inductors are shown in Table 5.
where:
C
EFF is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
The peak-to-peak inductor current ripple is calculated using
the following equation:
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
COUT is 9.2481 μF at 1.8 V, as shown in Figure 29.
VOUT ×(VIN −VOUT
)
IRIPPLE
=
V
IN × fSW ×L
where:
SW is the switching frequency.
L is the inductor value.
Substituting these values in the equation yields
f
CEFF = 9.2481 μF × (1 − 0.15) × (1 − 0.1) = 7.0747 μF
To guarantee the performance of the ADP2108, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
12
The minimum dc current rating of the inductor must be greater
than the inductor peak current. The inductor peak current is
calculated using the following equation:
IRIPPLE
2
IPEAK = ILOAD(MAX)
+
10
8
Inductor conduction losses are caused by the flow of current
through the inductor, which has an associated internal DCR.
Larger sized inductors have smaller DCR, which may decrease
inductor conduction losses. Inductor core losses are related to
the magnetic permeability of the core material. Because the
ADP2108 is a high switching frequency dc-to-dc converter,
shielded ferrite core material is recommended for its low core
losses and low EMI.
6
4
2
Table 5. Suggested 1.0 μH Inductors
0
0
1
2
3
4
5
6
Vendor Model
Dimensions
ISAT (mA) DCR (mΩ)
DC BIAS VOLTAGE (V)
Murata
Murata
LQM21PN1R0M 2.0 × 1.25 × 0.5 800
LQM31PN1R0M 3.2 × 1.6 × 0.85 1200
190
120
85
Figure 29. Typical Capacitor Performance
Coilcraft LPS3010-102
3.0 × 3.0 × 0.9
2.5 × 2.0 × 1.2
2.5 × 1.5 × 1.2
1700
1800
1500
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
Toko
TDK
MDT2520-CN
CPL2512T
100
100
Output Capacitor
VIN
×2×L×COUT
IRIPPLE
8× fSW ×COUT
VRIPPLE
=
=
(
2π × fSW
)
Higher output capacitor values reduce the output voltage ripple
and improve load transient response. When choosing this value,
it is also important to account for the loss of capacitance due to
output voltage dc bias.
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
Ceramic capacitors are manufactured with a variety of dielectrics,
each with different behavior over temperature and applied
voltage. Capacitors must have a dielectric adequate to ensure
the minimum capacitance over the necessary temperature range
and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended for best performance.
VRIPPLE
IRIPPLE
ESRCOUT
≤
Rev. A | Page 13 of 16
ADP2108
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is 7 ꢀF.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to power dissipation, as shown in the following
equation:
Table 6. Suggested 10 μF Capacitors
Case
Size
Voltage
Rating (V)
TJ = TA + TR
Vendor
Murata
Taiyo Yuden
TDK
Type
X5R
X5R
X5R
Model
GRM188R60J106
JMK107BJ106
C1608JB0J106K
0603
0603
0603
6.3
6.3
6.3
where:
TJ is the junction temperature.
TA is the ambient temperature.
TR is the rise in temperature of the package due to power
dissipation.
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
The rise in temperature of the package is directly proportional
to the power dissipation in the package. The proportionality
constant for this relationship is the thermal resistance from the
junction of the die to the ambient temperature, as shown in the
following equation:
VOUT (VIN −VOUT
)
ICIN ≥ ILOAD(MAX)
VIN
TR = θJA × PD
To minimize supply noise, place the input capacitor as close to
the VIN pin of the ADP2108 as possible. As with the output
capacitor, a low ESR capacitor is recommended. The list of
recommended capacitors is shown in Table 7.
where:
TR is the rise in temperature of the package.
θJA is the thermal resistance from the junction of the die to the
ambient temperature of the package.
PD is the power dissipation in the package.
Table 7. Suggested 4.7 μF Capacitors
Case
Size
Voltage
Rating (V)
PCB LAYOUT GUIDELINES
Vendor
Murata
Taiyo Yuden
TDK
Type
X5R
X5R
X5R
Model
GRM188R60J475
JMK107BJ475
C1608X5R0J475
0603
0603
0603
6.3
6.3
6.3
Poor layout can affect ADP2108 performance, causing electro-
magnetic interference (EMI) and electromagnetic compatibility
(EMC) problems, ground bounce, and voltage losses. Poor
layout can also affect regulation and stability. A good layout is
implemented using the following rules:
THERMAL CONSIDERATIONS
Because of the high efficiency of the ADP2108, only a small
amount of power is dissipated inside the ADP2108 package,
which reduces thermal constraints.
•
Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies, and large tracks act as antennas.
Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
Maximize the size of ground metal on the component side
to help with thermal dissipation.
Use a ground plane with several vias connecting to the com-
ponent side ground to further reduce noise interference on
sensitive circuit nodes.
However, in applications with maximum loads at high ambient
temperature, low supply voltage, and high duty cycle, the heat
dissipated in the package is great enough that it may cause the
junction temperature of the die to exceed the maximum
junction temperature of 125°C. If the junction temperature
exceeds 150°C, the converter goes into thermal shutdown. It
recovers when the junction temperature falls below 130°C.
•
•
•
Rev. A | Page 14 of 16
ADP2108
EVALUATION BOARD
ADP2108
L1
1µH
TB1
TB3
TB4
V
V
OUT
IN
A1
A2
C1
B
1
2
VIN
GND
EN
SW
V
V
OUT
IN
C
IN
4.7µF
C
OUT
10µF
TB2
TB5
EN
C2
FB
EN
U1
GND OUT
GND IN
Figure 30. Evaluation Board Schematic
Figure 31. Recommended Top Layer
Figure 32. Recommended Bottom Layer
Rev. A | Page 15 of 16
ADP2108
OUTLINE DIMENSIONS
0.657
0.602
0.546
1.06
1.02
0.98
0.50
REF
0.022
REF
SEATING
PLANE
2
1
A
B
C
BALL 1
IDENTIFIER
0.330
0.310
0.290
1.49
1.45
1.41
0.50
1.00
REF
BOTTOM VIEW
(BALL SIDE UP)
TOP VIEW
(BALL SIDE DOWN)
COPLANARITY
0.04
0.355
0.330
0.304
0.280
0.250
0.220
Figure 33. 5-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-5-3)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Output
Voltage (V)
Package
Option
Model
Package Description
Branding
LA6
LA7
LA8
LA9
LAA
LAD
LAE
LAF
LAG
LD9
ADP2108ACBZ-1.0-R71
ADP2108ACBZ-1.1-R71
ADP2108ACBZ-1.2-R71
ADP2108ACBZ-1.3-R71
ADP2108ACBZ-1.5-R71
ADP2108ACBZ-1.8-R71
ADP2108ACBZ-1.82-R71
ADP2108ACBZ-2.3-R71
ADP2108ACBZ-2.5-R71
ADP2108ACBZ-3.0-R71
ADP2108ACBZ-3.3-R71
ADP2108-1.0-EVALZ1
ADP2108-1.1-EVALZ1
ADP2108-1.2-EVALZ1
ADP2108-1.3-EVALZ1
ADP2108-1.5-EVALZ1
ADP2108-1.8-EVALZ1
ADP2108-1.82-EVALZ1
ADP2108-2.3-EVALZ1
ADP2108-2.5-EVALZ1
ADP2108-3.0-EVALZ1
ADP2108-3.3-EVALZ1
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
1.0
1.1
1.2
1.3
1.5
1.8
1.82
2.3
2.5
3.0
3.3
1.0
1.1
1.2
1.3
1.5
1.8
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
5-Ball Wafer Level Chip Scale Package [WLCSP]
Evaluation Board for 1.0 V
Evaluation Board for 1.1 V
Evaluation Board for 1.2 V
Evaluation Board for 1.3 V
Evaluation Board for 1.5 V
Evaluation Board for 1.8 V
Evaluation Board for 1.82 V
Evaluation Board for 2.3 V
Evaluation Board for 2.5 V
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
CB-5-3
LAH
1.82
2.3
2.5
3.0
3.3
Evaluation Board for 3.0 V
Evaluation Board for 3.3 V
1 Z = RoHS Compliant Part.
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07375-0-12/08(A)
Rev. A | Page 16 of 16
相关型号：
©2020 ICPDF网 联系我们和版权申明