ADP3300ART-3.3 [ADI]
High Accuracy anyCAP® 50 mA Low Dropout Linear Regulator; 高精度anyCAP® 50毫安低压差线性稳压器
| 型号： | ADP3300ART-3.3 |
| 厂家： | 
ADI |
| 描述： | High Accuracy anyCAP® 50 mA Low Dropout Linear Regulator |
| 文件： | 总8页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
High Accuracy anyCAP
a
50 mA Low Dropout Linear Regulator
ADP3300
FEATURES
FUNCTIONAL BLOCK DIAGRAM
High Accuracy Over Line and Load: ؎0.8% @ 25؇C,
؎1.4% Over Temperature
Ultralow Dropout Voltage: 80 mV Typical @ 50 mA
Requires Only CO = 0.47 F for Stability
anyCAP = Stable with All Types of Capacitors
(Including MLCC)
Current and Thermal Limiting
Low Noise
Dropout Detector
ADP3300
Q1
OUT
IN
THERMAL
PROTECTION
R1
R2
CC
ERR
Q2
g
m
DRIVER
GND
SD
+
–
BANDGAP
REF
Low Shutdown Current: 1 A
3.0 V to 12 V Supply Range
–40؇C to +85؇C Ambient Temperature Range
Several Fixed Voltage Options
Ultrasmall SOT-23 6-Lead Package
Excellent Line and Load Regulation
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
PCMCIA Regulators
Bar Code Scanners
Camcorders, Cameras
NR
ADP3300-5
V
IN
OUT
V
= +5V
IN
OUT
+
+
GENERAL DESCRIPTION
R1
C1
0.47F
C2
330k⍀
The ADP3300 is a member of the ADP330x family of precision
low dropout anyCAP voltage regulators. The ADP3300 stands
out from conventional LDOs with a novel architecture and an
enhanced process. Its patented design requires only a 0.47 µF
output capacitor for stability. This device is stable with any
capacitor, regardless of its ESR (Equivalent Series Resistance)
value, including ceramic types (MLCC) for space restricted appli-
cations. The ADP3300 achieves exceptional accuracy of 0.8%
at room temperature and 1.4% overall accuracy over tempera-
ture, line and load variations. The dropout voltage of the
ADP3300 is only 80 mV (typical) at 50 mA.
0.47F
E
ERR
OUT
ON
OFF
GND
SD
Figure 1. Typical Application Circuit
protection is activated. Other features include shutdown and
optional noise reduction capabilities. The ADP330x anyCAP LDO
family offers a wide range of output voltages and output current
levels from 50 mA to 200 mA:
The ADP3300 operates with a wide input voltage range from
3.0 V to 12 V and delivers a load current in excess of 50 mA.
It features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload
ADP3301 (100 mA)
ADP3302 (100 mA, Dual Output)
ADP3303 (200 mA)
anyCAP is a registered trademark of Analog Devices Inc.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2001
(@ TA = –40؇C to +85؇C, VIN = 7 V, CIN = 0.47 F, COUT = 0.47 F, unless
otherwise noted)
ADP3300–SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT VOLTAGE
ACCURACY
VOUT
VIN = VOUT(NOM) 0.3 V to 12 V
IL = 0.1 mA to 50 mA
TA = 25°C
–0.8
–1.4
+0.8
+1.4
%
V
IN = VOUT(NOM) 0.3 V to 12 V
IL = 0.1 mA to 50 mA
%
LINE REGULATION
LOAD REGULATION
GROUND CURRENT
∆VO
VIN = VOUT(NOM) 0.3 V to 12 V
TA = 25°C
∆VIN
0.02
0.06
mV/V
mV/mA
∆VO
∆IL
IL = 0.1 mA to 50 mA
TA = 25°C
IGND
IL = 50 mA
IL = 0.1 mA
0.55
0.19
1.7
0.3
mA
mA
GROUND CURRENT
IN DROPOUT
IGND
VIN = 2.5 V
IL = 0.1 mA
0.6
1.2
mA
DROPOUT VOLTAGE
VDROP
VOUT = 98% of VOUT(NOM)
IL = 50 mA
IL = 10 mA
0.08
0.025
0.004
0.17
0.07
0.03
V
V
V
IL = 1 mA
SHUTDOWN THRESHOLD
VTHSD
ISDIN
IQ
ON
OFF
2.0
0.75
0.75
V
V
0.3
SHUTDOWN PIN
INPUT CURRENT
0 < VSD ≤ 5 V
5 < VSD ≤ 12 V @ VIN = 12 V
1
22
µA
µA
GROUND CURRENT IN
SHUTDOWN MODE
VSD = 0, VIN = 12 V
TA = 25°C
0.005
0.01
1
3
µA
µA
V
SD = 0, VIN = 12 V
TA = 85°C
OUTPUT CURRENT IN
SHUTDOWN MODE
IOSD
TA = 25°C @ VIN = 12 V
TA = 85°C @ VIN = 12 V
2
4
µA
µA
ERROR PIN OUTPUT
LEAKAGE
IEL
VEO = 5 V
13
µA
ERROR PIN OUTPUT
“LOW” VOLTAGE
VEOL
ISINK = 400 µA
0.12
100
0.3
V
PEAK LOAD CURRENT
ILDPK
VNOISE
VIN = VOUT(NOM) 1 V
mA
OUTPUT NOISE
@ 5 V OUTPUT
f = 10 Hz–100 kHz
C
NR = 0
100
30
µV rms
µV rms
CNR = 10 nF, CL = 10 µF
NOTE
Ambient temperature of +85°C corresponds to a typical junction temperature of 125°C under typical full load test conditions.
Specifications subject to change without notice.
–2–
REV. B
ADP3300
ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTIONS
Input Supply Voltage . . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . . –0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . . –55°C to +125°C
Operating Junction Temperature Range . . . . –55°C to +125°C
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . . 300°C
Vapor Phase (60 sec ) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
Pin Mnemonic Function
1
2
GND
NR
Ground Pin
Noise Reduction Pin. Used for further
reduction of the output noise (see text for
details). No connection if not used.
3
4
SD
Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin should
be connected to the input pin.
OUT
Output of the Regulator, fixed 2.7, 3.0, 3.2,
3.3 or 5 volts output voltage. Bypass to
ground with a 0.47 µF or larger capacitor.
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
5
6
IN
Regulator Input
PIN CONFIGURATION
ERR
Open Collector Output which goes low to
indicate that the output is about to go out
of regulation.
6
5
4
GND
NR
1
2
3
ERR
IN
ADP3300
TOPVIEW
(Not to Scale)
OUT
SD
ORDERING GUIDE
Package Description
Model
ADP3300ART-2.7
ADP3300ART-2.85 2.85 V
ADP3300ART-3
ADP3300ART-3.2
ADP3300ART-3.3
ADP3300ART-5
Voltage Output
Package Options
Branding Information
2.7 V
Surface Mount
Surface Mount
Surface Mount
Surface Mount
Surface Mount
Surface Mount
SOT-23-6
SOT-23-6
SOT-23-6
SOT-23-6
SOT-23-6
SOT-23-6
LAB
LFB
LBB
LCB
LDB
LEB
3.0 V
3.2 V
3.3 V
5.0 V
Contact the factory for the availability of other output voltage options.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3300 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
–3–
ADP3300–Typical Performance Characteristics
3.202
800
640
480
3.202
I
= 0mA
L
V
= 3.2V
= 7V
3.201
OUT
3.201
3.200
V
= 3.2V
OUT
= 0mA
V
IN
I
L
3.200
3.199
3.198
3.197
I
= 10mA
= 50mA
L
3.199
3.198
3.197
3.196
V
= 3.2V
OUT
320
160
0
I
L
3.196
3.195
0
8
16 24 32 40 48 56 64 72 80
0
1.2 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.812.0
3.3
4
5
6
7
8
9
10 11 12 13 14
OUTPUT LOAD – mA
INPUT VOLTAGE – Volts
INPUT VOLTAGE – Volts
TPC 2. Output Voltage vs. Load
Current
TPC 3. Quiescent Current vs.
Supply Voltage
TPC 1. Line Regulation Output
Voltage vs. Supply Voltage
700
600
500
400
300
200
100
0
820
0.2
0.1
0.0
V
= 7V
IN
690
560
I
= 50mA
L
I
= 0 – 50mA
L
–0.1
–0.2
–0.3
–0.4
430
I
V
= 0 TO 80mA
L
I
= 0mA
L
= 7V
IN
300
170
–45 –25 –5 15 35 55 75 95 115 135
TEMPERATURE – ؇C
0
20
40
60
80
–45 –25 –5 15 35 55 75 95 115 135
TEMPERATURE – ؇C
OUTPUT LOAD – mA
TPC 5. Output Voltage Varia-
tion % vs. Temperature
TPC 6. Quiescent Current vs.
Temperature
TPC 4. Quiescent Current vs.
Load Current
120
5
8.0
V
R
= 3.2V
V
OUT
= 64⍀
IN
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
L
96
72
48
24
0
4
3
2
1
0
V
OUT
R
= 33⍀
L
V
=V
IN
SD
C
R
= 0.47F
= 66⍀
L
L
V
= 3.3V
OUT
0
20
40
60
80
0
1
2
3
4
3
2
1
0
0
20 40 60 80 100 120 140 160 180 200
OUTPUT LOAD – mA
INPUT VOLTAGE – Volts
TIME – s
TPC 7. Dropout Voltage
vs. Output Current
TPC 8. Power-Up/Power-Down
TPC 9. Power-Up Overshoot
–4–
REV. B
ADP3300
3.220
3.210
3.200
3.190
3.180
3.220
3.210
3.200
3.190
3.180
3.220
3.205
3.200
V
= 3.2V
V
= 3.2V
OUT
V
C
= 3.2V
= 0.47F
OUT
OUT
L
3.195
3.190
R
C
= 64⍀
= 0.47F
R
C
= 3.2k⍀
= 0.47F
L
L
L
L
I
= 50mA
OUT
50
1
7.5
7.0
7.5
7.0
V
IN
1mA
800
180 200
0
20 40 60 80 100 120 140 160
0
20 40 60 80 100 120 140 160 180 200
0
200
400
TIME – s
600
1000
TIME – s
TIME – s
TPC 10. Line Transient Response
TPC 11. Line Transient Response
TPC 12. Load Transient
3.220
4
3
2
1
V
= 3.0V
OUT
V
C
= 3.2V
= 4.7F
3.0
0
OUT
V
V
OUT
OUT
C
= 0.47F
L
3.205
3.200
L
3.2V
200
150
100
50
3.195
3.190
C
= 4.7F
L
V
= 3.2V
OUT
R
= 64⍀
L
I
OUT
0
+3
I
= 50mA
OUT
50
1
V
SD
V
= 7V
IN
3V
1mA
800
0
0
0
1
2
3
4
5
0
200
400
600
TIME – s
1000
0
20
40
60
80
100
TIME – sec
TIME – s
TPC 13. Load Transient
TPC 14. Short Circuit Current
TPC 15. Turn On
4
3
2
1
0
0
10
1
0.47F BYPASS
= 5V, C = 0.47F,
L
V
V
R
C
= 3.2V
= 64⍀
= 0.47F
OUT
V
= 3.3V
b
3.2V
OUT
OUT
a. 0.47F, R = 33k⍀
PIN 5TO PIN 1
L
–10
–20
I
= 1mA, C
= 0
L
NR
L
L
b. 0.47F, R = 64⍀
L
V
= 3.3V, C = 0.47F,
OUT
L
c. 4.7F, R = 33k⍀
L
I
= 1mA, C
= 0
L
NR
–30 d. 4.7F, R = 64⍀
L
–40
d
–50
a
–60
0.1
c
V
= 2.7-5.0V, CL = 0.47F,
–70 b d
–80
OUT
=
I
1mA
,
C
= 10nF
NR
3
0
L
V
SD
V
= 2.7-5.0V, C = 0.47F,
L
OUT
–90
I
= 1mA, C = 10nF
L
NR
a c
0.01
100
–100
10
100
1k
10k 100k
10M
1M
0
20
40
60
80
100
1k
10k
100k
FREQUENCY – Hz
TIME – s
FREQUENCY – Hz
TPC 16. Turn Off
TPC 17. Power Supply Ripple
Rejection
TPC 18. Output Noise Density
–5–
REV. B
ADP3300
THEORY OF OPERATION
noise rejection and very high regulator gain, which leads to excel-
lent line and load regulation. An impressive 1.4% accuracy is
guaranteed over line, load and temperature.
The new anyCAP LDO ADP3300 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2 which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and
a second resistor divider (R3 and R4) to the input of an amplifier.
Additional features of the circuit include current limit, thermal
shutdown and noise reduction. Compared to the standard solu-
tions that give warning after the output has lost regulation,
the ADP3300 provides improved system performance by enabling
the ERR pin to give warning before the device loses regulation.
OUTPUT
INPUT
Q1
As the chip’s temperature rises above 165°C, the circuit activates a
soft thermal shutdown, indicated by a signal low on the ERR
pin, to reduce the current to a safe level.
COMPENSATION
CAPACITOR
R1
ATTENUATION
BANDGAP OUT
(V
/V
)
D1
R3
To reduce the noise gain of the loop, the node of the main
divider network (a) is made available at the noise reduction (NR)
pin, which can be bypassed with a small capacitor (10 nF–100 nF).
PTAT
OS
(a)
NONINVERTING
WIDEBAND
DRIVER
V
g
m
PTAT
CURRENT
R
LOAD
R4
R2
C
LOAD
APPLICATION INFORMATION
Capacitor Selection: anyCAP
ADP3300
Output Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. The
ADP3300 is stable with a wide range of capacitor values, types
and ESR (anyCAP). A capacitor as low as 0.47 µF is all that is
needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3300 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Figure 2. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input “offset voltage”
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complimentary
diode voltage to form a “virtual bandgap” voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibility
on the trade-off of noise sources that leads to a low noise design.
Input Bypass Capacitor: an input bypass capacitor is not
required; however, for applications where the input source is high
impedance or far from the input pins, a bypass capacitor is recom-
mended. Connecting a 0.47 µF capacitor from the input to
ground reduces the circuit’s sensitivity to PC board layout. If a
bigger output capacitor is used, the input capacitor should be 1 µF
minimum.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1 and a second divider consisting
of R3 and R4, the values are chosen to produce a temperature
stable output. This unique arrangement specifically corrects for
the loading of the divider so that the error resulting from base
current loading in conventional circuits is avoided.
Noise Reduction
A noise reduction capacitor (CNR) can be used to further reduce
the noise by 6 dB–10 dB (Figure 3). Low leakage capacitors in
the 10 nF–100 nF range provide the best performance. For load
current less than 200 µA, a 4.7 µF output capacitor provides the
lowest noise and the best overall performance. Since the noise
reduction pin (NR) is internally connected to a high impedance
node, any connection to this node should be carefully done to
avoid noise pickup from external sources. The pad connected to
this pin should be as small as possible. Long PC board traces
are not recommended.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.
NR
Most LDOs place strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value, required to keep conventional
LDOs stable, changes depending on load and temperature.
These ESR limitations make designing with LDOs more diffi-
cult because of their unclear specifications and extreme variations
over temperature.
C
NR
ADP3300-5
10nF
V
= 5V
OUT
V
OUT
IN
IN
+
+
C2
4.7F
330k⍀
C1
1.0F
ERR
E
OUT
ON
OFF
GND
SD
This is no longer true with the ADP3300 anyCAP LDO. It can
be used with virtually any capacitor, with no constraint on the
minimum ESR. The innovative design allows the circuit to be
stable with just a small 0.47 µF capacitor on the output. Addi-
tional advantages of the pole splitting scheme include superior line
Figure 3. Noise Reduction Circuit
–6–
REV. B
ADP3300
Thermal Overload Protection
Error Flag Dropout Detector
The ADP3300 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (i.e., high ambient temperature
and high power dissipation), where die temperature starts to rise
above 165°C, the output current is reduced until die tempera-
ture has dropped to a safe level. Output current is restored
when the die temperature is reduced.
The ADP3300 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If the
output is about to lose regulation, for example, by reducing the
supply voltage below the combined regulated output and dropout
voltages, the ERR pin will be activated. The ERR output is an
open collector that will be driven low.
Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally
limited so that junction temperatures will not exceed 125°C.
APPLICATION CIRCUITS
Crossover Switch
The circuit in Figure 4 shows that two ADP3300s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
PD = (VIN – VOUT) ILOAD + (VIN) IGND
Where ILOAD and IGND are load current and ground current,
VIN and VOUT are input and output voltages respectively.
Assuming ILOAD = 50 mA, IGND = 0.5 mA, VIN = 8 V and
IN
V
= 5V/3.3V
OUT
ADP3300-5.0
V
= 5.5V TO 12V
OUT
IN
VOUT = 3.3 V, device power dissipation is:
OUTPUT SELECT
SD
5.0V
0V
PD = (8 – 3.3) 0.05 + 8 × 0.5 mA = 0.239 W
GND
∆T = TJ – TA = PD × θJA = 0.239 × 165 = 39.4°C
With a maximum junction temperature of 125°C, this yields a
maximum ambient temperature of 85°C.
IN
OUT
+
+
C2
0.47F
C1
1.0F
ADP3300-3.3
Printed Circuit Board Layout Consideration
SD
Surface mount components rely on the conductive traces or
pads to transfer heat away from the device. Appropriate PC
board layout techniques should be used to remove heat from the
immediate vicinity of the package.
GND
Figure 4. Crossover Switch
Higher Output Current
If higher current is needed, an appropriate pass transistor can be
used, as in Figure 5, to increase the output current to 1 A.
The following general guidelines will be helpful when designing
a board layout:
1. PC board traces with larger cross section areas will remove
more heat. For optimum results, use PC boards with thicker
copper and wider traces.
MJE253*
V
= 6VTO 8V
V
= 5V @ 1A
IN
OUT
+
R1
50⍀
C1
47F
2. Increase the surface area exposed to open air so heat can be
removed by convection or forced air flow.
IN
OUT
3. Do not use solder mask or silkscreen on the heat dissipating
traces because it will increase the junction to ambient thermal
resistance of the package.
C2
10F
ADP3300-5
SD
ERR
Shutdown Mode
GND
Applying a high signal to the shutdown pin or tying it to the
input pin will turn the output ON. Pulling the shutdown pin
down to 0.3 V or below, or tying it to ground, will turn the
output OFF. In shutdown mode, quiescent current is reduced
to less than 1 µA.
*AAVID531002 HEAT SINK IS USED
Figure 5. High Output Current Linear Regulator
REV. B
–7–
ADP3300
Constant Dropout Post Regulator
The circuit in Figure 6 provides high precision with low drop-
out for any regulated output voltage. It significantly reduces the
ripple from a switching regulator while providing a constant
dropout voltage, which limits the power dissipation of the LDO
to 15 mW. The ADP3000 used in this circuit is a switching
regulator in the step-up configuration.
D1
1N5817
L1
6.8H
ADP3300-5
V
= 2.5VTO 3.5V
OUT
5V @ 50mA
IN
IN
C1
100F
10V
R1
C2
100F
10V
SD
C3
2.2F
GND
120⍀
R2
30.1k⍀
1%
I
V
LIM
IN
SW1
Q1
2N3906
Q2
2N3906
ADP3000-ADJ
FB
GND
SW2
R3
R4
274k⍀
124k⍀
1%
Figure 6. Constant Dropout Post Regulator
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
6-Lead Surface Mount Package
(SOT-23)
0.122 (3.10)
0.106 (2.70)
6
1
5
2
4
3
0.071 (1.80)
0.059 (1.50)
0.118 (3.00)
0.098 (2.50)
PIN 1
0.037
(0.95) BSC
0.075
(1.90)
BSC
0.051 (1.30)
0.035 (0.90)
0.057 (1.45)
0.035 (0.90)
10؇
0؇
0.020 (0.50)
0.010 (0.25)
0.006 (0.15)
0.000 (0.00)
0.022 (0.55)
0.014 (0.35)
SEATING
PLANE
0.009 (0.23)
0.003 (0.08)
ADP3300–Revision History
Location
Page
Data Sheet changed from REV. A to REV. B.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Addition to the ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
–8–
REV. B
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