ADP3301 [ADI]
High Accuracy anyCAP⑩ 100 mA Low Dropout Linear Regulator; 高精度anyCAP® 100毫安低压差线性稳压器
| 型号： | ADP3301 |
| 厂家： | 
ADI |
| 描述： | High Accuracy anyCAP⑩ 100 mA Low Dropout Linear Regulator |
| 文件： | 总8页 (文件大小：128K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Accuracy anyCAP™*
100 mA Low Dropout Linear Regulator
a
ADP3301
FEATURES
FUNCTIO NAL BLO CK D IAGRAM
High Accuracy (Over Line and Load Regulations
at +25؇C): ؎0.8%
Ultralow Dropout Voltage: 100 m V Typical @ 100 m A
Requires Only CO = 0.47 F for Stability
anyCAP™* = Stable w ith All Types of Capacitors
Current and Therm al Lim iting
Low Noise
Dropout Detector
Low Shutdow n Current: 1 A
ADP3301
Q1
OUT
IN
R1
R2
THERMAL
PROTECTION
CC
ERR
Q2
DRIVER
Gm
SD
BANDGAP
REF
Several Fixed Voltage Options
3.0 V to 12 V Supply Range
GND
–20؇C to +85؇C Am bient Tem perature Range
Therm ally Enhanced SO-8 Package
Excellent Line and Load Regulations
APPLICATIONS
Cellular Telephones
T he ADP3301 operates with a wide input voltage range from
3 V to 12 V and delivers a load current in excess of 100 mA. It
features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload
protection is activated. Other features include shutdown and
optional noise reduction capabilities. The ADP330x anyCAP™*
LDO family offers a wide range of output voltages and output
current levels from 50 mA to 300 mA:
Notebook, Palm top Com puters
Battery Pow ered System s
Portable Instrum ents
Post Regulator for Sw itching Supplies
Bar Code Scanners
GENERAL D ESCRIP TIO N
T he ADP3301 is a member of the ADP330x family of precision
low dropout anyCAP™* voltage regulators. T he ADP3301
stands out from the conventional LDOs with a novel architec-
ture, an enhanced process and a new package. Its patented
design includes a noninverting wideband driver and a stage that
permits the use of an internal “pole splitting” capacitor to
stabilize the feedback loop with a single output capacitor as
small as 0.47 µF. T his device is stable with any type of capacitor
regardless of its ESR (Equivalent Serial Resistance) value,
including ceramic types (MLCC) for space restricted applica-
tions. T he ADP3301 achieves exceptional accuracy of ±0.8% at
room temperature and ±1.4% overall accuracy over tempera-
ture, line and load regulations. T he dropout voltage of the
ADP3301 is only 100 mV (typical) at 100 mA.
ADP3300 (50 mA, SOT -23)
ADP3302 (100 mA, Dual Output)
ADP3304 (100 mA, Dual Output with Separate Grounds)
ADP3303 (200 mA)
ADP3306 (300 mA)
3
NR
ADP3301-5.0
7
8
1
2
V
IN
OUT
V
= +5V
IN
OUT
R1
330kΩ
C1
0.47µF
C2
0.47µF
6
E
ERR
4
OUT
5
In addition to the new architecture and process, ADI’s new
proprietary thermally enhanced package (T hermal Coastline)
can handle 1 W of power dissipation without external heat sink
or large copper surface on the PC board. T his keeps PC board
real estate to a minimum and makes the ADP3301 very
attractive for use in portable equipment.
ON
OFF
GND
Figure 1. Typical Application Circuit
*anyCAP is a trademark of Analog Devices Inc.
REV. 0
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
World Wide Web Site: http:/ / w w w .analog.com
© Analog Devices, Inc., 1997
ADP3301–xx–SPECIFICATIONS
(@ T = –20؇C to +85؇C, V = 7 V, C = 0.47 F, COUT = 0.47 F, unless otherwise noted)1
ELECTRICAL CHARACTERISTICS
A
IN
IN
P aram eter
Sym bol
Conditions
Min
Typ
Max
Units
OUT PUT VOLT AGE
ACCURACY
VOUT
VIN = Nom VOUT +0.3 V to 12 V
IL = 0.1 mA to 100 mA
T
A = +25°C
–0.8
–1.4
+0.8
+1.4
%
%
VIN = Nom VOUT +0.3 V to 12 V
IL = 0.1 mA to 100 mA
LINE REGULAT ION
LOAD REGULAT ION
GROUND CURRENT
∆VO
∆VIN
VIN = Nom VOUT +0.3 V to 12 V
T A = +25°C
0.024
0.014
mV/V
∆VO
∆IL
IL = 0.1 mA to 100 mA
T A = +25°C
mV/mA
IGND
IL = 100 mA
IL = 0.1 mA
0.85
0.18
2
0.3
mA
mA
GROUND CURRENT
IN DROPOUT
IGND
VIN = 2.5 V
IL = 0.1 mA
0.6
1.2
mA
DROPOUT VOLT AGE
VDROP
VOUT = 98% of VO Nominal
IL = 100 mA
0.1
0.02
0.003
0.2
0.07
0.03
V
V
V
IL = 10 mA
IL = 1 mA
SHUT DOWN T HRESHOLD
VT HSD
ISDIN
IQ
ON
OFF
2.0
0.9
0.9
V
V
0.3
SHUT DOWN PIN
INPUT CURRENT
0 < VSD < 5 V
5 ≤ VSD ≤ 12 V @ VIN = 12 V
1
22
µA
µA
GROUND CURRENT IN
SHUT DOWN MODE
VSD = 0, VIN = 12 V
T
A = +25°C
1
5
µA
µA
VSD = 0, VIN = 12 V
T A = +85°C
OUT PUT CURRENT IN
SHUT DOWN MODE
IOSD
T A = +25°C @ VIN = 12 V
T A = +85°C @ VIN = 12 V
2
4
µA
µA
ERROR PIN OUT PUT
LEAKAGE
IEL
VEO = 5 V
13
µA
ERROR PIN OUT PUT
“LOW” VOLT AGE
VEOL
ILDPK
ISINK = 400 µA
0.13
200
0.3
V
PEAK LOAD CURRENT
VIN = Nom VOUT + 1 V
mA
T HERMAL REGULAT ION
∆VO
VO
VIN = 12 V, IL = 100 mA
T = 10 ms
0.015
%/W
OUT PUT NOISE
@ 5 V OUT PUT
VNOISE
f = 10 Hz–100 kHz
C
NR = 0
100
30
µV rms
µV rms
CNR = 10 nF, CL = 10 µF
NOT ES
1Ambient temperature of +85°C corresponds to a typical junction temperature of +125°C under typical full load test conditions.
Specifications subject to change without notice.
REV. 0
–2–
ADP3301
ABSO LUTE MAXIMUM RATINGS*
P IN FUNCTIO N D ESCRIP TIO NS
Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . –0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . –0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient T emperature Range . . . –55°C to +125°C
Operating Junction T emperature Range . . . –55°C to +125°C
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C
Lead T emperature Range (Soldering 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
P in
Mnem onic
Function
1 & 2
OUT
Output of the Regulator, fixed 2.7, 3.0,
3.2, 3.3 or 5 volts output voltage. By-
pass to ground with a 0.47 µF or larger
capacitor. P ins 1 and 2 m ust be con-
nected together for proper operation.
3
NR
Noise Reduction Pin. Used for further
reduction of the output noise. (See text
for details.) No connection if not used.
4
5
GND
Ground Pin.
SD
Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.
*T his is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
6
ERR
IN
Open Collector Output which goes low
to indicate that the output is about to
go out of regulation.
O RD ERING GUID E
Model
Voltage O utput
P ackage O ption*
7 & 8
Regulator Input. P ins 7 and 8 m ust
be connected together for pr oper
oper ation.
ADP3301AR-2.7
ADP3301AR-3
ADP3301AR-3.2
ADP3301AR-3.3
ADP3301AR-5
2.7 V
3.0 V
3.2 V
3.3 V
5.0 V
SO-8
SO-8
SO-8
SO-8
SO-8
P IN CO NFIGURATIO N
Contact the factory for the availability of other output voltage options.
*SO = Small Outline.
1
2
3
4
8
7
6
5
OUT
OUT
NR
IN
IN
O ther Mem bers of anyCAP ™* Fam ily1
ADP3301
TOP VIEW
(Not to Scale)
ERR
SD
O utput
Current
P ackage
O ption2
GND
Model
Com m ents
PIN FOR 5V DEVICE
ADP3300
ADP3302
ADP3304
50 mA
100 mA
100 mA
SOT -23
SO-8
SO-8
High Accuracy
Dual Output
Dual Output with
Separate Grounds
High Accuracy
ADP3303
ADP3306
200 mA
300 mA
SO-8
SO-8,T SSOP-14 High Accuracy,
High Current
NOT ES
1See individual data sheets for detailed ordering information.
2SO = Small Outline, SOT = Surface Mount, T SSOP = T hin Shrink Small
Outline.
CAUTIO N
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3301 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–
ADP3301–Typical Performance Characteristics
5.0003
1.0
5.00075
I
= 0mA
L
V
= 5V
OUT
= 0
0.9
0.8
0.7
V
V
= 5V
5.0000
OUT
= 7V
I
5.00000
L
I
= 10mA
= 50mA
L
IN
4.9997
4.9994
4.9991
4.99925
4.99850
4.99775
4.99700
4.99625
4.99550
I
L
0.6
0.5
0.4
I
= 100mA
L
4.9988
4.9985
0.3
0.2
V
= 5V
OUT
4.9982
4.9979
0.1
0
5.2
6
7
8
9
10 11 12 13 14 15 16
0
1.2 2.4 3.6 4.8
6
7.2 8.4 9.6 10.8 12
INPUT VOLTAGE – Volts
0
20 40 60 80 100 120 140 160 180 200
OUTPUT LOAD – mA
INPUT VOLTAGE – Volts
Figure 2. Line Regulation: Output
Voltage vs. Input Voltage
Figure 4. Quiescent Current vs. Sup-
ply Voltage
Figure 3. Output Voltage vs. Load
Current Up to 200 m A
1400
1200
1000
970
870
0.2
0.1
0.0
770
670
I
= 100mA
L
800
600
400
200
0
I
= 0
L
570
470
–0.1
–0.2
–0.3
–0.4
I
= 0 TO 100mA
L
370
270
170
I
= 0
L
–45 –25 –15
5
25 45 65 85 105 125
0
10 20 30 40 50 60 70 80 90 100
OUTPUT LOAD – mA
–45 –25 –5 15 35 55 75 95 115 135
TEMPERATURE –
TEMPERATURE –
°
C
°
C
Figure 5. Quiescent Current vs. Load
Current
Figure 7. Quiescent Current vs.
Tem perature
Figure 6. Output Voltage Variation %
vs. Tem perature
8.0
200
160
120
80
5
V
IN
V
= 3.3V
OUT
7.0
4
6.0
5.0
4.0
3.0
2.0
1.0
0
3
2
1
0
V
OUT
SD = V OR 3V
IN
R
= 33Ω
L
R
C
= 33Ω ÷ 3.3kΩ
L
40
= 0.47µF
L
V
= 3.3V
OUT
0
0
20 40 60 80 100 120 140 160 180 200
TIME – µs
0
20 40 60 80 100 120 140 160 180 200
OUTPUT LOAD – mA
0
1
2
3
4
3
2
1
0
INPUT VOLTAGE – Volts
Figure 10. Power-Up Overshoot
Figure 8. Dropout Voltage vs. Output
Current
Figure 9. Power-Up/Power-Down
REV. 0
–4–
ADP3301
5.02
5.01
5.00
4.99
4.98
5.02
5.01
5.00
4.99
4.98
V
= 5V
V
= 5V
V
= 5V
OUT
OUT
OUT
0.02
5.01
5.00
4.99
C
= 0.47µF
L
5kΩ, 0.47µF LOAD
50Ω, 0.47µF LOAD
I(V
)
V
OUT
V
IN
IN
7.5
7.0
100
1
7.5
7.0
0
20 40 60 80 100 120 140 160 180 200
TIME – µs
0
40 80 120 160 200 240 280 320 360 400
TIME – µs
0
200
400
TIME – µs
600
800
1000
Figure 11. Line Transient Response
Figure 12. Line Transient Response
Figure 13. Load Transient for 1 m A
to 100 m A Pulse
C
V
= 10µF
L
V
= 5V
5.0V
OUT
= 3.3V
3.3V
3.304
3.302
3.300
3.298
3.5
0
OUT
8
6
4
2
0
5
0
V
OUT
C
= 0.47µF, R = 5kΩ
L
L
400
300
I
OUT
200
C
= 10µF, R = 5kΩ
L
L
I(V
)
OUT
100
10
100
0
0
1
2
3
4
5
0
100
200
TIME – µs
300
400
500
0
40
80
120
160
200
TIME – sec
TIME – µs
Figure 14. Load Transient for 10 m A
to 100 m A Pulse
Figure 15. Short Circuit Current
Figure 16. Turn-On
10
1
4
0
0.47µF BYPASS
PIN 7, 8 TO PIN 3
C = 0.47µF
R = 33Ω ON 3.3V OUTPUT
V
= 3.3V
b
OUT
a. 0.47µF, R = 33kΩ
L
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
3
b. 0.47µF, R = 33Ω
L
V
= 5V, CL = 0.47µF,
V
= 3.3V
OUT
OUT
c. 10µF, R = 33kΩ
IL = 1mA, CNR = 0
L
d. 10µF, R = 33Ω
L
2
V
= 3.3V, CL = 0.47µF,
IL = 1mA, CNR = 0
V
OUT
OUT
d
1
0
5
0
a
V
= 2.7-5.0V, CL = 10µF,
0.1
OUT
IL = 1mA, CNR = 10nF
c
b
d
V
SD
a c
0.01
100
1k
10k
100k
0
5
10 15 20 25 30 35 40 45 50
TIME – µs
10
100
1k
10k 100k
FREQUENCY – Hz
10M
1M
FREQUENCY – Hz
Figure 19. Output Noise Density
Figure 18. Power Supply Ripple
Rejection
Figure 17. Turn-Off
REV. 0
–5–
ADP3301
AP P LICATIO N INFO RMATIO N
anyCAP ™*
Ther m al O ver load P r otection
T he ADP3301 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (i.e., high ambient temperature and
high power dissipation) where die temperature starts to rise
above 165°C, the output current is reduced until die tempera-
ture has dropped to a safe level. Output current is restored when
the die temperature is reduced.
T he ADP3301 is very easy to use. T he only external component
required for stability is a small 0.47 µF bypass capacitor on the
output. Unlike the conventional LDO designs, the ADP3301 is
stable with virtually any type of capacitors (anyCAP™*) indepen-
dent of the capacitor’s ESR (Effective Series Resistance) value.
In a typical application, if the shutdown feature is not used, the
shutdown pin (Pin 5) should be tied to the input pin. Pins 7
and 8 must be tied together, as well as Pins 1 and 2, for proper
operation.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125°C.
Capacitor Selection
Output Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. T he
ADP3301 is stable with a wide range of capacitor values, types
and ESR (anyCAP™*). A capacitor as low as 0.47 µF is all that
is needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. T he ADP3301 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Calculating Junction Tem per atur e
Device power dissipation is calculated as follows :
PD = (VIN – VOUT) ILOAD + (VIN) IGND
Where ILOAD and IGND are load current and ground current, VIN
and VOUT are input and output voltages respectively.
Input Bypass Capacitor: an input bypass capacitor is not
required; however, for applications where the input source is
high impedance or far from the input pins, a bypass capacitor is
recommended. Connecting a 0.47 µF capacitor from the input
pins (Pins 7 and 8) to ground reduces the circuit’s sensitivity to
PC board layout. If a bigger output capacitor is used, the input
capacitor should be 1 µF minimum.
Assuming ILOAD = 100 mA, IGND = 2 mA, VIN = 9 V and
VOUT = 5.0 V, device power dissipation is:
PD = (9 V – 5 V) 100 mA + (9 V) 2 mA = 418 mW
T he proprietary package used in ADP3301 has a thermal
resistance of 96°C/W, significantly lower than a standard
8-pin SOIC package at 170°C/W.
Low ESR capacitors offer better performance on a noisy supply;
however, for less demanding requirements a standard tantalum
or aluminum electrolythic capacitor is adequate.
Junction temperature above ambient temperature will be
approximately equal to :
0.418 W × 96°C/W = 40.1°C
Noise Reduction
T o limit the maximum junction temperature to 125°C, maxi-
A noise reduction capacitor (CNR) can be used to further reduce
the noise by 6 dB–10 dB (Figure 20). Low leakage capacitors in
the 10 nF–100 nF range provide the best performance. Since
the noise reduction pin (NR) is internally connected to a high
impedance node, any connection to this node should be carefully
done to avoid noise pickup from external sources. T he pad
connected to this pin should be as small as possible. Long PC
board traces are not recommended.
mum ambient temperature must be lower than:
TA(MAX) = 125°C – 40.1°C = 84.9°C
P r inted Cir cuit Boar d Layout Consider ation
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages the dominant component of the heat
resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. However, to make the improvement
meaningful, a significant copper area on the PCB has to be
attached to these fused pins.
3
NR
C
10nF
NR
ADP3301-5.0
1
2
7
8
OUT
V
= 5V
IN
V
OUT
IN
R1
330kΩ
+
+
C2
10µF
C1
1µF
T he ADP3301’s patented thermal coastline lead frame design
uniformly minimizes the value of the dominant portion of the
thermal resistance. It ensures that heat is conducted away by all
pins of the package. T his yields a very low 96°C/W thermal
resistance for an SO-8 package, without any special board
layout requirements, relying on the normal traces connected to
the leads. T he thermal resistance can be decreased by approxi-
mately an additional 10% by attaching a few square cm of
copper area to the VIN pin of the ADP3301 package.
ERR
4
6
E
OUT
5
ON
OFF
GND
SD
Figure 20. Noise Reduction Circuit
REV. 0
–6–
ADP3301
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3301’s pins since it will increase
the junction to ambient thermal resistance of the package.
V
= 5.5V TO 12V
IN
IN
V
= 5V/3.3V
OUT
OUT
ADP3301-5.0
OUTPUT SELECT
5V
0V
Shutdown Mode
SD
Applying a T T L high signal to the shutdown pin, or tying it to
the input pin, will turn the output ON. Pulling the shutdown
pin low, or tying it to ground, will turn the output OFF. In
shutdown mode, quiescent current is reduced to less than 1 µA.
GND
IN
OUT
Er r or Flag D r opout D etector
+
C1
+
C2
0.47µF
1.0µF
T he ADP3301 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If, for
example, regulation is lost by reducing the supply voltage below
the combined regulated output and dropout voltages, the ERRor
flag will be activated. T he ERR output is an open collector,
which will be driven low.
ADP3301-3.3
SD
GND
Figure 21. Crossover Switch
Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
MJE253*
V
= 5V @ 1A
V
= 6V TO 8V
OUT
IN
R1
50Ω
C1
47µF
AP P LICATIO N CIRCUITS
Cr ossover Switch
IN
OUT
C2
10µF
T he circuit in Figure 21 shows that two ADP3301s can be used
to form a mixed supply voltage system. T he output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide.
ADP3301-5
SD
ERR
GND
H igher O utput Cur r ent
*AAVID531002 HEAT SINK IS USED
T he ADP3301 can source up to 100 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 22, to increase the
output current to 1 A.
Figure 22. High Output Current Linear Regulator
Step-Up/Step-D own P ost Regulator
T he circuit in Figure 23 provides a high precision, low dropout
regulated output voltage. It significantly reduces the ripple from
a switching regulator. T he ADP3000 used in this circuit is a
switching regulator in the step-up configuration.
D1
L1
1N5817
6.8µH
ADP3301-3.3
3.3V @ 100mA
V
= 2.5V TO 3.5V
IN
OUT
IN
C1
100µF
10V
R1
120Ω
C2
100µF
10V
GND
R2
19.6kΩ
1%
I
V
LIM
IN
SW1
C3
2.2µF
ADP3000-ADJ
FB
GND
SW2
R3
10kΩ
1%
Figure 23. Step-Up/Step-Down Post Regulator
REV. 0
–7–
ADP3301
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
8-P in Sm all O utline P ackage
(SO -8)
0.1968 (5.00)
0.1890 (4.80)
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
–8–
REV. 0
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