ADP3338AKC-1.5-RL7 [ADI]

High Accuracy, Ultralow I Low Dropout Regulator; 高精度,超低我低压差稳压器
ADP3338AKC-1.5-RL7
型号: ADP3338AKC-1.5-RL7
厂家: ADI    ADI
描述:

High Accuracy, Ultralow I Low Dropout Regulator
高精度,超低我低压差稳压器

线性稳压器IC 调节器 电源电路 光电二极管 输出元件
文件: 总16页 (文件大小:295K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
High Accuracy, Ultralow IQ, 1 A,  
anyCAP® Low Dropout Regulator  
ADP3338  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
High accuracy over line and load: 0.8% @ 25°C,  
1.4% over temperature  
Ultralow dropout voltage: 190 mV (typ) @ 1 A  
Requires only CO = 1.0 µF for stability  
anyCAP is stable with any type of capacitor (including MLCC)  
Current and thermal limiting  
Q1  
OUT  
IN  
ADP3338  
R1  
R2  
THERMAL  
PROTECTION  
CC  
g
DRIVER  
m
Low noise  
2.7 V to 8 V supply range  
BANDGAP  
REF  
−40°C to +85°C ambient temperature range  
SOT-223 package  
GND  
Figure 1.  
APPLICATIONS  
Notebook, palmtop computers  
SCSI terminators  
ADP3338  
V
IN  
V
OUT  
OUT  
IN  
Battery-powered systems  
Bar code scanners  
1µF  
1µF  
GND  
Camcorders, cameras  
Home entertainment systems  
Networking systems  
DSP/ASIC supplies  
Figure 2. Typical Application Circuit  
GENERAL DESCRIPTION  
with any good quality capacitor, including ceramic (MLCC)  
The ADP3338 is a member of the ADP33xx family of precision,  
low dropout (LDO), anyCAP voltage regulators. The ADP3338  
operates with an input voltage range of 2.7 V to 8 V and delivers  
a load current up to 1 A. The ADP3338 stands out from  
conventional LDOs with a novel architecture and an enhanced  
process that offers performance advantages and higher output  
current than its competition. Its patented design requires only a  
1 µF output capacitor for stability. This device is insensitive to  
output capacitor equivalent series resistance (ESR), and is stable  
types for space-restricted applications. The ADP3338 achieves  
exceptional accuracy of ±±.8ꢀ at room temperature and ±1.ꢁꢀ  
over temperature, line, and load variations. The dropout voltage  
of the ADP3338 is only 19± mV (typical) at 1 A. The device also  
includes a safety current limit and thermal overload protection.  
The ADP3338 has ultralow quiescent current: 11± µA (typical)  
in light load situations.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2005 Analog Devices, Inc. All rights reserved.  
ADP3338  
TABLE OF CONTENTS  
Specifications..................................................................................... 3  
Capacitor Selection .................................................................... 1±  
Output Current Limit ................................................................ 1±  
Thermal Overload Protection .................................................. 1±  
Calculating Power Dissipation ................................................. 1±  
Printed Circuit Board Layout Considerations ....................... 1±  
Outline Dimensions....................................................................... 12  
Ordering Guide .......................................................................... 13  
Absolute Maximum Ratings............................................................ ꢁ  
ESD Caution.................................................................................. ꢁ  
Pin Configuration and Function Descriptions............................. 5  
Typical Performance Characteristics ............................................. 6  
Theory of Operation ........................................................................ 9  
Application Information................................................................ 1±  
REVISION HISTORY  
6/05—Data Sheet Changed from Rev. A to Rev. B  
Added Pin Function Descriptions Table ....................................... 5  
Changes to Ordering Guide .......................................................... 13  
6/04—Data Sheet Changed from Rev. 0 to Rev. A  
Updated Format..............................................................Universal  
Changes to Figures 5, 11, 12, 13, 1ꢁ, 15 ..................................... 6  
Updated Outline Dimensions................................................... 12  
Changes to Ordering Guide ...................................................... 12  
6/01—Rev. 0: Initial Version  
Rev. B | Page 2 of 16  
ADP3338  
SPECIFICATIONS  
VIN = 6.± V, CIN = COUT = 1 µF, TJ = −ꢁ±°C to +125°C, unless otherwise noted.  
Table 1.  
Parameter1, 2, 3  
OUTPUT  
Symbol Conditions  
Min Typ  
Max Unit  
Voltage Accuracy  
VOUT  
VIN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = 25°C  
−0.8  
−1.4  
−1.6  
0.04  
0.006  
+0.8  
+1.4  
+1.6  
%
%
%
mV/V  
mV/mA  
VIN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = −40°C to +125°C  
VIN = VOUTNOM + 0.4 V to 8 V, IL = 50 mA to 1 A, TJ = 150°C  
VIN = VOUTNOM + 0.4 V to 8 V, TJ = 25°C  
IL = 0.1 mA to 1 A, TJ = 25°C  
VOUT = 98% of VOUTNOM  
Line Regulation  
Load Regulation  
Dropout Voltage  
VDROP  
IL = 1 A  
IL = 500 mA  
IL = 100 mA  
190  
125  
70  
400  
200  
150  
mV  
mV  
mV  
Peak Load Current  
Output Noise  
ILDPK  
VNOISE  
VIN = VOUTNOM + 1 V  
f = 10 Hz to 100 kHz, CL = 10 µF, IL = 1 A  
1.6  
95  
A
µV rms  
GROUND CURRENT  
In Regulation  
IGND  
IL = 1 A  
IL = 500 mA  
IL = 100 mA  
IL = 0.1 mA  
9
30  
15  
3
190  
600  
mA  
mA  
mA  
µA  
4.5  
0.9  
110  
190  
In Dropout  
IGND  
VIN = VOUTNOM – 100 mV, IL = 0.1 mA  
µA  
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.  
2 Application stable with no load.  
3 VIN = 2.7 V for models with VOUTNOM ≤ 2.2 V.  
Rev. B | Page 3 of 16  
 
 
 
 
ADP3338  
ABSOLUTE MAXIMUM RATINGS  
Unless otherwise specified, all voltages are referenced to GND.  
Table 2.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Parameter  
Rating  
Input Supply Voltage  
Power Dissipation  
Operating Ambient Temperature Range  
Operating Junction Temperature Range  
θJA  
−0.3 V to +8.5 V  
Internally limited  
−40°C to +85°C  
−40°C to +150°C  
62.3°C/W  
Only one absolute maximum rating may be applied at any one  
time.  
θJC  
26.8°C/W  
Storage Temperature Range  
Lead Temperature (Soldering 10 sec)  
Vapor Phase (60 sec)  
Infrared (15 sec)  
−65°C to +150°C  
300°C  
215°C  
220°C  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. B | Page 4 of 16  
 
ADP3338  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
3
2
1
IN  
ADP3338  
TOP VIEW  
(Not to Scale)  
2
OUT  
GND  
OUT  
NOTE: PIN 2 AND TAB ARE INTERNALLY CONNECTED  
Figure 3. Pin Configuration  
Table 3. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
GND  
OUT  
IN  
Ground Pin.  
Regulator Output. Bypass to ground with a 1 µF or larger capacitor.  
Regulator Input. Bypass to ground with a 1 µF or larger capacitor.  
Rev. B | Page 5 of 16  
 
ADP3338  
TYPICAL PERFORMANCE CHARACTERISTICS  
TA = 25°C, unless otherwise noted.  
2.515  
12  
10  
8
V
V
= 2.5V  
= 6V  
OUT  
V
= 2.5V  
OUT  
IN  
2.510  
2.505  
2.500  
2.495  
2.490  
I
= 0A  
= 1A  
L
L
I
= 0.5A  
L
6
I
4
2
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
2.5  
4.5  
INPUT VOLTAGE (V)  
6.5  
8.0  
OUTPUT LOAD (A)  
Figure 4. Line Regulation Output Voltage vs. Input Voltage  
Figure 7. Ground Current vs. Load Current  
0.4  
0.3  
0.2  
0.1  
2.504  
2.503  
2.502  
2.501  
2.500  
2.499  
2.498  
2.497  
2.496  
2.495  
V
V
= 2.5V  
OUT  
= 6V  
V
= 6V  
IN  
IN  
I
= 1A  
L
I
= 0.7A  
L
I
= 0.5A  
L
I
= 0.3A  
L
I
= 0A  
L
0
–0.05  
–40  
–20  
0
20  
40  
60  
80  
C)  
100  
120  
0
0.2  
0.4  
0.6  
0.8  
1.0  
JUNCTION TEMPERATURE (  
°
LOAD CURRENT (A)  
Figure 5. Output Voltage vs. Load Current  
Figure 8. Output Voltage Variation % vs. Junction Temperature  
300  
250  
200  
150  
100  
50  
18  
I
= 1A  
LOAD  
V
I
= 2.5V  
= 0A  
OUT  
16  
14  
12  
10  
8
LOAD  
I
= 700mA  
LOAD  
I
= 500mA  
LOAD  
I
= 300mA  
LOAD  
6
4
2
0
0
–40 –20  
0
20  
40  
60  
80  
100 120 140 160  
0
2
4
6
8
JUNCTION TEMPERATURE (°C)  
INPUT VOLTAGE (V)  
Figure 6. Ground Current vs. Supply Voltage  
Figure 9. Ground Current vs. Junction Temperature  
Rev. B | Page 6 of 16  
 
ADP3338  
250  
200  
150  
100  
50  
V
C
= 2.5V  
= 10µF  
OUT  
OUT  
V
= 2.5V  
OUT  
2.51  
2.50  
2.49  
I
LOAD = 1A  
4.5  
3.5  
40  
80  
120  
TIME (  
160  
200  
240  
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
µ
s)  
LOAD CURRENT (A)  
Figure 13. Line Transient Response  
Figure 10. Dropout Voltage vs. Load Current  
V
C
= 6V  
= 1µF  
V
= 2.5V  
= 1A  
IN  
OUT  
OUT  
I
LOAD  
2.6  
2.5  
3
2
1
0
2.4  
1
0
0
200  
400  
600  
s)  
800  
1000  
10  
0
1
3
4
5
6
7
8
9
2
TIME (  
µ
TIME (sec)  
Figure 14. Load Transient Response  
Figure 11. Power-Up/Power-Down  
V = 6V  
IN  
OUT  
V
= 2.5V  
OUT  
C
= 10µF  
C
= 1µF  
= 1A  
2.6  
2.5  
2.4  
2.51  
2.50  
2.49  
OUT  
I
LOAD  
1
0
4.5  
3.5  
0
200  
400  
600  
s)  
800  
1000  
40  
80  
120  
TIME (µs)  
160  
200  
240  
TIME (  
µ
Figure 15. Load Transient Response  
Figure 12. Line Transient Response  
Rev. B | Page 7 of 16  
ADP3338  
300  
250  
200  
150  
100  
50  
2.5  
0
400mΩ  
SHORT  
FULL SHORT  
1.5  
1.0  
V
= 6V  
IN  
I
= 1A  
= 0A  
L
0.5  
0
I
L
0
0.4  
0.6  
0.8  
1.0  
0
10  
20  
30  
40  
50  
TIME (s)  
C
(µF)  
L
Figure 16. Short-Circuit Current  
Figure 18. RMS Noise vs. CL  
100  
0
V
= 2.5V  
OUT  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
10  
1
C
= 1µF  
L
I
= 1A  
L
C
= 10µF  
L
I
= 1A  
L
C
= 1µF  
L
0.1  
C
= 10µF  
L
0.01  
C
= 10µF  
= 0  
L
C
= 1  
= 0  
µ
F
I
L
L
I
L
0.001  
10k  
10  
100  
1k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 19. Output Noise Density (10 Hz to 100 kHz)  
Figure 17. Power Supply Ripple Rejection  
Rev. B | Page 8 of 16  
 
ADP3338  
THEORY OF OPERATION  
The ADP3338 anyCAP LDO uses a single control loop for  
regulation and reference functions. The output voltage is sensed  
by a resistive voltage divider, consisting of R1 and R2, which is  
varied to provide the available output voltage option. Feedback  
is taken from this network by way of a series diode (D1) and a  
second resistor divider (R3 and Rꢁ) to the input of an amplifier.  
include the load capacitor in a pole-splitting arrangement to  
achieve reduced sensitivity to the value, type, and ESR of the  
load capacitance.  
Most LDOs place very strict requirements on the range of ESR  
values for the output capacitor because they are difficult to  
stabilize due to the uncertainty of load capacitance and resis-  
tance. Moreover, the ESR value required to keep conventional  
LDOs stable changes depending on load and temperature.  
These ESR limitations make designing with LDOs more  
difficult because of their unclear specifications and extreme  
variations over temperature.  
A very high gain error amplifier is used to control this loop. The  
amplifier is constructed in such a way that equilibrium produces  
a large, temperature-proportional input offset voltage that is  
repeatable and very well controlled. The temperature-propor-  
tional offset voltage is combined with the complementary diode  
voltage to form a virtual band gap voltage that is implicit in the  
network, although it never appears explicitly in the circuit.  
Ultimately, this patented design makes it possible to control the  
loop with only one amplifier. This technique also improves the  
noise characteristics of the amplifier by providing more flexi-  
bility on the trade off of noise sources that leads to a low noise  
design.  
With the ADP3338 anyCAP LDO, this is no longer true. It can  
be used with virtually any good quality capacitor, with no  
constraint on the minimum ESR. This innovative design  
provides circuit stability with just a small 1 µF capacitor on the  
output. Additional advantages of the pole-splitting scheme  
include superior line noise rejection and very high regulator  
gain to achieve excellent line and load regulation. An impressive  
±1.ꢁꢀ accuracy is guaranteed over line, load, and temperature.  
The R1, R2 divider is chosen in the same ratio as the band gap  
voltage to the output voltage. Although the R1, R2 resistor  
divider is loaded by Diode D1 and a second divider consisting  
of R3 and Rꢁ, the values can be chosen to produce a tempera-  
ture-stable output. This unique arrangement specifically corrects  
for the loading of the divider, thus avoiding the error resulting  
from base current loading in conventional circuits.  
Additional features of the circuit include current limit and  
thermal shutdown.  
V
V
OUT  
IN  
C1  
C2  
1µF  
1µF  
IN  
OUT  
GND  
ADP3338  
The patented amplifier controls a new and unique noninverting  
driver that drives the pass transistor, Q1. The use of this special  
noninverting driver enables the frequency compensation to  
Figure 20. Typical Application Circuit  
INPUT  
OUTPUT  
COMPENSATION  
CAPACITOR  
Q1  
ATTENUATION  
R1  
(a)  
(V  
/V  
)
BANDGAP OUT  
R3 D1  
C
R
PTAT  
LOAD  
NONINVERTING  
WIDEBAND  
DRIVER  
V
OS  
g
m
PTAT  
LOAD  
CURRENT  
R4  
R2  
ADP3338  
GND  
Figure 21. Functional Block Diagram  
Rev. B | Page 9 of 16  
 
ADP3338  
APPLICATION INFORMATION  
CAPACITOR SELECTION  
CALCULATING POWER DISSIPATION  
Output Capacitor  
Device power dissipation is calculated as  
The stability and transient response of the LDO is a function of  
the output capacitor. The ADP3338 is stable with a wide range  
of capacitor values, types, and ESR (anyCAP). A capacitor as  
low as 1 µF is the only requirement for stability. A higher ca-  
pacitance may be necessary if high output current surges are  
anticipated, or if the output capacitor cannot be located near the  
output and ground pins. The ADP3338 is stable with extremely  
low ESR capacitors (ESR ≈ ±) such as multilayer ceramic capacitors  
(MLCC) or OSCON. Note that the effective capacitance of some  
capacitor types falls below the minimum over temperature or  
with dc voltage.  
PD = (VIN VOUT) × ILOAD + (VIN × IGND  
)
Where ILOAD and IGND are load current and ground current, and  
IN and VOUT are the input and output voltages, respectively.  
Assuming the worst-case operating conditions are ILOAD = 1.± A,  
IGND = 1± mA, VIN = 3.3 V, and VOUT = 2.5 V, the device power  
dissipation is  
V
PD = (3.3 V – 2.5 V) × 1±±± mA + (3.3 V × 1± mA) = 833 mW  
So, for a junction temperature of 125°C and a maximum  
ambient temperature of 85°C, the required thermal resistance  
from junction to ambient is  
Input Capacitor  
An input bypass capacitor is not strictly required, but is recom-  
mended in any application involving long input wires or high  
source impedance. Connecting a 1 µF capacitor from the input  
to ground reduces the sensitivity of the circuit to PC board  
layout and input transients. If a larger output capacitor is  
necessary, a larger value input capacitor is recommended.  
125°C 85°C  
θJA  
=
= ꢁ8°C/W  
±.833 W  
PRINTED CIRCUIT BOARD LAYOUT  
CONSIDERATIONS  
The thermal resistance, θJA, of the SOT-223 is determined by the  
sum of the junction-to-case and the case-to-ambient thermal  
resistances. The junction-to-case thermal resistance, θJC, is  
determined by the package design and is specified at 26.8°C/W.  
However, the case-to-ambient thermal resistance is determined  
by the printed circuit board design.  
OUTPUT CURRENT LIMIT  
The ADP3338 is short-circuit protected by limiting the pass  
transistors base drive current. The maximum output current is  
limited to approximately 2 A (see Figure 16).  
THERMAL OVERLOAD PROTECTION  
As shown in Figure 22, the amount of copper to which the  
ADP3338 is mounted affects thermal performance. When  
mounted to the minimal pads of 2 oz. copper, as shown in  
Figure 22 (a), θJA is 126.6°C/W. Adding a small copper pad  
under the ADP3338, as shown in Figure 22 (b), reduces the θJA to  
1±2.9°C/W. Increasing the copper pad to one square inch, as  
shown in Figure 22 (c), reduces the θJA even further to 52.8°C/W.  
The ADP3338 is protected against damage due to excessive  
power dissipation by its thermal overload protection circuit.  
Thermal protection limits the die temperature to a maximum of  
16±°C. Under extreme conditions, such as high ambient  
temperature and power dissipation where the die temperature  
starts to rise above 16±°C, the output current is reduced until  
the die temperature has dropped to a safe level.  
Current and thermal limit protections are intended to protect  
the device against accidental overload conditions. For normal  
operation, externally limit the power dissipation of the device  
so the junction temperature does not exceed 15±°C.  
a
b
c
Figure 22. PCB Layouts  
Rev. B | Page 10 of 16  
 
 
ADP3338  
Use the adjacent area to the ADP3338 to add more copper  
around it. Connecting the copper area to the output of the  
ADP3338, as shown in Figure 22 (c), is best, but thermal  
performance will be improved even if it is connected to  
other signals.  
Use the following general guidelines when designing printed  
circuit boards:  
Keep the output capacitor as close as possible to the output  
and ground pins.  
Keep the input capacitor as close as possible to the input  
and ground pins.  
Use additional copper layers or planes to reduce the  
thermal resistance. Again, connecting the other layers to  
the output of the ADP3338 is best, but is not necessary.  
When connecting the output pad to other layers, use  
multiple vias.  
Specify thick copper and use wide traces for optimum heat  
transfer. PC board traces with larger cross sectional areas  
remove more heat from the ADP3338.  
Decrease thermal resistance by adding a copper pad under  
the ADP3338, as shown in Figure 22 (b).  
Rev. B | Page 11 of 16  
ADP3338  
OUTLINE DIMENSIONS  
3.10  
3.00  
2.90  
7.30  
7.00  
6.70  
3.70  
3.50  
3.30  
1
2
3
0.84  
0.76  
0.66  
2.30  
BSC  
1.05  
0.85  
16°  
10°  
1.70  
1.60  
1.50  
1.30  
1.10  
6.50 BSC  
4.60 BSC  
0.35  
0.30  
0.23  
0.10  
0.02  
16°  
10°  
10° MAX  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS TO-261-AA  
Figure 23. 3-Lead Small Outline Transistor Package [SOT-223]  
(KC-3)  
Dimensions shown in millimeters  
Rev. B | Page 12 of 16  
 
ADP3338  
ORDERING GUIDE  
Model  
Temperature Range  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
Output Voltage (V)  
Package Option  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
KC-3  
Package Description  
ADP3338AKC-1.5-RL  
ADP3338AKC-1.5-RL7  
ADP3338AKCZ-1.5-RL1  
ADP3338AKCZ-1.5-RL71  
ADP3338AKC-1.8-RL  
ADP3338AKC-1.8-RL7  
ADP3338AKCZ-1.8-RL1  
ADP3338AKCZ-1.8-R71  
ADP3338AKC-2.5-RL  
ADP3338AKC-2.5-RL7  
ADP3338AKCZ-2.5-RL1  
ADP3338AKCZ-2.5RL71  
ADP3338AKC-2.85-RL  
ADP3338AKC-2.85-RL7  
ADP3338AKCZ-2.85R71  
ADP3338AKC-3-RL  
ADP3338AKC-3-RL7  
ADP3338AKCZ-3-RL71  
ADP3338AKC-3.3-RL  
ADP3338AKC-3.3-RL7  
ADP3338AKCZ-3.3-RL1  
ADP3338AKCZ-3.3RL71  
ADP3338AKC-5-REEL  
ADP3338AKC-5-REEL7  
ADP3338AKCZ-5-REEL1  
ADP3338AKCZ-5-R71  
1.5  
1.5  
1.5  
1.5  
1.8  
1.8  
1.8  
1.8  
2.5  
2.5  
2.5  
2.5  
2.85  
2.85  
2.85  
3.0  
3.0  
3.0  
3.3  
3.3  
3.3  
3.3  
5
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
3-Lead SOT-223  
5
5
5
1 Z = Pb-free part.  
Rev. B | Page 13 of 16  
 
 
 
ADP3338  
NOTES  
Rev. B | Page 14 of 16  
ADP3338  
NOTES  
Rev. B | Page 15 of 16  
ADP3338  
NOTES  
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
C02050–0–6/05(B)  
Rev. B | Page 16 of 16  

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