ADR3425ARJZ-R2 [ADI]
Micropower, High Accuracy Voltage References; 微功耗，高精度电压基准
| 型号： | ADR3425ARJZ-R2 |
| 厂家： | 
ADI |
| 描述： | Micropower, High Accuracy Voltage References |
| 文件： | 总20页 (文件大小：882K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Micropower, High Accuracy
Voltage References
ADR3425/ADR3450
PIN CONFIGURATION
FEATURES
Initial accuracy: 0.1ꢀ (max)
GND FORCE
GND SENSE
ENABLE
1
2
3
6
5
4
V
V
V
FORCE
OUT
OUT
IN
ADR3425/
ADR3450
Maximum temperature coefficient: 8 ppm/°C
Operating temperature range: −40°C to +125°C
Output current: +10 mA source/−3 mA sink
Low quiescent current: 100 μA (max)
Low dropout voltage: 250 mV at 2 mA
Output noise (0.1 Hz to 10 Hz): < 18 μV p-p at 2.5 V typ
6-lead SOT-23 package
SENSE
TOP VIEW
(Not to Scale)
Figure 1. 6-Lead SOT-23
APPLICATIONS
Precision data acquisition systems
High resolution data converters
Industrial instrumentation
Medical devices
Automotive controls
Battery-powered devices
GENERAL DESCRIPTION
The ADR3425/ADR3450 are low-cost, low-power, high
precision CMOS voltage references, featuring 0ꢀ.1 initial
accuracy, low operating current, and low output noise in a small
SOT-23 packageꢀ
Table 2. Voltage Reference Choices from Analog Devices
VOUT
Low Cost/
Ultralow
Low
High Voltage,
(V)
Low Power
Power
Noise
High Performance
0.5/1.0
2.048
ADR130
ADR430
ADR440
ADR431
ADR441
ADR360
REF191
For high accuracy, output voltage and temperature coefficient
are trimmed digitally during final assembly using Analog
Devices, Incꢀ, patented DigiTrim® technologyꢀ Stability and
system reliability are further improved by the low output
voltage hysteresis of the device and low long-term output
voltage driftꢀ
2.5
3.0
ADR3425
AD1582
ADR361
AD1583
ADR363
ADR366
AD1584
ADR364
ADR3450
AD1585
ADR365
ADR291
REF192
ADR03
AD780
REF193
ADR433
ADR443
ADR06
AD780
Furthermore, the low operating current of the device (.00 μA
maximum) facilitates usage in low-power devices, while its low
output noise helps maintain signal integrity in critical signal
processing systemsꢀ
3.3
REF196
ADR292
REF198
ADR293
REF195
4.096
ADR434
ADR444
ADR435
ADR445
5.0
ADR02
AD780
AD586
ADR01
AD587
The ADR3425/ADR3450 are available in a wide range of output
voltages, all of which are specified over the industrial
temperature range of −40°C to +.25°Cꢀ
10.0
Table 1. Selection Guide
Model
Output Voltage (V)
Input Voltage Range (V)
2.7 to 5.5
5.2 to 5.5
ADR3425
ADR3450
2.500
5.000
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
ADR3425/ADR3450
TABLE OF CONTENTS
Features .............................................................................................. 1
Terminology.................................................................................... 13
Theory of Operation ...................................................................... 14
Power Dissipation....................................................................... 14
Applications..................................................................................... 15
Basic Voltage Reference Connection....................................... 15
Input and Output Capacitors.................................................... 15
4-Wire Kelvin Connections ...................................................... 15
VIN Slew Rate Considerations................................................... 15
Shutdown/Enable Feature ......................................................... 15
Sample Applications................................................................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
Applications....................................................................................... 1
Pin Configuration.............................................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
ADR3425 Electrical Characteristics .......................................... 3
ADR3450 Electrical Characteristics .......................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
3/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADR3425/ADR3450
SPECIFICATIONS
ADR3425 ELECTRICAL CHARACTERISTICS
VIN = 2.7 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Symbol
VOUT
Conditions
Min
Typ
Max
2.5025
0.1
Unit
V
OUTPUT VOLTAGE
INITIAL ACCURACY
2.4975
2.500
VOERR
%
2.5
mV
TEMPERATURE COEFFICIENT
LINE REGULATION
TCVOUT
−40°C ≤ TA ≤ +125°C
2.5
8
ppm/°C
ppm/V
ppm/V
ΔVO/ΔVIN
VIN = 2.7 V to 5.5 V
VIN = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +125°C
50
120
LOAD REGULATION
Sourcing
ΔVO/ΔIL
IL = 0 mA to +10 mA, −40°C ≤ TA ≤ +125°C,
VIN = 3.0 V to 5.0 V
IL = 0 mA to −3 mA, −40°C ≤ TA ≤ +125°C,
30
50
ppm/mA
ppm/mA
Sinking
V
IN = 3.0 V to 5.0 V
OUTPUT CURRENT CAPACITY
Sourcing
Sinking
IL
VIN = 3.0 V to 5.5 V
VIN = 3.0 V to 5.5 V
10
−3
mA
mA
QUIESCENT CURRENT
Normal Operation
IQ
ENABLE ≥ VIN × 0.85
ENABLE = VIN, −40°C ≤ TA ≤ +125°C
ENABLE ≤ 0.7 V
85
100
5
μA
μA
μA
mV
mV
Shutdown
DROPOUT VOLTAGE1
VDO
IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C
IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C
200
250
ENABLE PIN
Shutdown Voltage
Enable Voltage
ENABLE Pin Leakage Current
OUTPUT VOLTAGE NOISE
VL
VH
IEN
0
0.7
VIN
3
V
V
μA
VIN × 0.85
ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C
f = 0.1 Hz to 10 Hz
f = 10 Hz to 10 kHz
1
en p-p
18
42
1.2
μV p-p
μV rms
ꢀV/√Hz
OUTPUT VOLTAGE NOISE
DENSITY
en
f = 1 kHz
OUTPUT VOLTAGE HYSTERESIS2
RIPPLE REJECTION RATIO
LONG-TERM STABILITY
ΔVOUT_HYS
RRR
TA = +25°C to −40°C to +125°C to +25°C
fIN = 60 Hz
70
ppm
dB
−60
30
ΔVOUT_LTD
tR
1000 hours at 50°C
ppm
μs
TURN-ON SETTLING TIME
800
1 Refer to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section.
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.
Rev. 0 | Page 3 of 20
ADR3425/ADR3450
ADR3450 ELECTRICAL CHARACTERISTICS
VIN = 5.2 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter
Symbol
VOUT
Conditions
Min
Typ
Max
5.005
0.1
Unit
V
OUTPUT VOLTAGE
INITIAL ACCURACY
4.995
5.000
VOERR
%
5.0
mV
TEMPERATURE COEFFICIENT
LINE REGULATION
TCVOUT
−40°C ≤ TA ≤ +125°C
2.5
8
ppm/°C
ppm/V
ppm/V
ΔVO/ΔVIN
VIN = 5.2 V to 5.5 V
VIN = 5.2 V to 5.5 V, −40°C ≤ TA ≤ +125°C
50
120
LOAD REGULATION
Sourcing
ΔVO/ΔIL
IL = 0 mA to +10 mA, −40°C ≤ TA ≤ +125°C,
VIN = 5.5 V
IL = 0 mA to −3 mA, −40°C ≤ TA ≤ +125°C,
VIN = 5.5 V
30
50
ppm/mA
ppm/mA
Sinking
OUTPUT CURRENT CAPACITY
Sourcing
Sinking
IL
VIN = 5.5 V
VIN = 5.5 V
10
−3
mA
mA
QUIESCENT CURRENT
Normal Operation
IQ
ENABLE ≥ VIN × 0.85
ENABLE = VIN, −40°C ≤ TA ≤ +125°C
ENABLE ≤ 0.7 V
85
100
5
μA
μA
μA
mV
mV
Shutdown
DROPOUT VOLTAGE1
VDO
IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C
IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C
200
250
ENABLE PIN
Shutdown Voltage
Enable Voltage
ENABLE Pin Leakage Current
OUTPUT VOLTAGE NOISE
VL
VH
IEN
0
0.7
VIN
3
V
V
μA
VIN × 0.85
ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C
f = 0.1 Hz to 10 Hz
f = 10 Hz to 10 kHz
1
en p-p
35
60
1.9
μV p-p
μV rms
ꢀV/√Hz
OUTPUT VOLTAGE NOISE
DENSITY
en
f = 1 kHz
OUTPUT VOLTAGE HYSTERESIS2
RIPPLE REJECTION RATIO
LONG-TERM STABILITY
ΔVOUT_HYS
RRR
TA = +25°C to −40°C to +125°C to +25°C
fIN = 60 Hz
70
ppm
dB
−58
30
ΔVOUT_LTD
tR
1000 hours at 50°C
ppm
ms
TURN-ON SETTLING TIME
1.2
1 Refer to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section.
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.
Rev. 0 | Page 4 of 20
ADR3425/ADR3450
THERMAL RESISTANCE
ABSOLUTE MAXIMUM RATINGS
θJA is specified for the worst-case conditions; that is, a device
soldered in a circuit board for surface-mount packages.
TA = 25°C, unless otherwise noted.
Table 5.
Parameter
Supply Voltage
ENABLE to GND SENSE Voltage
VIN Minimum Slew Rate
Operating Temperature Range
Storage Temperature Range
Junction Temperature Range
Table 6. Thermal Resistance
Package Type
Rating
θJA
θJC
Unit
6 V
VIN
0.1 V/ms
−40°C to +125°C
−65°C to +125°C
−65°C to +150°C
6-Lead SOT-23 (RJ-6)
230
92
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 20
ADR3425/ADR3450
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND FORCE
GND SENSE
ENABLE
1
2
3
6
5
4
V
V
V
FORCE
SENSE
OUT
OUT
IN
ADR3425/
ADR3450
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
GND FORCE
GND SENSE
ENABLE
Description
Ground Force Connection1.
1
2
3
4
5
6
Ground Voltage Sense Connection. Connect directly to point of lowest potential in application1.
Enable Connection. Enables or disables the device.
Input Voltage Connection.
Reference Voltage Output Sensing Connection. Connect directly to the voltage input of load devices1.
Reference Voltage Output1.
VIN
VOUT SENSE
VOUT FORCE
1 See the Applications section for more information on force/sense connections.
Rev. 0 | Page 6 of 20
ADR3425/ADR3450
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
2.5010
14
12
10
8
V
= 5.5V
IN
ΔI = 0mA TO 10mA
V
= 5.5V
2.5008
2.5006
2.5004
2.5002
2.5000
2.4998
2.4996
2.4994
2.4992
2.4990
IN
L
C
= 0.1µF
L
6
4
2
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (ºC)
TEMPERATURE (°C)
Figure 3. ADR3425 Output Voltage vs. Temperature
Figure 6. ADR3425 Load Regulation vs. Temperature (Sourcing)
40
35
30
25
20
15
10
5
20
V
= 5.5V
IN
ΔI = 0mA TO –3mA
18
16
14
12
10
8
L
C
= 0.1µF
L
6
4
2
0
0
0
1
2
3
4
5
6
7
8
9
10 MORE
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE COEFFICIENT (ppm/°C)
TEMPERATURE (°C)
Figure 4. ADR3425 Temperature Coefficient Distribution
Figure 7. ADR3425 Load Regulation vs. Temperature (Sinking)
400
150
130
110
90
–40°C
+25°C
+125°C
ΔV = 2.7V TO 5.5V
IN
350
300
250
200
150
100
50
I
= 0
L
70
50
30
10
–10
–30
0
–3 –2 –1
0
1
2
3
4
5
6
7
8
9
10
–40 –25 –10
5
20
35
50
65
80
95 110 125
LOAD CURRENT (mA)
TEMPERATURE (°C)
Figure 8. ADR3425 Dropout Voltage vs. Load Current
Figure 5. ADR3425 Line Regulation vs. Temperature
Rev. 0 | Page 7 of 20
ADR3425/ADR3450
5.0025
6
5
4
3
2
1
0
V
= 5.5V
IN
ΔI = 0mA TO 10mA
V
= 5.5V
5.0020
5.0015
5.0010
5.0005
5.0000
4.9995
4.9990
4.9985
4.9980
4.9975
IN
L
C
= 0.1µF
L
–40 –25 –10
5
20
35
50
65
80
95 110 125
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (ºC)
TEMPERATURE (°C)
Figure 9. ADR3450 Output Voltage vs. Temperature
Figure 12. ADR3450 Load Regulation vs. Temperature (Sourcing)
45
40
35
30
25
20
15
10
5
24
V
= 5.5V
IN
ΔI = 0mA TO –3mA
C
L
22
20
18
16
14
12
10
= 0.1µF
L
8
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
0
1
2
3
4
5
6
7
8
9
10 MORE
TEMPERATURE (°C)
TEMPERATURE COEFFICIENT (ppm/°C)
Figure 13. ADR3450 Load Regulation vs. Temperature (Sinking)
Figure 10. ADR3450 Temperature Coefficient Distribution
350
10
–40°C
+25°C
+125°C
ΔV = 5.2V TO 5.5V
IN
8
6
I
= 0
300
L
250
200
150
100
50
4
2
0
–2
–4
–6
–8
–10
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
–3 –2 –1
0
1
2
3
4
5
6
7
8
9
10
TEMPERATURE (°C)
LOAD CURRENT (mA)
Figure 11. ADR3450 Line Regulation vs. Temperature
Figure 14. ADR3450 Dropout Voltage vs. Load Current
Rev. 0 | Page 8 of 20
ADR3425/ADR3450
0
C
C
= 1.1µF
L
–10
–20
–30
–40
–50
–60
–70
–80
= 0.1µF
IN
1
10µV/DIV
TIME = 1s/DIV
CH1 RMS = 3.14µV
–90
CH1 pk-pk = 18µV
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 18. ADR3425 Ripple Rejection Ratio vs. Frequency
Figure 15. ADR3425 Output Voltage Noise (0.1 Hz to 10 Hz)
C
R
= C = 0.1µF
L
IN
L
=
∞
1
V
= 2V/DIV
IN
1
100µV/DIV
TIME = 200µs/DIV
2
V
= 1V/DIV
TIME = 1s/DIV
OUT
CH1 pk-pk = 300µV
CH1 RMS = 42.0µV
Figure 19. ADR3425 Start-Up Response
Figure 16. ADR3425 Output Voltage Noise (10 Hz to 10 kHz)
12
ENABLE
10
8
V
V
C
= 1V/DIV
ENABLE
= 3.0v
IN
= C = 0.1µF
IN
L
L
R
=
∞
1
6
4
V
= 1V/DIV
OUT
TIME = 200µs/DIV
2
2
0
0.1
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 20. ADR3425 Restart Response from Shutdown
Figure 17. ADR3425 Output Noise Spectral Density
Rev. 0 | Page 9 of 20
ADR3425/ADR3450
0
C
C
= 1.1µF
L
–10
–20
–30
–40
–50
–60
–70
–80
= 0.1µF
IN
1
10µV/DIV
–90
CH1 pk-pk = 33.4µV
CH1 RMS = 5.68µV
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 24. ADR3450 Ripple Rejection Ratio vs. Frequency
Figure 21. ADR3450 Output Voltage Noise (0.1 Hz to 10 Hz)
C
C
R
= 0µF
= 0.1µF
IN
L
L
=
∞
V
IN
2V/DIV
1
1
V
OUT
2V/DIV
TIME = 200µs/DIV
100µV/DIV
2
CH1 pk-pk = 446µV
CH1 RMS = 60.3µV
Figure 25. ADR3450 Start-Up Response
Figure 22. ADR3450 Output Voltage Noise (10 Hz to 10 kHz)
12
10
8
ENABLE
V
V
C
R
= 2V/DIV
ENABLE
= 5.5V
IN
= C = 0.1µF
IN
L
L
1
=
∞
6
V
= 2V/DIV
OUT
4
TIME = 200µs/DIV
2
2
0
0.1
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 26. ADR3450 Restart Response from Shutdown
Figure 23. ADR3450 Output Noise Spectral Density
Rev. 0 | Page 10 of 20
ADR3425/ADR3450
ENABLE
1V/DIV
ENABLE
2V/DIV
C
= C = 0.1µF
L
= 5V
= 1kΩ
IN
IN
C
= C = 0.1µF
L
= 3V
= 1kΩ
IN
V
R
V
R
IN
L
L
1
1
V
= 1V/DIV
V
= 2V/DIV
OUT
2
OUT
2
TIME = 200µs/DIV
TIME = 200µs/DIV
Figure 27. ADR3425 Shutdown Response
Figure 30. ADR3450 Shutdown Response
V
= 100mV/DIV
IN
5.5V
5.2V
3.2V
2.7V
C
= C = 0.1µF
L
IN
1
500mV/DIV
C
= C = 0.1µF
L
IN
2
V
= 10mV/DIV
OUT
2
V
= 5mV/DIV
OUT
TIME = 1ms/DIV
TIME = 1ms/DIV
1
Figure 28. ADR3425 Line Transient Response
Figure 31. ADR3450 Line Transient Response
I
L
+10mA
–3mA
SOURCING
SOURCING
SINKING
I
+10mA
–3mA
L
SINKING
SINKING
SINKING
C
C
R
=
=
0.1µF
0.1µF
= 500Ω
IN
C
C
R
=
=
0.1µF
0.1µF
= 250Ω
IN
L
L
L
L
5.0V
2.5V
V
= 20mV/DIV
V
= 20mV/DIV
OUT
OUT
TIME = 1ms/DIV
TIME = 1ms/DIV
Figure 29. ADR3425 Load Transient Response
Figure 32. ADR3450 Load Transient Response
Rev. 0 | Page 11 of 20
ADR3425/ADR3450
7
6
5
4
3
2
1
0
100
V
= 5.5 V
IN
90
80
70
60
50
40
30
20
10
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
RELATIVE SHIFT IN V
OUT
(%)
Figure 33. Supply Current vs. Temperature
Figure 36. Output Voltage Drift Distribution After Reflow (SHR Drift)
2.0
8
T
= +25°C → +150°C → –50°C → +25°C
A
–40°C
+25°C
+125°C
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
7
6
5
4
3
2
1
0
0
0
10
20
30
40
50
60
70
80
90
100
ENABLE VOLTAGE (% of V
)
IN
OUTPUT VOLTAGE HYSTERESIS (ppm)
Figure 37. Thermally Induced Output Voltage Hysteresis Distribution
Figure 34. Supply Current vs. Enable Pin Voltage
80
10
C
C
= 0.1µF
= 1.1µF
L
L
60
40
1
20
0
–20
–40
–60
–80
0.1
0.01
0
200
400
600
800
1000
0.01
0.1
1
10
100
1k
10k
ELAPSED TIME (Hours)
FREQUENCY (Hz)
Figure 35. ADR3450 Output Impedance vs. Frequency
Figure 38. ADR3450 Typical Long-Term Drift (Four Devices, 1000 Hours)
Rev. 0 | Page 12 of 20
ADR3425/ADR3450
TERMINOLOGY
Long-Term Stability (ΔVOUT_LTD
)
Dropout Voltage (VDO
)
Long-term stability refers to the shift in output voltage at 50°C
after 1000 hours of operation in a 50°C environment. Ambient
temperature is kept at 50°C to ensure that the temperature
chamber does not switch randomly between heating and cooling,
which can cause instability over the 1000 hour measurement.
This is also expressed as either a shift in voltage or a difference
in ppm from the nominal output.
Dropout voltage, sometimes referred to as supply voltage
headroom or supply-output voltage differential, is defined as
the minimum voltage differential between the input and output
such that the output voltage is maintained to within 0.1%
accuracy.
V
DO = (VIN − VOUT)min | IL = constant
Because the dropout voltage depends upon the current passing
through the device, it is always specified for a given load current.
In series-mode devices, dropout voltage typically increases
proportionally to load current; see Figure 8 and Figure 14.
ΔVOUT _ LTD = VOUT (t1 ) − VOUT (t0 ) [V]
VOUT (t1 ) −VOUT (t0 )
ΔVOUT _ LTD
=
×106 [ppm]
VOUT (t0 )
Temperature Coefficient (TCVOUT
)
where:
OUT(t0) is the VOUT at 50°C at time 0.
The temperature coefficient relates the change in output voltage
to the change in ambient temperature of the device, as normalized
by the output voltage at 25°C. This parameter is expressed in
ppm/°C and can be determined by the following equation:
V
VOUT(t1) is the VOUT at 50°C after 1000 hours of operation at
50°C.
Line Regulation
max{VOUT (T ,T2,T3)}−min{V
(T ,T2,T3)}
1
1
OUT
TCVOUT
=
×106 [ppm/°C]
Line regulation refers to the change in output voltage in response
to a given change in input voltage and is expressed in either
percent per volt, ppm per volt, or μV per volt change in input
voltage. This parameter accounts for the effects of self-heating.
VOUT (T2)×(T3 −T )
1
where:
VOUT(T) is the output voltage at temperature T and
Load Regulation
T1 = −40°C.
T2 = +25°C.
T3 = +125°C.
Load regulation refers to the change in output voltage in
response to a given change in load current and is expressed in
μV per mA, ppm per mA, or ohms of dc output resistance. This
parameter accounts for the effects of self-heating.
This three-point method ensures that TCVOUT accurately
portrays the maximum difference between any of the three
temperatures at which the output voltage of the part is
measured.
Solder Heat Resistance (SHR) Drift
SHR drift refers to the permanent shift in output voltage
induced by exposure to reflow soldering, expressed in units of
ppm. This is caused by changes in the stress exhibited upon the
die by the package materials when exposed to high
temperatures. This effect is more pronounced in lead-free
soldering processes due to higher reflow temperatures.
The TCVOUT for the ADR3425/ADR3450 is guaranteed via
statistical means. This is accomplished by recording output
voltage data for a large number of units over temperature,
computing TCVOUT for each individual device via the above
equation, then defining the maximum TCVOUT limits as the mean
TCVOUT for all devices extended by 6 standard deviations (6σ).
Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS
Thermally induced output voltage hysteresis represents the
change in output voltage after the device is exposed to a
)
specified temperature cycle. This is expressed as either a shift in
voltage or a difference in ppm from the nominal output:
ΔVOUT _ HYS =VOUT (25°C) −VOUT _ TC [V]
V
OUT (25°C) −VOUT _ TC
ΔVOUT _ HYS
where:
=
×106 [ppm]
V
OUT (25°C)
V
V
OUT(25°C) is the output voltage at 25°C.
OUT_TC is the output voltage after temperature cycling.
Rev. 0 | Page 13 of 20
ADR3425/ADR3450
THEORY OF OPERATION
VDD
LONG-TERM STABILITY
One of the key parameters of the ADR3425/ADR3450
references is long-term stability. Regardless of output voltage,
internal testing during development showed a typical drift of
approximately 30 ppm after 1,000 hours of continuous, non
loaded operation in a +50°C environment.
BANDGAP
VOLTAGE
REFERENCE
V
BG
ENABLE
REF FORCE
REF SENSE
R
FB1
GND FORCE
It is important to understand that long-term stability is not
guaranteed by design and that the output from the device may
shift beyond the typical 30 ppm specification at any time,
especially during the first 200 hours of operation. For systems
that require highly stable output voltages over long periods of
time, the designer should consider burning-in the devices prior
to use to minimize the amount of output drift exhibited by the
reference over time. See the AN-713 Application Note for more
information regarding the effects of long-term drift and how it
can be minimized.
R
FB2
GND SENSE
Figure 39. Block Diagram
The ADR3425/ADR3450 use a patented voltage reference
architecture to achieve high accuracy, low temperature
coefficient (TC), and low noise in a CMOS process. Like all
bandgap references, the ADR3425/ADR3450 combine two
voltages of opposite TCs to create an output voltage that is
nearly independent of ambient temperature. However, unlike
traditional bandgap voltage references, the temperature-
independent voltage of the ADR3425/ADR3450 are arranged to
be the base-emitter voltage, VBE, of a bipolar transistor at room
temperature rather than the VBE extrapolated to 0 K (the VBE of
bipolar transistor at 0 K is approximately VG0, the band gap
voltage of silicon). A corresponding positive-TC voltage is then
added to the VBE voltage to compensate for its negative TC.
POWER DISSIPATION
The ADR3425/ADR3450 voltage references are capable of
sourcing up to 10 mA of load current at room temperature
across the rated input voltage range. However, when used in
applications subject to high ambient temperatures, the input
voltage and load current should be carefully monitored to
ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the
device can be calculated via the following equation:
The key benefit of this technique is that the trimming of the
initial accuracy and TC can be performed without interfering
with one another, thereby increasing overall accuracy across
temperature. Curvature correction techniques further reduce
the temperature variation.
TJ − TA
PD =
[W]
θJA
where:
PD is the device power dissipation.
TJ is the device junction temperature.
TA is the ambient temperature.
The bandgap voltage is then buffered and amplified to produce
stable output voltages of 2.5 V and 5.0 V. The output buffer can
source up to 10 mA and sink up to 3 mA of load current.
θJA is the package (junction-to-air) thermal resistance.
The ADR3425/ADR3450 leverage Analog Devices patented
DigiTrim technology to achieve high initial accuracy and low
TC, while precision layout techniques lead to very low long-term
drift and thermal hysteresis.
Because of this relationship, acceptable load current in high
temperature conditions may be less than the maximum current-
sourcing capability of the device. In no case should the part be
operated outside of its maximum power rating because doing so
can result in premature failure or permanent damage to the
device.
Rev. 0 | Page 14 of 20
ADR3425/ADR3450
APPLICATIONS
back into the internal amplifier and used to automatically
correct for the voltage drop across the current-carrying output
and ground lines, resulting in a highly accurate output voltage
across the load. To achieve the best performance, the sense
connections should be connected directly to the point in the
load where the output voltage should be the most accurate.
See Figure 41 for an example application.
BASIC VOLTAGE REFERENCE CONNECTION
VREF
OUT
2.5V
VIN
2.7V TO
5.5V
4
3
6
V
V
FORCE
SENSE
IN
OUT
5
ENABLE
V
OUT
0.1µF
1µF
0.1µF
ADR3425
2
1
GND SENSE
GND FORCE
OUTPUT CAPACITOR(S) SHOULD
BE MOUNTED AS CLOSE
Figure 40. Basic Reference Connection
TO VOUT PIN AS POSSIBLE.
The circuit shown in Figure 40 illustrates the basic configuration
for the ADR3425/ADR3450. Bypass capacitors should be
connected according to the guidelines below.
0.1µF
4
3
6
5
VIN
V
V
FORCE
SENSE
IN
OUT
ENABLE
V
SENSE CONNECTIONS
SHOULD CONNECT AS
CLOSE TO LOAD
OUT
INPUT AND OUTPUT CAPACITORS
LOAD
ADR3425
1µF
0.1µF
2
1
A 1 μF to 10 μF electrolytic or ceramic capacitor can be
connected to the input to improve transient response in
applications where the supply voltage may fluctuate. An
additional 0.1 μF ceramic capacitor should be connected in
parallel to reduce high frequency supply noise.
DEVICE AS POSSIBLE.
GND SENSE
GND FORCE
Figure 41. Application Showing Kelvin Connection
It is always advantageous to use Kelvin connections whenever
possible. However, in applications where the IR drop is
negligible or an extra set of traces cannot be routed to the load,
the force and sense pins for both VOUT and GND can simply be
tied together and the device can be used in the same fashion as
a normal 3-terminal reference (as shown in Figure 40).
A ceramic capacitor of at least a 0.1 μF must be connected to the
output to improve stability and help filter out high frequency
noise. An additional 1 μF to 10 μF electrolytic or ceramic
capacitor can be added in parallel to improve transient
performance in response to sudden changes in load current;
however, the designer should keep in mind that doing so
increases the turn-on time of the device.
VIN SLEW RATE CONSIDERATIONS
In applications with slow-rising input voltage signals, the
reference exhibits overshoot or other transient anomalies that
appear on the output. These phenomena also appear during
shutdown as the internal circuitry loses power.
Best performance and stability is attained with low-ESR (for
example, less than 1 Ω), low-inductance ceramic chip-type
output capacitors (X5R, X7R or similar). If using an electrolytic
capacitor on the output, a 0.1 ꢀF ceramic capacitor should be
placed in parallel to reduce overall ESR on the output.
To avoid such conditions, ensure that the input voltage
waveform has both a rising and falling slew rate of at least
0.1 V/ms.
4-WIRE KELVIN CONNECTIONS
Current flowing through a PCB trace produces an IR voltage
drop, and with longer traces, this drop can reach several
millivolts or more, introducing a considerable error into the
output voltage of the reference. A 1 inch long, 5 millimeter wide
trace of 1 ounce copper has a resistance of approximately
100 mΩ at room temperature; at a load current of 10 mA, this
can introduce a full millivolt of error. In an ideal board layout,
the reference should be mounted as close to the load as possible
to minimize the length of the output traces, and, therefore, the
error introduced by voltage drop. However, in applications
where this is not possible or convenient, force and sense
connections (sometimes referred to as Kelvin sensing
connections) are provided as a means of minimizing the IR
drop and improving accuracy.
SHUTDOWN/ENABLE FEATURE
The ADR3425/ADR3450 references can be switched to a low-
power shutdown mode when a voltage of 0.7 V or lower is input
to the ENABLE pin. Likewise, the reference becomes operational
for ENABLE voltages of 0.85 × VIN or higher. During shutdown,
the supply current drops to less than 5 μA, useful in applications
that are sensitive to power consumption.
If using the shutdown feature, ensure that the ENABLE pin
voltage does not fall between 0.7 V and 0.85 × VIN because this
causes a large increase in the supply current of the device and
may keep the reference from starting up correctly (see Figure 34).
If not using the shutdown feature, however, the ENABLE pin
can simply be tied to the VIN pin, and the reference remains
operational continuously.
Kelvin connections work by providing a set of high impedance
voltage-sensing lines to the output and ground nodes. Because
very little current flows through these connections, the IR drop
across their traces is negligible, and the output and ground
voltages can be sensed very accurately. These voltages are fed
Rev. 0 | Page 15 of 20
ADR3425/ADR3450
SAMPLE APPLICATIONS
Negative Reference
4
3
6
5
VIN
+5V
V
V
FORCE
SENSE
IN
OUT
R1
10kΩ
ENABLE
V
OUT
1µF
0.1µF
Figure 42 shows how to connect the ADR3425/ADR3450 and a
standard CMOS op amp, such as the AD8663, to provide a
negative reference voltage. This configuration provides two
main advantages: first, it only requires two devices and,
therefore, does not require excessive board space; second, and
more importantly, it does not require any external resistors,
meaning the performance of this circuit does not rely on
choosing expensive parts with low temperature coefficients to
ensure accuracy.
0.1µF
ADR3450
R2
10kΩ
2
1
GND SENSE
GND FORCE
+15V
–5V
ADA4000-1
R3
5kΩ
–15V
+VDD
Figure 43. Bipolar Output Reference
1µF
0.1µF
4
3
6
5
AD8663
V
V
FORCE
SENSE
IN
OUT
Boosted Output Current Reference
–5V
ENABLE
V
OUT
Figure 44 shows a configuration for obtaining higher current
drive capability from the ADR3425/ADR3450 references
without sacrificing accuracy. The op amp regulates the current
flow through the MOSFET until VOUT equals the output voltage
of the reference; current is then drawn directly from VIN instead
of from the reference itself, allowing increased current drive
capability.
0.1µF
ADR3450
0.1µF
–VDD
2
1
GND SENSE
GND FORCE
Figure 42. ADR3450 Negative Reference
In this configuration, the VOUT pins of the reference sit at virtual
ground, and the negative reference voltage and load current are
taken directly from the output of the operational amplifier. Note
that in applications where the negative supply voltage is close to
the reference output voltage, a dual-supply, low offset, rail-to-
rail output amplifier must be used to ensure an accurate output
voltage. The operational amplifier must also be able to source or
sink an appropriate amount of current for the application.
VIN
+16V
U6
R1
2N7002
100Ω
4
3
6
5
V
FORCE
SENSE
V
OUT
IN
AD8663
VOUT
ENABLE
V
OUT
0.1µF
1µF 0.1µF
ADR3450
C
L
2
1
GND SENSE
0.1µF
R
L
Bipolar Output Reference
200Ω
GND FORCE
Figure 43 shows a bipolar reference configuration. By connecting
the output of the ADR3425/ADR3450 to the inverting terminal
of an operational amplifier, it is possible to obtain both positive
and negative reference voltages. R1 and R2 must be matched as
closely as possible to ensure minimal difference between the
negative and positive outputs. Resistors with low temperature
coefficients must also be used if the circuit is used in environments
with large temperature swings; otherwise, a voltage difference
develops between the two outputs as the ambient temperature
changes.
Figure 44. Boosted Output Current Reference
Because the current-sourcing capability of this circuit depends
only on the ID rating of MOSFET, the output drive capability
can be adjusted to the application simply by choosing an
appropriate MOSFET. In all cases, the VOUT SENSE pin should
be tied directly to the load device to maintain maximum output
voltage accuracy.
Rev. 0 | Page 16 of 20
ADR3425/ADR3450
OUTLINE DIMENSIONS
3.00
2.90
2.80
6
1
5
2
4
3
3.00
2.80
2.60
1.70
1.60
1.50
PIN 1
INDICATOR
0.95 BSC
1.90
BSC
1.30
1.15
0.90
0.20 MAX
0.08 MIN
1.45 MAX
0.95 MIN
0.55
0.45
0.35
0.15 MAX
0.05 MIN
10°
4°
0°
SEATING
PLANE
0.60
BSC
0.50 MAX
0.30 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 45. 6-Lead Small Outline Transistor Package (SOT-23)
(RJ-6)
Dimensions shown in millimeters
ORDERING GUIDE
Output
Temperature
Range
Package
Description
Ordering
Package Option Quantity
Model1
Voltage (V)
Branding
R2X
R2X
R34
R34
ADR3425ARJZ-R2
ADR3425ARJZ-R7
ADR3450ARJZ-R2
ADR3450ARJZ-R7
2.500
2.500
5.000
5.000
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
RJ-6
RJ-6
RJ-6
RJ-6
250
3,000
250
3,000
1 Z = RoHS Compliant Part.
Rev. 0 | Page 17 of 20
ADR3425/ADR3450
NOTES
Rev. 0 | Page 18 of 20
ADR3425/ADR3450
NOTES
Rev. 0 | Page 19 of 20
ADR3425/ADR3450
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08440-0-3/10(0)
Rev. 0 | Page 20 of 20
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