ADR392AUJZ-R2_技术文档

Micropower, Low Noise Precision Voltage

References with Shutdown

ADR390/ADR391/ADR392/ADR395

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Compact TSOT-23-5 packages

Low temperature coefficient

B grade: 9 ppm/°C

A grade: 25 ppm/°C

Initial accuracy

B grade: 4 mꢀ maximum

A grade: 6 mꢀ maximum

Ultralow output noise: 5 µꢀ p-p (0.1 Hz to 10 Hz)

Low dropout: 300 mꢀ

1

2

3

5

4

GND

SHDN

ADR390/

ADR391/

ADR392/

V

IN

ADR395

V

OUT (SENSE)

(Not to Scale)

V

OUT (FORCE)

Figure 1. 5-Lead TSOT (UJ Suffix)

Low supply current

3 µA maximum in shutdown

120 µA maximum in operation

No external capacitor required

Output current: 5 mA

Wide temperature range

−40°C to + 125°C

Table 1.

Temperature

ꢀ_OUT(ꢀ) Coefficient (ppm/°C) Accuracy (mꢀ)

Model

ADR390B

ADR390A

ADR391B

ADR391A

ADR392B

ADR392A

ADR395B

ADR395A

2.048

2.5

9

25

9

25

9

25

9

±4

±±

±4

±±

±5

±±

±5

±±

2.5

4.09±

5.0

APPLICATIONS

Battery-powered instrumentation

Portable medical instrumentation

Data acquisition systems

Industrial process controls

Automotive

5.0

25

GENERAL DESCRIPTION

The ADR390, ADR391, ADR392, and ADR395 are precision

2.048 V, 2.5 V, 4.096 V, and 5 V band gap voltage references,

respectively, featuring low power and high precision in a tiny

footprint. Using ADI’s patented temperature drift curvature

correction techniques, the ADR39x references achieve a low

9 ppm/°C of temperature drift in the TSOT package.

The ADR39x family of micropower, low dropout voltage

references provides a stable output voltage from a minimum

supply of 300 mV above the output. Their advanced design

eliminates the need for external capacitors, which further

reduces board space and system cost. The combination of

low power operation, small size, and ease of use makes the

ADR39x precision voltage references ideally suited for battery-

operated applications.

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

ADR390/ADR391/ADR392/ADR395

TABLE OF CONTENTS

ADR390 Specifications .................................................................... 3

Terminology.......................................................................................8

Typical Performance Characteristics ..............................................9

Theory of Operation ...................................................................... 16

Applications..................................................................................... 17

Basic Voltage Reference Connection....................................... 17

Outline Dimensions....................................................................... 19

Ordering Guide .......................................................................... 19

ADR391 Specifications .................................................................... 4

ADR392 Specifications .................................................................... 5

ADR395 Specifications .................................................................... 6

Absolute Maximum Ratings............................................................ 7

Thermal Resistance ...................................................................... 7

ESD Caution.................................................................................. 7

REꢀISION HISTORY

Changes to Figure 15, Figure 16, Figure 19, and Figure 20...... 11

Changes to Figure 23 and Figure 24............................................ 12

Changes to Figure 27..................................................................... 13

Changes to Ordering Guide......................................................... 19

Updated Outline Dimensions...................................................... 19

5/05—Rev. E to Rev. F

Changes to Table 5........................................................................... 7

Changes to Figure 2......................................................................... 9

4/04—Rev. D to Rev. E

Changes to ADR390—Specifications............................................ 3

Changes to ADR391—Specifications............................................ 4

Changes to ADR392—Specifications............................................ 5

Changes to ADR395—Specifications............................................ 6

10/02—Rev. B to Rev. C

Add parts ADR392 and ADR395....................................Universal

Changes to Features ........................................................................ 1

Changes to General Description ................................................... 1

Additions to Table I......................................................................... 1

Changes to Specifications............................................................... 2

Changes to Ordering Guide........................................................... 4

Changes to Absolute Maximum Ratings...................................... 4

New TPCs 3, 4, 7, 8, 11, 12, 15, 16, 19, and 20 ............................ 6

New Figures 4 and 5...................................................................... 13

Deleted A Negative Precision Reference

4/04—Rev. C to Rev. D

Updated Format................................................................ Universal

Changes to Title ............................................................................... 1

Changes to Features......................................................................... 1

Changes to Applications ................................................................. 1

Changes to General Description ................................................... 1

Changes to Table 1........................................................................... 1

Changes to ADR390—Specifications............................................ 3

Changes to ADR391—Specifications............................................ 4

Changes to ADR392—Specifications............................................ 5

Changes to ADR395—Specifications............................................ 6

Changes to Absolute Maximum Ratings...................................... 7

Changes to Thermal Resistance..................................................... 7

Moved ESD Caution........................................................................ 7

Changes to Figure 3, Figure 4, Figure 7, and Figure 8 ................ 9

Changes to Figure 11, Figure 12, Figure 13, and Figure 14......10

without Precision Resistors Section............................................ 13

Edits to General-Purpose Current Source Section................... 13

Updated Outline Dimensions...................................................... 15

5/02—Rev. A to Rev. B

Edits to Layout ...................................................................Universal

Changes to Figure 6....................................................................... 13

Revision 0: Initial Version

Rev. F | Page 2 of 20

ADR390/ADR391/ADR392/ADR395

ADR390 SPECIFICATIONS

Electrical characteristics, V_IN= 2.5 V to 15 V, T_A= 25°C, unless otherwise noted.

Table 2.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

Unit

V

OUTPUT VOLTAGE

A grade

2.042 2.048 2.054

V_O

B grade

2.044 2.048 2.052

V

INITIAL ACCURACY

V_OERR

TCV_O

A grade

B grade

±

0.29

4

0.19

mV

%

mV

%

TEMPERATURE COEFFICIENT

A grade: −40°C < T_A< +125°C

B grade: −40°C < T_A< +125°C

25

ppm/°C

mV

9

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN− V_O

300

∆V_O/∆V_IN

V_IN= 2.5 V to 15 V, −40°C < T_A< +125°C

10

25

ppm/V

ppm/mA

µA

LOAD REGULATION

∆V_O/∆I_LOADI_LOAD= 0 mA to 5 mA, −40°C < T_A< +85°C, V_IN= 3 V

I_LOAD= 0 mA to 5 mA, −40°C < T_A< +125°C, V_IN= 3 V

±0

140

120

140

QUIESCENT CURRENT

I_IN

No load

−40°C < T_A< +125°C

0.1 Hz to 10 Hz

µA

VOLTAGE NOISE

en _p-p

t_R

5

µV p-p

µs

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

20

50

100

80

25

30

∆V_O

∆V_{O_HYS}

RRR

I_SC

1000 hours

ppm

dB

f_IN= ±0 kHz

V_IN= 5 V

mA

V_IN= 15 V

mA

SHUTDOWN PIN

Shutdown Supply Current

Shutdown Logic Input Current

Shutdown Logic Low

Shutdown Logic High

I_SHDN

I_LOGIC

V_INL

3

500

0.8

µA

nA

V

V_INH

2.4

V

¹The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. F | Page 3 of 20

ADR390/ADR391/ADR392/ADR395

ADR391 SPECIFICATIONS

Electrical characteristics, V_IN= 2.8 V to 15 V, T_A= 25°C, unless otherwise noted.

Table 3.

Parameter

Symbol

V_O

Conditions

A grade

B grade

Min

Typ Max

Unit

V

OUTPUT VOLTAGE

2.494 2.5

2.49± 2.5

2.50±

2.504

±

INITIAL ACCURACY

V_OERR

TCV_O

A grade

mV

%

mV

%

A grade

B grade

0.24

4

0.1±

25

TEMPERATURE COEFFICIENT

A grade, −40°C < T_A< +125°C

ppm/°C

B grade, −40°C < T_A< +125°C

9

ppm/°C

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN− V_O

300

10

mV

∆V_O/∆V_IN

V_IN= 2.8 V to 15 V, −40°C < T_A< +125°C

25

ppm/V

ppm/mA

µA

LOAD REGULATION

∆V_O/∆I_LOADI_LOAD= 0 mA to 5 mA, −40°C < T_A< +85°C, V_IN= 3 V

I_LOAD= 0 mA to 5 mA, −40°C < T_A< +125°C, V_IN= 3 V

±0

140

120

140

QUIESCENT CURRENT

I_IN

No load

−40°C < T_A< +125°C

0.1 Hz to 10 Hz

µA

VOLTAGE NOISE

en_p-p

t_R

5

µV p-p

µs

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

20

50

100

80

25

30

∆V_O

∆V_{O_HYS}

RRR

I_SC

1000 hours

ppm

dB

f_IN= ±0 kHz

V_IN= 5 V

mA

V_IN= 15 V

mA

SHUTDOWN PIN

Shutdown Supply Current

Shutdown Logic Input Current

Shutdown Logic Low

Shutdown Logic High

I_SHDN

I_LOGIC

V_INL

3

500

0.8

µA

nA

V

V_INH

2.4

V

¹The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. F | Page 4 of 20

ADR390/ADR391/ADR392/ADR395

ADR392 SPECIFICATIONS

Electrical characteristics, V_IN= 4.3 V to 15 V, T_A= 25°C, unless otherwise noted.

Table 4.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

Unit

V

OUTPUT VOLTAGE

A grade

4.090 4.09± 4.102

V_O

B grade

4.091 4.09± 4.101

V

INITIAL ACCURACY

V_OERR

TCV_O

A grade

±

mV

A grade

B grade

0.15

5

0.12

%

mV

%

TEMPERATURE COEFFICIENT

A grade, −40°C < T_A< +125°C

B grade, −40°C < T_A< +125°C

25

ppm/°C

mV

9

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN− V_O

300

∆V_O/∆V_IN

V_IN= 4.3 V to 15 V, −40°C < T_A< +125°C

10

25

ppm/V

ppm/mA

µA

LOAD REGULATION

∆V_O/∆I_LOADI_LOAD= 0 mA to 5 mA, −40°C < T_A< +125°C, V_IN= 5 V

140

120

140

QUIESCENT CURRENT

I_IN

No load

−40°C < T_A< +125°C

0.1 Hz to 10 Hz

µA

VOLTAGE NOISE

en_p-p

t_R

7

µV p-p

µs

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

20

50

100

80

25

30

∆V_O

∆V_{O_HYS}

RRR

I_SC

1000 hours

ppm

dB

f_IN= ±0 kHz

V_IN= 5 V

mA

V_IN= 15 V

mA

SHUTDOWN PIN

Shutdown Supply Current

Shutdown Logic Input Current

Shutdown Logic Low

Shutdown Logic High

I_SHDN

I_LOGIC

V_INL

3

500

0.8

µA

nA

V

V_INH

2.4

V

¹The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. F | Page 5 of 20

ADR390/ADR391/ADR392/ADR395

ADR395 SPECIFICATIONS

Electrical characteristics, V_IN= 5.3 V to 15 V, T_A= 25°C, unless otherwise noted.

Table 5.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

Unit

V

OUTPUT VOLTAGE

A grade

4.994 5.000 5.00±

V_O

B grade

4.995 5.000 5.005

V

INITIAL ACCURACY

V_OERR

TCV_O

A grade

±

mV

B grade

0.12

5

0.10

%

mV

%

TEMPERATURE COEFFICIENT

A grade, −40°C < T_A< +125°C

B grade, −40°C < T_A< +125°C

25

ppm/°C

mV

9

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN− V_O

300

∆V_O/∆V_IN

V_IN= 4.3 V to 15 V, −40°C < T_A< +125°C

10

25

ppm/V

ppm/mA

µA

LOAD REGULATION

∆V_O/∆I_LOADI_LOAD= 0 mA to 5 mA, −40°C < T_A< +125°C, V_IN= ± V

140

120

140

QUIESCENT CURRENT

I_IN

No load

−40°C < T_A< +125°C

0.1 Hz to 10 Hz

µA

VOLTAGE NOISE

en _p-p

t_R

8

µV p-p

µs

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

20

50

100

80

25

30

∆V_O

∆V_{O_HYS}

RRR

I_SC

1, 000 hours

ppm

dB

f_IN= ±0 kHz

V_IN= 5 V

mA

V_IN= 15 V

mA

SHUTDOWN PIN

Shutdown Supply Current

Shutdown Logic Input Current

Shutdown Logic Low

Shutdown Logic High

I_SHDN

I_LOGIC

V_INL

3

500

0.8

µA

nA

V

V_INH

2.4

V

¹The long-term stability specification is noncumulative. The drift of subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.

Rev. F | Page ± of 20

ADR390/ADR391/ADR392/ADR395

ABSOLUTE MAXIMUM RATINGS

At 25°C, unless otherwise noted.

Table 6.

THERMAL RESISTANCE

θ_JAis specified for the worst-case conditions, that is, θ_JAis

specified for a device soldered in a circuit board for surface-

mount packages.

Parameter

Rating

Supply Voltage

18 V

Output Short-Circuit Duration to GND

See derating

curves

–±5°C to +125°C

–40°C to +125°C

–±5°C to +125°C

300°C

Table 7. Thermal Resistance

Package Type

θ_JA

θ_JC

Unit

Storage Temperature Range

Operating Temperature Range

Junction Temperature Range

Lead Temperature Range

(Soldering, ±0 sec)

TSOT-23-5 (UJ-5)

230

14±

°C/W

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or

any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the

human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

Rev. F | Page 7 of 20

ADR390/ADR391/ADR392/ADR395

TERMINOLOGY

Temperature Coefficient

V_O

(

25°C

)

–V_{O_TC}

V_{O_HYS}

[

ppm

]

=

×10⁶

The change of output voltage with respect to operating temp-

erature changes normalized by the output voltage at 25°C. This

parameter is expressed in ppm/°C and can be determined by the

following equation:

V_O25°C

(

)

where:

V_O(25°C) = V_Oat 25°C

V_O

(

T₂

)

–V_O

(

T₁

)

TCV_O

[

ppm/°C

]

=

×10⁶

V

_{O_TC}= V_Oat 25°C after a temperature cycle from + 25°C

V_O25°C

(

×

(

T₂–T₁

)

to –40°C to +125°C and back to +25°C

where:

V_O(25°C) = V_Oat 25°C

NOTES

Input Capacitor

Input capacitors are not required on the ADR39x. There is no

limit for the value of the capacitor used on the input, but a

1 µF to 10 µF capacitor on the input improves transient

response in applications where the supply suddenly changes.

An additional 0.1 µF in parallel also helps reduce noise

from the supply.

V_O(T₁) = V_Oat Temperature 1

V_O(T₂) = V_Oat Temperature 2

Line Regulation

The change in output voltage due to a specified change in input

voltage. This parameter accounts for the effects of self-heating.

Line regulation is expressed in either percent per volt, parts-

per-million per volt, or microvolts per volt change in input

voltage.

Output Capacitor

The ADR39x does not require output capacitors for stability

under any load condition. An output capacitor, typically 0.1 µF,

filters out any low level noise voltage and does not affect the

operation of the part. On the other hand, the load transient

response can improve with the addition of a 1 µF to 10 µF

output capacitor in parallel. A capacitor here acts as a source of

stored energy for a sudden increase in load current. The only

parameter that degrades by adding an output capacitor is the

turn-on time, and it depends on the size of the capacitor

chosen.

Load Regulation

The change in output voltage due to a specified change in load

current. This parameter accounts for the effects of self-heating.

Load regulation is expressed in either microvolts per milli-

ampere, parts-per-million per milliampere, or ohms of dc

output resistance.

Long-Term Stability

150

100

50

Typical shift of output voltage at 25°C on a sample of parts

subjected to a test of 1,000 hours at 25°C.

∆V_O= V_O(t₀) – V_O(t₁)

⎛

⎜

⎝

⎞

⎟

⎠

V_O

(

t₀

V_O

)

–V_O

t₀

t₁

( )

∆V_O

[

ppm

]

=

×10⁶

(

)

0

where:

V_O(T₀) = V_Oat 25°C at Time 0

–50

–100

–150

V_O(T₁) = V_Oat 25°C after 1,000 hours operation at 25°C

0

100 200 300 400 500 600 700 800 900 1000

TIME (Hours)

Thermal Hysteresis

The change of output voltage after the device is cycled through

temperatures from +25°C to –40°C to +125°C and back to

+25°C. This is a typical value from a sample of parts put

through such a cycle.

Figure 2. ADR391 Typical Long-Term Drift over 1,000 Hours

V

_{O_HYS}= V_O(25°C) – V_{O_TC}

Rev. F | Page 8 of 20

ADR390/ADR391/ADR392/ADR395

TYPICAL PERFORMANCE CHARACTERISTICS

5.006

5.004

5.002

5.000

4.998

4.996

4.994

2.060

2.056

SAMPLE 3

SAMPLE 2

2.052

SAMPLE 2

SAMPLE 3

2.048

SAMPLE 1

2.044

2.040

–40

–5

30

65

C)

100

125

–40

–5

30

65

100

125

TEMPERATURE (

°

TEMPERATURE (

°

C)

Figure 3. ADR390 Output Voltage vs. Temperature

Figure 6. ADR395 Output Voltage vs. Temperature

140

120

100

2.506

2.504

2.502

2.500

2.498

2.496

2.494

SAMPLE 2

+125

+85

+25

°C

SAMPLE 1

°

C

°

C

SAMPLE 3

–40°C

80

60

40

–40

–5

30

65

C)

100

125

2.5

5.0

7.5

10.0

12.5

15.0

TEMPERATURE (

°

INPUT VOLTAGE (V)

Figure 4. ADR391 Output Voltage vs. Temperature

Figure 7. ADR390 Supply Current vs. Input Voltage

4.100

4.098

4.096

4.094

4.092

4.090

4.088

140

120

100

SAMPLE 3

SAMPLE 2

+85°C

+25°C

SAMPLE 1

–40°C

80

60

40

2.5

5.0

7.5

10.0

12.5

15.0

–40

0

40

80

125

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 5. ADR392 Output Voltage vs. Temperature

Figure 8. ADR391 Supply Current vs. Input Voltage

Rev. F | Page 9 of 20

ADR390/ADR391/ADR392/ADR395

140

180

160

140

120

100

80

I = 0mA TO 5mA

L

+125°C

120

V

= 5.0V

IN

100

+25°C

V

= 3.0V

IN

–40°C

80

60

40

–40

–10

20

50

80

110 125

5

7

9

11

13

15

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 9. ADR392 Supply Current vs. Input Voltage

Figure 12. ADR391 Load Regulation vs. Temperature

90

140

I = 0mA TO 5mA

L

+125°C

80

70

60

50

40

120

100

80

V

= 7.5V

V

IN

+25°C

–40°C

= 5V

IN

60

40

–40

–5

30

65

100

125

5.5

7.0

8.5

10.0

11.5

13.0

14.5

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 13. ADR392 Load Regulation vs. Temperature

Figure 10. ADR395 Supply Current vs. Input Voltage

80

120

100

80

60

40

20

0

I = 0mA TO 5mA

L

I = 0mA TO 5mA

L

70

60

50

40

30

V

= 7.5V

IN

V

= 5V

IN

V

= 5.0V

IN

V

= 3.0V

IN

–40

–10

20

50

80

110

125

–40

–5

30

65

100

125

TEMPERATURE (°C)

TEMPERATURE (

°

C)

Figure 11. ADR390 Load Regulation vs. Temperature

Figure 14. ADR395 Load Regulation vs. Temperature

Rev. F | Page 10 of 20

ADR390/ADR391/ADR392/ADR395

25

20

15

10

14

12

10

8

V

= 5.3V TO 15V

IN

6

4

5

0

2

0

–40

–

40

–10

20

TEMPERATURE (

80

110

125

50

–5

30

65

100

125

°

C)

TEMPERATURE

(°C)

Figure 15. ADR390 Line Regulation vs. Temperature

Figure 18. ADR395 Line Regulation vs. Temperature

3.0

2.8

2.6

2.4

2.2

2.0

25

20

15

10

+125°

C

–40°

C

+25°

C

+85°

C

5

0

1

2

3

4

5

–

40

–

10

20

TEMPERATURE (

80

110 125

50

LOAD CURRENT (mA)

°

C)

Figure 19. ADR390 Minimum Input Voltage vs. Load Current

Figure 16. ADR391 Line Regulation vs. Temperature

14

3.6

12

10

+125

°

C

3.4

3.2

3.0

2.8

2.6

+85

°

C

8

6

4

2

0

+25°C

V

= 4.4V TO 15V

IN

–40°C

0

1

2

3

4

5

–40

–5

30

65

100

125

LOAD CURRENT (mA)

TEMPERATURE

(°C)

Figure 20. ADR391 Minimum Input Voltage vs. Load Current

Figure 17. ADR392 Line Regulation vs. Temperature

Rev. F | Page 11 of 20

ADR390/ADR391/ADR392/ADR395

4.8

70

60

50

40

30

20

10

0

–40°C

TEMPERATURE: +25

°

C

+125°C

+25°C

+125°C

4.6

4.4

4.2

4.0

3.8

+25

–40

°C

°

C

–0.56

–0.41

–0.26

–0.11

0.04

0.19

0.34

0

1

2

3

4

5

V

DEVIATION (mV)

OUT

LOAD CURRENT (mA)

Figure 21. ADR392 Minimum Input Voltage vs. Load Current

Figure 24. ADR391 V_OUTHysteresis Distribution

6.0

5.8

1k

V

= 5V

IN

+125°C

5.6

5.4

5.2

5.0

4.8

4.6

+25

–40

°C

ADR391

ADR390

°

C

100

10

100

FREQUENCY (Hz)

1k

10k

0

1

2

3

4

5

LOAD CURRENT (mA)

Figure 25. Voltage Noise Density vs. Frequency

Figure 22. ADR395 Minimum Input Voltage vs. Load Current

0

60

–40°C

TEMPERATURE: +25°C

+125°C

+25°C

50

40

30

20

10

0

–0.24 –0.18 –0.12 –0.06

0

0.06 0.12 0.18 0.24 0.30

V

DEVIATION (mV)

TIME (1 Sec/DIV)

OUT

Figure 23. ADR390 V_OUTHysteresis Distribution

Figure 26. ADR391 Typical Voltage Noise 0.1 Hz to 10 Hz

Rev. F | Page 12 of 20

ADR390/ADR391/ADR392/ADR395

C

= 0nF

L

V

OUT

V

ON

LOAD OFF

LOAD

TIME (10µs/DIV)

TIME (200µs/DIV)

Figure 27. ADR391 Voltage Noise 10 Hz to 10 kHz

Figure 30. ADR391 Load Transient Response

C

= 0µF

C = 1nF

L

BYPASS

V

OUT

LINE

INTERRUPTION

0.5V/DIV

LOAD OFF

V

ON

LOAD

V

OUT

1V/DIV

TIME (10µs/DIV)

TIME (200µs/DIV)

Figure 28. ADR391 Line Transient Response

Figure 31. ADR391 Load Transient Response

C

= 100nF

C

= 0.1µF

L

BYPASS

V

OUT

0.5V/DIV

LINE

INTERRUPTION

LOAD OFF

V

ON

LOAD

V

OUT

1V/DIV

TIME (10µs/DIV)

TIME (200µs/DIV)

Figure 32. ADR391 Load Transient Response

Figure 29. ADR391 Line Transient Response

Rev. F | Page 13 of 20

ADR390/ADR391/ADR392/ADR395

V

= 15V

R

= 500Ω

IN

L

5V/DIV

2V/DIV

5V/DIV

V

OUT

V

IN

2V/DIV

V

OUT

V

IN

TIME (20µs/DIV)

TIME (200µs/DIV)

Figure 33. ADR391 Turn-On Response Time at 15 V

Figure 36. ADR391 Turn-On/Turn-Off Response at 5 V

V

= 15V

IN

R

C

= 500Ω

= 100nF

L

V

5V/DIV

IN

2V/DIV

5V/DIV

V

OUT

V

2V/DIV

OUT

V

IN

TIME (40

µ

s/DIV)

TIME (200µs/DIV)

Figure 34. ADR391 Turn-Off Response at 15 V

Figure 37. ADR391 Turn-On/Turn-Off Response at 5 V

80

60

40

C

= 0.1µF

BYPASS

2V/DIV

5V/DIV

V

20

0

OUT

–20

–40

V

IN

–60

–80

–100

–120

10

100

1k

10k

100k

1M

TIME (200µs/DIV)

FREQUENCY (Hz)

Figure 35. ADR391 Turn-On/Turn-Off Response at 5 V

Figure 38. Ripple Rejection vs. Frequency

Rev. F | Page 14 of 20

ADR390/ADR391/ADR392/ADR395

100

90

80

70

60

50

40

30

20

10

0

C

= 0µF

L

C

= 0.1µF

L

C

= 1µF

L

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

Figure 39. Output Impedance vs. Frequency

Rev. F | Page 15 of 20

ADR390/ADR391/ADR392/ADR395

THEORY OF OPERATION

Band gap references are the high performance solution for low

supply voltage and low power voltage reference applications,

and the ADR390/ADR391/ADR392/ADR395 are no exception.

The uniqueness of these devices lies in the architecture. As

shown in Figure 40, the ideal zero TC band gap voltage is

referenced to the output, not to ground. Therefore, if noise

exists on the ground line, it is greatly attenuated on V_OUT. The

band gap cell consists of the PNP pair, Q51 and Q52, running at

unequal current densities. The difference in V_BEresults in a

voltage with a positive TC, which is amplified by a ratio of

DEꢀICE POWER DISSIPATION CONSIDERATIONS

The ADR390/ADR391/ADR392/ADR395 are capable of deli-

vering load currents to 5 mA, with an input voltage that ranges

from 2.8 V (ADR391 only) to 15 V. When these devices are

used in applications with large input voltages, care should be

taken to avoid exceeding the specified maximum power

dissipation or junction temperature because it could result in

premature device failure. The following formula should be used

to calcu-late a device’s maximum junction temperature or

dissipation:

R58

2 ×

T –T

J

A

P_D=

R54

θ_JA

This PTAT voltage, combined with V_BEs of Q51 and Q52,

produces a stable band gap voltage.

In this equation, T_Jand T_Aare, respectively, the junction and

ambient temperatures. P_Dis the device power dissipation, and

θ_JAis the device package thermal resistance.

Reduction in the band gap curvature is performed by the ratio

of the resistors R44 and R59, one of which is linearly

temperature dependent. Precision laser trimming and other

patented circuit techniques are used to further enhance the

drift performance.

SHUTDOWN MODE OPERATION

The ADR390/ADR391/ADR392/ADR395 include a shutdown

feature that is TTL/CMOS level compatible. A logic low or a

SHDN

zero volt condition on the

pin is required to turn the

V_IN

devices off. During shutdown, the output of the reference

becomes a high impedance state, where its potential would then

be determined by external circuitry. If the shutdown feature is

Q1

V_{OUT (FORCE)}

V_{OUT (SENSE)}

R59

R44

R58

SHDN

not used, the

pin should be connected to V_IN(Pin 2).

R49

R54

Q51

SHDN

R53

Q52

R48

R60

R61

GND

Figure 40. Simplified Schematic

Rev. F | Page 1± of 20

ADR390/ADR391/ADR392/ADR395

APPLICATIONS

BASIC ꢀOLTAGE REFERENCE CONNECTION

The circuit shown in Figure 41 illustrates the basic configuration

for the ADR39x family. Decoupling capacitors are not required

for circuit stability. The ADR39x family is capable of driving

capacitive loads from 0 µF to 10 µF. However, a 0.1 µF ceramic

output capacitor is recommended to absorb and deliver the

charge, as required by a dynamic load.

Two reference ICs are used, fed from an unregulated input, V_IN.

The outputs of the individual ICs are simply connected in

series, which provides two output voltages, V_OUT1and V_OUT2

.

V_OUT1is the terminal voltage of U1, while V_OUT2is the sum of

this voltage and the terminal voltage of U2. U1 and U2 are

simply chosen for the two voltages that supply the required

outputs (see the Output Table in Figure 42). For example, if

both U1 and U2 are ADR391s, V_OUT1is 2.5 V and V_OUT2is 5.0 V.

SHUTDOWN

GND

SHDN

ADR39x

IN

INPUT

V

While this concept is simple, a precaution is required. Since the

lower reference circuit must sink a small bias current from U2

plus the base current from the series PNP output transistor in

U2, either the external load of U1 or R1 must provide a path for

this current. If the U1 minimum load is not well defined, the R1

resistor should be used and set to a value that will conservatively

pass 600 µA of current with the applicable V_OUT1across it. Note

that the two U1 and U2 reference circuits are treated locally as

macrocells; each has its own bypasses at input and output for

best stability. Both U1 and U2 in this circuit can source dc

currents up to their full rating. The minimum input voltage,

V_IN, is determined by the sum of the outputs, V_OUT2, plus the

dropout voltage of U2.

*

0.1µF

C

B

V

OUT(F)

OUT(S)

OUTPUT

µF

*

0.1

C

B

*NOT REQUIRED

Figure 41. Basic Configuration for the ADR39x Family

Stacking Reference ICs for Arbitrary Outputs

Some applications may require two reference voltage sources,

which are a combined sum of standard outputs. Figure 42 shows

how this stacked output reference can be implemented.

OUTPUTTABLE

A Negative Precision Reference without Precision

Resistors

U1/U2

V

(V)

V

(V)

OUT1

OUT2

ADR390/ADR390

ADR391/ADR391

ADR392/ADR392

ADR395/ADR395

2.048

2.5

4.096

5

4.096

5.0

8.192

10

A negative reference can be easily generated by adding an A1 op

amp and is configured as shown in Figure 43. V_OUTFand V_OUTS

are at virtual ground and, therefore, the negative reference can

be taken directly from the output of the op amp. The op amp

must be dual-supply, low offset, and rail-to-rail if the negative

supply voltage is close to the reference output.

V

IN

2

U2

V

IN

1

4

V

OUT2

SHDN

C2

0.1µF

OUT(F)

+V

DD

3

V

OUT(S)

GND

5

2

V

IN

4

3

V

OUT(F)

2

U1

1

V

SHDN

OUT(S)

V

IN

1

4

3

V

SHDN

V

OUT1

C2

0.1µF

OUT(F)

GND

5

OUT(S)

GND

5

–V

REF

A1

–V

DD

Figure 42. Stacking Voltage References with the

ADR390/ADR391/ADR392/ADR395

Figure 43. Negative Reference

Rev. F | Page 17 of 20

ADR390/ADR391/ADR392/ADR395

The transistor Q2 protects Q1 during short-circuit limit faults

by robbing its base drive. The maximum current is

General-Purpose Current Source

Many times in low power applications, the need arises for a

precision current source that can operate on low supply vol-

tages. ADR390/ADR391/ADR392/ADR395 can be configured

as a precision current source. As shown in Figure 45, the circuit

configuration is a floating current source with a grounded load.

I_LMAX≈ 0.6 V/R_S

R1

4.7k

Ω

U1

V

IN

The reference’s output voltage is bootstrapped across R_SET

which sets the output current into the load. With this

,

GND

SHDN

V

IN

configuration, circuit precision is maintained for load currents

in the range from the reference’s supply current, typically 90 µA

to approximately 5 mA.

V

Q1

Q2N4921

OUT (FORCE)

V

OUT (SENSE)

Q2

Q2N2222

R

S

ADR39x

V

IN

I

R

L

SHDN

V

OUT

Figure 45. ADR39x for High Power Performance with Current Limit

ADR39x

I

V

SET

V

IN

OUT

A similar circuit function can also be achieved with the

Darlington transistor configuration, as shown in Figure 46.

R1

P1

0.1µF

GND

R

R1

SET

I

4.7kΩ

SY

ADJUST

U1

V

IN

I

(I )

SY SET

GND

SHDN

V

I

OUT

= I

+ I (I )

SY SET

Q2N2222

IN

SET

V

Q1

OUT (FORCE)

R

L

Q2

V

OUT (SENSE)

Q2N4921

R

S

ADR39x

Figure 44. A General-Purpose Current Source

R

L

High Power Performance with Current Limit

In some cases, the user may want higher output current

delivered to a load and still achieve better than 0.5% accuracy

out of the ADR39x. The accuracy for a reference is normally

specified on the data sheet with no load. However, the output

voltage changes with load current.

Figure 46. ADR39x for High Output Current

with Darlington Drive Configuration

The circuit shown in Figure 45 provides high current without

compromising the accuracy of the ADR39x. The series pass

transistor Q1 provides up to 1 A load current. The ADR39x

delivers only the base drive to Q1 through the force pin. The

sense pin of the ADR39x is a regulated output and is connected

to the load.

Rev. F | Page 18 of 20

ADR390/ADR391/ADR392/ADR395

OUTLINE DIMENSIONS

2.90 BSC

5

1

4

3

2.80 BSC

1.60 BSC

2

PIN 1

0.95 BSC

1.90

BSC

0.90

0.87

0.84

1.00 MAX

8°

4°

0.10 MAX

0.60

0.45

0.30

0.50

0.30

SEATING

PLANE

0.20

0.08

COMPLIANT TO JEDEC STANDARDS MO-193AB

Figure 47. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions shown in millimeters

ORDERING GUIDE

Output Initial

ꢀoltage Accuracy

Temperature

Coefficient

(ppm/°C)

Number

of Parts Temperature

Branding per Reel Range

Package

Description

Package

Option

Models

(ꢀ_O)

2.048

2.5

(mꢀ) (%)

ADR390AUJZ-REEL7¹

ADR390AUJZ-R2¹

ADR390BUJZ-REEL7¹

ADR390BUJZ-R2¹

ADR391AUJZ-REEL7¹

ADR391AUJZ-R2¹

ADR391BUJZ-REEL7¹

ADR391BUJZ-R2¹

ADR392AUJZ-REEL7¹

ADR392AUJZ-R2¹

ADR392BUJZ-REEL7¹

ADR392BUJZ-R2¹

ADR395AUJZ-REEL7¹

ADR395AUJZ-R2¹

ADR395BUJZ-REEL7¹

ADR395BUJZ-R2¹

±

4

±

4

±

5

±

5

0.29

0.19

0.24

0.1±

0.15

0.12

0.10

25

9

TSOT

UJ-5

R0A

R0B

R1A

R1B

RCA

RCB

RDA

RDB

3,000

250

3,000

250

3,000

250

3,000

250

3,000

250

3,000

250

3,000

250

3,000

250

–40°C to +125°C

9

25

9

2.5

9

4.09±

5.0

25

9

25

9

5.0

9

¹Z = Pb-free part.

Rev. F | Page 19 of 20

ADR390/ADR391/ADR392/ADR395

NOTES

©

registered trademarks are the property of their respective owners.

C00419–0–5/05(F)

Rev. F | Page 20 of 20


型号：	ADR392AUJZ-R2
厂家：	ADI
描述：	Precision Low Drift 2.048 V/2.5 V/4.096 V/ 5.0 V SOT-23 Reference with Shutdown 精密，低漂移2.048 V / 2.5 V / 4.096 V / 5.0 V SOT- 23参考与关机
文件：	总20页 (文件大小：269K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ADR392AUJZ-R2 [ADI]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB