ADUM3402WBRWZ-RL [ADI]
Quad-Channel, Digital Isolator, Enhanced System-Level ESD Reliability;
| 型号： | ADUM3402WBRWZ-RL |
| 厂家： | 
ADI |
| 描述： | Quad-Channel, Digital Isolator, Enhanced System-Level ESD Reliability 光电二极管 |
| 文件： | 总20页 (文件大小：380K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Quad-Channel, Digital Isolators,
Enhanced System-Level ESD Reliability
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
FEATURES
GENERAL DESCRIPTION
Enhanced system-level ESD performance per IEC 61000-4-x
Low power operation
5 V operation
1.4 mA per channel maximum at 0 Mbps to 2 Mbps
4.3 mA per channel maximum at 10 Mbps
3.3 V operation
The ADuM340xW1 are 4-channel digital isolators based on the
Analog Devices, Inc., iCoupler® technology. Combining high
speed CMOS and monolithic air core transformer technology,
these isolation components provide outstanding performance
characteristics superior to alternatives such as optocoupler devices.
iCoupler devices remove the design difficulties commonly
associated with optocouplers. Typical optocoupler concerns
regarding uncertain current transfer ratios, nonlinear transfer
functions, and temperature and lifetime effects are eliminated
with the simple iCoupler digital interfaces and stable performance
characteristics. The need for external drivers and other discrete
components is eliminated with these iCoupler products. Further-
more, iCoupler devices consume one-tenth to one-sixth the power
of optocouplers at comparable signal data rates.
0.9 mA per channel maximum at 0 Mbps to 2 Mbps
2.4 mA per channel maximum at 10 Mbps
Bidirectional communication
3.3 V/5 V level translation
High temperature operation: 125°C
High data rate: dc to 10 Mbps (NRZ)
Precise timing characteristics
3.5 ns maximum pulse width distortion
3.5 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Output enable function
16-lead SOIC wide body, RoHS-compliant package
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
The ADuM340xW isolators provide four independent isolation
channels in a variety of channel configurations and data rates
(see the Ordering Guide). All models of the ADuM340xW
provide operation from 3.135 V to 5.5 V, providing
compatibility with lower voltage systems as well as enabling a
voltage level translation function across the isolation barrier. The
ADuM340xW isolators have a patented refresh feature that ensures
dc correctness in the absence of input logic transitions and
during power-up/power-down conditions.
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
Qualified for automotive applications
The ADuM340xW isolators contain various circuit and layout
changes to provide increased capability relative to system-level IEC
61000-4-x testing (ESD/burst/surge). The precise capability in
these tests is strongly determined by the design and layout of
the user’s board or module. For more information, see the
AN-793 Application Note, ESD/Latch-Up Considerations with
iCoupler Isolation Products.
APPLICATIONS
Hybrid electric vehicles
Battery monitor
Motor drive
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.
FUNCTIONAL BLOCK DIAGRAMS
1
2
3
16
15
14
V
V
DD2
1
2
3
16
15
14
V
1
2
3
16
15
14
V
DD2
V
V
DD2
DD1
DD1
DD1
GND
V
GND
GND
GND
GND
V
GND
1
2
1
2
1
2
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
ENCODE
ENCODE
V
V
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
ENCODE
V
ENCODE
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
V
IA
IB
OA
IA
IB
OA
IA
IB
OA
V
4
5
13
12
V
V
4
5
13
12
V
4
5
13
12
V
V
OB
OB
OB
V
V
V
V
V
V
V
V
OC
OD
IC
IC
OC
IC
ID
OC
6
7
8
11
10
9
V
6
7
8
11
10
9
6
7
8
11
10
9
V
V
V
ID
OD
ID
OD
V
V
V
V
NC
GND
V
E1
E2
E1
E2
E2
GND
GND
GND
GND
GND
1
2
1
2
1
2
Figure 3. ADuM3402W Functional Block
Diagram
Figure 1. ADuM3400W Functional Block
Diagram
Figure 2. ADuM3401W Functional Block
Diagram
Rev. B
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 ©2012–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................9
ESD Caution...................................................................................9
Pin Configurations and Function Descriptions......................... 10
Typical Performance Characteristics ........................................... 13
Application Information................................................................ 15
PC Board Layout ........................................................................ 15
System-Level ESD Considerations and Enhancements ........ 15
Propagation Delay-Related Parameters................................... 15
DC Correctness and Magnetic Field Immunity........................... 15
Power Consumption .................................................................. 16
Insulation Lifetime..................................................................... 17
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 18
Automotive Products................................................................. 18
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—Mixed 5 V/3.3 V, Operation........ 5
Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 6
Package Characteristics ............................................................... 7
Regulatory Information............................................................... 7
Insulation and Safety-Related Specifications............................ 7
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 8
Recommended Operating Conditions ...................................... 8
REVISION HISTORY
11/14—Rev. A to Rev. B
Changed Minimum Supply Voltage from 3.0 V to 3.135 V
(Throughout) .................................................................................... 1
Changes to Table 3............................................................................ 3
Changes to Table 6............................................................................ 4
Changes to Table 9............................................................................ 5
Changes to Table 12.......................................................................... 6
4/14—Rev. 0 to Rev. A
Changes to Table 14.......................................................................... 7
9/12—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
WA Grade
Typ
WB Grade
Typ Max
Parameter
Symbol
Min
50
Max
Min
18
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
1
100
40
10
36
3.5
Mbps
ns
Within PWD limit
50% input to 50% output
tPHL, tPLH
PWD
65
11
32
5
ns
|tPLH − tPHL|
ps/°C
ns
PW
tPSK
1000
100
Within PWD limit
50
15
ns
Between any two units
tPSKCD
tPSKOD
50
50
3.5
6
ns
ns
Opposing-Direction
Table 2.
1 Mbps—WA, WB Grades
10 Mbps—WB Grade
Parameter
Symbol Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3400W
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
2.9
1.2
2.5
1.6
2.0
2.0
3.5
2.0
3.2
2.4
2.8
2.8
9.0
3.0
7.4
4.4
6.0
6.0
11.6
5.5
10.6
6.5
7.5
7.5
mA
mA
mA
mA
mA
mA
ADuM3401W
ADuM3402W
Table 3. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
VIH
VIL
2.0
V
0.8
V
VOH
VDDx − 0.1
VDDx − 0.4
VDDx
VDDx− 0.2
0.0
0.04
0.2
+0.01
−3
+0.01
V
V
V
V
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VI x ≤ VDDx
Logic Low Output Voltage
VOL
0.1
0.1
0.4
+10
V
Input Leakage per Channel
VEx Input Pull-Up Current
II
IPU
IOZ
−10
−10
−10
µA
µA
µA
VEx = 0 V
Tristate Leakage Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
+10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.57
0.23
0.20
0.05
0.83
0.35
mA
mA
mA/Mbps
mA/Mbps
All inputs at logic low
All inputs at logic low
Output Rise/Fall Time
tR/tF
|CM|
tPHZ, tPLH
tPZH, tPZL
fr
2.5
35
6
6
1.0
ns
kV/µs
ns
ns
Mbps
10% to 90%
VIx = VDDx
High/low-to-high impedance
High impedance-to-high/low
Common-Mode Transient Immunity1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
25
8
8
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 3 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.135 V ≤ VDD1 ≤ 3.6 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
WA Grade
Typ
WB Grade
Typ
Parameter
Symbol
Min
50
Max
Min
20
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
1
100
40
10
45
3.5
Mbps
ns
ns
ps/°C
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
75
11
38
5
PW
tPSK
1000
100
Within PWD limit
Between any two units
50
22
tPSKCD
tPSKOD
50
50
3.5
6
ns
ns
Opposing-Direction
Table 5.
1 Mbps—WA, WB Grades
10 Mbps—WB Grade
Parameter
Symbol Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3400W
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
1.6
0.7
1.4
0.9
1.2
1.2
2.2
1.4
2.0
1.6
1.8
1.8
4.8
1.8
0.1
2.5
3.3
3.3
7.1
2.6
5.6
3.3
4.4
4.4
mA
mA
mA
mA
mA
mA
ADuM3401W
ADuM3402W
Table 6. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
VIH
VIL
VOH
1.6
V
V
V
V
0.4
VDDx
VDDx − 0.1
VDDx − 0.4
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VI x ≤ VDDx
VDDx− 0.2
Logic Low Output Voltage
VOL
0.0
0.04
0.2
+0.01
−3
+0.01
0.1
0.1
0.4
+10
V
V
V
µA
µA
µA
Input Leakage per Channel
VEx Input Pull-Up Current
II
IPU
IOZ
−10
−10
−10
VEx = 0 V
Tristate Leakage Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
+10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.31
0.19
0.10
0.03
0.49
0.27
mA
mA
mA/Mbps
mA/Mbps
All inputs at logic low
All inputs at logic low
Output Rise/Fall Time
tR/tF
3
ns
10% to 90%
Common-Mode Transient Immunity1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
|CM|
tPHZ, tPLH
tPZH, tPZL
fr
25
35
6
6
kV/µs
ns
ns
VIx = VDDx
High/low-to-high impedance
High impedance-to-high/low
8
8
1.0
Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 4 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V, OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
WA Grade
Typ
WB Grade
Typ
Parameter
Symbol
Min
50
Max
Min
20
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
1
100
40
10
42
3.5
Mbps
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
70
11
30
5
ps/°C
ns
PW
tPSK
1000
100
Within PWD limit
50
22
ns
Between any two units
tPSKCD
tPSKOD
50
50
3.5
6
ns
ns
Opposing-Direction
Table 8.
1 Mbps—WA, WB Grades
10 Mbps—WB Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3400W
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
2.9
0.7
2.5
0.9
2.0
1.2
3.5
1.4
3.2
1.6
2.8
1.8
9.0
1.8
7.4
2.5
6.0
3.3
11.6
2.6
10.6
3.3
7.5
4.4
mA
mA
mA
mA
mA
mA
ADuM3401W
ADuM3402W
Table 9. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
5 V Logic High Input Threshold
3.3 V Logic High Input Threshold
5 V Logic Low Input Threshold
3.3 V Logic Low Input Threshold
Logic High Output Voltage
VIH
VIH
VIL
2.0
1.6
V
V
0.8
0.4
V
VIL
V
VOH
VDDx − 0.1
VDDx − 0.4
VDDx
VDDx− 0.2
0.0
0.04
0.2
+0.01
−3
+0.01
V
V
V
V
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VI x ≤ VDDx
Logic Low Output Voltage
VOL
0.1
0.1
0.4
+10
V
Input Leakage per Channel
VEx Input Pull-Up Current
II
IPU
IOZ
−10
−10
−10
µA
µA
µA
VEx = 0 V
Tristate Leakage Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
+10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.57
0.29
0.20
0.03
0.83
0.27
mA
mA
mA/Mbps
mA/Mbps
All inputs at logic low
All inputs at logic low
Output Rise/Fall Time
tR/tF
3
ns
10% to 90%
Common-Mode Transient Immunity1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
|CM|
25
35
6
6
kV/µs
ns
ns
VIx = VDDx
High/low-to-high impedance
High impedance-to-high/low
tPHZ, tPLH
tPZH, tPZL
fr
8
8
1.0
Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 5 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3.3 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.135 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
WA Grade
Typ
WB Grade
Typ
Parameter
Symbol
Min
50
Max
Min
20
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
1
100
40
10
42
3.5
Mbps
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
70
11
30
5
ps/°C
ns
PW
tPSK
1000
100
Within PWD limit
50
22
ns
Between any two units
tPSKCD
tPSKOD
50
50
3.5
6
ns
ns
Opposing-Direction
Table 11.
1 Mbps—WA, WB Grades
10 Mbps—WB Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit Test Conditions
SUPPLY CURRENT
ADuM3400W
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
1.6
1.2
1.4
1.6
1.2
2.0
2.2
2.0
2.0
2.4
1.8
2.8
4.8
3.0
4.1
4.4
3.3
6.0
7.1
5.5
5.6
6.5
4.4
7.5
mA
mA
mA
mA
mA
mA
ADuM3401W
ADuM3402W
Table 12. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
5 V Logic High Input Threshold
3.3 V Logic High Input Threshold
5 V Logic Low Input Threshold
VIH
VIH
VIL
2.0
1.6
V
V
V
0.8
0.4
3.3 V Logic Low Input Threshold
Logic High Output Voltage
VIL
V
VOH
VDDx − 0.1
VDDx − 0.4
VDDx
VDDx− 0.2
0.0
V
V
V
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VI x ≤ VDDx
Logic Low Output Voltage
VOL
0.1
0.1
0.4
+10
0.04
0.2
+0.01
−3
V
V
µA
µA
µA
Input Leakage per Channel
VEx Input Pull-Up Current
II
IPU
IOZ
−10
−10
−10
VEx = 0 V
Tristate Leakage Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
+0.01
+10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.31
0.19
0.10
0.05
0.49
0.35
mA
mA
mA/Mbps
mA/Mbps
All inputs at logic low
All inputs at logic low
Output Rise/Fall Time
tR/tF
2.5
35
6
6
1.0
ns
10% to 90%
Common-Mode Transient Immunity1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
|CM|
25
kV/µs
ns
ns
VIx = VDDx
High/low-to-high impedance
High impedance-to-high/low
tPHZ, tPLH
tPZH, tPZL
fr
8
8
Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 6 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
PACKAGE CHARACTERISTICS
Table 13.
Parameter
Symbol
RI-O
CI-O
CI
θJCI
Min
Typ
1012
2.2
4.0
33
Max
Unit
Ω
pF
pF
°C/W
°C/W
Test Conditions
Resistance (Input-to-Output)1
Capacitance (Input-to-Output)1
Input Capacitance2
f = 1 MHz
IC Junction-to-Case Thermal Resistance, Side 1
IC Junction-to-Case Thermal Resistance, Side 2
Thermocouple located at
center of package underside
θJCO
28
1 Device considered a 2-terminal device; Pin 1 to Pin 8 are shorted together and Pin 9 to Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM3400W/ADuM3401W/ADuM3402W is approved by the organizations listed in Table 14. Refer to Table 19 and the Insulation
Lifetime section for details regarding recommended maximum working voltages for specific crossisolation waveforms and insulation
levels.
Table 14.
UL
CSA
VDE
Recognized under
Approved under
CSA Component Acceptance Notice #5A
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-122
1577 component recognition program1
Single protection,
2500 V rms isolation voltage
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 800 V rms (1131 V peak)
maximum working voltage
Reinforced insulation, 560 V peak
Reinforced insulation per CSA 60950-1-03
and IEC 60950-1, 400 V rms (566 V peak)
maximum working voltage
File E214100
File 205078
File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM3400W/ADuM3401W/ADuM3402W is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current
leakage detection limit = 5 µA).
2 In accordance with DIN V VDE V 0884-10, each ADuM3400W/ADuM3401W/ADuM3402W is proof tested by applying an insulation test voltage ≥1050 V peak for 1 sec
(partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 15.
Parameter
Symbol Value
Unit Conditions
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
2500
7.7 min
V rms 1-minute duration
L(I01)
L(I02)
mm
Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage)
8.1 min
mm
Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
0.017 min mm
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
CTI
>175
IIIa
V
Rev. B | Page 7 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The * marking on packages denotes DIN V VDE V 0884-10 approval.
Table 16.
Description
Conditions
Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method B1
I to IV
I to III
I to II
40/105/21
2
VIORM
VPR
560
1050
V peak
V peak
VIORM × 1.875 = VPR, 100% production test,
tm = 1 sec, partial discharge < 5 pC
Input-to-Output Test Voltage, Method A
VIORM × 1.6 = VPR, tm = 60 sec,
partial discharge < 5 pC
VPR
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2 and Subgroup 3
896
672
V peak
V peak
VIORM × 1.2 = VPR, tm = 60 sec,
partial discharge < 5 pC
Highest Allowable Overvoltage
Safety-Limiting Values
Transient overvoltage, tTR = 10 seconds
Maximum value allowed in the
event of a failure (see Figure 4)
VTR
4000
V peak
Case Temperature
Side 1 Current
Side 2 Current
TS
IS1
IS2
RS
150
265
335
>109
°C
mA
mA
Ω
Insulation Resistance at TS
VIO = 500 V
3.0
2.5
2.0
1.5
1.0
0.5
0
RECOMMENDED OPERATING CONDITIONS
Table 17.
Parameter
Rating
Operating Temperature Range (TA)
−40°C to +125°C
3.135 V to 5.5 V
1.0 ms
1
Supply Voltages (VDD1, VDD2
)
Input Signal Rise and Fall Times
1 All voltages are relative to their respective ground. See the DC Correctness
and Magnetic Field Immunity section for information on immunity to external
magnetic fields.
0
50
100
150
200
AMBIENT TEMPERATURE (°C)
Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Ambient Temperature per DIN V VDE V 0884-10
Rev. B | Page 8 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 18.
Parameter
Rating
Storage Temperature Range (TST)
−65°C to +150°C
Ambient Operating Temperature Range (TA) −40°C to +125°C
1
Supply Voltages (VDD1, VDD2
)
−0.5 V to +7.0 V
Input Voltage (VIA, VIB, VIC, VID, VE1,VE2)1, 2
Output Voltage (VOA, VOB,VOC, VOD)1, 2
Average Output Current per Pin3
Side 1 (IO1)
Side 2 (IO2)
Common-Mode Transients (CMH, CML)4
−0.5 V to VDD1 + 0.5 V
−0.5 V to VDDO + 0.5 V
ESD CAUTION
−18 mA to +18 mA
−22 mA to + 22 mA
−100 kV/µs to
+100 kV/µs
1 All voltages are relative to their respective ground.
2 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively. See the PC Board Layout section.
3 See Figure 4 for maximum rated current values for various temperatures.
4 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the Absolute Maximum Ratings can cause latch-
up or permanent damage.
Table 19. Maximum Continuous Working Voltage1
Parameter
Max
Unit
Constraint
AC Voltage, Bipolar Waveform
AC Voltage, Unipolar Waveform
Basic Insulation
Reinforced Insulation
DC Voltage
565
V peak
50-year minimum lifetime
1131
560
V peak
V peak
Maximum approved working voltage per IEC 60950-1
Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
Basic Insulation
Reinforced Insulation
1131
560
V peak
V peak
Maximum approved working voltage per IEC 60950-1
Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.
Table 20. Truth Table (Positive Logic)
VIx Input1 VEx Input2 VDDI State1 VDDO State1 VOX Output1
Notes
H
L
x
x
x
x
H or NC
H or NC
L
H or NC
L
x
Powered
Powered
Powered
Unpowered Powered
Unpowered Powered
Powered
Powered
Powered
H
L
Z
H
Z
Outputs return to the input state within 1 µs of VDDI power restoration.
Powered
Unpowered Indeterminate Outputs return to the input state within 1 µs of VDDO power restoration
if VEx state is H or NC. Outputs return to high impedance state within
8 ns of VDDO power restoration if VEx state is L.
1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and
VDDO refer to the supply voltages on the input and output sides of the given channel, respectively.
2 In noisy environments, connecting VEx to an external logic high or low is recommended.
Rev. B | Page 9 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
1
2
3
4
5
6
7
8
16
V
DD2
DD1
*GND
15 GND *
1
IA
IB
IC
ID
2
V
V
V
V
14
13
12
11
10
9
V
V
V
V
V
OA
OB
OC
OD
E2
ADuM3400W
TOP VIEW
(Not to Scale)
NC
*GND
GND *
1
2
NC = NO CONNECT
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING
BOTH TO GND IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
1
CONNECTED AND CONNECTING BOTH TO GND IS RECOMMENDED.
2
IN NOISY ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR
ADuM3401W/ADuM3402W AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL
LOGIC HIGH OR LOW IS RECOMMENDED.
Figure 5. ADuM3400W Pin Configuration
Table 21. ADuM3400W Pin Function Descriptions
Pin No. Mnemonic Description
1
2, 8
3
VDD1
GND1
VIA
Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
Ground 1. Ground reference for Isolator Side 1.
Logic Input A.
4
VIB
Logic Input B.
5
VIC
Logic Input C.
6
VID
Logic Input D.
7
9, 15
10
NC
GND2
VE2
This pin is not Connected Internally (see Figure 5).
Ground 2. Ground reference for Isolator Side 2.
Output Enable 2. Active high logic input. VOA, VOB, VOC, and VOD outputs are enabled when VE2 is high or disconnected.
VOA, VOB, VOC, and VOD outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic
high or low is recommended.
11
12
13
14
16
VOD
VOC
VOB
VOA
VDD2
Logic Output D.
Logic Output C.
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
Rev. B | Page 10 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
V
1
2
3
4
5
6
7
8
16
V
DD2
DD1
*GND
15 GND *
1
IA
IB
IC
2
V
V
V
14
13
12
11
10
9
V
V
V
V
V
OA
OB
OC
ID
ADuM3401W
TOP VIEW
(Not to Scale)
V
OD
V
E1
E2
*GND
GND *
2
1
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING
BOTH TO GND IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
1
CONNECTED AND CONNECTING BOTH TO GND IS RECOMMENDED. IN NOISY
2
ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR ADuM3401W/
ADuM3402W AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL LOGIC HIGH
OR LOW IS RECOMMENDED.
Figure 6. ADuM3401W Pin Configuration
Table 22. ADuM3401W Pin Function Descriptions
Pin No. Mnemonic Description
1
2, 8
3
VDD1
GND1
VIA
Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
Ground 1. Ground reference for Isolator Side 1.
Logic Input A.
4
VIB
Logic Input B.
5
VIC
Logic Input C.
6
7
VOD
VE1
Logic Output D.
Output Enable 1. Active high logic input. VOD output is enabled when VE1 is high or disconnected. VOD is disabled when
VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended.
9, 15
10
GND2
VE2
Ground 2. Ground reference for Isolator Side 2.
Output Enable 2. Active high logic input. VOA, VOB, and VOC outputs are enabled when VE2 ishigh or disconnected.
VOA, VOB, and VOC outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high
or low is recommended.
11
12
13
14
16
VID
Logic Input D.
Logic Output C.
Logic Output B.
Logic Output A.
VOC
VOB
VOA
VDD2
Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
Rev. B | Page 11 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
V
1
2
3
4
5
6
7
8
16
V
DD2
DD1
*GND
15 GND *
1
IA
IB
2
V
V
14
13
12
11
10
9
V
V
V
V
V
OA
OB
IC
ADuM3402W
TOP VIEW
(Not to Scale)
V
V
OC
OD
ID
V
E1
E2
*GND
GND *
1
2
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING
BOTH TO GND IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
1
CONNECTED AND CONNECTING BOTH TO GND IS RECOMMENDED.
2
IN NOISY ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR
ADuM3401W/ADuM3402W AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL
LOGIC HIGH OR LOW IS RECOMMENDED.
Figure 7. ADuM3402W Pin Configuration
Table 23. ADuM3402W Pin Function Descriptions
Pin No. Mnemonic Description
1
2, 8
3
VDD1
GND1
VIA
Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
Ground 1. Ground reference for Isolator Side 1.
Logic Input A.
4
VIB
Logic Input B.
5
6
7
VOC
VOD
VE1
Logic Output C.
Logic Output D.
Output Enable 1. Active high logic input. VOC and VOD outputs are enabled when VE1 is high or disconnected.
VOC and VOD outputs are disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or
low is recommended.
9, 15
10
GND2
VE2
Ground 2. Ground reference for Isolator Side 2.
Output Enable 2. Active high logic input. VOA and VOB outputs are enabled when VE2 ishigh or disconnected.
V
OA and VOB outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or
low is recommended.
11
12
13
14
16
VID
VIC
VOB
VOA
VDD2
Logic Input D.
Logic Input C.
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
Rev. B | Page 12 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
TYPICAL PERFORMANCE CHARACTERISTICS
2.5
10
8
2.0
1.5
6
5V
1.0
5V
3V
4
3V
0.5
0
2
0
0
2
4
6
8
10
0
2
4
6
8
10
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 11. Typical ADuM3400W VDD1 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
Figure 8. Typical Input Supply Current per Channel vs. Data Rate (No Load)
4
1.00
3
2
1
0
0.75
0.50
5V
5V
0.25
3V
3V
0
0
2
4
6
8
10
0
2
4
6
8
10
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 12. Typical ADuM3400W VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
Figure 9. Typical Output Supply Current per Channel vs. Data Rate (No Load)
10
8
1.5
1.0
6
5V
3V
5V
4
0.5
3V
2
0
0
0
2
4
6
8
10
0
2
4
6
8
10
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 13. Typical ADuM3401W VDD1 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
Figure 10. Typical Output Supply Current per Channel vs.
Data Rate (15 pF Output Load)
Rev. B | Page 13 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
4
45
40
35
30
25
3
3V
5V
5V
2
3V
1
0
0
2
4
6
8
10
–50
–25
0
25
50
75
100
125
DATA RATE (Mbps)
TEMPERATURE (°C)
Figure 16. Propagation Delay vs. Temperature, WB Grade
Figure 14. Typical ADuM3401W VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
10
8
6
5V
3V
4
2
0
0
2
4
6
8
10
DATA RATE (Mbps)
Figure 15. Typical ADuM3402W VDD1 or VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
Rev. B | Page 14 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
APPLICATION INFORMATION
While the ADuM3400W/ADuM3401W/ADuM3402W
improve system-level ESD reliability, they are no substitute for a
robust system-level design. See the AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler Isolation Products
for detailed recommendations on board layout and system-level
design.
PC BOARD LAYOUT
The ADuM3400W/ADuM3401W/ADuM3402W digital
isolator requires no external interface circuitry for the logic
interfaces. Power supply bypassing is strongly recommended at
the input and output supply pins (see Figure 17). Bypass
capacitors are most conveniently connected between Pin 1 and
Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The
capacitor value should be between 0.01 μF and 0.1 μF. The total
lead length between both ends of the capacitor and the input
power supply pin should not exceed 20 mm. Bypassing between
Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be
considered unless the ground pair on each package side is
connected close to the package.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation
delay to a logic high.
INPUT (V
)
50%
Ix
V
GND
V
DD2
DD1
tPLH
tPHL
GND
1
IA
IB
2
V
V
V
V
V
V
V
OA
OB
OUTPUT (V
)
50%
Ox
V
V
IC/OC
ID/OD
OC/IC
OD/ID
E2
Figure 18. Propagation Delay Parameters
V
E1
GND
GND
2
1
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the input signal’s timing is preserved.
Figure 17. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout should be
designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the Absolute
Maximum Ratings of the device, thereby leading to latch-up or
permanent damage.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM3400W/ADuM3401W/ADuM3402W component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM3400W/
ADuM3401W/ADuM3402W components operating under the
same conditions.
SYSTEM-LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case the
isolator output is forced to a default state (see Table 20) by the
watchdog timer circuit.
System-level ESD reliability (for example, per IEC 61000-4-x) is
highly dependent on system design, which varies widely by
application. The ADuM3400W/ADuM3401W/ADuM3402W
incorporate many enhancements to make ESD reliability less
dependent on system design. The enhancements include:
ESD protection cells added to all input/output interfaces.
Key metal trace resistances reduced using wider geometry
and paralleling of lines with vias.
The SCR effect inherent in CMOS devices minimized by
use of guarding and isolation technique between PMOS
and NMOS devices.
The limitation on the magnetic field immunity of the
ADuM3400W/ADuM3401W/ADuM3402W is set by the
condition in which induced voltage in the receiving coil of the
transformer is sufficiently large to either falsely set or reset the
decoder. The following analysis defines the conditions under
which this can occur. The 3.3 V operating condition of the
ADuM3400W/ADuM3401W/ADuM3402W is examined
because it represents the most susceptible mode of operation.
Areas of high electric field concentration eliminated using
45° corners on metal traces.
Supply pin overvoltage prevented with larger ESD clamps
between each supply pin and its respective ground.
Rev. B | Page 15 of 20
ADuM3400W/ADuM3401W/ADuM3402W
Data Sheet
1000
100
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
DISTANCE = 1m
2
10
1
V = (−dβ/dt)∑∏rn ; N = 1, 2, … , N
DISTANCE = 100mm
where:
β is magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
DISTANCE = 5mm
0.1
Given the geometry of the receiving coil in the ADuM3400W/
ADuM3401W/ADuM3402W and an imposed requirement that
the induced voltage be at most 50% of the 0.5 V margin at the
decoder, a maximum allowable magnetic field is calculated as
shown in Figure 19.
0.01
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 20. Maximum Allowable Current for Various Current-to-
ADuM3400W/ADuM3401W/ADuM3402W Spacings
100
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board traces
could induce error voltages sufficiently large enough to trigger
the thresholds of succeeding circuitry. Care should be taken in
the layout of such traces to avoid this possibility.
10
1
POWER CONSUMPTION
0.1
The supply current at a given channel of the ADuM3400W/
ADuM3401W/ADuM3402W isolator is a function of the supply
voltage, the channel’s data rate, and the channel’s output load.
0.01
0.001
For each input channel, the supply current is given by
1k
10k
100k
1M
10M
100M
I
DDI = IDDI (Q)
f ≤ 0.5 fr
f > 0.5 fr
MAGNETIC FIELD FREQUENCY (Hz)
IDDI = IDDI (D) × (2f − fr) + IDDI (Q)
Figure 19. Maximum Allowable External Magnetic Flux Density
For each output channel, the supply current is given by
IDDO = IDDO (Q) f ≤ 0.5 fr
DDO = (IDDO (D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO (Q)
f > 0.5 fr
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil, which is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and was of the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 V—still well above the 0.5 V
sensing threshold of the decoder.
I
where:
DDI (D), IDDO (D) are the input and output dynamic supply currents
I
per channel (mA/Mbps).
CL is the output load capacitance (pF).
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM3400W/ADuM3401W/ADuM3402W transformers.
Figure 20 expresses these allowable current magnitudes as a
function of frequency for selected distances. As shown, the
ADuM3400W/ADuM3401W/ADuM3402W is extremely
immune and can be affected only by extremely large currents
operated at high frequency very close to the component. For
the 1 MHz example noted, one would have to place a 0.5 kA
current 5 mm away from the ADuM3400W/ADuM3401W/
ADuM3402W to affect the operation of the component.
V
DDO is the output supply voltage (V).
f is the input logic signal frequency (MHz); it is half of the input
data rate expressed in units of Mbps.
fr is the input stage refresh rate (Mbps).
I
DDI (Q), IDDO (Q) are the specified input and output quiescent
supply currents (mA).
Rev. B | Page 16 of 20
Data Sheet
ADuM3400W/ADuM3401W/ADuM3402W
To calculate the total IDD1 and IDD2 supply current, the supply
currents for each input and output channel corresponding to
In the case of unipolar ac or dc voltage, the stress on the
insulation is significantly lower, which allows operation at
higher working voltages while still achieving a 50-year service
life. The working voltages listed in Table 19 can be applied while
maintaining the 50-year minimum lifetime provided the voltage
conforms to either the unipolar ac or dc voltage cases. Any cross
insulation voltage waveform that does not conform to Figure 22
or Figure 23 should be treated as a bipolar ac waveform and its
peak voltage should be limited to the 50-year lifetime voltage
value listed in Table 19.
VDD1 and VDD2 are calculated and totaled. Figure 8 provides the
per-channel input supply current as a function of the data rate.
Figure 9 and Figure 10 provide the per-channel supply output
current as a function of the data rate for an unloaded output
condition and for a 15 pF output condition, respectively. Figure 11
through Figure 15 provide the total VDD1 and VDD2 supply
current as a function of the data rate for ADuM3400W/
ADuM3401W/ADuM3402W channel configurations.
Note that the voltage presented in Figure 22 is shown as sinusoi-
dal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of
insulation degradation is dependent on the characteristics of
the voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM3400W/
ADuM3401W/ADuM3402W.
RATED PEAK VOLTAGE
0V
Figure 21. Bipolar AC Waveform
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage.
Acceleration factors for several operating conditions are
determined. These factors allow calculation of the time to
failure at the actual working voltage. The values shown in
Figure 21 summarize the peak voltage for 50 years of service life
for a bipolar ac operating condition, and the maximum
CSA/VDE approved working voltages. In many cases, the
approved working voltage is higher than the 50-year service life
voltage. Operation at these high working voltages can lead to
shortened insulation life in some cases.
RATED PEAK VOLTAGE
0V
Figure 22. Unipolar AC Waveform
RATED PEAK VOLTAGE
0V
The insulation lifetime of the ADuM3400W/ADuM3401W/
ADuM3402W depends on the voltage waveform type imposed
across the isolation barrier. The iCoupler insulation structure
degrades at different rates depending on whether the waveform
is bipolar ac, unipolar ac, or dc. Figure 21, Figure 22, and
Figure 23 illustrate these different isolation voltage waveforms.
Figure 23. DC Waveform
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the ac bipolar condition
determines the recommended maximum working voltage of
Analog Devices.
Rev. B | Page 17 of 20
ADuM3400W/ADuM3401W/ADuM3402W
OUTLINE DIMENSIONS
Data Sheet
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.25 (0.00
98)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 24. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Number Number
of
of
Maximum Maximum
Maximum
Inputs,
Inputs,
Data Rate Propagation Pulse Width
Temperature
Package
Description
Package
Model1, 2, 3
V
4
4
3
3
2
2
DD1 Side VDD2 Side (Mbps)
Delay, 5 V (ns) Distortion (ns) Range
Option
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
ADuM3400WARWZ
ADuM3400WBRWZ
ADuM3401WARWZ
ADuM3401WBRWZ
ADuM3402WARWZ
ADuM3402WBRWZ
0
0
1
1
2
2
1
10
1
10
1
10
100
36
40
3.5
40
3.5
40
−40°C to +125°C 16-Lead SOIC_W
−40°C to +125°C 16-Lead SOIC_W
−40°C to +125°C 16-Lead SOIC_W
−40°C to +125°C 16-Lead SOIC_W
−40°C to +125°C 16-Lead SOIC_W
−40°C to +125°C 16-Lead SOIC_W
100
36
100
36
3.5
1 Z = RoHS Compliant Part.
2 Tape and reel are available. The addition of an -RL suffix designates a 13” (1,000 units) tape-and-reel option.
3 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADuM3400W/ADuM3401W/ADuM3402W models are available with controlled manufacturing to support the quality and
reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the
commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade
products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific
product ordering information and to obtain the specific Automotive Reliability reports for these models.
Rev. B | Page 18 of 20
Data Sheet
NOTES
ADuM3400W/ADuM3401W/ADuM3402W
Rev. B | Page 19 of 20
ADuM3400W/ADuM3401W/ADuM3402W
NOTES
Data Sheet
©2012–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11000-0-11/14(B)
Rev. B | Page 20 of 20
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