ADUM6201CRIZ_技术文档

Dual-Channel, 5 kV Isolators with

Integrated DC-to-DC Converter

Data Sheet

ADuM6200/ADuM6201/ADuM6202

FEATURES

FUNCTIONAL BLOCK DIAGRAMS

isoPower integrated, isolated dc-to-dc converter

Regulated 5 V or 3.3 V output

Up to 400 mW output power

Dual dc-to-25 Mbps (NRZ) signal isolation channels

16-lead SOIC wide body package version

16-lead SOIC wide body enhanced creepage version

High temperature operation: 105°C maximum

Safety and regulatory approvals

OSCILLATOR

RECTIFIER REGULATOR

1

2

3

4

5

6

7

8

16

15

14

13

V

ISO

DD1

GND

ISO

1

V

/V

IA OA

V

/V

IA OA

2-CHANNEL iCOUPLER CORE

/V

IB OB

/V

IB OB

RC

12 NC

IN

RC

11

10

9

V

SEL

/NC

ADuM6200/

ADuM6201/

ADuM6202

UL recognition

V

/NC

E1

E2

5000 V rms for 1 minute per UL 1577

CSA Component Acceptance Notice #5A

IEC 60601-1: 250 V rms, 8 mm package (RI-16-1)

IEC 60950-1: 400 V rms, 8 mm package (RI-16-1)

VDE certificate of conformity (RW-16)

IEC 60747-5-2 (VDE 0884 Part 2):2003-01

GND

ISO

1

NC = NO CONNECT

Figure 1.

V

IA

IB

OA

OB

V

_IORM= 846 V peak

3

4

14

13

VDE certificate of conformity, 8 mm package (RI-16-1)

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

ADuM6200

V_IORM= 846 V peak

Figure 2. ADuM6200

APPLICATIONS

RS-232/RS-422/RS-485 transceivers

Industrial field bus isolation

Isolated sensor interfaces

Industrial PLCs

V

IA

OA

IB

3

4

14

13

ADuM6201

V

OB

GENERAL DESCRIPTION

Figure 3. ADuM6201

The ADuM6200/ADuM6201/ADuM6202¹are dual-channel

digital isolators with isoPower®, an integrated, isolated dc-to-dc

converter. Based on the Analog Devices, Inc., iCoupler® technology,

the dc-to-dc converter provides up to 400 mW of regulated, iso-

lated power at either 5.0 V or 3.3 V from a 5.0 V input supply, or

at 3.3 V from a 3.3 V supply at the power levels shown in Table 1.

These devices eliminate the need for a separate, isolated dc-to-dc

converter in low power, isolated designs. The iCoupler chip scale

transformer technology is used to isolate the logic signals and for

the magnetic components of the dc-to-dc converter. The result

is a small form factor, total isolation solution.

V

OA

IA

IB

3

4

14

13

ADuM6202

OB

Figure 4. ADuM6202

Table 1. Power Levels

Input Voltage (V) Output Voltage (V) Output Power (mW)

5.0

3.3

5.0

3.3

400

330

132

The ADuM6200/ADuM6201/ADuM6202 isolators provide two

independent isolation channels in a variety of channel configura-

tions and data rates (see the Ordering Guide for more information).

isoPower uses high frequency switching elements to transfer power

through its transformer. Special care must be taken during printed

circuit board (PCB) layout to meet emissions standards. See the

AN-0971 Application Note for board layout recommendations.

¹Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329; other patents are pending.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

ADuM6200/ADuM6201/ADuM6202

Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Pin Configurations and Function Descriptions......................... 11

Truth Table .................................................................................. 13

Typical Performance Characteristics ........................................... 14

Terminology.................................................................................... 17

Applications Information .............................................................. 18

PCB Layout ................................................................................. 18

Start-Up Behavior....................................................................... 18

EMI Considerations................................................................... 19

Propagation Delay Parameters ................................................. 19

DC Correctness and Magnetic Field Immunity..................... 19

Power Consumption .................................................................. 20

Current-Limit and Thermal Overload Protection................. 21

Power Considerations................................................................ 21

Thermal Analysis ....................................................................... 22

Increasing Available Power ....................................................... 22

Insulation Lifetime..................................................................... 23

Outline Dimensions....................................................................... 24

Ordering Guide .......................................................................... 25

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics—5 V Primary Input Supply/

5 V Secondary Isolated Supply ................................................... 3

Electrical Characteristics—3.3 V Primary Input Supply/

3.3 V Secondary Isolated Supply ................................................ 4

Electrical Characteristics—5 V Primary Input Supply/

3.3 V Secondary Isolated Supply ................................................ 6

Package Characteristics ............................................................... 7

Regulatory Information............................................................... 8

Insulation and Safety-Related Specifications............................ 8

Insulation Characteristics............................................................ 9

Recommended Operating Conditions ...................................... 9

Absolute Maximum Ratings.......................................................... 10

ESD Caution................................................................................ 10

REVISION HISTORY

6/12—Rev. B to Rev. C

Created Hyperlink for Safety and Regulatory Approvals

Entry in Features Section................................................................. 1

Changes to Table 15.......................................................................... 8

Changes to Insulation Characteristics Section ............................. 9

8/11—Rev. A to Rev. B

Change to Features Section ............................................................. 1

Changes to Table 15.......................................................................... 8

8/11—Rev. 0 to Rev. A

Added 16-Lead SOIC (RI-16-1) Package ........................Universal

Changes to Features Section............................................................ 1

Changes to Table 15 and Table 16 .................................................. 8

Changes to Table 20........................................................................ 10

10/10—Revision 0: Initial Version

Rev. C | Page 2 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

Typical specifications are at T_A= 25°C, V_DD1= V_SEL= V_ISO= 5 V. Minimum/maximum specifications apply over the entire recommended

operation range, which is 4.5 V ≤ V_DD1, V_SEL, V_ISO≤ 5.5 V, and −40°C ≤ T_A≤ +105°C, unless otherwise noted. Switching specifications are

tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted.

Table 2. DC-to-DC Converter Static Specifications

Parameter

Symbol

Min

Typ

Max

5.4

5

Unit

Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint

Line Regulation

Load Regulation

Output Ripple

V_ISO

4.7

5.0

1

V

I_ISO= 0 mA

I_ISO= 40 mA, V_DD1= 4.5 V to 5.5 V

I_ISO= 8 mA to 72 mA

20 MHz bandwidth, C_BO= 0.1 µF||10 µF, I_ISO= 72 mA

C_BO= 0.1 µF||10 µF, I_ISO= 72 mA

V_ISO(LINE)

V_ISO(LOAD)

V_ISO(RIP)

V_ISO(NOISE)

f_OSC

mV/V

%

75

mV p-p

MHz

kHz

mA

%

mA

Output Noise

200

180

625

Switching Frequency

PWM Frequency

Output Supply Current

Efficiency at I_ISO(MAX)

I_DD1, No V_ISOLoad

I_DD1, Full V_ISOLoad

f_PWM

I_ISO(MAX)

80

V_ISO> 4.5 V

I_ISO= 80 mA

32

10

290

I_DD1(Q)

I_DD1(MAX)

26

Table 3. DC-to-DC Converter Dynamic Specifications

1 Mbps—A or C Grade

25 Mbps—C Grade

Test Conditions/

Comments

Parameter

SUPPLY CURRENT

Input

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

I_DD1(D)

ADuM6200

ADuM6201

ADuM6202

Available to Load

ADuM6200

ADuM6201

ADuM6202

9

10

11

34

38

41

mA

No V_ISOload

I_ISO(LOAD)

80

74

72

70

mA

Table 4. Switching Specifications

A Grade

Typ

C Grade

Typ

Test Conditions/

Comments

Parameter

Symbol

Min

Max

Min

Max

Unit

SWITCHING SPECIFICATIONS

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Pulse Width

1

100

40

25

60

6

Mbps

ns

ps/°C

ns

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

55

45

5

PW

t_PSK

1000

40

Within PWD limit

Between any two units

Propagation Delay Skew

Channel Matching

Codirectional¹

50

15

t_PSKCD

t_PSKOD

50

6

15

ns

Opposing Directional²

1

7

Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

²Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

Rev. C | Page 3 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

Table 5. Input and Output Characteristics

Test Conditions/

Comments

Parameter

Symbol Min

Typ

Max

Unit

DC SPECIFICATIONS

Logic High Input Threshold

Logic Low Input Threshold

Logic High Output Voltages

V_IH

V_IL

V_OH

0.7 × V_ISOor 0.7 × V_DD1

V

0.3 × V_ISOor 0.3 × V_DD1

V_DD1− 0.3 or V_ISO− 0.3 5.0

V_DD1− 0.5 or V_ISO− 0.5 4.8

I_Ox= −20 µA, V_Ix= V_IxH

I_Ox= −4 mA, V_Ix= V_IxH

I_Ox= 20 µA, V_Ix= V_IxL

I_Ox= 4 mA, V_Ix= V_IxL

V_DD1, V_ISOsupplies

Logic Low Output Voltages

V_OL

0.0

0.2

0.1

0.4

Undervoltage Lockout

Positive-Going Threshold

Negative-Going Threshold V_UV−

Hysteresis

Input Currents per Channel

AC SPECIFICATIONS

Output Rise/Fall Time

Common-Mode Transient

Immunity¹

UVLO

V_UV+

2.7

2.4

0.3

V

µA

V_UVH

I_I

−20

25

+0.01 +20

0 V ≤ V_Ix≤ V_DD1

10% to 90%

t_R/t_F

|CM|

2.5

35

ns

kV/µs V_Ix= V_DD1or V_ISO, V_CM= 1000 V,

transient magnitude = 800 V

Refresh Rate

f_r

1.0

Mbps

¹|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V_O> 0.7 × V_DD1or 0.7 × V_ISOfor a high input or V_O< 0.3 × V_DD1or 0.3 × V_ISOfor a low

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at T_A= 25°C, V_DD1= V_ISO= 3.3 V, V _SEL= GND_ISO. Minimum/maximum specifications apply over the entire

recommended operation range, which is 3.0 V ≤ V_DD1, V_SEL, V_ISO≤ 3.6 V, and −40°C ≤ T_A≤ +105°C, unless otherwise noted. Switching

specifications are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted.

Table 6. DC-to-DC Converter Static Specifications

Parameter

Symbol Min

Typ

Max

3.6

5

Unit

Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint

Line Regulation

Load Regulation

Output Ripple

V_ISO

3.0

3.3

1

V

I_ISO= 0 mA

I_ISO= 20 mA, V_DD1= 3.0 V to 3.6 V

I_ISO= 4 mA to 36 mA

V_ISO(LINE)

V_ISO(LOAD)

V_ISO(RIP)

V_ISO(NOISE)

f_OSC

mV/V

%

50

mV p-p 20 MHz bandwidth, C_BO= 0.1 µF||10 µF, I_ISO= 36 mA

mV p-p C_BO= 0.1 µF||10 µF, I_ISO= 36 mA

MHz

kHz

mA

%

Output Noise

130

180

625

Switching Frequency

PWM Frequency

Output Supply Current

Efficiency at I_ISO(MAX)

I_DD1, No V_ISOLoad

I_DD1, Full V_ISOLoad

f_PWM

I_ISO(MAX)

40

V_ISO> 3 V

I_ISO= 40 mA

29

10

175

I_DD1(Q)

I_DD1(MAX)

17

mA

Rev. C | Page 4 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

Table 7. DC-to-DC Converter Dynamic Specifications

1 Mbps—A or C Grade

25 Mbps—C Grade

Test Conditions/

Comments

Parameter

SUPPLY CURRENT

Input

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

I_DD1(D)

ADuM6200

ADuM6201

ADuM6202

Available to Load

ADuM6200

ADuM6201

ADuM6202

6

7

8

23

25

27

mA

No V_ISOload

I_ISO(LOAD)

40

36

35

34

mA

Table 8. Switching Specifications

A Grade

Typ

C Grade

Typ

Test Conditions/

Comments

Parameter

Symbol

Min

Max

Min

Max

Unit

SWITCHING SPECIFICATIONS

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Pulse Width

1

100

40

25

65

6

Mbps

ns

ps/°C

ns

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

60

45

5

PW

t_PSK

1000

40

Within PWD limit

Between any two units

Propagation Delay Skew

Channel Matching

Codirectional¹

50

45

t_PSKCD

t_PSKOD

50

6

15

ns

Opposing Directional²

1

7

Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

²Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

Table 9. Input and Output Characteristics

Test Conditions/

Comments

Parameter

Symbol Min

Typ

Max

Unit

DC SPECIFICATIONS

Logic High Input Threshold

Logic Low Input Threshold

Logic High Output Voltages

V_IH

V_IL

V_OH

0.7 × V_ISOor 0.7 × V_DD1

V

0.3 × V_ISOor 0.3 × V_DD1

V_DD1− 0.3 or V_ISO− 0.3 3.3

V_DD1− 0.5 or V_ISO− 0.5 3.1

I_Ox= −20 µA, V_Ix= V_IxH

I_Ox= −4 mA, V_Ix= V_IxH

I_Ox= 20 µA, V_Ix= V_IxL

I_Ox= 4 mA, V_Ix= V_IxL

V_DD1, V_ISOsupplies

Logic Low Output Voltages

V_OL

0.0

0.1

0.4

Undervoltage Lockout

Positive-Going Threshold

Negative-Going Threshold V_UV−

Hysteresis

Input Currents per Channel

AC SPECIFICATIONS

Output Rise/Fall Time

Common-Mode Transient

Immunity¹

UVLO

V_UV+

2.7

2.4

0.3

V

µA

V_UVH

I_I

−20

25

+0.01 +20

0 V ≤ V_Ix≤ V_DD1

10% to 90%

t_R/t_F

|CM|

2.5

35

ns

kV/µs V_Ix= V_DD1or V_ISO, V_CM= 1000 V,

transient magnitude = 800 V

Refresh Rate

f_r

1.0

Mbps

¹|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V_O> 0.7 × V_DD1or 0.7 × V_ISOfor a high input or V_O< 0.3 × V_DD1or 0.3 × V_ISOfor a low

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

Rev. C | Page 5 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at T_A= 25°C, V_DD1= 5.0 V, V_ISO= 3.3 V, V_SEL= GND_ISO. Minimum/maximum specifications apply over the entire

recommended operation range, which is 4.5 V ≤ V_DD1≤ 5.5 V, 3.0 V ≤ V_ISO≤ 3.6 V, and −40°C ≤ T_A≤ +105°C, unless otherwise noted.

Switching specifications are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted.

Table 10. DC-to-DC Converter Static Specifications

Parameter

Symbol

Min

Typ

Max

3.6

5

Unit

Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint

Line Regulation

Load Regulation

Output Ripple

V_ISO

3.0

3.3

1

V

I_ISO= 0 mA

I_ISO= 50 mA, V_DD1= 3.0 V to 3.6 V

I_ISO= 6 mA to 54 mA

20 MHz bandwidth, C_BO= 0.1 µF||10 µF, I_ISO= 90 mA

C_BO= 0.1 µF||10 µF, I_ISO= 90 mA

V_ISO(LINE)

V_ISO(LOAD)

V_ISO(RIP)

V_ISO(NOISE)

f_OSC

mV/V

%

50

mV p-p

MHz

kHz

mA

%

mA

Output Noise

130

180

625

Switching Frequency

PWM Frequency

Output Supply Current

Efficiency at I_ISO(MAX)

I_DD1, No V_ISOLoad

I_DD1, Full V_ISOLoad

f_PWM

I_ISO(MAX)

100

V_ISO> 3 V

I_ISO= 100 mA

25

7

230

I_DD1(Q)

I_DD1(MAX)

13

Table 11. DC-to-DC Converter Dynamic Specifications

1 Mbps—A or C Grade

25 Mbps—C Grade

Test Conditions/

Comments

Parameter

SUPPLY CURRENT

Input

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

I_DD1(D)

ADuM6200

ADuM6201

ADuM6202

Available to Load

ADuM6200

ADuM6201

ADuM6202

6

22

23

24

mA

No V_ISOload

I_ISO(LOAD)

100

96

95

94

mA

Table 12. Switching Specifications

A Grade

Typ

C Grade

Typ

Test Conditions/

Comments

Parameter

Symbol

Min

Max

Min

Max

Unit

SWITCHING SPECIFICATIONS

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Pulse Width

1

100

40

25

65

6

Mbps

ns

ps/°C

ns

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

60

45

5

PW

t_PSK

1000

40

Within PWD limit

Between any two units

Propagation Delay Skew

Channel Matching

Codirectional¹

50

15

t_PSKCD

t_PSKOD

50

6

15

ns

Opposing Directional²

1

7

Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

²Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

Rev. C | Page 6 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

Table 13. Input and Output Characteristics

Parameter

Symbol Min

Typ

Max

Unit

Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold

V_IH

V_IL

0.7 × V_ISOor

0.7 × V_DD1

V

Logic Low Input Threshold

Logic High Output Voltages

0.3 × V_ISOor

0.3 × V_DD1

V_OH

V_DD1− 0.3 or

V_DD1or V_ISO

I_Ox= −20 μA, V_Ix= V_IxH

I_Ox= −4 mA, V_Ix= V_IxH

V

_ISO− 0.3

V_DD1− 0.5 or

V_ISO− 0.5

V_DD1− 0.2 or

V_ISO− 0.2

Logic Low Output Voltages

V_OL

0.0

0.1

0.4

V

I_Ox= 20 μA, V_Ix= V_IxL

I_Ox= 4 mA, V_Ix= V_IxL

V_DD1, V_ISOsupplies

Undervoltage Lockout

Positive-Going Threshold

Negative-Going Threshold

Hysteresis

Input Currents per Channel

AC SPECIFICATIONS

Output Rise/Fall Time

Common-Mode Transient

Immunity¹

UVLO

V_UV+

V_UV−

V_UVH

I_I

2.7

2.4

0.3

+0.01

V

μA

−20

25

+20

0 V ≤ V_Ix≤ V_DD1

10% to 90%

V_Ix= V_DD1or V_ISO, V_CM= 1000 V,

transient magnitude = 800 V

t_R/t_F

|CM|

2.5

35

ns

kV/μs

Refresh Rate

f_r

1.0

Mbps

¹|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V_O> 0.7 × V_DD1or 0.7 × V_ISOfor a high input or V_O< 0.3 × V_DD1or 0.3 × V_ISOfor a low

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

PACKAGE CHARACTERISTICS

Table 14.

Parameter

Symbol Min

Typ

Max

Unit

Test Conditions/Comments

RESISTANCE AND CAPACITANCE

Resistance (Input-to-Output)¹

Capacitance (Input-to-Output)¹

Input Capacitance²

IC Junction-to-Ambient Thermal

Resistance

R_I-O

C_I-O

C_I

10¹²

2.2

4.0

45

Ω

pF

°C/W

f = 1 MHz

θ_JA

Thermocouple is located at the center of

the package underside; test conducted

on a 4-layer board with thin traces³

THERMAL SHUTDOWN

Thermal Shutdown Threshold

Thermal Shutdown Hysteresis

TS_SD

TS_SD-HYS

150

20

°C

T_Jrising

¹This device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.

²Input capacitance is from any input data pin to ground.

³Refer to the Thermal Analysis section for thermal model definitions.

Rev. C | Page 7 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

REGULATORY INFORMATION

The ADuM6200/ADuM6201/ADuM6202 are approved by the organizations listed in Table 15. Refer to Table 20 and the Insulation Lifetime

section for more information about the recommended maximum working voltages for specific cross-insulation waveforms and insulation levels.

Table 15.

UL¹

CSA

VDE

Recognized under UL 1577 component Approved under CSA Component Acceptance Notice #5A

recognition program

RW-16 package:²

Certified according to IEC 60747-5-2

(VDE 0884 Part 2):2003-01

Basic insulation, 846 V peak

RI-16-1 package:³

Single protection, 5000 V rms isolation Basic insulation per CSA 60950-1-07 and IEC 60950-1,

voltage

600 V rms (848 V peak) maximum working voltage

Certified according to DIN V VDE V

0884-10 (VDE V 0884-10):2006-12

Reinforced insulation, 846 V peak

RW-16 package:

Reinforced insulation per CSA 60950-1-07 and IEC 60950-1,

380 V rms (537 V peak) maximum working voltage

Reinforced insulation per IEC 60601-1, 125 V rms (176 V peak)

maximum working voltage

RI-16-1 package:

Reinforced insulation per CSA 60950-1-07 and IEC 60950-1,

400 V rms (565 V peak) maximum working voltage

Reinforced insulation per IEC 60601-1, 250 V rms (353 V peak)

maximum working voltage

File E214100

File 205078

File 2471900-4880-0001

¹In accordance with UL 1577, each ADuM6200/ADuM6201/ADuM6202 is proof-tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec (current leakage

detection limit = 15 μA).

²In accordance with IEC 60747-5-2 (VDE 0884 Part 2):2003-01, each ADuM6200/ADuM6201/ADuM6202 in the RW-16 package is proof-tested by applying an insulation

test voltage ≥ 1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates IEC 60747-5-2 (VDE 0884

Part 2):2003-01 approval.

³In accordance with DIN V VDE V 0884-10 (VDE V 0884-10):2006-12, each ADuM6200/ADuM6201/ADuM6202 in the RI-16-1 package is proof-tested by applying an

insulation test voltage ≥ 1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V

0884-10 (VDE V 0884-10):2006-12 approval.

INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 16.

Parameter

Symbol

Value

5000

8.0

Unit

V rms

mm

Test Conditions/Comments

Rated Dielectric Insulation Voltage

Minimum External Air Gap (Clearance)

1-minute duration

Measured from input terminals to output terminals,

shortest distance through air

Measured from input terminals to output terminals,

shortest distance path along body

L(I01)

L(I02)

Minimum External Tracking (Creepage)

RW-16 Package

RI-16-1 Package

7.6

8.3 min

mm

Minimum Internal Distance (Internal Clearance)

0.017 min mm

Distance through insulation

Tracking Resistance (Comparative Tracking Index) CTI

Material Group

>175

IIIa

V

DIN IEC 112/VDE 0303, Part 1

Material Group (DIN VDE 0110, 1/89, Table 1)

Rev. C | Page 8 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

INSULATION CHARACTERISTICS

IEC 60747-5-2 (VDE 0884 Part 2):2003-01 and DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured

by protective circuits. The asterisk (*) marking branded on the components designates IEC 60747-5-2 (VDE 0884 Part 2):2003-01 or

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval.

Table 17.

Description

Test Conditions/Comments

Symbol

Characteristic Unit

Installation Classification per DIN VDE 0110

For Rated Mains Voltage ≤ 300 V rms

For Rated Mains Voltage ≤ 450 V rms

For Rated Mains Voltage ≤ 600 V rms

Climatic Classification

Pollution Degree per DIN VDE 0110, Table 1

Maximum Working Insulation Voltage

Input-to-Output Test Voltage

Method b1

I to IV

I to II

40/105/21

2

846

V_IORM

V peak

V_IORM× 1.875 = V_PR, 100% production test, t_m= 1 sec, V_PR

partial discharge < 5 pC

1590

V peak

Method a

After Environmental Tests Subgroup 1

After Input and/or Safety Tests

Subgroup 2 and Subgroup 3

V_PR

V_IORM× 1.6 = V_PR, t_m= 60 sec, partial discharge < 5 pC

V_IORM× 1.2 = V_PR, t_m= 60 sec, partial discharge < 5 pC

1375

1018

V peak

Highest Allowable Overvoltage

Safety-Limiting Values

Transient overvoltage, t_TR= 10 sec

Maximum value allowed in the event of a failure

(see Figure 5)

V_IOTM

6000

V peak

Case Temperature

Side 1 Current (I_DD1

Insulation Resistance at T_S

T_S

I_S1

R_S

150

555

>10⁹

°C

mA

Ω

)

V_IO= 500 V

Thermal Derating Curve

600

500

400

300

200

100

0

50

100

150

200

AMBIENT TEMPERATURE (°C)

Figure 5. Thermal Derating Curve, Dependence of Safety-Limiting Values on Case Temperature, per DIN EN 60747-5-2

RECOMMENDED OPERATING CONDITIONS

Table 18.

Parameter

Symbol

Min

Max

Unit

Test Conditions/Comments

TEMPERATURE

Operating Temperature

T_A

−40

+105

°C

Operation at 105°C requires reduction of the

maximum load current as specified in Table 19

SUPPLY VOLTAGES

V_DD1@ V_SEL= 0 V

V_DD1@ V_SEL= V_ISO

Each voltage is relative to its respective ground

V_DD1

3.0

4.5

5.5

V

Rev. C | Page 9 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

ABSOLUTE MAXIMUM RATINGS

T_A= 25°C, unless otherwise noted.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Table 19.

Parameter

Rating

Storage Temperature (T_ST)

−55°C to +150°C

Ambient Operating Temperature (T_A) −40°C to +105°C

1

Supply Voltages (V_DD1, V_ISO

)

−0.5 V to +7.0 V

Input Voltage (V_IA, V_IB, V_E1, V_E2, V_SEL

,

−0.5 V to V_DDI+ 0.5 V

1, 2

RC_IN, RC_SEL

)

Output Voltage (V_OA, V_OB)^{1, 2}

Average Output Current per Pin³

Common-Mode Transients⁴

−0.5 V to V_DDO+ 0.5 V

−10 mA to +10 mA

−100 kV/µs to +100 kV/µs

ESD CAUTION

¹Each voltage is relative to its respective ground.

²V_DDIand V_DDOrefer to the supply voltages on the input and output sides

of a given channel, respectively. See the PCB Layout section.

³See Figure 5 for maximum rated current values for various temperatures.

⁴Refers to common-mode transients across the isolation barrier. Common-

mode transients exceeding the absolute maximum ratings may cause

latch-up or permanent damage.

Table 20. Maximum Continuous Working Voltage¹

Parameter

Max

Unit

Applicable Certification

AC Voltage, Bipolar Waveform

AC Voltage, Unipolar Waveform

Basic Insulation

Reinforced Insulation

DC Voltage

424

V peak

All certifications, 50-year operation

Working voltage per IEC 60950-1

600

565

V peak

Basic Insulation

Reinforced Insulation

600

565

V peak

¹Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.

Rev. C | Page 10 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

V

1

2

3

4

5

6

7

8

16

V

ISO

DD1

GND

15 GND

1

IA

IB

IN

ISO

V

14

13

V

OA

ADuM6200

OB

TOP VIEW

(Not to Scale)

RC

12 NC

RC

11

10

9

V

SEL

NC

SEL

E2

GND

ISO

1

NC = NO CONNECT

Figure 6. ADuM6200 Pin Configuration

Table 21. ADuM6200 Pin Function Descriptions

Pin No.

Mnemonic Description

1

V_DD1

Primary Supply Voltage, 3.0 V to 5.5 V.

2, 8

GND₁

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other,

and it is recommended that both pins be connected to a common ground.

3

4

5

V_IA

V_IB

RC_IN

Logic Input A.

Logic Input B.

Regulation Control Input. This pin must be connected to the RC_OUTpin of a master isoPower device or tied low.

This pin must not be tied high if RC_SELis low; this combination causes excessive voltage on the secondary side

of the isolator, damaging the ADuM6200 and possibly the devices that it powers.

6

RC_SEL

Control Input. Determines self-regulation mode (RC_SELhigh) or slave mode (RC_SELlow), allowing external

regulation. This pin is weakly pulled to the high state. In noisy environments, tie this pin either high or low.

7, 12

9, 15

NC

GND_ISO

No Internal Connection.

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each

other, and it is recommended that both pins be connected to a common ground.

10

11

V_E2

Data Enable Input. When this pin is high or not connected, the secondary outputs are active; when this pin is

low, the outputs are in a high-Z state.

Output Voltage Selection. When V_SEL= V_ISO, the V_ISOsetpoint is 5.0 V. When V_SEL= GND_ISO, the V_ISOsetpoint is 3.3 V.

In slave regulation mode, this pin has no function.

V_SEL

13

14

16

V_OB

V_OA

V_ISO

Logic Output B.

Logic Output A.

Secondary Supply Voltage. Output for secondary side isolated data channels and external loads.

Rev. C | Page 11 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

V

1

2

3

4

5

6

7

8

16

V

ISO

DD1

GND

15 GND

1

ISO

V

14

13

V

IA

OA

ADuM6201

V

OB

IB

TOP VIEW

(Not to Scale)

RC

12 NC

IN

RC

11

10

9

V

SEL

V

E1

E2

GND

ISO

1

NC = NO CONNECT

Figure 7. ADuM6201 Pin Configuration

Table 22. ADuM6201 Pin Function Descriptions

Pin No.

Mnemonic Description

1

V_DD1

Primary Supply Voltage, 3.0 V to 5.5 V.

2, 8

GND₁

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other,

and it is recommended that both pins be connected to a common ground.

3

4

5

V_IA

V_OB

RC_IN

Logic Input A.

Logic Output B.

Regulation Control Input. This pin must be connected to the RC_OUTpin of a master isoPower device or tied low.

This pin must not be tied high if RC_SELis low; this combination causes excessive voltage on the secondary side

of the isolator, damaging the ADuM6201 and possibly the devices that it powers.

6

RC_SEL

V_E1

Control Input. Determines self-regulation mode (RC_SELhigh) or slave mode (RC_SELlow), allowing external

regulation. This pin is weakly pulled to the high state. In noisy environments, tie this pin either high or low.

Data Enable Input. When this pin is high or not connected, the primary output is active; when this pin is low,

the output is in a high-Z state.

7

9, 15

10

11

GND_ISO

V_E2

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each

other, and it is recommended that both pins be connected to a common ground.

Data Enable Input. When this pin is high or not connected, the secondary output is active; when this pin is low,

the output is in a high-Z state.

Output Voltage Selection. When V_SEL= V_ISO, the V_ISOsetpoint is 5.0 V. When V_SEL= GND_ISO, the V_ISOsetpoint is 3.3 V.

In slave regulation mode, this pin has no function.

V_SEL

12

13

14

16

NC

V_IB

V_OA

V_ISO

No Internal Connection.

Logic Input B.

Logic Output A.

Secondary Supply Voltage. Output for secondary side isolated data channels and external loads.

Rev. C | Page 12 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

V

1

2

3

4

5

6

7

8

16

V

ISO

DD1

GND

15 GND

1

OA

OB

ISO

V

14

13

V

IA

ADuM6202

IB

TOP VIEW

(Not to Scale)

RC

12 NC

11

10 NC

GND

IN

RC

V

SEL

V

E1

GND

9

1

ISO

NC = NO CONNECT

Figure 8. ADuM6202 Pin Configuration

Table 23. ADuM6202 Pin Function Descriptions

Pin No.

Mnemonic Description

1

V_DD1

Primary Supply Voltage, 3.0 V to 5.5 V.

2, 8

GND₁

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other,

and it is recommended that both pins be connected to a common ground.

3

4

5

V_OA

V_OB

RC_IN

Logic Output A.

Logic Output B.

Regulation Control Input. This pin must be connected to the RC_OUTpin of a master isoPower device or tied low.

This pin must not be tied high if RC_SELis low; this combination causes excessive voltage on the secondary side

of the isolator, damaging the ADuM6202 and possibly the devices that it powers.

6

RC_SEL

V_E1

Control Input. Determines self-regulation mode (RC_SELhigh) or slave mode (RC_SELlow), allowing external

regulation. This pin is weakly pulled to the high state. In noisy environments, tie this pin either high or low.

Data Enable Input. When this pin is high or not connected, the primary outputs are active; when this pin is low,

the outputs are in a high-Z state.

7

9, 15

GND_ISO

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each

other, and it is recommended that both pins be connected to a common ground.

10, 12

11

NC

V_SEL

No Internal Connection.

Output Voltage Selection. When V_SEL= V_ISO, the V_ISOsetpoint is 5.0 V. When V_SEL= GND_ISO, the V_ISOsetpoint is 3.3 V.

In slave regulation mode, this pin has no function.

13

14

16

V_IB

V_IA

V_ISO

Logic Input B.

Logic Input A.

Secondary Supply Voltage. Output for secondary side isolated data channels and external loads.

TRUTH TABLE

Table 24. Power Control Truth Table (Positive Logic)

RC_SEL

Input

RC_IN

Input

V_SEL

Input

V_DD1

V_ISO

Output

Input¹

Operation

High

Low

X

High

Low

High

X

5 V

3.3 V

X

5 V

3.3 V

5 V

X

Self-regulation mode, normal operation

This supply configuration is not recommended due to extremely poor efficiency

Part runs at maximum open-loop voltage; damage can occur

Power supply disabled

High

Low

RC_OUT(EXT)

X

X¹

0 V

X

Slave mode; RC_OUT(EXT)supplied by a master isoPower device

¹V_DD1must be common between all isoPower devices being regulated by a master isoPower part.

Rev. C | Page 13 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

35

30

25

20

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

POWER

15

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

10

I

DD1

5

0

20

40

I

60

80

100

120

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

CURRENT (mA)

INPUT SUPPLY VOLTAGE (V)

ISO

Figure 9. Typical Power Supply Efficiency

in All Supported Power Configurations

Figure 12. Typical Short-Circuit Input Current and Power

vs. V_DD1Supply Voltage

120

5.4

5.2

5.0

4.8

4.6

40

100

80

60

40

20

0

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

90% LOAD

20

10% LOAD

0.5

10% LOAD

0

50

100

I

150

200

250

300

0

1.0

1.5

2.0

2.5

3.0

3.5

4.0

CURRENT (mA)

TIME (ms)

DD1

Figure 13. Typical V_ISOTransient Load Response, 5 V Output,

10% to 90% Load Step

Figure 10. Typical Isolated Output Supply Current vs. Input Current

in All Supported Power Configurations

1200

1000

800

3.7

3.5

3.3

3.1

60

40

20

0

600

400

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

90% LOAD

200

0

10% LOAD

0.5

10% LOAD

0

20

40

I

60

80

100

120

0

1.0

1.5

2.0

2.5

3.0

3.5

4.0

CURRENT (mA)

ISO

TIME (ms)

Figure 11. Typical Total Power Dissipation vs. Isolated Output Supply

Current in All Supported Power Configurations

Figure 14. Typical V_ISOTransient Load Response, 3.3 V Output,

10% to 90% Load Step

Rev. C | Page 14 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

5.02

5.00

4.98

4.96

4.94

4.92

4.90

5.0

5

4

3

2

1

90% LOAD

10% LOAD

2.5

0

–1.0

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

–0.5

0

0.5

1.0

1.5

2.0

2.5

3.0

TIME (µs)

TIME (ms)

Figure 15. Typical Output Voltage Ripple at 90% Load, V_ISO= 5 V

Figure 18. Typical Output Voltage Start-Up Transient

at 10% and 90% Load, V_ISO= 3.3 V

3.34

3.32

3.30

3.28

3.26

20

16

12

8

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

3.24

4

2

0

5

10

15

20

25

0

0.5

1.0

1.5

2.0

TIME (µs)

2.5

3.0

3.5

4.0

DATA RATE (Mbps)

Figure 19. Typical I_CHnSupply Current per Forward Data Channel

(15 pF Output Load)

Figure 16. Typical Output Voltage Ripple at 90% Load, V_ISO= 3.3 V

7

6

5

4

3

20

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

16

12

8

2

90% LOAD

10% LOAD

4

1

0

–1.0

0

5

10

15

20

25

–0.5

0

0.5

1.0

1.5

2.0

2.5

3.0

DATA RATE (Mbps)

TIME (ms)

Figure 17. Typical Output Voltage Start-Up Transient

at 10% and 90% Load, V_ISO= 5 V

Figure 20. Typical I_CHnSupply Current per Reverse Data Channel

(15 pF Output Load)

Rev. C | Page 15 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

5

4

3

3.0

2.5

2.0

1.5

1.0

0.5

0

5V

2

3.3V

1

0

5

10

15

20

25

0

5

10

15

20

25

DATA RATE (Mbps)

Figure 21. Typical I_ISO(D)Dynamic Supply Current per Input

Figure 22. Typical I_ISO(D)Dynamic Supply Current per Output

(15 pF Output Load)

Rev. C | Page 16 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

TERMINOLOGY

I_DD1(Q)

t_PLHPropagation Delay

I

_DD1(Q)is the minimum operating current drawn at the V_DD1

The t_PLHpropagation delay is measured from the 50% level of

the rising edge of the V_Ixsignal to the 50% level of the rising

edge of the V_Oxsignal.

pin when there is no external load at V_ISOand the I/O pins are

operating below 2 Mbps, requiring no additional dynamic

supply current. I_DD1(Q)reflects the minimum current operating

condition.

Propagation Delay Skew (t_PSK

)

t_PSKis the magnitude of the worst-case difference in t_PHLand/

I_DD1(D)

or t_PLHthat is measured between units at the same operating

temperature, supply voltages, and output load within the

recommended operating conditions.

I_DD1(D)is the typical input supply current with all channels

simultaneously driven at a maximum data rate of 25 Mbps

with full capacitive load representing the maximum dynamic

load conditions. Resistive loads on the outputs should be

treated separately from the dynamic load.

Channel-to-Channel Matching (t_PSKCD/t_PSKOD

)

Channel-to-channel matching is the absolute value of the

difference in propagation delays between two channels when

operated with identical loads.

I_DD1(MAX)

I

_DD1(MAX)is the input current under full dynamic and V_ISOload

Minimum Pulse Width

The minimum pulse width is the shortest pulse width at which

the specified pulse width distortion is guaranteed.

conditions.

I_ISO(LOAD)

I_ISO(LOAD)is the current available to the load.

Maximum Data Rate

t_PHLPropagation Delay

The maximum data rate is the fastest data rate at which the

specified pulse width distortion is guaranteed.

The t_PHLpropagation delay is measured from the 50% level of

the falling edge of the V_Ixsignal to the 50% level of the falling

edge of the V_Oxsignal.

Rev. C | Page 17 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

APPLICATIONS INFORMATION

The dc-to-dc converter section of the ADuM620x works on

principles that are common to most switching power supplies. It

has a secondary side controller architecture with isolated pulse-

width modulation (PWM) feedback. V_DD1power is supplied to

an oscillating circuit that switches current into a chip scale air

core transformer. Power transferred to the secondary side is

rectified and regulated to either 3.3 V or 5 V. The secondary

(V_ISO) side controller regulates the output by creating a PWM

control signal that is sent to the primary (V_DD1) side by a dedicated

iCoupler data channel. The PWM modulates the oscillator

circuit to control the power being sent to the secondary side.

Feedback allows for significantly higher power and efficiency.

The total lead length between the ends of the low ESR capacitor

and the input power supply pin must not exceed 2 mm. Installing

the bypass capacitor with traces more than 2 mm in length may

result in data corruption. Consider bypassing between Pin 1

and Pin 8 and between Pin 9 and Pin 16 unless both common

ground pins are connected together close to the package.

BYPASS < 2mm

V

DD1

ISO

GND

1

ISO

V

/V

V

/V

IA OA

OA IA

/V

IB OB

/V

OB IB

RC

NC

IN

RC

V

SEL

/NC

E2

V

/NC

V

The ADuM620x implements undervoltage lockout (UVLO)

with hysteresis on the V_DD1power input. This feature ensures

that the converter does not enter oscillation due to noisy input

power or slow power-on ramp rates.

E1

GND

ISO

1

Figure 23. Recommended PCB Layout

In applications involving high common-mode transients, ensure

that board coupling across the isolation barrier is minimized.

Furthermore, design the board layout such that any coupling that

does occur affects all pins equally on a given component side.

Failure to ensure this can cause voltage differentials between

pins exceeding the absolute maximum ratings for the device

as specified in Table 19, thereby leading to latch-up and/or

permanent damage.

The ADuM620x can accept an external regulation control

signal (RC_IN) that can be connected to other isoPower devices.

This feature allows a single regulator to control multiple power

modules without contention. When accepting control from a

master power module, the V_ISOpins can be connected together,

adding their power. Because there is only one feedback control

path, the supplies work together seamlessly. The ADuM620x

can only regulate itself or accept regulation (slave device) from

another device in this product line; it cannot provide a

regulation signal to other devices.

The ADuM620x is a power device that dissipates approximately

1 W of power when fully loaded and running at maximum speed.

Because it is not possible to apply a heat sink to an isolation device,

the device primarily depends on heat dissipation into the PCB

through the GND pins. If the device is used at high ambient

temperatures, provide a thermal path from the GND pins to the

PCB ground plane. The board layout in Figure 23 shows enlarged

pads for Pin 8 (GND₁) and Pin 9 (GND_ISO). Multiple vias should

be implemented from the pad to the ground plane to significantly

reduce the temperature inside the chip. The dimensions of the

expanded pads are at the discretion of the designer and depend

on the available board space.

PCB LAYOUT

The ADuM620x digital isolators with 0.4 W isoPower integrated

dc-to-dc converter require no external interface circuitry for the

logic interfaces. Power supply bypassing is required at the input

and output supply pins (see Figure 23). Note that low ESR bypass

capacitors are required between Pin 1 and Pin 2 and between

Pin 15 and Pin 16, as close to the chip pads as possible.

The power supply section of the ADuM620x uses a 180 MHz

oscillator frequency to pass power efficiently through its chip

scale transformers. In addition, the normal operation of the data

section of the iCoupler introduces switching transients on the

power supply pins. Bypass capacitors are required for several

operating frequencies. Noise suppression requires a low induc-

tance, high frequency capacitor, whereas ripple suppression and

proper regulation require a large value capacitor. These capacitors

are most conveniently connected between Pin 1 and Pin 2 for

START-UP BEHAVIOR

The ADuM620x devices do not contain a soft start circuit.

Therefore, the start-up current and voltage behavior must be

taken into account when designing with this device.

When power is applied to V_DD1, the input switching circuit begins

to operate and draw current when the UVLO minimum voltage

is reached. The switching circuit drives the maximum available

power to the output until it reaches the regulation voltage where

PWM control begins. The amount of current and the time

required to reach regulation voltage depends on the load and

the V_DD1slew rate.

V

_DD1, and between Pin 15 and Pin 16 for V_ISO.

To suppress noise and reduce ripple, a parallel combination of

at least two capacitors is required. The recommended capacitor

values are 0.1 µF and 10 µF for V_DD1and V_ISO. The smaller

capacitor must have a low ESR; for example, use of a ceramic

capacitor is advised.

With a fast V_DD1slew rate (200 µs or less), the peak current draws

up to 100 mA/V of V_DD1. The input voltage goes high faster than

the output can turn on, so the peak current is proportional to

the maximum input voltage.

Rev. C | Page 18 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

With a slow V_DD1slew rate (in the millisecond range), the input

voltage is not changing quickly when V_DD1reaches the UVLO

minimum voltage. The current surge is approximately 300 mA

because V_DD1is nearly constant at the 2.7 V UVLO voltage. The

behavior during startup is similar to when the device load is a

short circuit; these values are consistent with the short-circuit

current shown in Figure 12.

DC CORRECTNESS AND MAGNETIC FIELD

IMMUNITY

Positive and negative logic transitions at the isolator input

cause narrow (~1 ns) pulses to be sent to the decoder via the

transformer. The decoder is bistable and is, therefore, either set

or reset by the pulses, indicating input logic transitions. In the

absence of logic transitions at the input for more than 1 µs, a

periodic set of refresh pulses indicative of the correct input state

is sent to ensure dc correctness at the output. If the decoder

receives no internal pulses for more than approximately 5 µs, the

input side is assumed to be unpowered or nonfunctional, and

the isolator output is forced to a default state by the watchdog

timer circuit.

When starting the device for V_ISO= 5 V operation, do not limit

the current available to the V_DD1power pin to less than 300 mA.

The ADuM620x devices may not be able to drive the output to

the regulation point if a current-limiting device clamps the V_DD1

voltage during startup. As a result, the ADuM620x devices can

draw large amounts of current at low voltage for extended

periods of time.

The limitation on the magnetic field immunity of the ADuM620x

is set by the condition in which induced voltage in the receiving

coil of the transformer is sufficiently large to either falsely set or

reset the decoder. The following analysis defines the conditions

under which this may occur. The 3.3 V operating condition of the

ADuM620x is examined because it represents the most suscep-

tible mode of operation.

The output voltage of the ADuM620x devices exhibits V_ISO

overshoot during startup. If this overshoot could potentially

damage components attached to V_ISO, a voltage-limiting device

such as a Zener diode can be used to clamp the voltage. Typical

behavior is shown in Figure 17 and Figure 18.

EMI CONSIDERATIONS

The pulses at the transformer output have an amplitude greater

than 1.0 V. The decoder has a sensing threshold at approximately

0.5 V, thus establishing a 0.5 V margin in which induced voltages

can be tolerated. The voltage induced across the receiving coil is

given by

The dc-to-dc converter section of the ADuM620x devices must

operate at 180 MHz to allow efficient power transfer through the

small transformers. This creates high frequency currents that can

propagate in circuit board ground and power planes, causing

edge emissions and dipole radiation between the primary and

secondary ground planes. Grounded enclosures are recommended

for applications that use these devices. If grounded enclosures

are not possible, follow good RF design practices in the layout

of the PCB. See the AN-0971 Application Note for board layout

recommendations.

2

V = (−dβ/dt) ∑ πr_n; n = 1, 2, … , N

where:

β is the magnetic flux density (gauss).

r_nis the radius of the n^thturn in the receiving coil (cm).

N is the total number of turns in the receiving coil.

PROPAGATION DELAY PARAMETERS

Given the geometry of the receiving coil in the ADuM620x and

an imposed requirement that the induced voltage be, at most,

50% of the 0.5 V margin at the decoder, a maximum allowable

magnetic field is calculated as shown in Figure 25.

100

Propagation delay is a parameter that describes the time it takes

a logic signal to propagate through a component. The propagation

delay to a logic low output may differ from the propagation

delay to a logic high output.

INPUT (V

)

50%

Ix

10

1

t_PLH

t_PHL

OUTPUT (V

)

50%

Ox

Figure 24. Propagation Delay Parameters

0.1

Pulse width distortion is the maximum difference between

these two propagation delay values and is an indication of how

accurately the timing of the input signal is preserved.

0.01

0.001

Channel-to-channel matching refers to the maximum amount

that the propagation delay differs between channels within a

single ADuM620x component.

1k

10k

100k

1M

10M

100M

MAGNETIC FIELD FREQUENCY (Hz)

Propagation delay skew refers to the maximum amount that

the propagation delay differs between multiple ADuM620x

components operating under the same conditions.

Figure 25. Maximum Allowable External Magnetic Flux Density

Rev. C | Page 19 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

For example, at a magnetic field frequency of 1 MHz, the

maximum allowable magnetic field of 0.2 kgauss induces a

voltage of 0.25 V at the receiving coil. This voltage is approxi-

mately 50% of the sensing threshold and does not cause a faulty

output transition. Similarly, if such an event occurs during a

transmitted pulse (and is of the worst-case polarity), it reduces

the received pulse from >1.0 V to 0.75 V—still well above the

0.5 V sensing threshold of the decoder.

I

ISO

DD1(Q)

CONVERTER

PRIMARY

CONVERTER

SECONDARY

I

DD1(D)

I

ISO(D)

DDP(D)

PRIMARY

DATA I/O

2-CHANNEL

SECONDARY

DATA I/O

2-CHANNEL

The preceding magnetic flux density values correspond to

specific current magnitudes at given distances from the

ADuM620x transformers. Figure 26 expresses these allowable

current magnitudes as a function of frequency for selected

distances. As shown in Figure 26, the ADuM620x is extremely

immune and can be affected only by extremely large currents

operated at high frequency very close to the component. For the

1 MHz example noted, a 0.5 kA current placed 5 mm away from

the ADuM620x is required to affect the operation of the device.

1000

Figure 27. Power Consumption Within the ADuM620x

Both dynamic input and output current is consumed only

when operating at channel speeds higher than the refresh

rate, f_r. Each channel has a dynamic current determined by

its data rate. Figure 19 shows the current for a channel in the

forward direction, which means that the input is on the primary

side of the part. Figure 20 shows the current for a channel in the

reverse direction, which means that the input is on the secondary

side of the part. Both figures assume a typical 15 pF load. The

following relationship allows the total I_DD1current to be calculated:

DISTANCE = 1m

I_DD1= (I_ISO× V_ISO)/(E × V_DD1) + ∑ I_CHn; n = 1 to 4

(1)

100

where:

I

_DD1is the total supply input current.

10

I_ISOis the current drawn by the secondary side external loads.

DISTANCE = 100mm

E is the power supply efficiency at the maximum load from

Figure 9 at the V_ISOand V_DD1condition of interest.

1

DISTANCE = 5mm

I_CHnis the current drawn by a single channel, determined from

0.1

Figure 19 or Figure 20, depending on channel direction.

Calculate the maximum external load by subtracting the

dynamic output load from the maximum allowable load.

0.01

1k

10k

100k

1M

10M

100M

I

_ISO(LOAD)= I_ISO(MAX)− ∑ I_ISO(D)n; n = 1 to 4

where:

_ISO(LOAD)is the current available to supply an external secondary

side load.

_ISO(MAX)is the maximum external secondary side load current

available at V_ISO

_ISO(D)nis the dynamic load current drawn from V_ISOby an input

(2)

MAGNETIC FIELD FREQUENCY (Hz)

Figure 26. Maximum Allowable Current

for Various Current-to-ADuM620x Spacings

I

Note that at combinations of strong magnetic field and high

frequency, any loops formed by PCB traces can induce error

voltages sufficiently large to trigger the thresholds of succeeding

circuitry. Exercise care in the layout of such traces to avoid this

possibility.

I

.

I

or output channel, as shown in Figure 19 and Figure 20 for a

typical 15 pF load.

POWER CONSUMPTION

This analysis assumes a 15 pF capacitive load on each data output.

If the capacitive load is larger than 15 pF, the additional current

The V_DD1power supply input provides power to the iCoupler data

channels as well as to the power converter. For this reason, the

quiescent currents drawn by the data converter and the primary

and secondary input/output channels cannot be determined

separately. All of these quiescent power demands are combined

into the I_DD1(Q)current shown in Figure 27. The total I_DD1supply

current is the sum of the quiescent operating current, the dynamic

current I_DD1(D)demanded by the I/O channels, and any external

must be included in the analysis of I_DD1and I_ISO(LOAD)

To determine I_DD1in Equation 1, additional primary side

dynamic output current (I_AOD) is added directly to I_DD1

.

Additional secondary side dynamic output current (I_AOD

is added to I_ISOon a per-channel basis.

)

I

_ISOload.

Rev. C | Page 20 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

To determine I_ISO(LOAD)in Equation 2, additional secondary

side output current (I_AOD) is subtracted from I_ISO(MAX)on a

per-channel basis.

During application of power to V_DD1, the primary side circuitry

is held idle until the UVLO preset voltage is reached. At that

time, the data channels initialize to their default low output

state until they receive data pulses from the secondary side.

For each output channel with C_Lgreater than 15 pF, the

additional capacitive supply current is given by

When the primary side is above the UVLO threshold, the data

input channels sample their inputs and begin sending encoded

pulses to the inactive secondary output channels. The outputs

on the primary side remain in their default low state because no

data comes from the secondary side inputs until secondary side

power is established. The primary side oscillator also begins to

operate, transferring power to the secondary power circuits.

I

_AOD= 0.5 × 10⁻³× ((C_L− 15) × V_ISO) × (2f − f_r); f > 0.5 f_r(3)

where:

C_Lis the output load capacitance (pF).

V_ISOis the output supply voltage (V).

f is the input logic signal frequency (MHz); it is half the input

data rate expressed in units of Mbps.

f_ris the input channel refresh rate (Mbps).

The secondary V_ISOvoltage is below its UVLO limit at this point;

the regulation control signal from the secondary side is not being

generated. The primary side power oscillator is allowed to free

run under these conditions, supplying the maximum amount of

power to the secondary side.

CURRENT-LIMIT AND THERMAL OVERLOAD

PROTECTION

The ADuM620x is protected against damage due to excessive

power dissipation by thermal overload protection circuits.

Thermal overload protection limits the junction temperature to

a maximum of 150°C (typical). Under extreme conditions (that

is, high ambient temperature and power dissipation), when the

junction temperature starts to rise above 150°C, the PWM is

turned off, turning off the output current. When the junction

temperature drops below 130°C (typical), the PWM turns on

again, restoring the output current to its nominal value.

As the secondary side voltage rises to its regulation setpoint,

a large inrush current transient is present at V_DD1. When the

regulation point is reached, the regulation control circuit pro-

duces the regulation control signal that modulates the oscillator

on the primary side. The V_DD1current is then reduced and is

proportional to the load current. The inrush current is less than

the short-circuit current shown in Figure 12. The duration of

the inrush current depends on the V_ISOloading conditions and

on the current and voltage available at the V_DD1pin.

Consider the case where a hard short from V_ISOto ground occurs.

At first, the ADuM620x reaches its maximum current, which is

proportional to the voltage applied at V_DD1. Power dissipates on

the primary side of the converter (see Figure 12). If self-heating

of the junction becomes great enough to cause its temperature

to rise above 150°C, thermal shutdown is activated, turning off

the PWM and turning off the output current. As the junction

temperature cools and drops below 130°C, the PWM turns on

and power dissipates again on the primary side of the converter,

causing the junction temperature to rise to 150°C again. This

thermal oscillation between 130°C and 150°C causes the part

to cycle on and off as long as the short remains at the output.

As the secondary side converter begins to accept power from the

primary, the V_ISOvoltage starts to rise. When the secondary side

UVLO is reached, the secondary side outputs are initialized to

their default low state until data is received from the correspond-

ing primary side input. It can take up to 1 µs after the secondary

side is initialized for the state of the output to correlate to the

primary side input.

Secondary side inputs sample their state and transmit it to the

primary side. Outputs are valid about 1 µs after the secondary

side becomes active.

Because the rate of charge of the secondary side power supply is

dependent on loading conditions, the input voltage, and the output

voltage level selected, take care that the design allows the con-

verter sufficient time to stabilize before valid data is required.

Thermal limit protections are intended to protect the device

against accidental overload conditions. For reliable operation,

externally limit device power dissipation to prevent junction

temperatures from exceeding 130°C.

When power is removed from V_DD1, the primary side converter

and coupler shut down when the UVLO level is reached. The

secondary side stops receiving power and starts to discharge.

POWER CONSIDERATIONS

The ADuM6200/ADuM6201/ADuM6202 power input, data

input channels on the primary side, and data input channels on

the secondary side are all protected from premature operation

by undervoltage lockout (UVLO) circuitry. Below the minimum

operating voltage, the power converter holds its oscillator inactive,

and all input channel drivers and refresh circuits are idle. Outputs

remain in a high impedance state to prevent transmission of

undefined states during power-up and power-down operations.

The outputs on the secondary side hold the last state that they

received from the primary side. Either the UVLO level is reached

and the outputs are placed in their high impedance state, or the

outputs detect a lack of activity from the primary side inputs

and the outputs are set to their default low value before the

secondary power reaches UVLO.

Rev. C | Page 21 of 28

ADuM6200/ADuM6201/ADuM6202

Data Sheet

When the ADuM620x acts as a slave, its power is regulated by a

PWM signal from a master device. This allows multiple isoPower

parts to be combined in parallel while sharing the load equally.

When the ADuM620x is configured as a standalone unit, it

generates its own PWM feedback signal to regulate itself.

THERMAL ANALYSIS

The ADuM620x devices consist of four internal silicon die

attached to a split lead frame with two die attach paddles. For

the purposes of thermal analysis, the device is treated as a thermal

unit with the highest junction temperature reflected in the θ_JA

value from Table 14. The value of θ_JAis based on measurements

taken with the part mounted on a JEDEC standard 4-layer board

with fine width traces and still air. Under normal operating

conditions, the ADuM620x operates at full load across the full

temperature range without derating the output current. How-

ever, following the recommendations in the PCB Layout section

decreases the thermal resistance to the PCB, allowing increased

thermal margin at high ambient temperatures.

The ADuM620x devices can function as slave or standalone

devices. All devices in the ADuM5xxx and ADuM6xxx family

can function as standalone devices. Some of these devices also

function as master devices or slave devices, but not both (see

Table 25).

Table 25. Function of isoPower Parts

Function

Part No.

Master

Yes

No

Yes

No

Slave

Yes

No

Yes

No

Standalone

INCREASING AVAILABLE POWER

ADuM6000

ADuM620x

ADuM640x

ADuM5000

ADuM520x

ADuM5400

Yes

The ADuM620x devices are designed to work in combination

with the ADuM6000 in a master/slave configuration. The RC_IN

and RC_SELpins allow the ADuM620x to receive a PWM signal

from an ADuM6000 through its RC_INpin and to act as a slave to

that control signal. The RC_SELpin chooses whether the part acts

as a standalone, self-regulated device or as a slave device.

No

Yes

ADuM5401 to

ADuM5404

No

Table 26 illustrates how isoPower devices can provide many

combinations of data channel count and multiples of the single-

unit power.

Table 26. Configurations for Power and Data Channels

Number of Data Channels

2 Channels

Power Units

0 Channels

4 Channels

1-Unit Power ADuM6000 or ADuM5000 (standalone) ADuM620x or ADuM520x (standalone) ADuM5401, ADuM5402, ADuM5403,

ADuM5404, or ADuM640x (standalone)

2-Unit Power ADuM6000 or ADuM5000 (master)

ADuM6000 or ADuM5000 (master)

ADuM620x or ADuM520x (slave)

ADuM5401, ADuM5402, ADuM5403,

ADuM5404 (master)

ADuM6000 or ADuM5000 (slave)

ADuM6000 or ADuM5000 (master)

ADuM620x or ADuM520x (slave)

3-Unit Power ADuM6000 or ADuM5000 (master)

ADuM6000 or ADuM5000 (slave)

ADuM6000 or ADuM5000 (master)

ADuM6000 or ADuM5000 (slave)

ADuM620x or ADuM520x (slave)

ADuM6000 or ADuM5000 (slave)

Rev. C | Page 22 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

In the case of unipolar ac or dc voltage, the stress on the insu-

lation is significantly lower. This allows operation at higher

working voltages while still achieving a 50-year service life.

The working voltages listed in Table 20 can be applied while

maintaining the 50-year minimum lifetime, provided that the

voltage conforms to either the unipolar ac or dc voltage cases.

INSULATION LIFETIME

All insulation structures eventually break down when subjected

to voltage stress over a sufficiently long period. The rate of insu-

lation degradation is dependent on the characteristics of the

voltage waveform applied across the insulation. In addition to

the testing performed by the regulatory agencies, Analog Devices

carries out an extensive set of evaluations to determine the life-

time of the insulation structure within the ADuM620x devices.

Any cross-insulation voltage waveform that does not conform

to Figure 29 or Figure 30 should be treated as a bipolar ac wave-

form and its peak voltage limited to the 50-year lifetime voltage

value listed in Table 20. The voltage presented in Figure 29 is

shown as sinusoidal for illustration purposes only. It is meant to

represent any voltage waveform varying between 0 V and some

limiting value. The limiting value can be positive or negative,

but the voltage cannot cross 0 V.

Analog Devices performs accelerated life testing using voltage

levels higher than the rated continuous working voltage. Accel-

eration factors for several operating conditions are determined.

These factors allow calculation of the time to failure at the actual

working voltage. The values shown in Table 20 summarize the

peak voltage for 50 years of service life for a bipolar ac operating

condition and the maximum CSA/VDE approved working vol-

tages. In many cases, the approved working voltage is higher than

the 50-year service life voltage. Operation at these high working

voltages can lead to shortened insulation life in some cases.

RATED PEAK VOLTAGE

0V

Figure 28. Bipolar AC Waveform

The insulation lifetime of the ADuM620x devices depends on

the voltage waveform type imposed across the isolation barrier.

The iCoupler insulation structure degrades at different rates

depending on whether the waveform is bipolar ac, unipolar ac,

or dc. Figure 28, Figure 29, and Figure 30 illustrate these

different isolation voltage waveforms.

RATED PEAK VOLTAGE

0V

Figure 29. Unipolar AC Waveform

Bipolar ac voltage is the most stringent environment. The goal

of a 50-year operating lifetime under the bipolar ac condition

determines the maximum working voltage recommended by

Analog Devices.

RATED PEAK VOLTAGE

0V

Figure 30. DC Waveform

Rev. C | Page 23 of 28

ADuM6200/ADuM6201/ADuM6202

OUTLINE DIMENSIONS

Data Sheet

10.50 (0.4134)

10.10 (0.3976)

16

1

9

8

7.60 (0.2992)

7.40 (0.2913)

10.65 (0.4193)

10.00 (0.3937)

0.75 (0.0295)

0.25 (0.0098)

1.27 (0.0500)

BSC

45°

2.65 (0.1043)

2.35 (0.0925)

0.30 (0.0118)

0.10 (0.0039)

8°

0°

COPLANARITY

0.10

SEATING

PLANE

0.51 (0.0201)

0.31 (0.0122)

1.27 (0.0500)

0.40 (0.0157)

0.33 (0.0130)

0.20 (0.0079)

COMPLIANT TO JEDEC STANDARDS MS-013-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 31. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body

(RW-16)

Dimensions shown in millimeters and (inches)

13.00 (0.5118)

12.60 (0.4961)

16

1

9

8

7.60 (0.2992)

7.40 (0.2913)

10.65 (0.4193)

10.00 (0.3937)

0.75 (0.0295)

0.25 (0.0098)

45°

2.65 (0.1043)

2.35 (0.0925)

0.30 (0.0118)

0.10 (0.0039)

8°

0°

COPLANARITY

0.10

SEATING

PLANE

1.27

(0.0500)

BSC

0.33 (0.0130)

0.20 (0.0079)

1.27 (0.0500)

0.40 (0.0157)

0.51 (0.0201)

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-013-AC

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 32. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]

Wide Body

(RI-16-1)

Dimensions shown in millimeters and (inches)

Rev. C | Page 24 of 28

Data Sheet

ADuM6200/ADuM6201/ADuM6202

ORDERING GUIDE

Number

Maximum Maximum

Maximum

Pulse Width

Delay, 5 V (ns) Distortion (ns) Range

of Inputs,

V_DD1Side

of Inputs, Data Rate Propagation

V_ISOSide

Temperature

Package

Description

Package

Option

Model^{1, 2}

(Mbps)

ADuM6200ARWZ

ADuM6200CRWZ

ADuM6200ARIZ

ADuM6200CRIZ

ADuM6201ARWZ

ADuM6201CRWZ

ADuM6201ARIZ

ADuM6201CRIZ

ADuM6202ARWZ

ADuM6202CRWZ

ADuM6202ARIZ

ADuM6202CRIZ

2

1

0

1

2

1

25

1

25

1

25

1

25

1

25

1

100

70

100

70

40

3

40

3

−40°C to +105°C 16-Lead SOIC_W RW-16

−40°C to +105°C 16-Lead SOIC_IC RI-16-1

−40°C to +105°C 16-Lead SOIC_W RW-16

−40°C to +105°C 16-Lead SOIC_IC RI-16-1

−40°C to +105°C 16-Lead SOIC_W RW-16

−40°C to +105°C 16-Lead SOIC_IC RI-16-1

100

70

100

70

40

3

40

3

100

70

100

70

40

3

40

3

25

¹Z = RoHS Compliant Part.

²Tape and reel are available. The additional -RL suffix designates a 13-inch (1,000 units) tape and reel option.

Rev. C | Page 25 of 28

ADuM6200/ADuM6201/ADuM6202

NOTES

Data Sheet

Rev. C | Page 26 of 28

Data Sheet

NOTES

ADuM6200/ADuM6201/ADuM6202

Rev. C | Page 27 of 28

ADuM6200/ADuM6201/ADuM6202

NOTES

Data Sheet

registered trademarks are the property of their respective owners.

D08775-0-6/12(C)

Rev. C | Page 28 of 28


型号：	ADUM6201CRIZ
厂家：	ADI
描述：	Dual-Channel, 5 kV Isolators with Integrated DC-to-DC Converter 双通道5kV的隔离带集成DC - DC转换器转换器驱动程序和接口接口集成电路光电二极管 PC
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ADUM6201CRIZ [ADI]

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