AN-358 [ADI]
Low Cost, Dual/Triple Video Amplifiers; 低成本，双通道/三通道视频放大器
| 型号： | AN-358 |
| 厂家： | 
ADI |
| 描述： | Low Cost, Dual/Triple Video Amplifiers |
| 文件： | 总13页 (文件大小：369K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, Dual/Triple
Video Amplifiers
a
AD8072/AD8073
FEATURES
PIN CONFIGURATIONS
Very Low Cost
8-Lead Plastic (N), SOIC (R), and SOIC (RM) Packages
Good Video Specifications (RL = 150 ⍀)
Gain Flatness of 0.1 dB to 10 MHz
0.05% Differential Gain Error
0.1؇ Differential Phase Error
Low Power
3.5 mA/Amplifier Supply Current
Operates on Single 5 V to 12 V Supply
High Speed
100 MHz, –3 dB Bandwidth (G = +2)
500 V/s Slew Rate
Fast Settling Time of 25 ns (0.1%)
Easy to Use
1
2
3
4
8
7
6
5
OUT1
–IN1
+IN1
+V
S
OUT2
–IN2
+IN2
–V
S
AD8072
TOP VIEW
(Not to Scale)
14-Lead Plastic (N), and SOIC (R) Packages
30 mA Output Current
Output Swing to 1.3 V of Rails on Single 5 V Supply
NC
NC
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT2
–IN2
+IN2
APPLICATIONS
Video Line Driver
Computer Video Plug-In Boards
RGB or S-Video Amplifier in Component Systems
AD8073
TOP VIEW
(Not to Scale)
+V
–V
S
S
+IN1
+IN3
–IN3
OUT3
–IN1
8
OUT1
PRODUCT DESCRIPTION
NC = NO CONNECT
The AD8072 (dual) and AD8073 (triple) are low cost, current
feedback amplifiers intended for high volume, cost sensitive
applications. In addition to being low cost, these amplifiers
deliver solid video performance into a 150 Ω load while consuming
only 3.5 mA per amplifier of supply current. Furthermore, the
AD8073 is three amplifiers in a single 14-lead narrow-body
SOIC package. This makes it ideal for applications where small
size is essential. Each amplifier’s inputs and output are acces-
sible providing added gain setting flexibility.
6.1
6.0
5.9
5.8
5.7
5.6
5.5
7
6
5
4
3
2
1
0
These devices provide 30 mA of output current per amplifier,
and are optimized for driving one back terminated video load
(150 Ω) each. These current feedback amplifiers feature gain
flatness of 0.1 dB to 10 MHz while offering differential gain and
phase error of 0.05% and 0.1°. This makes the AD8072 and
AD8073 ideal for business and consumer video electronics.
V
V
R
R
A
= ؎5V
= 2V p-p
S
1 dB
DIV
O
= R = 1k⍀
F
L
V
G
= 150⍀
= ؉2
0.1 dB
DIV
5.4
5.3
Both will operate from a single 5 V to 12 V power supply. The
outputs of each amplifier swing to within 1.3 volts of either sup-
ply rail to accommodate video signals on a single 5 V supply.
–1
0.1
1
10
100
500
FREQUENCY – MHz
The high bandwidth of 100 MHz, 500 V/µs of slew rate, along
with settling to 0.1% in 25 ns, make the AD8072 and AD8073
useful in many general purpose, high speed applications where a
single 5 V or dual power supplies up to 6 V are needed. The
AD8072 is available in 8-lead plastic DIP, SOIC, and µSOIC
packages while the AD8073 is available in 14-lead plastic DIP and
SOIC packages. Both operate over the commercial temperature
range of 0°C to 70°C. Additionally, the AD8072ARM operates
over the industrial temperature range of –40°C to +85°C.
Figure 1. Large Signal Frequency Response
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
IMPORTANT LINKS for the AD8072_8073*
Last content update 08/21/2013 05:55 pm
PARAMETRIC SELECTION TABLES
DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE
Analog Filter Wizard 2.0
Find Similar Products By Operating Parameters
High Speed Amplifiers Selection Table
AD8072JN SPICE Macro-Model
DOCUMENTATION
DESIGN COLLABORATION COMMUNITY
AN-692: Universal Precision Op Amp Evaluation Board
AN-649: Using the Analog Devices Active Filter Design Tool
MT-051: Current Feedback Op Amp Noise Considerations
Collaborate Online with the ADI support team and other designers
about select ADI products.
MT-059: Compensating for the Effects of Input Capacitance on VFB
and CFB Op Amps Used in Current-to-Voltage Converters
Follow us on Twitter: www.twitter.com/ADI_News
Like us on Facebook: www.facebook.com/AnalogDevicesInc
A Stress-Free Method for Choosing High-Speed Op Amps
Current Feedback Amplifiers Part 1: Ask The Applications Engineer-22
Current Feedback Amplifiers Part 2: Ask The Applications Engineer-23
Two-Stage Current-Feedback Amplifier
DESIGN SUPPORT
FOR THE AD8072
Submit your support request here:
Linear and Data Converters
AN-357: Operational Integrators
Embedded Processing and DSP
AN-358: Noise and Operational Amplifier Circuits
UG-129: Evaluation Board User Guide
Telephone our Customer Interaction Centers toll free:
Americas:
Europe:
China:
1-800-262-5643
00800-266-822-82
4006-100-006
1800-419-0108
8-800-555-45-90
UG-128: Universal Evaluation Board for Dual High Speed Op Amps in
SOIC Packages
FOR THE AD8073
India:
Russia:
MT-057: High Speed Current Feedback Op Amps
MT-034: Current Feedback (CFB) Op Amps
Quality and Reliability
Lead(Pb)-Free Data
UG-114: Universal Evaluation Board for Triple, High Speed Op Amps
Offered in 14-Lead SOIC Packages
Analog Devices in Advanced TV
Advantiv™ Advanced Television Solutions
SAMPLE & BUY
AD8072
AD8073
EVALUATION KITS & SYMBOLS & FOOTPRINTS
View Price & Packaging
View the Evaluation Boards and Kits page for the AD8072
Request Evaluation Board
Request Samples
View the Evaluation Boards and Kits page for the AD8073
Symbols and Footprints for the AD8072
Check Inventory & Purchase
Find Local Distributors
Symbols and Footprints for the AD8073
* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet.
Note: Dynamic changes to the content on this page (labeled 'Important Links') does not
constitute a change to the revision number of the product data sheet.
This content may be frequently modified.
AD8072/AD8073–SPECIFICATIONS
(@ T = 25؇C, V = ؎5 V, R = 150 ⍀, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
A
S
L
AD8072/AD8073
Typ
Parameter
Conditions
Min
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth, Small Signal
0.1 dB Bandwidth, Small Signal
Slew Rate
RF = 1 kΩ
No Peaking, G = +2
No Peaking, G = +2
VO = 4 V Step
80
8
100
10
500
MHz
MHz
V/µs
ns
Settling Time to 0.1%
VO = 2 V Step
25
DISTORTION/NOISE PERFORMANCE RF = 1 kΩ
Differential Gain
Differential Phase
Crosstalk
f = 3.58 MHz, G = +2
0.05
0.1
60
3
0.15
0.3
%
Degrees
dB
nV/√Hz
pA/√Hz
f = 3.58 MHz, G = +2
f = 5 MHz
Input Voltage Noise
Input Current Noise
f = 10 kHz
f = 10 kHz ( IIN)
6
DC PERFORMANCE
Transimpedance
Input Offset Voltage
0.3
2
MΩ
mV
mV
6
8
TMIN to TMAX
Offset Drift
Input Bias Current ( )
Input Bias Current Drift ( )
11
4
12
µV/°C
12
µA
nA/°C
INPUT CHARACTERISTICS
–Input Resistance
+Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
Input Common-Mode Voltage Range
120
1
1.6
56
Ω
MΩ
pF
dB
V
VCM = –3.8 V to +3.8 V
3.8
OUTPUT CHARACTERISTICS
+Output Voltage Swing
–Output Voltage Swing
Output Current
3
2.25
3.3
3
30
V
V
mA
mA
RL = 10 Ω
Short Circuit Current
80
POWER SUPPLY
Operating Range
Power Supply Rejection Ratio
Quiescent Current per Amplifier
2.5 to
70
3.5
6
V
dB
mA
VS = 4 V to 6 V
5
OPERATING TEMPERATURE RANGE
0
70
°C
Specifications subject to change without notice.
–2–
REV. D
AD8072/AD8073
(@ T = 25؇C, V = 5 V, R = 150 ⍀ to 2.5 V, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
A
S
L
AD8072/AD8073
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth, Small Signal
0.1 dB Bandwidth, Small Signal
Slew Rate
RF = 1 kΩ
No Peaking, G = +2
No Peaking, G = +2
VO = 2 V Step
78
7.8
100
10
350
25
MHz
MHz
V/µs
ns
Settling Time to 0.1%
VO = 2 V Step
DISTORTION/NOISE PERFORMANCE RF = 1 kΩ
Differential Gain
Differential Phase
Crosstalk
Input Voltage Noise
Input Current Noise
f = 3.58 MHz, G = +2, RL to 1.5 V
f = 3.58 MHz, G = +2, RL to 1.5 V
f = 5 MHz
0.1
0.1
60
3
%
Degrees
dB
nV/√Hz
pA/√Hz
f = 10 kHz
f = 10 kHz ( IIN)
6
DC PERFORMANCE
Transimpedance
Input Offset Voltage
0.25
1.5
MΩ
mV
4
TMIN to TMAX
6
mV
Offset Drift
Input Bias Current ( )
Input Bias Current Drift ( )
9
3
10
µV/°C
10
µA
nA/°C
INPUT CHARACTERISTICS
–Input Resistance
+Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
Input Common-Mode Voltage Range
120
1
1.6
54
Ω
MΩ
pF
dB
V
VCM = 1.2 V to 3.8 V
1.2 to 3.8
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Voltage Swing
Output Current
RL = 150 Ω
RL = 1 kΩ TMIN to TMAX
RL = 10 Ω
1.5 to 3.5
1.3 to 3.7
1.3 to 3.7
1.1 to 3.9
20
V
V
mA
mA
Short Circuit Current
60
POWER SUPPLY
Operating Range
Power Supply Rejection Ratio
Quiescent Current per Amplifier
2.5 to
64
3
6
V
dB
mA
VS = 4 V to 6 V
4.5
70
OPERATING TEMPERATURE RANGE
0
°C
Specifications subject to change without notice.
–3–
REV. D
AD8072/AD8073
ABSOLUTE MAXIMUM RATINGS1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.2 V
The maximum power that can be safely dissipated by the AD8072
and AD8073 is limited by the associated rise in junction tem-
perature. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition tem-
perature of the plastic, approximately 150°C. Exceeding this
limit temporarily may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
Internal Power Dissipation2
AD8072 8-Lead Plastic (N) . . . . . . . . . . . . . . . . . . 1.3 Watts
AD8072 8-Lead Small Outline (SO-8) . . . . . . . . . 0.9 Watts
AD8072 8-Lead µSOIC (RM) . . . . . . . . . . . . . . . . 0.6 Watts
AD8073 14-Lead Plastic (N) . . . . . . . . . . . . . . . . . 1.6 Watts
AD8073 14-Lead Small Outline (R) . . . . . . . . . . . 1.0 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . 1.25 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range
While the AD8072 and AD8073 are internally short circuit pro-
tected, this may not be sufficient to guarantee that the maximum
junction temperature (150°C) is not exceeded under all condi-
tions. To ensure proper operation, it is necessary to observe the
maximum power derating curves shown in Figures 2 and 3.
N, R, RM Packages . . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
2.0
8-LEAD MINI-DIP PACKAGE
T
= 150؇C
J
1.5
8-Lead Plastic Package: θJA = 90°C/W
8-LEAD SOIC PACKAGE
8-Lead SOIC Package: θJA = 140°C/W
1.0
0.5
0
8-Lead µSOIC Package: θJA = 214°C/W
14-Lead Plastic Package: θJA = 75°C/W
14-Lead SOIC Package: θJA = 120°C/W
SOIC
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE –
؇C
*AD8072ARM
–40°C to +85°C 8-Lead µSOIC
RM-8
*AD8072ARM-REEL –40°C to +85°C 13" Reel 8-Lead µSOIC RM-8
*AD8072ARM-REEL7 –40°C to +85°C 7" Reel 8-Lead µSOIC RM-8
Figure 2. AD8072 Maximum Power Dissipation vs.
Temperature
AD8072JN
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
8-Lead Plastic DIP
8-Lead SOIC
13" Reel 8-Lead SOIC SO-8
7" Reel 8-Lead SOIC SO-8
N-8
AD8072JR
SO-8
2.5
AD8072JR-REEL
AD8072JR-REEL7
AD8073JN
AD8073JR
AD8073JR-REEL
AD8073JR-REEL7
T
= 150؇C
J
14-Lead Plastic DIP
N-14
2.0
14-Lead Narrow SOIC R-14
13" Reel 14-Lead SOIC R-14
7" Reel 14-Lead SOIC R-14
14-LEAD DIP PACKAGE
1.5
1.0
0.5
*Brand Code: HLA
14-LEAD SOIC
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE –
؇C
Figure 3. AD8073 Maximum Power Dissipation vs.
Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8072/AD8073 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. D
Typical Performance Characteristics– AD8072/AD8073
7
6
5
4
3
2
1
6.1
6.0
5.9
5.8
0؇C, 25؇C
V
= ؎5V
70؇C
5.7
5.6
5.5
S
R
R
A
= 1k⍀
F
L
V
= 5V
= 1k⍀
= 150⍀ TO 2.5V
= 2
S
= 150⍀
= 2
= 100mV p-p
R
R
A
F
L
V
0؇C
V
IN
V
V
= 100mV p-p
IN
70؇C
0
5.4
5.3
25؇C
0.1
0.1
1.0
10
FREQUENCY – MHz
100
1000
0.1
1.0
10
FREQUENCY – MHz
100
500
TPC 1. Frequency Response Over Temperature; VS = 5 V
TPC 4. 0.1 dB Flatness vs. Frequency Over Temperature;
VS = 5 V
MIN = 0.00
0.00 0.03 0.07 0.08 0.08 0.08 0.09 0.08 0.08 0.07 0.06
= 5V, R = 1k⍀, R = 150⍀ TO 1.5V, A = 2
MAX = 0.09
p-p/MAX = 0.09
7
6
5
4
3
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
V
S
F
L
V
MIN = 0.00
MAX = 0.10
p-p = 0.10
V
= ؎5V
= 1k⍀
= 150⍀
= 2
= 100mV p-p
0.00 0.05 0.09 0.10 0.09 0.08 0.06 0.06 0.05 0.04 0.02
S
0؇C
2
1
R
R
A
F
L
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
V
= 5V, R = 1k⍀, R = 150⍀ TO 1.5V, A = 2
S
F
L
V
70؇C
V
25؇C
V
IN
0
0.1
0.1
6TH
1.0
10
FREQUENCY – MHz
100
1000
1ST
2ND
3RD
4TH
5TH
7TH
8TH
9TH 10TH 11TH
MODULATING RAMP LEVEL – IRE
TPC 2. Frequency Response Over Temperature; VS = 5 V
TPC 5. Differential Gain and Phase, VS = 5 V
MIN = –0.03
MAX = 0.00
p-p/MAX = 0.03
6.1
6.0
5.9
5.8
0.00 0.00 0.00 –0.00 0.00 –0.01 –0.01 –0.02 –0.03 –0.03 –0.03
0.00
–0.01
–0.02
V
= ؎5V
= 1k⍀
= 150⍀
= 2
S
R
R
A
F
L
V
–0.03
5.7
5.6
5.5
V
= 5V
= 1k⍀
= 150⍀ TO 2.5V
= 2
= 100mV p-p
S
MIN = –0.10
MAX = 0.00
p-p = 0.10
R
R
A
F
L
0.00 0.00 –0.00 –0.02 –0.03 –0.05 –0.07 –0.08 –0.10 –0.10 –0.10
0.02
0.00
V
0؇C, 25؇C
V
IN
–0.02
–0.04
–0.06
–0.08
–0.10
–0.12
V
= ؎5V
= 1k⍀
= 150⍀
= 2
S
70؇C
R
R
A
F
L
V
5.4
5.3
6TH
1ST
2ND
3RD
4TH
5TH
7TH
8TH
9TH 10TH 11TH
0.1
1.0
10
100
500
MODULATING RAMP LEVEL – IRE
FREQUENCY – MHz
TPC 3. 0.1 dB Flatness vs. Frequency Over Temperature;
VS = 5 V
TPC 6. Differential Gain and Phase, VS = 5 V
–5–
REV. D
AD8072/AD8073
0
0
1M
100k
10k
AMP 2 OUTPUT
–10
–20
SOIC PACKAGE
DRIVE AMP 2
RECEIVE AMPS 1, 3 AD8073
RECEIVE AMP 1 AD8072
OHMS (⍀)
–20
–30
–40
–50
–60
–40
–60
V
R
A
= 5V, ؎5V
S
F
V
DEGREES
= 1k⍀, R = 150⍀
L
= 2
–80
V
= 1V p-p
IN
–100
–120
–140
–160
–180
1k
–70
–80
100
–90
10
–100
1k
10k
100k
1M
10M
100M
1G
0.1
1.0
10
FREQUENCY – MHz
100
500
FREQUENCY – Hz
TPC 7. Crosstalk vs. Frequency
TPC 10. Open-Loop Transimpedance vs. Frequency
–40
3
2
V
= ؎5V
= 1k⍀
= 150⍀
= 2
S
R
R
A
F
L
V
–50
–60
–70
–80
A
= 1
V
1
0
V
= 2V p-p
OUT
3RD
HARMONIC
–1
–2
–3
V
= ؎5V
= 1k⍀
= 150⍀
S
A
= 2
V
A
= 10
V
R
R
2ND
HARMONIC
F
L
V
= 200mV p-p
OUT
–4
–5
–6
–90
A
= 5
V
–100
0.1
1
10
0.1
1
10
100
1k
FREQUENCY – MHz
FREQUENCY – MHz
TPC 8. Distortion vs. Frequency; VS = 5 V
TPC 11. Normalized Frequency Response; VS = 5 V
–40
–50
6.1
6.0
5.9
5.8
5.7
5.6
5.5
7
6
5
4
3
2
1
0
V
= 5V
= 1k⍀
= 150⍀ TO 2.5V
= 2
S
R
R
A
F
3RD
L
HARMONIC
V
V
= 2V p-p
OUT
–60
–70
–80
V
V
= 5V
= 2V p-p
S
1 dB
DIV
O
2ND
R
R
A
= R = 1k⍀
F
L
V
G
HARMONIC
0.1 dB
DIV
= 150⍀ TO 2.5V
= 2
–90
5.4
5.3
–100
–1
500
0.1
1
10
0.1
1
10
100
FREQUENCY – MHz
FREQUENCY – MHz
TPC 12. Large Signal Frequency Response
TPC 9. Distortion vs. Frequency; VS = 5 V
–6–
REV. D
AD8072/AD8073
100
80
V
= ؎5V
= 1k⍀
= 2
S
100
R
A
F
V
60
10
1
40
20
0
0.1
0.1
1
10
100
1k
10k
100k
1
10
100
500
FREQUENCY – Hz
FREQUENCY – MHz
TPC 13. Output Resistance vs. Frequency; VS = 5 V
TPC 15. Noise vs. Frequency; VS = 5 V
50
40
30
20
10
0
V
= ؎5V
= 1k⍀
= 150⍀
= 2
S
R
R
A
F
L
V
–10
–20
–30
–40
–50
–PSRR
100mV p-p ON TOP
OF V
S
؉PSRR
10
0
–60
–70
1
10
100
1k
10k
100k
0.1
1
10
100
500
0.02
FREQUENCY – Hz
FREQUENCY – MHz
TPC 14. Noise vs. Frequency; VS = 5 V
TPC 16. PSRR vs. Frequency
–5
1k⍀
1k⍀
V
IN
–10
–15
–20
–25
–30
–35
–40
–45
–50
2V p-p
V
154⍀
OUT
60.4⍀
150⍀
154⍀
–55
0.02
0.1
1
10
100
500
FREQUENCY – MHz
TPC 17. CMRR vs. Frequency; VS = 5 V
–7–
REV. D
AD8072/AD8073
1k⍀
1k⍀
V
OUT
R
L
150⍀
V
IN
؉V
S
+
50⍀
0.1F
0.1F
0.001F
0.001F
10F
10F
+
–V
S
TPC 18. Test Circuit; Gain = +2
20ns
250mV
250mV
10ns
TPC 19. 2 V Step Response; G = +2, VS = 5 V
TPC 22. 2 V Step Response; G = +2, VS = 2.5 V*
50mV
50mV
20ns
20ns
TPC 20. 200 mV Step Response; G = +2, VS = 5 V
TPC 23. 200 mV Step Response; G = +2, VS = 2.5 V*
1V
250mV
20ns
20ns
TPC 21. Sine Response; G = +2, VS = 5 V
TPC 24. Sine Response; G = +2, VS = 2.5 V*
*
VS = 2.5 V operation is identical to VS = 5 V single supply operation.
–8–
REV. D
AD8072/AD8073
APPLICATIONS
Overdrive Recovery
On the other hand, the bandwidth of a current feedback ampli-
fier can be decreased by increasing the feedback resistance. This
can sometimes be useful where it is desired to reduce the noise
bandwidth of a system. As a practical matter, the maximum
value of feedback resistor was found to be 2 kΩ. Figure 5 shows
the frequency response of an AD8072/AD8073 at a gain of two
with both feedback and gain resistors equal to 2 kΩ.
Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this overdrive
condition and resume normal operation. As shown in Figure 4,
the AD8072 and AD8073 recover within 75 ns from positive
overdrive and 30 ns from negative overdrive.
Capacitive Load Drive
When an op amp output drives a capacitive load, extra phase shift
due to the pole formed by the op amp’s output impedance and
the capacitor can cause peaking or even oscillation. The top trace
of Figure 6, RS = 0 Ω, shows the output of one of the amplifiers of
the AD8072/AD8073 when driving a 50 pF capacitor as shown in
the schematic of Figure 7.
V
IN
V
OUT
The amount of peaking can be significantly reduced by adding
a resistor in series with the capacitor. The lower trace of Figure 6
shows the same capacitor being driven with a 25 Ω resistor
in series with it. In general, the resistor value will have to be
experimentally determined, but 10 Ω to 50 Ω is a practical range
of values to experiment with for capacitive loads of up to a few
hundred pF.
1V
25ns
Figure 4. Overload Recovery; VS = 5 V, VIN = 8 V p-p,
RF = 1 kΩ, RL = 150 Ω, G = +2
R
= 0Ω
S
Bandwidth vs. Feedback Resistor Value
R
= 25Ω
S
The closed-loop frequency response of a current feedback amplifier
is a function of the feedback resistor. A smaller feedback resistor
will produce a wider bandwidth response. However, if the feed-
back resistance becomes too small, the gain flatness can be
affected. As a practical consideration, the minimum value of
feedback resistance for the AD8072/AD8073 was found to be
649 Ω. For resistances below this value, the gain flatness will be
affected and more significant lot-to-lot variations in device per-
formance will be noticed. Figure 5 shows a plot of the frequency
response of an AD8072/AD8073 at a gain of two with both feed-
back and gain resistors equal to 649 Ω.
50mV
20ns
Figure 6. Capacitive Low Drive
6.1
6.0
5.9
5.8
5.7
7
1k⍀
1k⍀
6
R
S
5
4
3
2
R
= 649⍀
F
V
= 100mV p-p
C
R
L
1k⍀
IN
L
50pF
50⍀
0.1 dB
DIV
V
A
R
= ؎5V
= 2
= 150⍀
= 0.2V p-p
S
Figure 7. Capacitive Load Drive Circuit
V
L
5.6
5.5
5.4
1 dB
DIV
V
O
1
0
R
= 2k⍀
F
0.1
1
10
FREQUENCY – MHz
100
500
Figure 5. Frequency Response vs. RF
–9–
REV. D
AD8072/AD8073
Crosstalk
Layout Considerations
Crosstalk between internal amplifiers may vary depending on
which amplifier is being driven and how many amplifiers are
being driven. This variation typically stems from pin location on
the package and the internal layout of the IC itself. Table I
illustrates the typical crosstalk results for a combination of
conditions.
The specified high speed performance of the AD8072 and
AD8073 require careful attention to board layout and compo-
nent selection. Proper RF design techniques and low parasitic
component selection are mandatory.
The PCB should have a ground plane covering all unused portions
of the component side of the board to provide a low impedance
ground path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Table I. AD8073JR Crosstalk Table (dB)
Chip capacitors should be used for supply bypassing. One end
of the capacitor should be connected to the ground plane and
the other within 1/8 inches of each power pin. An additional
large (4.7 µF–10 µF) tantalum electrolytic capacitor should be
connected in parallel, but not necessarily as close to the supply
pins, to provide current for fast large-signal changes at the
device’s output.
Receive Amplifier
AD8073JR
1
2
3
1
X
–60
–56
2
–60
–54
–53
X
–60
X
Drive
Amplifier
3
–60
–55
All Hostile
–54
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the invert-
ing input will affect high speed performance.
CONDITIONS
VS = 5 V
RF = 1 kΩ, RL = 150 Ω
Stripline design techniques should be used for long signal traces
(greater than approximately 1 inch). These should be designed
with a characteristic impedance of 50 Ω or 75 Ω and be properly
terminated at each end.
AV = 2
V
OUT = 2 V p-p on Drive Amplifier
–10–
REV. D
AD8072/AD8073
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
14-Lead Plastic DIP
(N-14)
0.430 (10.92)
0.348 (8.84)
0.795 (20.19)
0.725 (18.42)
8
5
14
1
8
0.280 (7.11)
0.240 (6.10)
0.280 (7.11)
0.240 (6.10)
7
0.325 (8.25)
0.300 (7.62)
1
4
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.060 (1.52)
0.015 (0.38)
PIN 1
0.060 (1.52)
0.015 (0.38)
PIN 1
0.210 (5.33)
MAX
0.195 (4.95)
0.115 (2.93)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.100 0.070 (1.77)
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
(2.54)
BSC
0.045 (1.15)
8-Lead Plastic SOIC
(R-8)
14-Lead SOIC
(R-14)
0.1968 (5.00)
0.1890 (4.80)
0.3444 (8.75)
0.3367 (8.55)
8
1
5
4
14
8
7
0.1574 (4.00)
0.1497 (3.80)
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
0.2440 (6.20)
0.2284 (5.80)
1
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0196 (0.50)
0.0099 (0.25)
0.0196 (0.50)
0.0099 (0.25)
x 45°
x 45°
0.0098 (0.25)
0.0040 (0.10)
0.0098 (0.25)
0.0040 (0.10)
8°
0°
8°
0°
0.0500
(1.27)
BSC
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
8-Lead SOIC
(RM-8)
0.122 (3.10)
0.114 (2.90)
8
5
4
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
1
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
33؇
0.018 (0.46)
0.008 (0.20)
27؇
0.028 (0.71)
0.016 (0.41)
0.011 (0.28)
0.003 (0.08)
SEATING
PLANE
–11–
REV. D
AD8072/AD8073
Revision History
Location
Page
3/02—Data Sheet changed from REV. C to REV. D.
Edits to Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
10/01—Data Sheet changed from REV. B to REV. C.
Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
–12–
REV. D
相关型号：
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