EL2020 [ADI]

Improved Second Source to the EL2020; 改进的第二信号源的EL2020
EL2020
型号: EL2020
厂家: ADI    ADI
描述:

Improved Second Source to the EL2020
改进的第二信号源的EL2020

文件: 总12页 (文件大小:346K)
中文:  中文翻译
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Improved Second Source  
to the EL2020  
a
ADEL2020  
CONNECTION DIAGRAMS  
FEATURES  
Ideal for Video Applications  
0.02% Differential Gain  
8-Pin Plastic Mini-DIP (N) 20-Pin Small Outline Package  
0.04؇ Differential Phase  
0.1 dB Bandwidth to 25 MHz (G = +2)  
High Speed  
90 MHz Bandwidth (–3 dB)  
500 V/s Slew Rate  
60 ns Settling Time to 0.1% (VO = 10 V Step)  
Low Noise  
2.9 nV/Hz Input Voltage Noise  
Low Power  
6.8 mA Supply Current  
2.1 mA Supply Current (Power-Down Mode)  
High Performance Disable Function  
Turn-Off Time of 100 ns  
1
2
3
4
5
6
20  
19  
BAL  
–IN  
+IN  
V–  
DISABLE  
V+  
1
2
3
4
8
7
6
5
NC  
NC  
BAL  
DISABLE  
NC  
–IN  
18 NC  
OUTPUT  
BAL  
17  
ADEL2020  
TOP VIEW  
V+  
16  
NC  
+IN  
NC  
15 OUTPUT  
14  
NC  
V–  
7
8
NC  
13 BAL  
ADEL2020  
9
12  
NC  
NC  
NC  
TOP VIEW  
10  
11  
NC  
NC = NO CONNECT  
Input to Output Isolation of 54 dB (Off State)  
PRODUCT DESCRIPTION  
than the competition while offering higher output drive. Impor-  
tant specs like voltage noise and offset voltage are less than half  
of those for the EL2020.  
The ADEL2020 is an improved second source to the EL2020.  
This op amp improves on all the key dynamic specifications  
while offering lower power and lower cost. The ADEL2020 of-  
fers 50% more bandwidth and gain flatness of 0.1 dB to beyond  
25 MHz. In addition, differential gain and phase are less than  
0.05% and 0.05° while driving one back terminated cable (150).  
The ADEL2020 also features an improved disable feature. The  
disable time (to high output impedance) is 100 ns with guaran-  
teed break before make. Finally the ADEL2020 is offered in the  
industrial temperature range of –40°C to +85°C in both plastic  
DIP and SOIC package.  
The ADEL2020 offers other significant improvements. The  
most important of these is lower power supply current, 33% less  
0.20  
0.18  
0.16  
0.14  
0.12  
0.10  
0.10  
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
+0.1  
= 150  
R
L
GAIN = +2  
±15V  
±5V  
0
R
R
f
= 750  
F
L
= 150  
= 3.58MHz  
–0.1  
C
100 IRE  
MODULATED RAMP  
+0.1  
0
GAIN  
0.08  
0.06  
0.04  
PHASE  
R = 1k  
L
±15V  
±5V  
–0.1  
0.02  
0
5
6
7
8
9
10  
11  
12  
13  
14  
15  
100k  
1M  
10M  
FREQUENCY – Hz  
100M  
SUPPLY VOLTAGE – ± Volts  
Fine-Scale Gain (Normalized) vs. Frequency for Various  
Differential Gain and Phase vs. Supply Voltage  
Supply Voltages. RF = 750 , Gain = +2  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  
(@ T = +25؇C and V = ؎15 V dc, R = 150 unless otherwise noted)  
ADEL2020–SPECIFICATIONS  
A
S
L
ADEL2020A  
Typ  
Parameter  
Conditions  
Temperature  
Min  
Max  
Units  
INPUT OFFSET VOLTAGE  
1.5  
2.0  
7
7.5  
10.0  
mV  
mV  
µV/°C  
T
MIN–TMAX  
Offset Voltage Drift  
COMMON-MODE REJECTION  
VCM = ±10 V  
VOS  
TMIN–TMAX  
TMIN–TMAX  
50  
65  
64  
0.1  
dB  
µA/V  
±Input Current  
1.0  
0.5  
POWER SUPPLY REJECTION  
VOS  
±Input Current  
VS = ±4.5 V to ±18 V  
TMIN–TMAX  
TMIN–TMAX  
72  
0.05  
dB  
µA/V  
INPUT BIAS CURRENT  
–Input  
+Input  
T
MIN–TMAX  
0.5  
1
7.5  
15  
µA  
µA  
TMIN–TMAX  
INPUT CHARACTERISTICS  
+Input Resistance  
–Input Resistance  
1
1
10  
40  
2
MΩ  
pF  
+Input Capacitance  
OPEN-LOOP TRANSRESISTANCE  
OPEN-LOOP DC VOLTAGE GAIN  
VO = ±10 V  
RL = 400 Ω  
TMIN–TMAX  
3.5  
MΩ  
RL = 400 , VOUT = ±10 V TMIN–TMAX  
RL = 100 , VOUT = ±2.5 V TMIN–TMAX  
80  
76  
100  
88  
dB  
dB  
OUTPUT VOLTAGE SWING  
Short-Circuit Current  
Output Current  
RL = 400 Ω  
TMIN–TMAX  
TMIN–TMAX  
±12.0  
±13.0  
150  
60  
V
mA  
mA  
30  
POWER SUPPLY  
Operating Range  
Quiescent Current  
Power-Down Current  
Disable Pin Current  
Min Disable Pin Current to Disable  
±3.0  
±18  
10.0  
3.0  
V
T
T
T
MIN–TMAX  
MIN–TMAX  
MIN–TMAX  
6.8  
2.1  
290  
30  
mA  
mA  
µA  
µA  
Disable Pin = 0 V  
400  
TMIN–TMAX  
DYNAMIC PERFORMANCE  
3 dB Bandwidth  
G = +1; RFB = 820  
G = +2; RFB = 750  
G = +10; RFB = 680  
G = +2; RFB = 750  
VO = 20 V p-p,  
90  
70  
30  
25  
MHz  
MHz  
MHz  
MHz  
0.1 dB Bandwidth  
Full Power Bandwidth  
RL = 400 Ω  
8
500  
60  
0.02  
0.04  
MHz  
V/µs  
ns  
%
Degree  
Slew Rate  
RL = 400 , G = +1  
10 V Step, G = –1  
f = 3.58 MHz  
Settling Time to 0.1%  
Differential Gain  
Differential Phase  
f = 3.58 MHz  
INPUT VOLTAGE NOISE  
INPUT CURRENT NOISE  
f = 1 kHz  
2.9  
nV/Hz  
–IIN, f = 1 kHz  
+IIN, f = 1 kHz  
13  
1.5  
pA/Hz  
pAHz  
OUTPUT RESISTANCE  
Open Loop (5 MHz)  
15  
Specifications subject to change without notice.  
–2–  
REV. A  
ADEL2020  
ABSOLUTE MAXIMUM RATINGS1  
MAXIMUM POWER DISSIPATION  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V  
Internal Power Dissipation2 . . . . . . . Observe Derating Curves  
Output Short Circuit Duration . . . . Observe Derating Curves  
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±VS  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V  
Storage Temperature Range  
Plastic DIP and SOIC . . . . . . . . . . . . . . . –65°C to +125°C  
Operating Temperature Range . . . . . . . . . . –40°C to +85°C  
Lead Temperature Range (Soldering 60 sec) . . . . . . +300°C  
The maximum power that can be safely dissipated by the  
ADEL2020 is limited by the associated rise in junction tem-  
perature. For the plastic packages, the maximum safe junction  
temperature is 145°C. If the maximum is exceeded momen-  
tarily, proper circuit operation will be restored as soon as the  
die temperature is reduced. Leaving the device in the “over-  
heated” condition for an extended period can result in device  
burnout. To ensure proper operation, it is important to observe  
the derating curves below.  
While the ADEL2020 is internally short circuit protected, this  
may not be sufficient to guarantee that the maximum junction  
temperature is not exceeded under all conditions.  
NOTES  
1Stresses above those listed under “Absolute Maximum Ratings” may cause  
permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in the  
operational section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
28-Pin Plastic Package: θJA = 90°C/Watt  
2.4  
2.2  
2.0  
20-Pin SOIC Package: θJA = 150°C/Watt  
20-PIN SOIC  
1.8  
ESD SUSCEPTIBILITY  
ESD (electrostatic discharge) sensitive device. Electrostatic  
charges as high as 4000 volts, which readily accumulate on the  
human body and on test equipment, can discharge without  
detection. Although the ADEL2020 features ESD protection  
circuitry, permanent damage may still occur on these devices if  
they are subjected to high energy electrostatic discharges.  
Therefore, proper ESD precautions are recommended to avoid  
any performance degradation or loss of functionality.  
1.6  
1.4  
8-PIN  
MINI-DIP  
1.2  
1.0  
0.8  
0.6  
0.4  
–40  
0
–20  
20  
40  
60  
80  
100  
+V  
S
AMBIENT TEMPERATURE –  
°C  
0.1µF  
Maximum Power Dissipation vs. Temperature  
10kΩ  
7
1
2
5
6
ADEL2020  
3
4
0.1µF  
–V  
S
Offset Null Configuration  
ORDERING GUIDE  
Temperature  
Package  
Description  
Package  
Option  
Model  
Range  
ADEL2020AN  
ADEL2020AR-20  
ADEL2020AR-20-REEL  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
8-Pin Plastic DIP  
20-Pin Plastic SOIC  
20-Pin Plastic SOIC  
N-8  
R-20  
R-20  
REV. A  
–3–  
ADEL2020  
1kΩ  
+VS  
0.1µF  
7
2
3
ADEL2020  
6
VO  
VIN  
RL  
0.1µF  
4
RT  
–VS  
Figure 1. Connection Diagram for AVCL = +1  
GAIN = +1  
0
0
GAIN = +1  
= 150  
R
L
R
= 1k Ω  
L
–45  
–90  
–45  
–90  
PHASE  
PHASE  
V
= ±15V  
S
–135  
–180  
–225  
–270  
1
0
1
0
V = ±15V  
S
–135  
–180  
±5V  
±5V  
–225  
–270  
–1  
–2  
–3  
–1  
GAIN  
GAIN  
V
= ±15V  
V
= ±15V  
S
S
–2  
–3  
–4  
±5V  
±5V  
–4  
–5  
–5  
1
10  
100  
FREQUENCY – MHz  
1000  
10  
100  
FREQUENCY – MHz  
1000  
1
Figure 2. Closed-Loop Gain and Phase vs. Frequency,  
Figure 3. Closed-Loop Gain and Phase vs. Frequency,  
G = + 1, RL = 150 , RF = 1 kfor ±15 V, 910 for ±5 V  
G = +1, RL = 1 k, RF = 1 kfor ±15 V, 910 for ±5 V  
110  
G = +1  
100  
90  
80  
70  
60  
50  
40  
30  
20  
R
= 150Ω  
L
PEAKING 1dB  
V
= 250mV p-p  
O
= 750  
R
R
F
PEAKING 0.1dB  
= 1k  
F
R
= 1.5k  
F
2
4
6
8
10  
12  
14  
16  
18  
SUPPLY VOLTAGE – ±Volts  
Figure 4. –3 dB Bandwidth vs. Supply Voltage,  
Gain = +1, RL = 150 Ω  
–4–  
REV. A  
ADEL2020  
681Ω  
+VS  
0.1µF  
681Ω  
7
VIN  
2
3
6
VO  
ADEL2020  
RL  
4
0.1µF  
–VS  
Figure 5. Connection Diagram for AVCL = –1  
180  
GAIN = –1  
= 1kΩ  
180  
GAIN = –1  
= 150Ω  
R
135  
90  
L
135  
90  
R
PHASE  
L
PHASE  
V
= ±15V  
S
1
0
V
= ±15V  
45  
0
S
1
0
45  
0
±5V  
±5V  
–45  
–1  
–2  
–3  
–45  
–1  
GAIN  
GAIN  
V
= ±15V  
V
= ±15V  
S
–2  
–3  
–4  
–5  
S
±5V  
–4  
–5  
±5V  
1
10  
100  
1000  
1
10  
100  
FREQUENCY – MHz  
1000  
FREQUENCY – MHz  
Figure 7. Closed-Loop Gain and Phase vs. Frequency,  
G = –1, RL = 1 k, RF = 680 for VS = ±15 V, 620 Ω  
for ±5 V  
Figure 6. Closed-Loop Gain and Phase vs. Frequency,  
G = –1, RL = 150 , RF = 680 for ±15 V, 620 for  
±5 V  
G = –1  
100  
R
= 150  
L
90  
80  
70  
60  
50  
40  
30  
20  
V
= 250mV p-p  
O
PEAKING 1.0dB  
R
F
= 499Ω  
PEAKING 0.1dB  
R
= 681Ω  
F
= 1k  
R
F
2
4
6
8
10  
12  
14  
16  
18  
SUPPLY VOLTAGE – ± Volts  
Figure 8. –3 dB Bandwidth vs. Supply Voltage,  
Gain = –1, RL = 150 Ω  
REV. A  
–5–  
ADEL2020  
750Ω  
+VS  
0.1µF  
750Ω  
7
2
3
6
VO  
ADEL2020  
VIN  
RL  
4
0.1µF  
RT  
–VS  
Figure 9. Connection Diagram for AVCL = +2  
0
0
GAIN = +2  
= 1k Ω  
GAIN = +2  
= 150Ω  
R
L
–45  
–90  
–45  
–90  
R
L
PHASE  
PHASE  
–135  
–180  
–225  
–270  
7
6
5
7
6
5
–135  
–180  
V
= ±15V  
V
= ±15V  
S
S
±5V  
±5V  
–225  
–270  
GAIN  
GAIN  
4
3
2
4
3
2
V
= ±15V  
±5V  
V
= ±15V  
±5V  
S
S
1
1
1
10  
100  
FREQUENCY – MHz  
1000  
1
10  
100  
FREQUENCY – MHz  
1000  
Figure 11. Closed-Loop Gain and Phase vs. Frequency,  
G = +2, RL = 1 k, RF = 750 for ±15 V, 715 for ±5 V  
Figure 10. Closed-Loop Gain and Phase vs. Frequency,  
G = +2, RL = 150 , RF = 750 for ±15 V, 715 for ±5 V  
110  
G = +2  
100  
= 150  
R
V
L
PEAKING 1.0dB  
= 250mV p-p  
O
90  
80  
70  
60  
50  
40  
30  
20  
R
= 500Ω  
F
PEAKING 0.1dB  
R
= 750Ω  
= 1kΩ  
F
R
F
2
4
6
8
10  
12  
14  
16  
18  
SUPPLY VOLTAGE – ±Volts  
Figure 12. –3 dB Bandwidth vs. Supply Voltage,  
Gain = +2, RL = 150 Ω  
–6–  
REV. A  
ADEL2020  
270Ω  
+VS  
0.1µF  
30Ω  
7
2
3
VO  
6
ADEL2020  
VIN  
RL  
4
0.1µF  
RT  
–VS  
Figure 13. Connection Diagram for AVCL = +10  
0
GAIN = +10  
0
GAIN = +10  
R
R
= 270  
= 150  
R
R
= 270  
F
L
F
L
–45  
–45  
–90  
= 1k Ω  
PHASE  
PHASE  
–90  
21  
20  
19  
–135  
–180  
–225  
–270  
21  
20  
19  
–135  
–180  
V
= ±15V  
±5V  
S
V
= ±15V  
S
–225  
–270  
GAIN  
±5V  
GAIN  
18  
17  
16  
V
= ±15V  
±5V  
18  
17  
16  
V
= ±15V  
±5V  
S
S
15  
15  
1
10  
100  
FREQUENCY – MHz  
1000  
1
10  
100  
FREQUENCY – MHz  
1000  
Figure 15. Closed-Loop Gain and Phase vs. Frequency,  
G = +10, RL = 1 kΩ  
Figure 14. Closed-Loop Gain and Phase vs. Frequency,  
G = +10, RL = 150 kΩ  
100  
G = +10  
R
V
= 150  
L
90  
80  
70  
60  
50  
40  
30  
20  
= 250mV p-p  
O
PEAKING  
0.5dB  
R
R
= 232Ω  
F
PEAKING 0.1dB  
= 442  
F
R
= 1k  
8
F
2
4
6
10  
12  
14  
16  
18  
SUPPLY VOLTAGE – ±Volts  
Figure 16. –3 dB Bandwidth vs. Supply Voltage,  
Gain = +10, RL = 150 Ω  
REV. A  
–7–  
ADEL2020  
10.0  
1.0  
30  
25  
20  
V
= ±15V  
S
GAIN = 2  
= 715  
R
F
V
= ±5V  
S
OUTPUT LEVEL FOR 3% THD  
15  
10  
5
V
= ±15V  
S
0.1  
V
= ±5V  
S
0.01  
0
100k  
100k  
1M  
FREQUENCY – Hz  
10M  
100M  
10k  
1M  
10M  
100M  
FREQUENCY – Hz  
Figure 20. Closed-Loop Output Resistance vs. Frequency  
Figure 17. Maximum Undistorted Output Voltage vs.  
Frequency  
10  
9
80  
R
A
= 715  
= +2  
F
V
70  
60  
50  
40  
30  
20  
10  
V
S
= ±15V  
= ±5V  
V
= ±15V  
S
8
7
6
5
4
V
= ±5V  
S
V
S
CURVES ARE FOR WORST CASE  
CONDITION WHERE ONE SUPPLY  
IS VARIED WHILE THE OTHER IS  
HELD CONSTANT  
–60 –40 –20  
10k  
100k  
1M  
0
20  
40  
60  
80  
100 120 140  
10M  
100M  
JUNCTION TEMPERATURE –  
°
C
FREQUENCY – Hz  
Figure 21. Supply Current vs. Junction Temperature  
Figure 18. Power Supply Rejection vs. Frequency  
1200  
100  
10  
1
100  
10  
1
V
= ±5V TO ±15V  
S
= 400  
R
L
1000  
800  
600  
400  
200  
GAIN = –10  
INVERTING INPUT  
CURRENT  
GAIN = +10  
VOLTAGE NOISE  
GAIN = +2  
NONINVERTING  
INPUT CURRENT  
10k  
4
2
6
8
10  
12  
14  
16  
18  
100  
100k  
1k  
FREQUENCY – Hz  
10  
SUPPLY VOLTAGE – ±Volts  
Figure 22. Slew Rate vs. Supply Voltage  
Figure 19. Input Voltage and Current Noise vs. Frequency  
–8–  
REV. A  
ADEL2020  
GENERAL DESIGN CONSIDERATIONS  
In cases where the amplifier is driving a high impedance load,  
the input to output isolation will decrease significantly if the in-  
put signal is greater than about 1.2 V peak to peak. The isola-  
tion can be restored to the 50 dB level by adding a dummy load  
(say 150 ) at the amplifier output. This will attenuate the  
feedthrough signal. (This is not an issue for multiplexer applica-  
tions where the outputs of multiple ADEL2020s are tied to-  
gether as long as at least one channel is in the ON state.) The  
input impedance of the disable pin is about 35 kin parallel  
with a few pF. When grounded, about 50 µA flows out of the  
disable pin for ±5 V supplies.  
The ADEL2020 is a current feedback amplifier optimized for  
use in high performance video and data acquisition systems.  
Since it uses a current feedback architecture, its closed-loop  
bandwidth depends on the value of the feedback resistor. The  
–3 dB bandwidth is also somewhat dependent on the power  
supply voltage. Lowering the supplies increases the values of in-  
ternal capacitances, reducing the bandwidth. To compensate for  
this, smaller values of feedback resistor are used at lower supply  
voltages.  
POWER SUPPLY BYPASSING  
Break before make operation is guaranteed by design. If driven  
by standard CMOS logic, the disable time (until the output is  
high impedance), is about 100 ns and the enable time (to low  
impedance output) is about 160 ns. Since it has an internal pull-  
up resistor of about 35 k, the ADEL2020 can be used with  
open drain logic as well. In this case, the enable time is in-  
creased to about 1 µs.  
Adequate power supply bypassing can be critical when optimiz-  
ing the performance of a high frequency circuit. Inductance in  
the power supply leads can contribute to resonant circuits that  
produce peaking in the amplifier’s response. In addition, if large  
current transients must be delivered to the load, then bypass ca-  
pacitors (typically greater than 1 µF) will be required to provide  
the best settling time and lowest distortion. Although the rec-  
ommended 0.1 µF power supply bypass capacitors will be suffi-  
cient in most applications, more elaborate bypassing (such as  
using two paralleled capacitors) may be required in some cases.  
If there is a nonzero voltage present on the amplifier’s output  
at the time it is switched to the disabled state, some additional  
decay time will be required for the output voltage to relax to  
zero. The total time for the output to go to zero will generally  
be about 250 ns and is somewhat dependent on the load  
impedance.  
CAPACITIVE LOADS  
When used with the appropriate feedback resistor, the ADEL2020  
can drive capacitive loads exceeding 1000 pF directly without  
oscillation. Another method of compensating for large load ca-  
pacitance is to insert a resistor in series with the loop output. In  
most cases, less than 50 is all that is needed to achieve an  
extremely flat gain response.  
OFFSET NULLING  
A 10 kpot connected between Pins 1 and 5, with its wiper  
connected to V+, can be used to trim out the inverting input  
current (with about ±20 µA of range). For closed-loop gains  
above about 5, this may not be sufficient to trim the output off-  
set voltage to zero. Tie the pot’s wiper to ground through a  
large value resistor (50 kfor ±5 V supplies, 150 kfor ±15 V  
supplies) to trim the output to zero at high closed-loop gains.  
OPERATION AS A VIDEO LINE DRIVER  
The ADEL2020 is designed to offer outstanding performance at  
closed-loop gains of one or greater. At a gain of 2, theADEL2020  
makes an excellent video line driver. The low differential gain  
and phase errors and wide –0.1 dB bandwidth are nearly inde-  
pendent of supply voltage and load. For applications requiring  
widest 0.1 dB bandwidth, it is recommended to use 715 feed-  
back and gain resistors. This will result in about 0.05 dB of  
peaking and a –0.1 dB bandwidth of 30 MHz on ±15 V supplies.  
DISABLE MODE  
By pulling the voltage on Pin 8 to common (0 V), the ADEL2020  
can be put into a disabled state. In this condition, the supply  
current drops to less than 2.8 mA, the output becomes a high  
impedance, and there is a high level of isolation from input to  
output. In the case of a line driver for example, the output im-  
pedance will be about the same as for a 1.5 kresistor (the  
feedback plus gain resistors) in parallel with a 13 pF capacitor  
(due to the output) and the input to output isolation will be bet-  
ter than 50 dB at 10 MHz.  
Leaving the disable pin disconnected (floating) will leave the  
part in the enabled state.  
REV. A  
–9–  
ADEL2020  
OPERATIONAL AMPLIFIERS  
HIGH SPEED  
Slew Rate 100 V/µs  
LOW POWER (I  
< 10 mA)  
BUFFERS  
HIGH SLEW RATE ( 1000 V/µs)  
SUPPLY  
AD9630  
BUF-03  
AD810  
ADEL2020  
AD811  
High Slew Rate  
AD844  
( 1000 V/µs)  
AD9617  
AD9618  
OP160  
Ultralow  
Distortion  
AD810  
AD844  
OP160  
OP260 (Dual)  
OP260 (Dual)  
AD9620  
General Purpose  
SPECIFIED 0.01% SETTLING  
FET INPUT  
AD849  
AD817  
AD818  
AD847  
AD848  
AD811  
AD817  
AD818  
AD840  
AD841  
AD842  
AD843  
AD827 (Dual)  
OP467 (Quad)  
ADEL2020  
AD845  
OP44  
AD845  
AD846  
AD847  
OP467 (Quad)  
Fast  
Precision  
AD846  
AD843  
DIFFERENCE AMPLIFIER  
AD830  
LOW NOISE  
(< 10 nV/Hz)  
Low Voltage Noise  
AD810  
AD811  
AD829  
AD810  
AD844  
AD829  
OP64  
DISABLE FEATURE  
OP64  
OP467 (Quad)  
OP467 (Quad)  
AD810  
OP64  
VIDEO  
OP160  
FET Input  
OP44  
ADEL2020  
AD810  
AD811  
AD817  
AD818  
AD829  
AD830  
OP160  
ADEL2020  
–10–  
REV. A  
ADEL2020  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
Plastic Mini-DIP (N) Package  
8
5
4
0.25  
(6.35)  
0.31  
(7.87)  
PIN 1  
1
0.30 (7.62)  
REF  
0.39 (9.91) MAX  
0.035 ±0.01  
(0.89 ±0.25)  
0.165 ±0.01  
(4.19 ±0.25)  
0.011 ±0.003  
(0.28 ±0.08)  
0.18 ±0.03  
(4.57 ±0.76)  
0.125  
(3.18)  
MIN  
15°  
0°  
0.018 ±0.003 0.10  
0.033  
(0.84)  
NOM  
SEATING  
PLANE  
(0.46 ±0.08)  
(2.54)  
BSC  
20-Lead Wide Body SOIC (R) Package  
20  
11  
0.300 (7.60)  
0.292 (7.40)  
0.419 (10.65)  
0.394 (10.00)  
PIN 1  
1
10  
0.512 (13.00)  
0.020 (0.51) x 45  
°
0.496 (12.60)  
CHAMF  
0.104 (2.64)  
0.093 (2.36)  
8
°
°
0.011 (0.28)  
0.004 (0.10)  
0
0.050 (1.27)  
0.016 (0.40)  
0.019 (0.48)  
0.014 (0.36)  
0.450 (11.43)  
0.010  
(0.254)  
0.050 (1.27)  
BSC  
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.  
REV. A  
–11–  

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