EVAL-AD7472CB [ADI]
Evaluation Board for 12-bit high speed, low power, successive-approximation ADC; 评估板用于12位高速，低功耗，逐次逼近型ADC
| 型号： | EVAL-AD7472CB |
| 厂家： | 
ADI |
| 描述： | Evaluation Board for 12-bit high speed, low power, successive-approximation ADC |
| 文件： | 总14页 (文件大小：653K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EvaluationBoardfor12-bithighspeed,
lowpower,successive-approximationADC
a
EVAL-AD7472CB
FEATURES
O P E RAT ING T H E AD 7472 E VALUAT IO N BO ARD
P ower Supplies
Full-Featured Evaluation Board for the AD7472
EVAL-CONTROL BOARD Com patible
HSC-INTERFACE BOARD Com patible
Stand Alone Capability
When using this evaluation board with the EVAL-C ON -
T ROL BOARD all supplies are provided from the EVAL-
CONT ROL BOARD through the 96 way connector.
On-Board Analog Buffering and Reference
Optional On-Board Analog Bias-Up Circuit
Optional On-Board Burst Clock Generator Circuit
Various Linking Options
PC Softw are for Control and Data Analysis w hen used
w ith EVAL-CONTROL BOARD
When using the board as a stand alone unit or with the HSC-
INT ERFACE BOARD, external supplies must be provided.
T his evaluation board has five power supply inputs: VDD
,
A
GND, VSS, VDRIVE and DGND. +5 V must be connected to the
VDD input to supply the AVDD and DVDD pins on the AD7472,
the AD780 voltage reference, the positive supply pin of all
three op-amps and the digital control logic. 0 V is connected
to the AGND input. -5 V must be connected to the VSS input to
supply the negative supply pins on all three op-amps. T he
VDRIVE input can be used to provide an external voltage for the
output drivers on the AD 7472. If an external VD RIVE is
supplied, it is referenced to the DGND input which should be
tied to 0 V. T he supplies are decoupled to the relevant ground
plane with 47µF tantalum and 0.1µF multilayer ceramic
capacitors at the point where they enter the board. T he supply
pins of the op-amps and reference are also decoupled to AGND
with a 10µF tantalum and a 0.1µF ceramic capacitor. T he
AD7472 AVDD supply pin is decoupled to AGND with 10uF
tantalum and 0.1µF multilayer ceramic capacitors. T he
AD7472 DVDD and VDRIVE pins are decoupled to AGND with
10uF tantalum capacitors and to DGND with 0.1µF multilayer
ceramic capacitors.
I N T R O D U C T I O N
T his T echnical Note describes the evaluation board for the
AD7472 12-bit, high speed, low power, successive approxi-
mation A/D converter that operates from a single 2.7 V to
5.25 V supply. Full data on the AD7472 is available in the
AD 7472 data sheet available from Analog D evices and
should be consulted in conjunction with this T echnical Note
when using the Evaluation Board.
On-board components include an AD 780 which is a pin
programmable +2.5 V or +3 V ultra high precision bandgap
reference, two AD 797 op-amps used to buffer the analog
input, and an OP07 op-amp used to buffer the DC bias
voltage applied to the optional analog input bias-up circuit.
T here are various link options which are explained in detail
on page 2.
Interfacing to this board is through a 96-way connector. T his
96-way connector is compatible with the EVAL-CONT ROL
BO ARD which is also available from Analog D evices.
External sockets are provided for the CONVST input,
CLKIN input and the VIN inputs.
Extensive ground planes are used on this board to minimize
the effect of high frequency noise interference. T here are two
ground planes, AGND and DGND
location close to the AD7472.
. T hese are connected at one
FUNCTIONAL BLOCK DIAGRAM
40 pin HSC interface
Unipolar
Ain
AD7472 ADC
Buffer
Vin
Data Bus
Bipolar
Ain
Bias-up
buffer
Control Lines
Reference
Refin
Clock
Generator
Circuits
Power Supply Circuit
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
EVAL-AD7472CB
An a log In pu t Section
T he analog input section of this evaluation board accommodates unipolar and bipolar signals. Unipolar signals within the
AD7472 analog input signal range of 0 V - 2.5 V are connected via SK5. T hey are then buffered by the on-board buffer before
being applied to the VIN pin of the AD7472. Bipolar signals are connected via SK3 and are biased up by the on-board bias-
up buffer circuit before being applied to the VIN pin of the AD7472. T he input impedence of the bias-up circuit is 50W which
is determined by the value of R7. T he input impedence may be modified by removing/changing the value of R7. T o obtain
optimum performance from this evaluation board the use of an impedence matched, passive filter is recommended before the
analog signal is applied to the evaluation board. For example, when using a 100KHz input tone, a 100KHz 50W filter from
T T E (part number KC5-100K-15K-50/50-720B) is suitable.
R8 P oten tiom eter (50Koh m )
T his variable resistor is used to trim the DC bias voltage applied to the optional analog input bias-up circuit. T his bias voltage
is factory preset to 1.25 V which biases a bipolar signal to swing around the midpoint of the analog input range (0 - 2.5 V).
If any adjustment is required, the user can use the histogram window in the eval-board software to analyze the DC voltage
variation while adjusting the trim pot. T o view this properly, an analog input signal should not be applied to the board. Under
normal operation this pot should not be adjusted as it is preset for optimum performance.
LINK AND SWIT C H O P T IO NS
T here are 11 link options which must be set for the required operating setup before using the evaluation board. T he functions
of these options are outlined below.
Lin k No.
F u n c t ion .
LK 1
T his link is used to select the DC bias voltage to be applied to the optional Vin bias-up circuit.
If the user is using the bias-up circuit, this link must be inserted which will apply the 2.7 V reference voltage
to the bias-up circuit. T his causes a bipolar signal (applied to the bipolar vin input socket) to be biased up
around +1.25 V before it is applied to the AD7472 VIN pin. - see also LK10 (below)
If the bias up circuit is not being used this link should be removed.
LK 2
LK 3
T his link must be in position "A" if external power supplies are being used. In this position the control logic
is being powered by the voltage applied to the VDD input.
When power is being supplied from the EVAL-CONT ROL BOARD, this link can be moved to position "B"
if the user wants to drive the control logic from a separate +5 V which is generated on the EVAL-CONT ROL
BO AR D .
T his link option selects the source of the CLKIN input.
When this link is in position "A" the CLKIN input is provided by the EVAL-CONT ROL BOARD.
When this link is in position "B" the CLKIN input is provided via the on-board 25MHz oscillator.
When this link is in position "C", an external CLKIN signal must be provided via SK1.
When using the on-board generated burst clock, this link must be in position "D".
LK 4
LK 5
T his link option selects the source of the CONVST input.
When this link is in position "A" the CONVST input is provided by the EVAL-CONT ROL BOARD.
When this link is in position "B" the CONVST input is provided via the external socket, SK2.
T his link option selects the source of the RD input.
When this link is in position "A" the RD input is provided by the EVAL-CONT ROL BOARD.
When this link is in position "B" the RD input is tied to GND. T his option must be selected while using the
H igh Speed Converter Interface Board.
LK 6
T his link option selects the source of the CS input.
When this link is in position "A" the CS input is provided by the EVAL-CONT ROL BOARD.
When this link is in position "B" the CS input is tied to GND. T his option must be selected while using the
H igh Speed Converter Interface Board.
LK 7
LK 8
LK 9
LK10
T his link option sets the voltage applied to the VDRIVE pin on the AD7472.
When this link is in position "A", VDRIVE is connected directly to the DVDD pin.
When this link is in position "B", an external voltage must be applied to the VDRIVE pin Via J3.
T his link selects the source of the VDD supply.
When this link is in position "A" VDD must be supplied from an external source via J2.
When this link is in position "B" VDD is supplied from the EVAL-CONT ROL BOARD.
T his link selects the source of the VSS supply.
When this link is in position "A" VSS must be supplied from an external source via J2.
When this link is in position "B" VSS is supplied from the EVAL-CONT ROL BOARD.
T his link must be in position "A" if a bipolar AIN signal is being applied to the bipolar Vin socket, SK3.
T his link must be in position "B" if a unipolar AIN signal is being applied to the unipolar Vin socket, SK5
Continued on next page
–2 –
REV. A
EVAL-AD7472CB
LK11
T his link is used to provide a clock signal path to the burst mode circuit generator from either the on-board
clock oscillator or from an extermnal clock source via SK1.
In position "A" the master clock signal is provided from the on-board crystal oscillator.
In position "B" the master clock signal must be provided from an external source via SK1.
S E T - U P C O ND IT IO NS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. T able I shows the position in which all the links are set when the evaluation board is sent out. All
links are set for use with the EVAL-CONT ROL BOARD.
Table I. Initial Link and Switch P ositions
Link No.
P osition
Function.
LK 1
Inserted
Provides DC bias voltage to the analog bias-up circuit.
LK 2
LK 3
LK 4
LK 5
LK 6
LK 7
LK 8
LK 9
LK10
LK11
A
A
A
A
A
A
B
B
A
A
T he digital logic circuitry is powered from the same voltage as the AD7472.
CLKIN signal is provided by the EVAL-CONT ROL BOARD via J1.
CONVST signal is provided by the EVAL-CONT ROL BOARD via J1.
RD signal is provided by the EVAL-CONT ROL BOARD via J1.
CS signal is provided by the EVAL-CONT ROL BOARD via J1.
AD7472 VDRIVE pin is connected to the AD7472 DVDD pin.
VDD is supplied by the EVAL-CONT ROL BOARD via J1.
VSS is supplied by the EVAL-CONT ROL BOARD via J1.
T he AD7472 Vin pin is connected to the output of the bias-up circuit.
Master clock for burst clock generator is provided from the on-board clock oscillator.
–3 –
REV. A
EVAL-AD7472CB
E VAL- C O NT R O L B O AR D INT E R F AC ING
Table II. 96-Way Connector Pin Functions.
Interfacing to the EVAL-CONT ROL BOARD is via a 96-
way connector, J1. T he pinout for the J1 connector is shown
in Figure 2 and its pin designations are given in T able II.
RO W A
R O W B
R O W C
1
1
32
2
D 0
A
B
C
3
D 1
32
1
4
D G N D
D G N D
D 2
D G N D
Figure 2. Pin Configuration for the 96-Way
Connector, J1
5
6
D 3
96- Way C on n ector P in D escr iption
7
SC LK 0
+ 5VD
RD
D 4
SC LK 0
+ 5VD
D 0-D 11 D ata Bit 0 to D ata Bit 11. T hree-state T T L
outputs. D11 is the MSB.
8
+ 5VD
D 5
9
SC LK 0
Serial Clock Zero. T his continuous clock can be
connected to the CLKIN pin of the AD7472 via
LK 3.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
D 6
C S
D 7
+ 5VD
Digital +5 V supply. T his can be used to provide
a separate +5 V supply for the digital logic if
required via LK2.
D G N D
D G N D
D 8
D G N D
RD
Read. T his is an active low logic input connected
D 9
to the RD pin of the AD7472 via LK5.
D 10
D G N D
D 11
C S
Chip Select. T his is an active low logic input
D G N D
F L 0
D G N D
connected to the CS pin of the AD7472 via LK6.
IRQ2
F L 0
IRQ2
Flag zero. T his logic input is connected to the
CONVST input of the AD7472 via LK4.
Interrupt Request 2. T his is a logic output and is
connected to the BUSY logic output on the
AD 7472.
D G N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
D G N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
AVSS
D G N D
AG N D
AG N D
AG N D
AG N D
AG N D
AG N D
D G N D
AG N D
Digital Ground. T hese lines are connected to
the digital ground plane on the evaluation
board. It allows the user to provide the digital
supply via the connector along with the other
digital signals.
Analog Ground. T hese lines are connected to
the analog ground plane on the evaluation
board.
AVSS
Negative Supply Voltage. T his provides a nega-
tive supply to the on-board op-amps via LK9.
AG N D
AG N D
AVDD
Positive Supply Voltage. T his provides a positive
supply to the op-amps, the reference, the AD7472
and the digital logic.
AVSS
AVSS
AVD D
AVD D
AVD D
When interfacing directly to the EVAL-CONT ROL BOARD,
all power supplies and control signals are generated by the
EVAL-CONT ROL BOARD. However, due to the nature of
the D SP interface on the EVAL-C O N T RO L BO ARD ,
AD 7472 sampling rates greater than 400 KH z are not
supported when interfacing the EVAL-AD7472CB directly
to the EVAL-CONT ROL BOARD. T o achieve sample rates
greater than 400 KH z, the H SC -IN T ERFAC E BOARD
must be used. T he HSC-INT ERFACE BOARD is a board
designed to interface between evaluation boards for high
speed analog-to-digital converters and the EVAL-C ON -
T ROL BOARD . It can be ordered from Analog D evices
through the normal channels using the part number "HSC-
IN T ERF AC E BO ARD ".
Note : T he unused pins of the 96-way connector are not shown.
–4 –
REV. A
EVAL-AD7472CB
H IG H SP E E D C O NVE RT E R (H SC ) B O ARD
INT E R F AC ING
Interfacing to the HSC BOARD is via a 40-way connector,
J4. T he pinout for the J4 connector is shown in Figure 3 and
its pin designations are given in T able III.
Table III. H SC Inter face Connector P in Functions.
P in No.
1
Function
D 11
D 10
D 9
P in No.
2
Function
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
39
1
3
4
40
2
5
6
Figure 3. Pin Configuration for the 40-pin HSC
Interface Connector, J1
7
D 8
8
9
D 7
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
D 6
40- Way C on n ector P in D escr iption
D 5
D 0-D 11 D ata Bit 0 to D ata Bit 11. T hree-state T T L
outputs. D11 is the MSB.
D 4
BUSY
BUSY. T his is a logic output and is connected to
the BUSY logic output on the AD7472 via an
inverting buffer.
D 3
D 2
D 1
G N D
Ground. T hese lines are connected to
the digital ground plane on the evaluation
board.
D 0
N /C
N /C
N /C
N /C
BUSY
N /C
N /C
N /C
When interfacing to the H igh Speed C onverter Interface
board, all required power supplies must be supplied from
external sources via the power terminal, J2.
T he CLKIN signal can be generated on-board (using the
crystal oscillator or the burst clock generator circuit) or
provided externally via SK1.
T he RD and CS inputs to the AD7472 must all be tied low
using LK5 and LK6 respectively.
T he CONVST signal must be provided externally via SK1.
N/C = Not Connected.
Due to the 25 MHz on-board crystal (not the maximum of
26 MHz as specified in the datasheet) the throughput rate will
not meet the maximum datasheet specification of 1.5 MSPS.
Refer to the documentation included with the HSC-INT ER-
F AC E BOARD for more information. N ote, the H SC -
INT ERFACE BOARD was designed for other high speed
ADC devices but it is compatible with the AD7472 evalua-
tion system.
–5 –
REV. A
EVAL-AD7472CB
T here are four input sockets relevant to the operation of the
AD 7472 on this evaluation board. T he function of these
sockets is outlined in T able IV.
S O C K E T S
O P E RAT ING WIT H T H E E VAL- C O NT RO L B O ARD
T he evaluation board can be operated in a stand-alone mode
or operated in conjunction with the EVAL-C ON T ROL
BOARD (with or without the HSC-INT ERFACE BOARD).
T his EVAL-CONT ROL BOARD is available from Analog
Devices under the order entry "EVAL-CONT ROL BOARD".
When interfacing directly to this control board, all supplies
and control signals to operate the AD7472 are provided by
the EVAL-CONT ROL BOARD when it is run under control
of the AD7472 software which is provided with the AD7472
evaluation board package. T his EVAL-CONT ROL BOARD
will also operate with all Analog Devices evaluation boards
which end with the letters CB in their title.
Table IV. Socket Functions
Socket
Function
SK 1
Sub-Miniature BNC Socket for external clock
input.
SK 2
SK 3
Su b-M iniatu re BN C Socket for extern al
CONVST input.
Sub-Miniature BNC Socket for Bipolar ana-
log input T he AD7472 can only accept analog
inputs in the range 0 V to REFIN. Bipolar
analog inputs in the range -1.25 V to +1.25 V
applied to this socket are biased up to the
acceptable AD7472 input range by the on-
board bias-up circuit before being applied to
the AD7472 VIN pin.
T he 96-way connector on the EVAL-AD 7472C B plugs
directly into the 96-way connector on the EVAL-C ON -
T ROL BOARD . N o power supplies are required in the
system. T he EVAL-CON T ROL BOARD generates all the
required supplies for itself and the EVAL-AD7472CB. T he
EVAL-CON T ROL BOARD is powered from a 12 V AC
transformer. T his is a standard 12 V AC transformer capable
of supplying 1 A current and is available as an accessory from
Analog Devices under the following part numbers:
SK 5
Sub-Miniature BNC Socket for unipolar ana-
log input. Analog inputs in the acceptable
AD7472 analog input range (0 V to REFIN)
are applied to this socket. T he signal is then
buffered before it is applied to the AD7472
VIN pin.
EVAL-110VAC -U S:
EVAL-220VAC -U K:
EVAL-220VAC -EU :
For use in the U.S. or Japan
For use in the U.K.
For use in Europe
T hese transformers are also available for other suppliers
including D igikey (U.S.) and Campbell Collins (U.K.).
C onnection between the EVAL-C ON T ROL BOARD and
the serial port of a PC is via a standard RS-232 cable which
is provided as part the EVAL-CON T ROL BOARD pack-
age. Please refer to the manual which accompanies the
EVAL-CONT ROL BOARD for more details on the EVAL-
C ON T ROL BOARD package.
C O N N E C T O R S
T here are four connectors on the AD7472 evaluation board
as outlined in T able V.
Table V. Connector Functions
Connector
Function
J1
96-Way C onnector for EVAL-C O N T RO L
BOARD interface connections.
J2
J3
J4
External VDD, VSS & AGND power connec-
tor.
External VD RIVE & D GN D power connec-
tor.
40-Way Connector for HIGH SPEED CON-
VERT ER IN T ERF AC E BO ARD con n ec-
tions.
–6 –
REV. A
EVAL-AD7472CB
Figure 4. Main Screen
S O F T WAR E D E S C R IP T IO N
press the appropriate key as highlighted on the button. Lower
case letters must be used. When a button is pressed, it is
highlighted on the screen. T he next button can be high-
lighted by using the T ab key or the previous button by
holding down the shift key and the T ab key together. T he
highlighted button can also be pressed by pressing the space
bar. Pressing the ESC key halts any operation currently in
progress. In this document, if a button can be activated from
the keyboard then the key used is shown in bold in the button
name. For example, "no prog" has the "p" highlighted in
bold, indicating that the button can be activated by pressing
the p key.
Included in the EVAL-AD7472CB evaluation board pack-
age is a PC-compatible disk. T his disk has two sub-directo-
ries called EVAL_C T RL and H SC _IN T , each containing
software for controlling and evaluating the performance of
the AD7472 when it is operated with the EVAL-CONT ROL
BOARD or the H SC-IN T ERFACE BOARD . T he EVAL-
AD7472CB Demonstration/Evaluation Software runs under
DOS 4.0 or later and requires a minimum of a 386-based
machine with 400kB of base RAM and 500kB of free hard
disk space. T he user interface on the PC is a dedicated
program written especially for the AD7472.
T he disk which accompanies the EVAL-AD 7472C B con-
tains two sub-directories. T he user should create a new
directory on the main PC drive and label this "AD7472".
T hen, the sub-directories (and all files contained within
them) on the EVAL-AD7472CB disk should be copied into
this directory. T he M ouse D river on the PC should be
enabled before running the software. If this has not been
loaded, the program will not run.
Some buttons have a red indicator. A red indicator on the
button means that the function associated with that button is
on. Absence of the red indicator light means that the function
associated with the button is off. T he on/off status of these
buttons is changed simply by selecting the button.
Settin g u p th e E VAL- C O NT RO L BO ARD
When the software is run, the " F2 Setup" button in the top left
of the screen should be selected to pop up the setup menu (see
fig. 4). T his menu sets up the EVAL-CONT ROL BOARD
for use with the EVAL-AD7472CB.
T o run the software, simply make the AD7472\EVAL_CT L
directory or the AD 7472\H SC _IN T directory (depending
on which setup is being used) the current directory and type
"go". When the evaluation program starts, the user sees the
screen shown on F igure 3 (without any F F T or scope
waveforms). T his is the main screen and it is divided into
three parts. T he top part provides the main control interface
for the AD7472 evaluation software. T he middle part of the
main screen functions as a Digital Storage Oscilloscope and
the bottom part of the main screen operates as either a Digital
Spectrum Analyzer or a H istogram analyzer.
Firstly, a configuration file must be chosen. T he configura-
tion file contains the default configuration information for
the EVAL-C O N T RO L BO ARD , the D igital Spectrum
Analyzer and the Digital Storage Oscilloscope. It also tells
the AD7472.EXE software which .HIP file to download to
the ADSP-2111. T he .HIP file contains the DSP code which
is executed by the ADSP-2111. Normally, the "no prog"
button is off, so when the configuration file is loaded, the
.H IP file is automatically downloaded to the ADSP-2111.
However, if the "no prog" button is on, then the .HIP file is
not downloaded to the ADSP-2111.
Each part of the screen has several buttons that can be pressed
by using the mouse or the keyboard. T o press a button using
the mouse, simply use it to move the on-screen pointer to the
button to be activated and click. T o use the keyboard, simply
–7 –
REV. A
EVAL-AD7472CB
Use the mouse or the keyboard to highlight the configuration
saved in the "binary" format are for viewing purposes
only.
file and load it by clicking the "load" button.
T he "Analog in" section shows the analog input range and
DC offset voltage.
F6:
Load. T his allows the user to load data from a file
with a .DAT extension. Only data that was saved as
ints can be loaded and analyzed. A configuration file
must be loaded via the " F2 Setup" menu before the
data file can be analyzed. If there is no EVAL-
CONT ROL BOARD connected to the PC, then the
"no prog" button in the " F2 Setup" menu must be on.
Once a configuration file has been loaded, the data
loaded from the .DAT file is analyzed according to
the settings in the " F2 Setup" menu.
T he user can then select the required number of samples and
sampling frequency. N ote: While the AD 7472 data sheet
specifies a maximum clock frequency of 26 MH z, the on-
board crystal oscillator outputs a 25MH z clock. T herefore
the max. sampling frequency will be less than that specified
on the data sheet. An external clock frequency (up to the max
specified on the data sheet) can be applied via the external
socket, SK1.
F7:
Reset. Choosing this option resets the EVAL-CON-
T RO L BO ARD .
Click the OK button to return to the main screen.
M AIN SC R E E N
F10: Quit. T his quits the AD7472 evaluation software and
T he top left part of the main screen contains eight buttons
which are selected using the mouse or by using the function
keys from the keyboard. T hese buttons and the actions they
perform are:
returns control to the operating system.
INF O R M AT IO N W IND O W S
T here are three information windows at the top of the main
screen. T he left-hand window is the configuration window
and gives details about part being evaluated. It shows the
name of the program that has been downloaded to the EVAL-
CONT ROL BOARD, the sampling frequency, the number
of bits, the analog input range of the part and the output code
format of the part. T he right-hand large window is the Status
window. T his window provides feedback to the user as to
what operations are currently being performed by the soft-
ware and also displays error messages.
F1:
F2:
F3:
Info. T his button shows information on the software.
Setup. T his button activates the setup menu.
Samp. When this key is pressed, the software causes
the AD7472 to perform a number of conversions as
determined by the setup menu (see above). T he data
from these conversions is then analyzed by the AD7472
evaluation software. Another set of samples may be
taken by pressing the F3 key again.
Test Mode
F4:
Cont. Pressing this button causes the software to
repeatedly perform conversions and analyze them.
Once the conversions and analysis has been done for
one set of samples, the software automatically repeats
the process. It continues to do this until the ESC key
is pressed.
At the top right of the main screen are the T est Mode buttons.
T hese buttons determine what sort of testing is done on the
samples captured by the software. Both an ac analysis and dc
analysis can be performed. T he function of these buttons are:
fft plot
Choosing this button causes the Digital Spec-
trum Analyzer to appear at the bottom of the
screen.
H istogram: C hoosing this button causes the H istogram
Analyzer to be displayed at the bottom of the
screen.
T here is one other button near the top of the screen, beside
the " F10 Quit" button. T his is:
blackman-harris:
When performing a Fourier transform
of the sampled data, this button determines whether
or not the data is windowed by a blackman-harris
window before the transform. When this button is
on, the data is windowed. When this button is off,
the data isn't windowed. See the Digital Spectrum
Analyzer section for more details.
Figure 5. Setup Menu Screen
F5:
Save. T his saves a set of samples to a file for use either
at a later date or with other software. T he samples can
be saved either as "volts", "ints" or "binary". T he
format of all these files is ASCII text. Note that the
AD7472 software can only load files saved in the "ints"
format. Files saved in the "volts" and "ints" formats
can be used with packages such as Mathcad. Files
–8 –
REV. A
EVAL-AD7472CB
D IG IT AL S T O R AG E O S C ILLO S C O P E .
the signal is displayed with its horizontal axis
corresponding to a code of 0. T he ac display option
is useful for zooming in on a low-level signal that
has a large dc offset.
When samples of data are captured, they are displayed on the
Digital Storage Oscilloscope. If the blackman-harris button
is turned on then the windowed data is also displayed on the
oscilloscope. T he 'scope has been designed to act in a similar
way as a conventional oscilloscope. T o the right of the
oscilloscope are several buttons that control the manner in
which data is displayed on the 'scope. T he timebase for the
oscilloscope is automatically chosen by the software if the
T ime/Div "Auto" button is on. T he user can also select the
timebase by clicking in the T ime/Div window and scrolling
up and down through the possible timebases. Similarly, the
vertical scale of the oscilloscope is chosen automatically if the
Volt/Div "Auto" button is on. T he user also has the option
of selecting the desired vertical scale in a similar manner to
selecting the timebase.
dual
When the " d ual" button is on, the oscilloscope
screen is divided into two parts with the sampled
data display centered on one horizontal axis and the
windowed data display centered on another. When
the " dual" button is off, both traces are centered on
the same horizontal axis.
T his button toggles the sampled data trace on and
off.
T his button toggles the windowed data trace on and
off.
1
2
H IS T O G R AM ANALYZE R
T he other buttons associated with the oscilloscope are:
T he histogram analyzer counts the number of occurrences of
each code in the captured samples and displays a histogram
of these counts. T he most frequently occurring code is
displayed in the center of the histogram. T he analyzer is
normally used with a dc input signal and calculates the mean
and the standard deviation of the sampled data. T he mean
and standard deviation are displayed in both volts and in units
of the lsb size of the converter. T he histogram gives a good
indication of the dc noise performance of the ADC. T he
standard deviation shows directly the noise introduced in the
conversion process.
gr id
a xis
text
line
T his button toggles the grid display of the oscillo-
scope on and off.
T his button toggles the axis display of the oscillo-
scope on and off
T his button toggles the text displayed on the oscil-
loscope screen on and off.
When the line button is on, the displayed samples
are joined together by lines. When this button is off,
the samples are displayed as points.
ac
When this button is on, the dc component of the
sampled signal is removed and the signal is dis-
played. T his has the effect of centering the signal
vertically on the oscilloscope screen. When this
button is off, the dc component is not removed and
Figure 6 Histogram Screen
–9 –
REV. A
EVAL-AD7472CB
Figure 7. AD7472 Evaluation Board Circuit Diagram (ADC Section)
–1 0 –
REV. A
EVAL-AD7472CB
Figure 8. AD7472 Evaluation Board Circuit Diagram (Analog Input Bias-Up Section)
Figure 9. AD7472 Evaluation Board Circuit Diagram (Burst Clock Generator Section).
–1 1 –
REV. A
EVAL-AD7472CB
Table VI. Eval-AD 7472CB Bill O f Mater ials
RefD es
Q t y P a r t T yp e
O r der Nu m ber Su p p lier /M a n u f
1 1 10uF, 10V (T AJ-B Series)
C1 C3 C5 C9 C11 C13 C15 C17 C19 C21 C29
FEC 498-660
FEC 498-660
FEC 499-675
FEC 499-687
AVX
AVX
AVX
AVX
AVX
AVX
AVX
AVX
AVX
AVX
AVX
1
3
10uF, 10V (T AJ-B Series)
0.1uF 16V X7R (0603 size)
C 7
C2 C4 C6
1 1 0.1uF 50V X7R (0805 size)
1 1 0.1uF 50V X7R (0805 size)
C8 C10 C12 C14 C16 C18 C20 C21 C42 C44 C45
C22 C23 C24 C26 C28 C30 C32 C34 C36 C37 C39 FEC 499-687
C 2 5
1
1
5
1
2
1
27pF 25V X7R (0805 size)
1nF 50V NPO (0805 size)
47uF 16V (T AJ-D Series)
1uF 25V Y5V (0805 size)
22pF 100V NPO (0805 size)
4.7uF 16V (T AJ-B Series)
C 2 7
FEC 317-457
FEC 498-762
FEC 317-640
F EC -317-500
FEC 498-725
C31 C33 C35 C40 C43
C 3 8
C 46 C 49
C 4 1
1
2
2
1
3
1
1
1
1
1
10W ±1% (0603 Size)
1KW ±1% (0805 Size)
100W ±1% (0805 Size)
100KW ±1% (0805 Size)
20KW ±1% (0805 Size)
75W ±1% (0805 Size)
130W ±1% (0805 Size)
130W ±1% (0805 Size)
390W ±1% (0805 Size)
50KW M ulti-turn trimmer pot
R 1
FEC 910-995
FEC 911-239
FEC 911-732
FEC 911-471
FEC 771-491
FEC 771-200
FEC 771-235
FEC 771-235
FEC 911-185
FEC 348-144
M u lticom p
M u lticom p
M u lticom p
M u lticom p
M u lticom p
M u lticom p
M u lticom p
M u lticom p
M u lticom p
Bourns
R2 R3
R4 R14
R 5
R6 R15 R16
R 7
R11
R12
R17
R 8
1
220uH Inductor (8RH B Series)
L1
FEC 598-215
T O K O
1
1
2
1
1
1
1
1
1
1
1
4
2
AD 7472ARU
U 1
AD 7472BR
FEC 527-361
AD 797BN
AD I
D M 74L S14M
U 2
F airchild
AD I
AD 797BN
U3 U5
O P 0 7 D P
U 4
O P 0 7 D P
AD I
AD 780AN
U 6
AD 780AN
AD I
M M 74H C 04M
M M 74H C 08M
M M 74H C 161M
D M 74L S08M
U 7
FEC 379-220
FEC 379-224
FEC 379-414
FEC 527-336
RS 857-430
FEC 177-414
FEC 368-118
M otorola
M otorola
M otorola
F airchild
Fairchild
IQ D
U 8
U 9
U 10
D M 74AL S112M
25MH z T T L Output crystal
1N 4148 Signal D iode
SD 103C Schottky D iode
U 11
Y1
D1 D2 D3 D4
D5 D6
F airchild
1
9
1
2 pin header
L K 1
FEC 511-705
FEC 511-791
FEC 511-780
FEC 528-456
FEC 519-959
FEC 269-931
FEC 151-786
FEC 151-785
FEC 727-714
FEC 310-682
H arwin
H arwin
H arwin
Berg
4 (2+2) pin header
8 (4+4) pin header
LK2 LK4 LK5 LK6 LK7 LK8 LK9 LK10 LK11
L K 3
1 1 Shorting Link
LK1 - LK11
3 6 Ultra Low Profile Sockets
U3 U4 U5 U6 Y1
H arwin
Siem en s
L u m berg
L u m berg
3 M
1
1
1
1
4
96 Pin 90º DIN41612 Plug
3 Pin T erminal Block
2 Pin T erminal Block
J1
J2
J3
40 Pin 90º IDC Ribbon Connector J4
Gold 50W SMB Jack
P C B
SK1 SK2 SK3 SK5
EVAL-AD 7472C B Rev. A
M /AC O M
1
n/a
n/a
n/a
–1 2 –
REV. A
EVAL-AD7472CB
Figure 10. Component Side Artwork
Figure 11. Solder Side Artwork
–1 3 –
REV. A
Figure 12. AD7472 Evaluation Board Component Placement Drawing (Component Side).
Figure 13. AD7472 Evaluation Board Component Placement Drawing (Solder Side).
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