EVAL-AD7707EB [ADI]
Evaluation Board for the AD7707 3V/5V, +/-10V Input Range, 1mW, 3Channel, 16-Bit, Sigma Delta ADC; 评估板用于AD7707 3V / 5V ，+ 10V输入范围，为1mW ， 3通道， 16位， Σ-Δ ADC
| 型号： | EVAL-AD7707EB |
| 厂家： | 
ADI |
| 描述： | Evaluation Board for the AD7707 3V/5V, +/-10V Input Range, 1mW, 3Channel, 16-Bit, Sigma Delta ADC |
| 文件： | 总16页 (文件大小：525K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
a EvaluationBoardfor the AD77073V/5V, +/-10VInput
Range, 1mW, 3Channel, 16-Bit, SigmaDeltaADC
EVAL-AD7707EB
FEATURES
Other components on the AD7707 Evaluation Board include
Full-Featured Evaluation Board for the AD7707
On-Board Reference and Digital Buffers
Various Linking Options
PC Software for Control of AD7707
an AD780 (a precision 2.5V reference), an AD589 (a 1.23V
precision bandgap reference), a 4.9152 M H z crystal and
digital buffers to buffer signals to and from the PC.
On-Board Patchwork Area
O P E RAT ING T H E AD 7707 E VAL BO ARD
P ower Supplies
INTRODUCTION
T his evaluation board has two analog power supply inputs:
AVDD and AGND. An external +5V or +3V must be applied
between these inputs which is used to provide the AVDD for the
AD7707 and the reference. DGND and DVDD connections
are also available. T he DVDD is used to provide the DVDD for
the AD7707 DVDD pin and the digital circuitry. When AVDD
is set to +5V, DVDD can be +3V or +5V. When AVDD is set
to +3V, DVDD can only be +3V. DVDD should never exceed
AVDD. DGND and AGND are connected together under the
AD 7707. T herefore, it is recommended not to connect
AGND and DGND elsewhere in the system.
T his T echnical Note describes the evaluation board for the
AD7707, 3V/5V, +/-10V Input Range, 1mW, 3 Channel, 16-
Bit, Sigma Delta ADC. T he AD7707 is a complete analog
front end for low frequency measurement applications. T his
three-channel device can accept either low level input signals
directly from a transducer or high level (± 4 x VBIAS) signals
and produce a serial digital output. T he AD7707 operates
from a single 2.7V to 3.3V or 4.75V to 5.25V supply. T he
AD 7707 features two low level pseudo-differential analog
input channels, one high level input channel and a differential
reference input. Full data on the AD7707 is available in the
AD7707 datasheet available from Analog Devices and should
be consulted in conjunction with this T echnical Note when
using the evaluation board.
All power supplies are decoupled to their respective grounds.
D VD D is decoupled using a 10µF tantalum capacitor and
0.1µF ceramic capacitor as close as possible to the AD7707
DVDD pin. It is again decoupled using 0.1µF capacitors as
close as possible to each logic device. AVDD is decoupled
using a 10µF tantalum capacitor and 0.1µF ceramic capaci-
tor as close as possible to the AD 7707 and also at the
reference.
T he evaluation board interfaces to the parallel port of an IBM
compatible PC. Software is available with the evaluation
board which allows the user to easily program the AD7707.
Figure 1: Evaluation Board Setup
VREF+
VREF-
AV
DV
DG ND
AGND
DD
DD
AD1580
REFERENCE
AD780
AG ND
REFERENCE
36-W AY
CENTRONICS
CO NNECTOR
B UFFER S
AD7707
ADC
9-W AY D-TYPE CONNECTOR
CRYSTAL
AIN3
AIN1
LCOM
AIN2
HCOM HBIAS
M CLK IN
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
EVAL-AD7707EB
LINK AND SWIT C H O P T IO NS
T here are ten link options which must be set for the required operating setup before using the evaluation board. T he functions
of these link options are outlined below.
Lin k No.
F u n c t io n
LK 1
T his option selects the master clock source for the AD7707. T he master clock is generated by the on-board crystal
or from an external source via SKT 11. T his is a double link and both links must be moved together for the correct
operation of the evaluation board.
With both links in position "A", the external clock option is selected and an external clock applied to SKT 11 is
routed to the MCLKIN pin of the AD7707.
With both links in position "B", the on-board crystal is selected to provide the master clock to the AD7707.
LK 2
T his link is used to select the on-board reference.
With this link in position "A", the AD780 is selected as the on-board reference. T his provides a 2.5V reference
which is suitable for the AD7707 operating at +5V.
With this link in position "B", the AD589 is selected as the on-board reference. T his provides a 1.23V reference
which is suitable for the AD7707 operating at +3V.
LK 3
LK 4
T his link is used to select the reference source for the REFIN(-) input of the AD7707.
With this link in position"A", the REFIN(-) pin is connected directly to AGND.
With this link in position "B", the REFIN(-) pin is connected to SKT 10. An external voltage applied to SKT 10
can now be used as the REFIN(-) for the AD7707.
T his link is used to select the reference source for the REFIN(+) input of the AD7707.
With LK4 in position "A", the REFIN(+) pin is connected to the output of the on-board reference.
With LK4 in position "B", the REFIN(+) pin is connected to SKT 9. An external voltage applied to SKT 9 can
now be used as the REFIN(+) for the AD7707.
LK 5
LK 6
LK 7
LK 8
T his link is in series with the AIN1 input of the AD7707.
With this link in place, an analog input signal applied to SKT 3 is routed directly to the AIN1 pin of the AD7707.
T his link may be removed so that the user can add signal conditioning circuitry if required.
T his link is in series with the AIN2 input of the AD7707.
With this link in place, an analog input signal applied to SKT 4 is routed directly to the AIN2 pin of the AD7707.
T his link may be removed so that the user can add signal conditioning circuitry if required.
T his link is in series with the AIN3 input of the AD7707.
With this link in place, an analog input signal applied to SKT 5 is routed directly to the AIN3 pin of the AD7707.
T his link may be removed so that the user can add signal conditioning circuitry if required.
T his link is used to select the common input for low level input channels (AIN1 and AIN2).
With this link in position "A", the LCOM input is tied to AGND.
With this link in position "B", the LCOM input is tied to VREF.
With this link in position "C", the LCOM input is set to a voltage applied to SKT 6.
LK 9
T his link is connected to the HBIAS pin. It used to signal condition the high level input channel (AIN3).
With this link in positoin "A", the HBIAS pin is tied to the REFIN+ pin of te AD7707.
With this link in position "B", a voltage applied to SKT 7 is applied to the HBIAS pin.
LK10
T his link is connected to the HCOM pin of the AD7707. It stes the common input voltage for the high level input
channel (AIN 3).
With this link in position "A", the HCOM input is tied to AGND.
With this link in position "B", the HCOM input is tied to VREF.
With this link in position "C", the HCOM input is set to a voltage applied to SKT 8.
Rev. 0
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EVAL-AD7707EB
S E T - U P C O ND IT IO NS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. T able 1 shows the position in which all the links are set when the evaluation board is sent out.
Table 1: Initial Link and Switch P ositions
Lin k No.
LK 1
P osit ion
F u n c t io n
B+ B
A
Both links in position "B" to select the on-board crystal as the master clock for the AD7707.
T his selects the AD780 +2.5V output as the on-board reference.
T his connects the REFIN(-) input of the AD7707 to AGND.
T he on-board reference provides the reference voltage for the REFIN(+) input of the AD7707.
T he AIN1 pin on the AD7707 is tied to the analog input sockets SKT 3.
T he AIN2 pin on the AD7707 is tied to the analog input sockets SKT 4.
T he AIN3 pin on the AD7707 is tied to the analog input sockets SKT 5.
T he LCOM pin on the AD7707 is tied to the AGND.
LK 2
LK 3
A
LK 4
A
LK 5
I N
I N
I N
A
LK 6
LK 7
LK 8
LK 9
A
T he HBIAS pin of the AD7707 is tied to the REFIN+ pin.
T he HCOM pin on the AD7707 is tied to the AGND.
LK10
A
E VALU AT IO N B O AR D INT E R F AC ING
Interfacing to the evaluation board is via either a 9-way d-type connector, SKT 1 or a 36-way centronics connector, SKT 2.
T he pin-out for the SKT 1 connector is shown in Fig. 2 and its pin designations are given in T able 2.
SKT 2 connector is shown in Fig. 3 and its pin designations are given in T able 3.
T he pin-out for the
SKT 2 is used to connect the evaluation board to the parallel (printer) port of a PC. Connection is via a standard printer cable.
SKT 1 is used to connect the evaluation to any other system. T he evaluation board should be powered up before a cable is
connected to either of these connectors.
1
2
3
4
5
6
7
8
9
Fig. 2: Pin Configuration for the 9-Way D-Type Connector, SKT1.
1
Table 2.:
SKT1 P in D escr iption
1
2
3
4
5
6
7
8
SC L K
DRDY Logic output. T his is a buffered version of the signal on the AD7707 DRDY pin
CS Chip Select. T he signal on this pin is buffered before being applied to the CS pin on the AD7707.
RESET Reset Input. Data applied to this pin is buffered before being applied to the AD7707 RESET pin.
D I N Serial Data Input. Data applied to this pin is buffered before being applied to the AD7707 DIN pin.
Serial Clock. T he signal on this pin is buffered before being applied to the SCLK pin of the AD7707.
D G N D Ground reference point for the digital circuitry. Connects to the DGND plane on the Evaluation board.
D O U T Serial Data Output. T his is a buffered version of the signal on the AD7707 DOUT pin.
D VD D
Digital Supply Voltage. If no voltage is applied to the board's DVDD input terminal then the voltage applied to
this pin will supply the DVDD for the digital buffers.
9
N C
N ot Connected.
N ote
1
An explanation of the AD7707 functions mentioned here is given in T able 3 overleaf as part of the SKT 2 pin descriptions.
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EVAL-AD7707EB
1
18
36
19
Fig. 3: 36-way Centronics (SKT2) Pin Configuration
Table 3: 36-Way Connector P in D escr iption
1
2
N C
No Connect. T his pin is not connected on the evaluation board.
D I N
Serial Data Input. Data applied to this pin is buffered before being applied to the AD7707 DIN pin.
Serial Data Input with serial data being written to the input shift register on the part. Data from this
input shift register is transferred to the setup register, clock register or communications register
depending on the register selection bits of the Communications Register.
3
4
RESET
CS
Reset Input. T he signal on this pin is buffered before being applied to the RESET pin of the AD7707.
RESET is an active low input which resets the control logic, interface logic, calibration coefficients,
digital filter and analog modulator of the part to power-on status.
Chip Select. T he signal on this pin is buffered before being applied to the CS pin of the AD7707.
CS is an active low Logic Input used to select the AD7707. With this input hard-wired low, the
AD7707 can operate in its three-wire interface mode with SCLK, DIN and DOUT used to interface
to the device. CS can be used to select the device in systems with more than one device on the serial
bus or as a frame synchronization signal in communicating with the AD7707.
5
SC L K
Serial Clock. T he signal on this pin is buffered before being applied to the SCLK pin of the AD7707.
An external serial clock is applied to this input to read/write serial data from/to the AD7707. T his
serial clock can be continuous with all data transmitted in a continuous train of pulses. Alternatively,
it can be non-continuous with the information being transmitted to the AD7707 in smaller batches
of data.
6-8
9
N C
No Connect. T hese pins are not connected on the evaluation board.
DVDD
Digital Supply Voltage. T his provides the supply voltage for the buffer chips, U3-U5, which buffer
the signals between the AD7707 and SKT 1/SKT 2.
10
DRDY
Logic output. T his is a buffered version of the signal on the AD7707 DRDY pin. A logic low on
this output indicates that a new output word is available from the AD7707 data register. T he DRDY
pin will return high upon completion of a read operation of a full output word. If no data read has
taken place between output updates, the DRDY line will return high for 500 x CLK
cycles prior
IN
to the next output update. While DRDY is high, a read operation should not be attempted to avoid
reading from the data register as it is being updated. T he DRDY line will return low again when
the update has taken place. DRDY is also used to indicate when the AD770-55 has completed its
on-chip calibration sequence.
11-12
13
N C
No Connect. T hese pins are not connected on the evaluation board.
D O U T
Serial Data Output. T his is a buffered version of the signal on the AD7707 DOUT pin. Serial Data
Output with serial data obtained from the output shift register on the AD7707. T he output shift
register can contain information from the setup register, communications register, clock register or
data register depending on the register selection bits of the Communications Register.
14-18
19-30
31-36
N C
No Connect. T hese pins are not connected on the evaluation board.
D G N D
N C
Ground reference point for digital circuitry. Connects to the DGND plane on the evaluation board.
No Connect. T hese pins are not connected on the evaluation board.
Rev. 0
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EVAL-AD7707EB
S O C K E T S
C O N N E C T O R S
T here are eleven sockets relevant to the operation of the
AD7707 on this evaluation board. T he functions of these
sockets are outlined in T able 4.
T here are two connectors on the AD7707 evaluation board as
outlined in T able 5.
Table 5. Connector Functions
Table 4. Socket Functions
C o n n e c t o r
F u n ct ion s
S o c ke t
F u n c t io n
J1
PCB Mounting T erminal Block. T he Digi-
tal Power Supply to the Evaluation Board
must be provided via this Connector if it is
not being supplied via SKT 1 or SKT 2.
SK T 1
9-way D-T ype connector used to interface to other
systems.
SK T 2
SK T 3
36-way centronics connector used to interface to
PC via parallel printer port.
J2
PCB Mounting T erminal Block. T he Ana-
log Power Supply to the Evaluation Board
must be provided via this Connector.
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the AIN 1 input of the
AD7707 is applied to this socket.
S W I T C H E S
SK T 4
SK T 5
SK T 6
SK T 7
SK T 8
SK T 9
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the AIN 2 input of the
AD7707 is applied to this socket.
T here is one switch on the AD7707 Evaluation board. SW1
is a push-button reset switch. Pushing this switch activates the
active low RESET input on the AD7707 which resets the
control logic, interface logic, calibration coefficients, digital
filter and analog modulator of the part to power-on status.
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the AIN 3 input of the
AD7707 is applied to this socket.
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the LCOM input of the
AD7707 may be applied to this socket.
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the H BIAS input of the
AD7707 may be applied to this socket.
Sub-M iniature BN C (SM B) C onnector. T he
analog input signal for the HCOM input of the
AD7707 may be applied to this socket.
Sub-M iniature BN C (SM B) C onnector. T he
reference voltage for the REFIN + input of the
AD7707 is applied to this socket when the board
is configured for an externally applied reference
voltage.
SK T 10
SK T 11
Sub-M iniature BN C (SM B) C onnector. T he
reference voltage for the REFIN - input of the
AD7707 is applied to this socket when the board
is configured for an externally applied reference
voltage.
Sub-M iniature BN C (SM B) C onnector. T he
master clock signal for the MCLKIN input of the
AD7707 is applied to this socket when the board
is configured for an externally applied master
clock.T he AD7707 can be operated with internal
clock frequencies in the range 500kHz to 5MHz.
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EVAL-AD7707EB
AD 7707 SO F T WARE D E SC RIP T IO N
T he AD7707 evaluation board is shipped with a 3½ " disk containing software that can be installed onto a standard PC to control
the AD 7707.
T he software uses the printer port of the PC to communicate with the EVAL-AD7707EB, so a Centronics printer cable is
used to connect the PC to the evaluation board.
Softwa r e Requ ir em en ts a n d In sta lla tion
T he software runs under Windows 3.1™ or Windows 95™ and typically requires 4Mb of RAM.
T o install the software the user should start Windows and use either File Manager (in Windows 3.1) or Windows Explorer
(in Windows 95) to locate the file called SET UP.EXE on the floppy disk. Double clicking on this file will start the installation
procedure. T he user is prompted for a destination directory which is "C:\AD7707" by default. Once the directory has been
selected the installation procedure will copy the files into the relevant directories on the hard drive. T he installation program
will create a Program Group called "Analog Devices" on the desktop for Windows 3.1 or in the "Start" taskbar for Windows95.
Once the installation procedure is complete the user can double click on the AD7707 icon to start the program.
Featur es of the Softwar e
1. T he software will allow the user to write to and read from all the registers of the AD7707.
2. Data can be read from the AD7707 and displayed or stored for later analysis.
3. T he data that has been read can be exported to other packages such as Mathcad or Excel for further analysis.
Fig. 4. The Main Screen
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EVAL-AD7707EB
What follows is a description of the various windows that appear while the software is being used. Fig. 4. shows the main screen
that appears once the program has started. T he printer port that will be used by the software is shown in the top left of the
screen. T here are three possible printer ports that can be handled by the software, LPT 1 (standard), LPT 2 and PRN. In the
event that the PC has two printer ports the software will always select the one which is set as default by the PC. T he user can
change to the other printer port by using the "Select Printer Port" button on the main screen. A brief description of each of
the buttons on the main screen follows:
Program AD7707
Read Data
Allows the user to program the selected register for a specific channel of the AD7707.
Allows the user to read a number of samples from the AD7707. These samples can be stored for further
analysis or just displayed for reference.
NoiseAnalysis
ResetAD7707
Allows the user to perform noise analysis on the data that has been read in.
Allows the user to perform a reset on the AD7707.
Read From File
Write To File
Allows the user to read in previously stored data for display or analysis.
Allows the user to write the current set of data to a file for later use.
Select Printer Port
Allows the user to change which printer port the software uses (only valid for PCs with more than one
printer port).
About
Quit
Provides information about the version of software being used.
Ends the program
Fig. 5. The Program AD7707 Screen
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EVAL-AD7707EB
T he P r ogr am AD 7707 Scr een
Fig. 5. shows the screen that appears when the Program AD7707 button is selected. T his screen allows the user to select which
register is to be programmed. Before selecting any of the buttons on this screen the user should first choose the channel that
is to be used for all the subsequent operations. T he state of the Standby bit should also be selected here.
The Setup Register Scr een
Fig. 6. shows the Setup Register screen. When the screen is loaded the software will read the current contents from the Setup
Register of the AD7707 and change the option buttons accordingly. T he setup register is used to change the operating mode
of the AD7707, change the gain setting, set the part to bipolar or unipolar mode, set the part to buffered or unbuffered mode
and select the state of the FSYNC bit. Every time a change is made the software will write the new conditions to the AD7707
and read back the setup register for confirmation.
Fig. 6. The Setup Screen
When the user selects a calibration, the software will start the calibration by writing to the AD7707 and then monitor the
DRDY. A falling edge of the DRDY pin will indicate that the calibration has been completed. After a calibration the AD7707
returns to its normal operating mode and the program updates the screen to indicate this. T he default status for the setup
register on power-up is 01 (hex).
The C lock Register Scr een
Fig. 7. shows the Clock Register setup screen. T he Clock Register is used to control the output update rate of the AD7707.
T he CLKDIS bit is used to control the operation of the MCLKOUT pin.
A logic 0 in this bit allows the AD7707 to function in its normal operating mode when a crystal oscillator is used as the clock
source.
A logic 1 disables the MCLKOUT from appearing at the pin. When disabled the MCLKOUT pin is forced low. If the AD7707
is using a crystal oscillator as the clock then disabling the MCLKOUT will stop the clock and no conversions will be done
by the AD7707. T he user should consult the datasheet for more information on the use of the CLKDIS bit.
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EVAL-AD7707EB
T he CLKDIV is used to set the internal operating frequency of the AD7707. T he user should consult the datasheet for more
information on the use of the CLKDIV bit.
Fig. 7. The Clock Register Screen
T he CLK bit is used in conjunction with the Output Update Rate buttons to select the output update rate.
If the AD7707 is being operated with a clock of 4.9152MHz (CLKDIV=1) or 2.4576MHz (CLKDIV=0) then this bit should
be set to a 1 giving a choice of 50Hz, 60Hz, 250Hz or 500Hz as an output update rate.
If the AD7707 is being operated with a clock of 2MHz (CLKDIV=1) or 1MHz (CLKDIV=0) then this bit should be set to
a 0 giving a choice of 20Hz, 25Hz, 100Hz or 200Hz as an output update rate.
T he Power-On/Reset status of this register is 05 hex.
Fig. 7. The Calibration Registers Screen
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EVAL-AD7707EB
T h e C alibr ation Register s Scr een
Fig. 8. shows the Calibration Registers screen. When this screen is displayed the values of the Gain and Offset Registers are
read from the AD7707 and displayed. T he user has the ability to change the values of either register if required. the default
value for the fullscale cal register is 5761AB hex and the default value for the zero scale cal register is 1F4000 hex.
The Read D ata Scr een
Fig. 9. shows the Read Data screen. T his is where the user can read a number of samples from the AD7707. T he user has
the option of either reading data for analysis or display.
When the Read For Analysis button is selected the software will read the required number of samples from the AD7707 and
store them in an array so that they can be graphed or analysed later. It is possible to read upto 5000 samples at any one time
although only 3000 can be displayed on a graph.
Fig. 9. The Read Data Screen
When the Read for Display button is selected the software will read one sample from the AD7707 and display its value in the
Current Code text box. T he software will continue to read and display the samples until a key has been pressed. It is possible
to add a delay to the read cycle by checking the Use Delay Value checkbox. If the box is checked the software will wait the
required number of milliseconds between reading samples. It should be noted however that the accuracy of the time delay can
be affected by other programs running under Windows, therefore this method is not suitable where equidistant sampling is
required.
The Noise Analysis Scr een
Once data has been read from the AD7707 it is possible to perform some analysis on it. Fig. 10. shows the Noise Analysis
Screen. T his screen displays the maximum and minimum codes read from the AD7707 (in decimal and hexadecimal), as well
as the average code, the average voltage and the RMS and Peak-Peak noise values. From this screen it is possible to display
the data on a graph or as a histogram of codes. Figures 11 and 12 show the Graph and Histogram screens.
Rev. 0
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EVAL-AD7707EB
Fig. 10. The Noise Analysis Screen
Fig. 11. The Graph Screen
T he Gr aph Scr een
T his screen displays the data in graph format. A r olling aver age feature is available by selecting the rolling average button.
By default this is a 5 point rolling average but this can be changed to any integer between 1-99. T he list codes button allows
the user to view all the codes and the number of occurences of these codes.
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EVAL-AD7707EB
Fig. 12. The Histogram Screen
Rev. 0
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EVAL-AD7707EB
Fig. 13. The Evaluation Board Schematic
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EVAL-AD7707EB
Table 6. Com ponent Listing and Manufactur er s
INT E G R AT E D C IR C U IT S
C o m p o n e n t
AD 7707AR
AD 780AN
74H C 4050N
74C 08N
L o c a t io n
U 1
Ve n d o r
Analog D evices
Analog D evices
Philips
U 2
U 3
U 4
T exas Instruments
T exas Instruments
Analog D evices
I T T
74H C 244N
AD 1580
U 5
U 6
SD 103C
D 1
C AP AC I T O R S
C o m p o n e n t
L o c a t io n
Ve n d o r
10µF ± 20% T antalum (16 V) C1 C4 C5 C9
AVX- Kyocera
M ftrs N o T AG 106M O16
0.1µF C eramic(X7R ± 20%)
0.01uF N P0
C2 C3 C6 C7 C8 C10 C15
Philips
Mftrs No. CW20C 104M
C12 C13 C14
C16 C17
AVX-Kyocera
M ftrs N o. SR20X7R
33pF ±2% Ceramic
Philips
Mftrs No. 683 34339
R E S I S T O R S
C o m p o n e n t
L o c a t io n
R1 R2 R3
R5
Ve n d o r
Short Circuits
----------
3kΩ±5% 0.25W Carbon Film
Bourns 3kΩ ±5% 0.25W
Bourns 6.8kΩ ±5% 0.25W
Bourns 10kΩ ±5% 0.25W
Bourns 1MΩ ±5% 0.25W
6.8kΩ± 5% 0.25W Carbon Film R6
10kΩ±5% 0.25W Carbon Film R7 R8
1MΩ±5% 0.25W Carbon Film R9
LINK O P T IO NS
C o m p o n e n t
L o c a t io n
Ve n d o r
Pin H eaders
Lk1 (4x2 way)
H arwin
Lk2 Lk3 Lk4 Lk9(2x2 way)
Lk8 Lk10 (3x2 way)
Lk5 Lk6 Lk7 (1x2 way)
M ftrs N o. M 20-9993606
Shorting Plugs
Pin H eaders
(11 required)
H arwin
M ftrs N o. M 7571-05
S W I T C H
C o m p o n e n t
L o c a t io n
Ve n d o r
Sealed Push Button Switch
S W 1
O m ron
M ftrs N o. B3W1000
Rev. 0
- 14 -
EVAL-AD7707EB
S O C K E T S
C o m p o n e n t
L o c a t io n
Ve n d o r
M iniature BN C Connectors
SK T 3-SK T 11
M/A - Com Greenpar
M ftrs N o. B65N 07G999X99
9-Way D -T ype Connector
SK T 1
SKT 2
J1 J2
M cM urdo
M ftrs N o. SD E9PN T D
36 Way Centronics Connector
F ujitsu
M ftrs N o. FC N 785J036G 0
2 Way T erminal Block
Low profile socket
Bulgin RIA
U2 - U5
H arwin
(58 pins needed)
Farnell N o. 519-959
C RYST AL O SC ILLAT O R
C o m p o n e n t
L o c a t io n
Ve n d o r
4.9152 M H z Oscillator
Xtal 1
I Q D
Mftrs No. A127A
Fig. 14. The Evaluation Board Component Layout Diagram
- 15 -
Rev. 0
EVAL-AD7707EB
Fig. 15. The Evaluation Board Component Side Artwork.
Fig. 16. The Evaluation Board Solder Side Artwork.
Rev. 0
- 16 -
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