EVAL-ADM2914EBZ [ADI]
Quad UV/OV Positive/Negative; 四路UV / OV正/负
| 型号： | EVAL-ADM2914EBZ |
| 厂家： | 
ADI |
| 描述： | Quad UV/OV Positive/Negative |
| 文件： | 总16页 (文件大小：371K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Quad UV/OV Positive/Negative
Voltage Supervisor
ADM2914
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
CC
TIMER
Quad UV/OV positive/negative supervisor
Supervises up to 2 negative rails
Adjustable UV and OV input thresholds
High threshold accuracy over temperature: 1.5%
1 V buffered reference output
Open-drain UV and OV reset outputs
Adjustable reset timeout with disable option
Outputs guaranteed down to VCC of 1 V
Glitch immunity
ADM2914
VH1
TIMER
500mV
500mV
VL1
VH2
UV
62 μA supply current
16-lead QSOP package
VL2
VH3
OUTPUT
LOGIC
APPLICATIONS
500mV
500mV
Server supply monitoring
OV
FPGA/DSP core and I/O voltage monitoring
Telecommunications equipment
Medical equipment
VL3
VH4
MUX
LOGIC
REF
LATCH/DIS
REF
VL4
SEL
GND
Figure 1.
GENERAL DESCRIPTION
the VCC pin to limit the current flow into the VCC pin to no
greater than 10 mA. The ADM2914 uses the internal shunt
regulator to regulate VCC if the supply line exceeds the absolute
maximum ratings.
The ADM2914 is a quad voltage supervisory IC ideally suited
for monitoring multiple rails in a wide range of applications.
Each monitored rail has two dedicated input pins, VHx and VLx,
which allows each rail to be monitored for both overvoltage
(OV) and undervoltage (UV) conditions. A common active low
The ADM2914 is available in two models. The ADM2914-1
offers a latching overvoltage output that can be cleared by
UV
OV
undervoltage ( ) and overvoltage ( ) pin is shared by each
of the monitored voltage rails.
LATCH
toggling the
input pin. The ADM2914-2 has a disable
OV
UV
output
pin that can override and disable both the
signals.
and
The ADM2914 includes a 1 V buffered reference output, REF,
that acts as an offset when monitoring a negative voltage. The
three-state SEL pin determines the polarity of the third and
fourth inputs, that is, it configures the device to monitor
positive or negative supplies.
The ADM2914 is available in a 16-lead QSOP package. The
device operates over the extended temperature range of −40°C
to +125°C.
The device incorporates an internal shunt regulator that enables
the device to be used in higher voltage systems. This feature
requires a resistor to be placed between the main supply rail and
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2009-2010 Analog Devices, Inc. All rights reserved.
ADM2914
TABLE OF CONTENTS
Features .............................................................................................. 1
Voltage Monitoring Example.................................................... 10
Power-Up and Power-Down..................................................... 11
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 8
Voltage Supervision...................................................................... 8
Polarity Configuration................................................................. 8
Monitoring Pin Connections...................................................... 9
Threshold Accuracy................................................................... 10
UV OV
/
Timing Characteristics ............................................... 11
Timer Capacitor Selection ........................................................ 11
UV OV
and
UV OV
Rise and Fall Times.............................................. 12
Output Characteristics ............................................... 12
/
Glitch Immunity......................................................................... 12
Undervoltage Lockout (UVLO) ............................................... 12
Shunt Regulator.......................................................................... 12
OV
Latch (ADM2914-1) ........................................................... 13
Disable (ADM2914-2) ............................................................... 13
Typical Applications....................................................................... 14
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
2/10—Rev. A: Rev. B
Changes to Figure 17 and Figure 18............................................... 9
12/09—Rev. 0: Rev. A
Changes to Shunt Regulator Section............................................ 12
5/09—Revision 0: Initial Version
Rev. B | Page 2 of 16
ADM2914
SPECIFICATIONS
LATCH
TA = −40°C to +85°C. Typical values at TA = 25°C, unless otherwise noted. VCC = 3.3 V, VLx = 0.45 V, VHx = 0.55 V,
SEL = VCC, DIS = open, unless otherwise noted.
= VCC,
Table 1.
Parameter
Min
Typ
Max
Unit Test Conditions/Comments
SHUNT REGULATOR
VCC Shunt Regulator Voltage, VSHUNT
6.2
6.2
6.6
6.6
200
6.9
7.0
300
V
V
mV
ICC = 5 mA
TA = −40°C to +125°C
ICC = 2 mA to 10 mA
VCC Shunt Regulator Load Regulation, ΔVSHUNT
SUPPLY
1
Supply Voltage, VCC
2.3
VSHUNT
1
2.1
50
V
V
V
mV
μA
Minimum VCC Output Valid, VCCR(MIN)
Supply Undervoltage Lockout, VCC(UVLO)
Supply Undervoltage Lockout Hysteresis, ΔVCC(HYST)
Supply Current, ICC
DIS = 0 V
DIS = 0 V, VCC rising
DIS = 0 V
1.9
5
2
25
62
100
VCC = 2.3 V to 6 V
REFERENCE OUTPUT
Reference Output Voltage, VREF
0.985
0.985
1
1
1.015
1.020
V
V
IVREF
= 1 mA
TA = −40°C to +125°C
UNDERVOLTAGE/OVERVOLTAGE CHARACTERISTICS
Undervoltage/Overvoltage Threshold, VUOT
Undervoltage/Overvoltage Threshold to Output Delay, tUOD
VHx, VLx Input Current, IVHL
492.5
50
500
125
507.5
500
15
30
12.5
14
mV
μs
nA
nA
ms
ms
VHx = VUOT − 5 mV or VLx = VUOT + 5 mV
TA = −40°C to +125°C
CTIMER = 1 nF
UV OV
6
6
8.5
8.5
/
Timeout Period, tUOTO
TA = −40°C to +125°C
OV
OV
LATCH CLEAR INPUT (ADM2914-1)
Latch Clear Threshold Input High, VLATCH
Latch Clear Threshold Input Low, VLATCH
1.2
V
(IH)
OV
LATCH
0.8
1
V
(IL)
VLATCH > 0.5 V
μA
Input Current, ILATCH
DISABLE INPUT (ADM2914-2)
DIS Input High, VDIS(IH)
DIS Input Low, VDIS(IL)
1.2
1
V
V
μA
0.8
3
DIS Input Current, IDIS
2
VDIS > 0.5 V
TIMER CHARACTERISTICS
TIMER Pull-Up Current, ITIMER(UP)
−1.3
−1.2
1.3
1.2
−180
−2.1
−2.1
2.1
2.1
−270
−2.8
−2.8
2.8
μA
μA
μA
μA
mV
VTIMER = 0 V
TA = −40°C to +125°C
VTIMER = 1.6 V
TA = −40°C to +125°C
Referenced to VCC
TIMER Pull-Down Current, ITIMER(DOWN)
2.8
TIMER Disable Voltage, VTIMER(DIS)
OUTPUT VOLTAGE
VCC = 2.3 V; IUV OV = −1 μA
UV OV
1
V
V
V
Output Voltage High,
Output Voltage Low,
/
, VOH
/
VCC = 2.3 V; IUV OV = 2.5 mA
UV OV
0.1
0.3
/
, VOL
/
VCC = 1 V; IUV = 100 μA
0.01
0.15
THREE-STATE INPUT SEL
Low Level Input Voltage, VIL
0.4
V
High Level Input Voltage, VIH
Pin Voltage When Left in High-Z State, VZ
1.4
0.7
0.6
V
V
V
μA
μA
0.9
0.9
1.1
1.2
25
30
ISEL = 10 μA
TA = −40°C to +125°C
SEL High, Low Input Current, ISEL
Maximum SEL Input Current, ISEL(MAX)
SEL tied to VCC or GND
1 The maximum voltage on the VCC pin is limited by the input current. The VCC pin has an internal 6.5 V shunt regulator and, therefore, a low impedance supply greater
than 6 V may exceed the maximum allowed input current. When operating from a higher supply than 6 V, always use a dropper resistor.
Rev. B | Page 3 of 16
ADM2914
ABSOLUTE MAXIMUM RATINGS
Table 2.
Table 3. Thermal Resistance
Package Type
Parameter
Rating
θJA
Unit
VCC
UV, OV
−0.3 V to +6 V
−0.3 V to +16 V
−0.3 V to (VCC + 0.3 V)
−0.3 V to +7.5 V
10 mA
16-Lead QSOP
104
°C/W
TIMER
ESD CAUTION
VLx, VHx, LATCH, DIS, SEL
ICC
Reference Load Current (IREF
IUV, IOV
)
1 mA
10 mA
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
−65°C to +150°C
−40°C to +125°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 4 of 16
ADM2914
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
4
5
6
7
8
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
4
5
6
7
8
16
16
CC
15 TIMER
14 SEL
13 LATCH
12 UV
15 TIMER
14 SEL
13 DIS
12 UV
ADM2914-1
TOP VIEW
(Not to Scale)
ADM2914-2
TOP VIEW
(Not to Scale)
11 OV
11 OV
10 REF
10 REF
9
GND
9
GND
Figure 2. ADM2914-1 Pin Configuration
Figure 3. ADM2914-2 Pin Configuration
Table 4. Pin Function Descriptions
Mnemonic
Pin No. ADM2914-1 ADM2914-2 Description
1
3
2
4
5
7
VH1
VH2
VL1
VL2
VH3
VH4
VH1
VH2
VL1
VL2
VH3
VH4
Voltage High Input 1 and Voltage High Input 2. If the voltage monitored by VH1 or VH2 drops
below 0.5 V, an undervoltage condition is detected. Connect to VCC when not in use.
Voltage Low Input 1 and Voltage Low Input 2. If the voltage monitored by VL1 or VL2 rises above
0.5 V, an overvoltage condition is detected. Tie to GND when not in use.
Voltage High Input 3 and Voltage High Input 4. The polarity of these inputs is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage
and the voltage monitored by VH3 or VH4 drops below 0.5 V, an undervoltage condition is
detected. Conversely, when the input is configured as a negative voltage and the input drops
below 0.5 V, an overvoltage condition is detected. Connect to VCC when not in use.
6
8
VL3
VL4
VL3
VL4
Voltage Low Input 3 and Voltage Low Input 4. The polarity of these inputs is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage
and the voltage monitored by VL3 or VL4 rises above 0.5 V, an overvoltage condition is detected.
Conversely, when the input is configured as a negative voltage and the input rises above 0.5 V, an
undervoltage condition is detected. Tie to GND when not in use.
9
10
GND
REF
GND
REF
Device Ground.
Buffered Reference Output. This pin is a 1 V reference that is used as an offset when monitoring
negative voltages. This pin can source or sink 1 mA, and drive loads up to 1 nF. Larger capacitive
loads may lead to instability. Leave unconnected when not in use.
11
12
13
OV
OV
UV
Overvoltage Reset Output. OV is asserted low if a negative polarity input voltage drops below its
associated threshold or if a positive polarity input voltage exceeds its threshold. The ADM2914-1
allows OV to be latched low. The ADM2914-2 holds OV low for an adjustable timeout period
determined by the TIMER capacitor. This pin has a weak pull-up to VCC and can be pulled up to
16 V externally. Leave this pin unconnected when not in use.
Undervoltage Reset Output. UV is asserted low if a negative polarity input voltage exceeds its
associated threshold or if a positive polarity input voltage drops below its threshold. UV is held
low for an adjustable timeout period set by the external capacitor tied to the TIMER pin. The UV
pin has a weak pull-up to VCC and can be pulled up to 16 V externally via an external pull-up
resistor. Leave this pin unconnected when not in use.
UV
LATCH
OV Latch Bypass Input/Clear Pin. When pulled high, the OV latch is cleared. When held high, the
OVoutput has the same delay and output characteristics as the UV output. When pulled low, the
OV output is latched when asserted. (Applies only to the ADM2914-1.)
DIS
OV and UV Disable Input. When pulled high, the OV and UV outputs are held high irrespective of
the state of the VHx and VLx input pins. However, if a UVLO condition occurs, the OV and UV
outputs are asserted. This pin has a weak internal pull-down (2 ꢀA) to GND. Leave this pin
unconnected when not in use. (Applies only to the ADM2914-2.)
14
15
16
SEL
SEL
Input Polarity Select. This three-state input pin allows the polarity of VH3, VL3, VH4, and VL4 to be
configured. Connect to VCC or GND, or leave open to select one of three possible input polarity
configurations (see Table 5).
Adjustable Reset Delay Timer. Connect an external capacitor to the TIMER pin to program the
reset timeout delay. Refer to Figure 15 in the Typical Performance Characteristics section.
Connect this pin to VCC to bypass the timer.
Supply Voltage. VCC operates as a direct supply for voltages up to 6 V. For voltages greater than
6 V, it operates as a shunt regulator. A dropper resistor must be used in this configuration to limit
the current to less than 10 mA. When used without the resistor, the voltage at this pin must not
exceed 6 V. A 0.1 μF bypass capacitor or greater should be used.
TIMER
VCC
TIMER
VCC
Rev. B | Page 5 of 16
ADM2914
TYPICAL PERFORMANCE CHARACTERISTICS
6.80
0.505
0.504
0.503
6.75
6.70
6.65
6.60
6.55
6.50
6.45
6.40
0.502
0.501
0.500
0.499
–40°C
+25°C
+85°C
0.498
0.497
0.496
0.495
0
2
4
I
6
8
10
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80
TEMPERATURE (°C)
(mA)
CC
Figure 7. VCC Shunt Voltage vs. ICC
Figure 4. Input Threshold Voltage vs. Temperature
1.005
1.004
1.003
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
100
95
90
85
80
75
70
65
60
55
50
V
= 6V
CC
V
V
= 3.3V
= 2.3V
CC
CC
–40
–15
10
35
60
85
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Supply Current vs. Temperature
Figure 8. Buffered Reference Voltage vs. Temperature
6.80
1000
900
800
700
600
500
400
300
200
100
0
200µA
1mA
2mA
5mA
10mA
RESET ASSERTED
ABOVE THE LINE
6.75
6.70
6.65
6.60
6.55
6.50
6.45
6.40
V
= 6V
CC
V
= 2.3V
CC
–40
–15
10
35
60
85
0.1
1
10
100
TEMPERATURE (°C)
COMPARATOR OVERDRIVE (% OF V
)
TH
Figure 6. VCC Shunt Voltage vs. Temperature
Figure 9. Transient Duration vs. Comparator Overdrive
Rev. B | Page 6 of 16
ADM2914
3.0
2.5
2.0
1.5
12
11
10
9
VHx = 0.45V
SEL = V
CC
UV = 150mV
1.0
0.5
0
UV = 50mV
8
7
6
–0.5
0
1
2
3
4
5
6
–40
–15
10
35
60
85
SUPPLY VOLTAGE, V (V)
CC
TEMPERATURE (°C)
Figure 13. ISINK, IUV vs. VCC
UV OV
/ Timeout Period vs. Temperature
Figure 10.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1000
900
800
700
600
500
400
300
200
100
WITH 10kΩ PULL-UP
+85°C
+25°C
–40°C
WITHOUT PULL-UP
–0.1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
5
10
15
SUPPLY VOLTAGE, V (V)
I
(mA)
CC
SINK
UV
Figure 11.
Output Voltage vs. VCC
UV OV
Figure 14. / Voltage Output Low vs. Output Sink Current
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
10k
VHx = 0.55V
SEL = V
CC
1k
100
10
1
0.1
1
10
100
(nF)
1000
0
1
2
3
4
5
TIMER PIN CAPACITANCE C
SUPPLY VOLTAGE, V (V)
CC
TIMER
UV OV
/ Timeout Period vs. Capacitance
UV
Figure 15.
Figure 12.
Output Voltage vs. VCC
Rev. B | Page 7 of 16
ADM2914
THEORY OF OPERATION
VOLTAGE SUPERVISION
POLARITY CONFIGURATION
The ADM2914 supervises up to four voltage rails for overvol-
tage and undervoltage conditions. Two pins, VHx and VLx, are
assigned to monitor each rail, one for overvoltage detection and
the other for undervoltage detection. Each pin is connected to
the input of an internal voltage comparator, and its voltage level
is internally compared with a 0.5 V voltage reference with
accuracy of 1.5ꢀ.
The ADM2914 is capable of monitoring supply voltages of both
positive and negative polarities. The SEL pin is a three-state pin
that determines the polarity of Input 3 and Input 4. As summa-
rized in Table 5, the SEL pin is either connected to GND, VCC
,
or left unconnected.
When an input is configured to monitor a positive voltage, using
the three-resistor scheme shown in Figure 17, VHx is connected
to the high-side tap of the resistor divider and VLx is connected
to the low-side tap of the resistor divider.
The output of each of the internal undervoltage comparators is
UV
tied to a common
output pin. Likewise, the outputs of the
OV
internal overvoltage comparators are tied to a common
output pin.
Conversely, when an input is configured to monitor a negative
voltage, UVx and OVx are swapped internally. The negative
voltage for monitoring is then connected as shown in Figure 18.
VHx is still connected to the high-side tap and VLx is still
connected to the low-side tap. Within this configuration, an
undervoltage condition occurs when the monitored voltage is less
negative than the programmed threshold, and an overvoltage
condition occurs when the monitored voltage is more negative
than the configured threshold.
5V
3.3V
PSU
2.5V
1.8V
V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
SEL
TIMER
SYSTEM
ADM2914
UV
OV
LATCH/DIS
REF
GND
Figure 16. Typical Applications Diagram
Table 5. Polarity Configuration
Input 3
UV Condition
Input 4
SEL Pin
Polarity
Positive
Positive
Negative
OV Condition
VL3 > 0.5 V
VL3 > 0.5 V
VH3 < 0.5 V
Polarity
Positive
Negative
Negative
UV Condition
VH4 < 0.5 V
VL4 > 0.5 V
VL4 > 0.5 V
OV Condition
VL4 > 0.5 V
VH4 < 0.5 V
VH4 < 0.5 V
Connected to VCC
Left Unconnected
Connected to GND
VH3 < 0.5 V
VH3 < 0.5 V
VL3 > 0.5 V
Rev. B | Page 8 of 16
ADM2914
To trigger the undervoltage condition, the high-side voltage,
VPH, must exceed the 0.5 V threshold on the VHx pin. The
high-side voltage, VPH, is given by the following equation:
MONITORING PIN CONNECTIONS
Positive Voltage Monitoring Scheme
When monitoring a positive supply, the desired nominal
operating voltage for monitoring is denoted by VM, IM is the
nominal current through the resistor divider, VOV is the
overvoltage trip point, and VUV is the undervoltage trip point.
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
RY + RZ
RX + RY + RZ
VPH = VUV
= 0.5 V
Because RZ is already known, RY can be expressed as follows:
V
M
(0.5) VM
)
− RZ
R
(2)
RY
=
ADM2914
UVx
X
(
VUV
)
(I M
)
V
PH
VHx
VLx
When RY and RZ are known, RX is calculated using the following
equation:
R
Y
0.5V
VM
)
)
RX
=
− RZ − RY
(3)
OVx
(I M
V
PL
R
Z
If VM, IM, VOV, or VUV changes, each step must be recalculated.
Negative Voltage Monitoring Scheme
Figure 17. Positive Undervoltage/Overvoltage Monitoring Configuration
Figure 18 shows the circuit configuration for negative supply
voltage monitoring. To monitor the negative voltage, a 1 V
reference voltage is required to connect to the end node of the
voltage divider circuit. This reference voltage is generated
internally and is output through the REF pin.
Figure 17 illustrates the positive voltage monitoring input connec-
tion. Three external resistors, RX, RY, and RZ, divide the positive
voltage for monitoring, VM, into high-side voltage, VPH, and
low-side voltage, VPL. The high-side voltage is connected to the
corresponding VHx pin, and the low-side voltage is connected
to the corresponding VLx pin.
ADM2914
REF
R
Z
To trigger an overvoltage condition, the low-side voltage (in this
case, VPL) must exceed the 0.5 V threshold on the VLx pin. The
low-side voltage, VPL, is given by the following equation:
V
NH
VHx
OVx
0.5V
R
Y
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
RZ
VPL = VOV
= 0.5 V
RX + RY + RZ
UVx
V
NL
VLx
Also,
R
X
VM
I M
V
RX + RY + RZ
=
M
Figure 18. Negative Undervoltage/Overvoltage Monitoring Configuration
Therefore, RZ, which sets the desired trip point for the
overvoltage monitor, is calculated using the following equation:
The equations described in the Positive Voltage Monitoring
Scheme section need some minor modifications for use with
negative voltage monitoring. The 1 V reference voltage is added
to the overall voltage drop; it must therefore be subtracted from
VM, VUV, and VOV before using each in the previous equations.
(0.5)
(
VOV
(
VM
)
)
RZ
=
(1)
)
(
I M
To monitor a negative voltage level, the resistor divider circuit
divides the voltage differential level between the 1 V reference
voltage and the negative supply voltage into high-side voltage,
VNH, and low-side voltage, VNL. Similar to the positive voltage
monitoring scheme, the high-side voltage, VNH, is connected to
the corresponding VHX pin, and the low-side voltage, VNL, is
connected to the corresponding VLX pin. Refer to the Voltage
Monitoring Example section for more information.
Rev. B | Page 9 of 16
ADM2914
device, including all the tolerance factors, must fit within the
1.015 V to 1.05 V range. Similarly, the UV threshold range must
be between 0.95 V and 0.985 V.
THRESHOLD ACCURACY
The reset threshold accuracy is fundamental, especially at lower
voltage levels. Consider an FPGA application that requires a 1 V
core voltage input with tolerance of 5ꢀ, where the supply has a
specified regulation, for example, 1.5ꢀ. As shown in Figure 19, to
ensure that the supply is within the FPGA input voltage require-
ment range, its voltage level must be monitored for UV and OV
conditions. The voltage swing on the supply itself causes the
voltage band available for setting the monitoring threshold to be
quite narrow. In this example, the threshold voltages, including
the tolerances, must fit within a monitor region of only 0.035 V.
The ADM2914 device with 0.1ꢀ resistors can achieve this level
of accuracy.
The four worst-case scenarios of minimum and maximum
undervoltage and overvoltage thresholds are calculated as follows:
Minimum overvoltage threshold
⎛
⎞
⎟
⎟
⎠
(RX −0.1ꢀ)+ (RY −0.1ꢀ)
⎜
VOV _ MIN = (0.5 V −1.5ꢀ) 1+
⎜
(
RZ + 0.1ꢀ
)
⎝
⎛
(96,500 +6420)(0.999) ⎞
= 0.4925 1+
⎜
⎟
⎟
⎜
(96,500)(1.001)
⎝
⎠
=1.016 V >1.015 V
VOLTAGE
Maximum overvoltage threshold
1.05V
⎛
⎜
⎝
⎞
⎟
⎟
⎠
(RX +0.1ꢀ)+(RY + 0.1ꢀ)
3.5% RANGE FOR
⎜
OV MONITORING
VOV _ MAX = (0.5 V +1.5ꢀ) 1+
+5% TOLERANCE
(
RZ − 0.1ꢀ
)
1.015V
+1.5% SUPPLY REGULATION
1V CORE
VOLTAGE
=1.049 V <1.05 V
–1.5% SUPPLY
REGULATION
0.985V
The maximum and minimum overvoltage threshold values lie
within the 1.015 V to 1.05 V range specified. The minimum and
maximum undervoltage thresholds are calculated as follows:
–5% TOLERANCE
3.5% RANGE FOR
UV MONITORING
0.95V
tUOTO
UV
Minimum undervoltage threshold
TIME
⎛
⎜
⎝
⎞
⎟
⎟
⎠
(RX − 0.1ꢀ)
RY + 0.1ꢀ RZ + 0.1ꢀ
⎜
VUV _ MIN = (0.5 V −1.5ꢀ) 1+
Figure 19. Monitoring Threshold Accuracy Example
(
)
+
(
)
VOLTAGE MONITORING EXAMPLE
= 0.953 V > 0.95 V
To illustrate how the ADM2914 device works in a real application,
consider the 1 V input example shown in Figure 19, with the
addition of a −12 V rail.
Maximum undervoltage threshold
(RX + 0.1ꢀ)
RY −0.1ꢀ RZ −0.1ꢀ
⎛
⎞
⎟
⎟
⎠
⎜
VUV _ MAX = (0.5 V + 1.5ꢀ) 1+
⎜
⎝
The first step is to choose the nominal current flow through
both voltage divider circuits, for example, 5 μA.
(
)
+
(
)
= 0.984 V < 0.985 V
For the 1 V 5ꢀ input, due to the specified 1.5ꢀ regulation of
the supply, the UV and OV thresholds should be set in the middle
of the voltage monitoring band. In this case, on the 3.25ꢀ
points of the supply, the UV threshold is 0.9675 V and the OV
threshold is 1.0325 V.
Again, these values fit within the specified undervoltage
monitoring range. All four worst-case scenarios satisfy the
tolerance requirement; therefore, the design approach is valid.
–12V RAIL
1V RAIL
5V
Input these values into Equation 1.
(0.5)
1.0325
5×10−6
Insert the value of RZ into Equation 2.
(0.5)
0.9675
5×10−6
1
( )
RZ
=
≈ 96.5 kΩ
96.5kΩ
V
CC
(
)
(
)
VH1
VL1
VL3
VH3
REF
OV
UV
6.42Ω
96.5kΩ
2.49MΩ
23.4kΩ
89.8kΩ
1
( )
ADM2914
RY
=
−96.5 kΩ ≈ 6.42 kΩ
(
)(
)
Then substitute the calculated values for RZ and RY into
Equation 3.
SEL
1
GND
RX
=
−96.5 kΩ −6.42 kΩ ≈ 96.5 kΩ
5×10−6
This design approach meets the application specifications. As
described previously, the 1 V rail is specified with an input
requirement of 5ꢀ and a supply tolerance of 1.5ꢀ. This
effectively means that the OV threshold of the monitoring
Figure 20. Positive and Negative Supply Monitor Example
Rev. B | Page 10 of 16
ADM2914
Next, consider a −12 V input, which is specified with a 20ꢀ
input. The threshold accuracy required by the supply is chosen
to be within 5ꢀ of the −12 V rail. Therefore, the overvoltage
threshold is set to −13.5 V, and the undervoltage threshold is
−10.5 V. The negative voltage scheme configuration requires
that the 1 V reference voltage be accounted for in Equation 1 to
Equation 3. The 1 V reference voltage is subtracted from VM,
VUV, and VOV, and the absolute value of the result is taken.
Refer to Figure 15 in the Typical Performance Characteristics
section, which illustrates the delay time as a function of the
timer capacitor value. A minimum capacitor value of 10 pF is
required. The chosen timer capacitor must have a leakage current
that is less than the 1.3 μA TIMER pin charging current. To
bypass the timeout period, connect the TIMER pin to VCC.
VHx MONITOR TIMING
VHx
V
UOT
Equation 1 becomes
(0.5)
−13.5 −1
Insert the value of RZ into Equation 2.
−12 −1
RZ
=
≈ 89.8 kΩ
tUOD
tUOTO
(
)
(
5×10−6
)
1V
UV
(0.5)
−12 −1
RY
=
−89.8 kΩ ≈ 23.4 kΩ
(
−10.5−1
)
(
5×10−6
)
VHx MONITOR TIMING (TIMER PIN TIEDTO V
CC
)
To calculate RX, insert the value of RZ and RY into Equation 3.
V
UOT
VHx
(
−12 −1
5×10−6
)
−
RX
=
(
89.8 kΩ
)
−
(
23.4 kΩ ≈ 2.49 MΩ
)
tUOD
tUOD
POWER-UP AND POWER-DOWN
UV
On power-up, when VCC reaches 1 V, the active low
output
output pulls up to VCC. When the vol-
tage on the VCC pin reaches 1 V, the ADM2914 is guaranteed to
UV OV
high. When VCC exceeds 1.9 V (minimum),
1V
UV
OV
is asserted, and the
assert
low and
WHEN AN INPUT IS CONFIGURED TO MONITOR A NEGATIVE VOLTAGE,
VHx WILL TRIGGER AN OVERVOLTAGE CONDITION.
the VHx and VLx inputs take control. When VCC and each of
the VHx inputs are valid, an internal timer begins. Subsequent
Figure 21. VHx Positive Voltage Monitoring Timing Diagram
UV
to an adjustable time delay,
weakly pulls high.
VLx MONITOR TIMING
UV/OV TIMING CHARACTERISTICS
V
VLx
UOT
UV
is an active low output. It is asserted when any of the four
monitored voltages is below its associated threshold. When the
voltage on the VCC pin is above 2 V, an internal timer holds
tUOD
tUOTO
UV
low for an adjustable period, tUOTO, after the voltage on all
1V
OV
the monitoring rails rises above their thresholds. This allows
time for all monitored power supplies to stabilize after power-
up. Similarly, any monitored voltage that falls below its threshold
initiates a timer reset, and the timer starts again when all the
monitoring rails rise above their thresholds.
VLx MONITOR TIMING (TIMER PIN TIEDTO V
CC
)
V
VLx
UOT
UV
OV
outputs are held asserted after all faults have
The
and
cleared for an adjustable timeout period, determined by the
value of the external capacitor attached to the TIMER pin.
tUOD
tUOD
TIMER CAPACITOR SELECTION
1V
OV
UV
OV
timeout period on the ADM2914 is programma-
The
and
ble via the external timer capacitor, CTIMER, placed between the
TIMER pin and ground. The timeout period, tUOTO, is calculated
using the following equation:
WHEN AN INPUT IS CONFIGURED TO MONITOR A NEGATIVE VOLTAGE,
VLx WILL TRIGGER AN UNDERVOLTAGE CONDITION.
Figure 22. VLx Positive Voltage Monitoring Timing Diagram
CTIMER = (tUOTO )(115)(10−9 ) F/sec
Rev. B | Page 11 of 16
ADM2914
UV AND OV RISE AND FALL TIMES
UNDERVOLTAGE LOCKOUT (UVLO)
The ADM2914 has an undervoltage lockout circuit that monitors
the voltage on the VCC pin. When the voltage on VCC drops
UV
OV
output rise times (from 10ꢀ to 90ꢀ) can be
The
approximated using the following formula:
tR ≈ 2.2(RPULL−UP )(CLOAD
and
UV
below 1.9 V (minimum), the circuit is activated. The
output
output is cleared and not allowed to
UV
)
OV
is asserted and the
assert. When VCC recovers,
where:
exhibits the same timing
RPULL-UP is the internal weak pull-up resistance with an approx-
imate value of 400 kꢁ at room temperature with VCC > 1 V.
LOAD is the external load capacitance on the output pin.
characteristics as if an undervoltage condition had occurred
on the inputs.
C
SHUNT REGULATOR
UV OV
or
When a fault occurs, the
expressed as
output fall time can be
The ADM2914 is powered via the VCC pin. The VCC pin can
be directly connected to a voltage rail of up to 6 V. In this
mode, the supply current of the device does not exceed
100 μA. An internal shunt regulator allows the ADM2914 to
operate at voltage levels greater than 6 V by simply placing a
dropper resistor in series between the supply rail and the VCC
pin to limit the input current to less than 10 mA.
tF ≈ 2.2(RPULL−DOWN )(CLOAD
)
where RPULL-DOWN is the internal pull-down resistance, which is
approximately 50 ꢁ. Assuming a load capacitance of 150 pF, the
fall time is 16.5 ns.
UV/OV OUTPUT CHARACTERISTICS
Once the supply voltage, VIN, has been established, an
appropriate value for the dropper resistor can be calculated.
Begin by determining the maximum supply current
required, ICCtotal, by adding the current drawn from the
reference and/or the pull resistors between the outputs and
the VCC pin to the maximum specified supply current. The
minimum and maximum shunt regulator voltage specified
in Table 1, VSHUNT min and VSHUNT max, are also required in the
following calculations.
OV
UV
outputs have a strong pull-down to
Both the
and
ground and a weak internal pull-up to VCC. This permits the pins
to behave as open-drain outputs. When the rise time on the pin
is not critical, the weak pull-up removes the requirement for an
external pull-up resistor. The open-drain configuration allows
for wire-OR’ing of outputs, which is particularly useful when
more than one signal needs to pull down on the output.
UV
At VCC = 1 V, a maximum VOL = 0.15 V at
OV
is guaranteed. At
is almost turned on.
OV
V
CC = 1 V, the weak pull-up current on
Calculate the maximum and minimum dropper resistor
values
Consequently, if the state and pull-up strength of the
important at very low VCC, an external pull-up resistor of no more
than 100 kꢁ is advised. By adding an external pull-up resistor,
pin are
VIN min −VSHUNTmax
RMAX
=
OV
the pull-up strength on the
pin is greater. Therefore, if it is
ICCtotal
connected in a wire-OR’ed configuration, the pull-down strength
of any single device must account for this additional pull-up
strength.
V
IN max −VSHUNT min
RMIN
=
100ꢂ
GLITCH IMMUNITY
Based on these values, choose a real-world resistor value
within this range. Then, given the specified accuracy of this
resistor, calculate the minimum and maximum real resistor
value variation, RREALmin and RREALmax, respectively.
The ADM2914 is immune to short transients that may occur
on the monitored voltage rails. The device contains internal
filtering circuitry that provides immunity to fast transient
glitches. Figure 9 illustrates glitch immunity performance by
showing the maximum transient duration without causing a
reset pulse. Glitch immunity makes the ADM2914 suitable for
use in noisy environments.
The maximum device power is calculated as follows:
⎡
⎢
⎣
⎤
⎥
⎦
VIN max −VSHUNTmax
)
− IccTOTAL
PDeviceMax =VSHUNTmax
+
RREAL min
VSHUNTmax ICCtotal
To check that the calculated value of the resistor will be
acceptable, calculate the maximum device temperature rise;
TempRISEmax = θJA PDeviceMax
Add this value to the ambient operating temperature. If the
resistor value is acceptable, the result will lie within the
specified operating temperature range of the device, −40°C
to +85°C.
Rev. B | Page 12 of 16
ADM2914
OV LATCH (ADM2914-1)
DISABLE (ADM2914-2)
UV
OV
outputs,
Pulling the DIS pin high disables both the
and
LATCH
If an overvoltage condition occurs when the
pin is
and forces both outputs to remain weakly pulled high, regard-
less of any faults that are detected at the inputs. If a UVLO
OV
OV
LATCH
pulled low, the
the latch. If an
pin latches low. Pulling
LATCH
high clears
is high, the
condition clears while
UV
condition is detected, the
however, the timeout function is bypassed. As soon as the
UV
output is asserted and pulls low;
OV
latch is bypassed and the
pin behaves in the same way as the
UV
LATCH
OV
pin, with an identical timeout period. If the
pulled low while the timeout period is active, the
latches low, as in normal operation.
pin is
pin
UVLO condition clears, the
output pulls high. To guarantee
normal operation when the pin is left unconnected, DIS has a
weak 2 μA internal pull-down current.
Rev. B | Page 13 of 16
ADM2914
TYPICAL APPLICATIONS
1
5V
1
1
1
3.3V
2.5V
1.8V
PSU
1.5MΩ
10.7kΩ
V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
SEL
1MΩ
11.7kΩ
174kΩ
TIMER
SYSTEM
111kΩ
1.82kΩ
27.1kΩ
ADM2914
162kΩ
UV
OV
137kΩ
3.48kΩ
51.7kΩ
LATCH/DIS
REF
GND
NOTES
1
1.5% SUPPLY TOLERANCE AND 5% INPUT TOLERANCE REQUIREMENT.
Figure 23. Typical Application Diagram for Monitoring 5 V, 3.3 V, 2.5 V, and 1.8 V
1
+12V
PSU
1kΩ
2
–5V
1.98MΩ
5.62kΩ
V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
SEL
TIMER
SYSTEM
ADM2914
83.5kΩ
UV
OV
1.96MΩ
27.1kΩ
167kΩ
LATCH/DIS
REF
GND
NOTES
1
1.5% SUPPLY TOLERANCE AND 5% INPUT TOLERANCE REQUIREMENT.
3% SUPPLY TOLERANCE AND 15% INPUT TOLERANCE REQUIREMENT.
2
Figure 24. Typical Application Diagram for Monitoring +12 V and −5 V
Rev. B | Page 14 of 16
ADM2914
1
1
+48V
+16V
2
PSU
–3.3V
3
–48V
11.5MΩ
8.45kΩ
V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
SEL
681kΩ
1.43kΩ
21.3kΩ
TIMER
SYSTEM
1.5MΩ
ADM2914
117kΩ
UV
OV
26.1kΩ 2.87MΩ
187kΩ
5.56kΩ
27.1kΩ
LATCH/DIS
REF
GND
NOTES
1
1.5% SUPPLY TOLERANCE AND 10% INPUT TOLERANCE REQUIREMENT.
2% SUPPLY TOLERANCE AND 15% INPUT TOLERANCE REQUIREMENT.
4% SUPPLY TOLERANCE AND 15% INPUT TOLERANCE REQUIREMENT.
2
3
Figure 25. Typical Application Diagram for Monitoring +48 V, +16 V, −3.3 V, and −48 V
Rev. B | Page 15 of 16
ADM2914
OUTLINE DIMENSIONS
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
16
1
9
8
0.158 (4.01)
0.154 (3.91)
0.150 (3.81)
0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
0.010 (0.25)
0.006 (0.15)
0.020 (0.51)
0.010 (0.25)
0.069 (1.75)
0.053 (1.35)
0.065 (1.65)
0.049 (1.25)
0.010 (0.25)
0.004 (0.10)
0.041 (1.04)
REF
SEATING
PLANE
8°
0°
0.025 (0.64)
BSC
0.050 (1.27)
0.016 (0.41)
COPLANARITY
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-137-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 26. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1
Temperature Range
Package Description
Package Option
RQ-16
RQ-16
RQ-16
RQ-16
ADM2914-1ARQZ
ADM2914-1ARQZ-RL7
ADM2914-2ARQZ
ADM2914-2ARQZ-RL7
EVAL-ADM2914EBZ
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Shrink Small Outline Package [QSOP]
16-Lead Shrink Small Outline Package [QSOP]
16-Lead Shrink Small Outline Package [QSOP]
16-Lead Shrink Small Outline Package [QSOP]
Evaluation Board
1 Z = RoHS Compliant Part.
©2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08170-0-2/10(B)
Rev. B | Page 16 of 16
相关型号：
EVAL-ADM3052EBZ
Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator
ADI
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