EXB-2HV330JV [ADI]
ADSP-BF506F EZ-KIT Lite® Evaluation System Manual; ADSP- BF506F EZ -KIT精简版?评价体系手册型号: | EXB-2HV330JV |
厂家: | ADI |
描述: | ADSP-BF506F EZ-KIT Lite® Evaluation System Manual |
文件: | 总75页 (文件大小:1148K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ADSP-BF506F EZ-KIT Lite®
Evaluation System Manual
Revision 1.0, December 2009
Part Number
82-000226-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu-
ment may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by impli-
cation or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, Blackfin, the Blackfin logo,
EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog
Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-BF506F EZ-KIT Lite is designed to be used solely in a labora-
tory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-BF506F EZ-KIT Lite is currently being processed for certifica-
tion that it complies with the essential requirements of the European
EMC directive 89/336/EEC amended by 93/68/EEC and therefore carries
the “CE” mark.
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
CONTENTS
PREFACE
Product Overview ........................................................................... xi
Purpose of This Manual ................................................................. xii
Intended Audience ........................................................................ xiii
Manual Contents .......................................................................... xiii
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ...................................................... xiv
Supported Processors ....................................................................... xv
Product Information ....................................................................... xv
Analog Devices Web Site ........................................................... xv
VisualDSP++ Online Documentation ....................................... xvi
Technical Library CD ............................................................... xvi
Related Documents ................................................................. xvii
Notation Conventions .................................................................. xviii
USING ADSP-BF506F EZ-KIT LITE
Package Contents .......................................................................... 1-2
Default Configuration ................................................................... 1-3
EZ-KIT Lite Installation ............................................................... 1-3
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
v
Contents
EZ-KIT Lite Session Startup ......................................................... 1-5
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-7
Internal Flash Memory Interface ................................................... 1-8
SPI Flash Memory Interface .......................................................... 1-9
Power-On-Self Test ....................................................................... 1-9
LEDs and Push Buttons .............................................................. 1-10
JTAG Interface ........................................................................... 1-10
Expansion Interface II ................................................................. 1-11
VDDINT Programmable Regulator ............................................ 1-12
Power Measurements .................................................................. 1-12
Example Programs ...................................................................... 1-13
Background Telemetry Channel .................................................. 1-13
Reference Design Information ..................................................... 1-14
ADSP-BF506F EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
Programmable Flags ...................................................................... 2-3
Push Buttons and Switches ............................................................ 2-7
UART Setup Switch (SW1) ..................................................... 2-8
Boot Mode Select Switch (SW2) .............................................. 2-8
Push Button Enable Switch (SW3) .......................................... 2-9
ADC Enable Switch (SW4) ..................................................... 2-9
CAN Enable Switch (SW5) ..................................................... 2-9
Reset Push Button (SW6) ........................................................ 2-9
vi
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Contents
Programmable Flag Push Buttons (SW7–8) ............................ 2-10
ADC Loopback Switches (SW9–10) ....................................... 2-10
Jumpers ...................................................................................... 2-11
SPI FLASH CS Enable Jumper (JP1) ..................................... 2-11
Voltage Reference Select Jumper (JP2) ................................... 2-12
VDDEXT Power Jumper (JP3) .............................................. 2-12
VDDINT Power Jumper (JP4) .............................................. 2-12
VDDFLASH Power Jumper (JP5) .......................................... 2-12
ADC Voltage Reference (JP6) ................................................ 2-13
LEDs .......................................................................................... 2-14
Reset LED (LED1) ................................................................ 2-15
GPIO LEDs (LED2–4) ......................................................... 2-15
Power LED (LED5) ............................................................... 2-15
Connectors ................................................................................. 2-16
RS-232 Connector (J1) .......................................................... 2-17
CAN Connector (J2) ............................................................. 2-17
SD Connector (J3) ................................................................ 2-17
JTAG Connector (P1) ........................................................... 2-17
Expansion Interface II Connectors (P2 and P4) ...................... 2-18
Expansion Interface II Connector (P3) ................................... 2-18
DMAX Land Grid Array Connectors (P5–6) .......................... 2-19
ADC Input Connector (P7) ................................................... 2-19
Power Connector (P9) ........................................................... 2-19
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
vii
Contents
ADSP-BF506F EZ-KIT LITE BILL OF MATERIALS
ADSP-BF506F EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
Processor and SPI Flash ................................................................ B-2
Processor Power, Bypass CAPs ....................................................... B-3
ADC Buffers ................................................................................ B-4
ADC ............................................................................................ B-5
CAN ............................................................................................ B-6
Reset, LEDs, Push Buttons, UART, SD ......................................... B-7
Expansion Interface, DMAX ......................................................... B-8
Dual Power Regulator ................................................................... B-9
Power ......................................................................................... B-10
INDEX
viii
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
PREFACE
®
Thank you for purchasing the ADSP-BF506F EZ-KIT Lite , Analog
Devices, Inc. evaluation system for the ADSP-BF504/BF506(F) Blackfin
processors.
®
Blackfin processors embody a new type of embedded processor designed
specifically to meet the computational demands and power constraints of
today’s embedded audio, video, and communications applications. They
deliver breakthrough signal-processing performance and power efficiency
within a reduced instruction set computing (RISC) programming model.
Blackfin processors support a media instruction set computing (MISC)
architecture. This architecture is the natural merging of RISC, media
functions, and digital signal processing (DSP) characteristics. Blackfin
processors deliver signal-processing performance in a microprocessor-like
environment.
Based on the Micro Signal Architecture (MSA), Blackfin processors com-
bine a 32-bit RISC instruction set, dual 16-bit multiply accumulate
(MAC) DSP functionality, and eight-bit video processing performance
that had previously been the exclusive domain of very-long instruction
word (VLIW) media processors.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ix
The evaluation board is designed to be used in conjunction with the Visu-
®
alDSP++ development environment to test capabilities of the
ADSP-BF504/BF506(F) Blackfin processors. The VisualDSP++ develop-
ment environment aids advanced application code development and
debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-BF506F assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the processor from a personal computer (PC) is achieved
through a USB port or an external JTAG emulator. The USB interface
provides unrestricted access to the ADSP-BF506F processor and evalua-
tion board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
The ADSP-BF506F EZ-KIT Lite provides example programs to demon-
strate the evaluation board capabilities.
An EZ-KIT Lite is a licensed product that offers an unrestricted
L evaluation license for the first 90 days. For details about evaluation
license restrictions after the 90 days, refer to “Evaluation License
Restrictions” on page 1-7 in this manual and the VisualDSP++
Installation Quick Reference Card.
x
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Preface
Product Overview
The board features:
• Analog Devices ADSP-BF506F Blackfin processor
D Core performance up to 400 MHz
D External bus performance up to 80 MHz
D 120-pin LQFP package
D 25 MHz crystal
• Programmable VDDINT core power
D Analog Devices AD5258 TWI digital potentiometer
D Analog Devices ADP1715 low dropout linear regulator
• Internal parallel flash memory
D Numonyx M58WT032 – 4 MB (2M x 16 bits)
• SPI flash memory
D Numonyx M25P16 – 16 Mb
• Internal ADC
D Analog Devices AD7266 2 MSPS, 12-bit, 3-channel SAR
analog-to-digital converter
D Twelve single-ended inputs
D Six differential inputs
• Universal asynchronous receiver/transmitter (UART)
D ADM3202 RS-232 line driver/receiver
D DB9 female connector
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
xi
Purpose of This Manual
• LEDs
D Five LEDs: one board reset (red), three general-purpose
(amber), and one power (green)
• Push buttons
D Three push buttons: one reset and two programmable flags
with debounce logic
• Expansion interface II
D Next generation of the expansion interface design, provides
access to most of the processor signals
• Land grid array
D Easy probing of all port pins
• Other features
D JTAG ICE 14-pin header
D Processor power measurement jumpers
For information about the hardware components of the EZ-KIT Lite,
refer to “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on page A-1.
Purpose of This Manual
The ADSP-BF506F EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and pro-
vides guidelines for running your own code on the ADSP-BF506F
EZ-KIT Lite. Finally, a schematic and a bill of materials are provided for
reference.
xii
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Preface
The product software installation is detailed in the VisualDSP++ Installa-
tion Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-BF50x Blackfin Processor Hardware Reference and
Blackfin Processor Instruction Set Reference) that describe your target
architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-BF506F EZ-KIT Lite” on page 1-1.
Describes EZ-KIT Lite functionality from a programmer’s perspec-
tive and provides an easy-to-access memory map.
• Chapter 2, “ADSP-BF506F EZ-KIT Lite Hardware Reference” on
page 2-1.
Provides information on the EZ-KIT Lite hardware components.
• Appendix A, “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on
page A-1.
Provides a list of components used to manufacture the EZ-KIT
Lite board.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
xiii
What’s New in This Manual
• Appendix B, “ADSP-BF506F EZ-KIT Lite Schematic” on
page B-1.
Provides the resources to allow board-level debugging or to use as a
reference guide. Appendix B is part of the online Help.
What’s New in This Manual
This is the first edition of the ADSP-BF506F EZ-KIT Lite Evaluation Sys-
tem Manual.
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
processor.tools.support@analog.com
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
xiv
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Preface
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-BF504,
ADSP-BF504F, and ADSP-BF506F Blackfin embedded processors.
Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest infor-
mation about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
xv
Product Information
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
Visit MyAnalog.com to sign up. If you are a registered user, just log on.
Your user name is your e-mail address.
VisualDSP++ Online Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documenta-
tion. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File
Description
.chm
Help system files and manuals in Microsoft help format
.htmor
.html
Dinkum Abridged C++ library and FLEXnet License Tools software documenta-
tion. Viewing and printing the .htmlfiles requires a browser, such as Internet
Explorer 6.0 (or higher).
.pdf
VisualDSP++ and processor manuals in PDF format. Viewing and printing the
.pdffiles requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, Visu-
alDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
xvi
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Preface
To order the technical library CD, go to http://www.analog.com/proces-
sors/technical_library, navigate to the manuals page for your
processor, click the request CD check mark, and fill out the order form.
Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.
Related Documents
For information on product related development software, see the follow-
ing publications.
Table 1. Related Processor Publications
Title
Description
ADSP-BF504/BF506(F) Blackfin Embedded Pro-
cessor Data Sheet
General functional description, pinout, and
timing of the processor.
ADSP-BF50x Blackfin Processor Hardware Refer-
ence
Description of the internal processor archi-
tecture and all register functions.
Blackfin Processor Programming Reference
Description of all allowed processor assem-
bly instructions.
Table 2. Related VisualDSP++ Publications
Title
Description
ADSP-BF506F EZ-KIT Lite Evaluation System
Manual
Description of the hardware capabilities of
the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.
VisualDSP++ User’s Guide
Description of the VisualDSP++ features
and usage.
VisualDSP++ Assembler and Preprocessor Manuals Description of the assembler function and
commands.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
xvii
Notation Conventions
Table 2. Related VisualDSP++ Publications (Cont’d)
Title
Description
VisualDSP++ C/C++ Complier and Library Man- Description of the complier function and
ual for Blackfin Processors
commands for Blackfin processors.
VisualDSP++ Linker and Utilities Manual
Description of the linker function and com-
mands.
VisualDSP++ Loader and Utilities Manual
Description of the loader/splitter function
and commands.
VisualDSP++ Device Drivers and System Services
Manual for Blackfin Processors
Description of the device drivers’ and system
services’ functions and commands.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close com-
mand appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as thisor
that. One or the other is required.
[this | that]
[this,…]
Optional items in syntax descriptions appear within brackets and sepa-
rated by vertical bars; read the example as an optional this or that.
Optional item lists in syntax descriptions appear within brackets delim-
ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothicfont.
filename
Non-keyword placeholders appear in text with italic style format.
xviii
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Preface
Example
Description
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
L
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
a
[
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
xix
Notation Conventions
xx
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1 USING ADSP-BF506F EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-BF506F EZ-KIT Lite evaluation system.
The following topics are covered.
• “Package Contents” on page 1-2
• “Default Configuration” on page 1-3
• “EZ-KIT Lite Installation” on page 1-3
• “EZ-KIT Lite Session Startup” on page 1-5
• “Evaluation License Restrictions” on page 1-7
• “Memory Map” on page 1-7
• “Internal Flash Memory Interface” on page 1-8
• “SPI Flash Memory Interface” on page 1-9
• “Power-On-Self Test” on page 1-9
• “LEDs and Push Buttons” on page 1-10
• “JTAG Interface” on page 1-10
• “Expansion Interface II” on page 1-11
• “VDDINT Programmable Regulator” on page 1-12
• “Power Measurements” on page 1-12
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-1
Package Contents
• “Example Programs” on page 1-13
• “Background Telemetry Channel” on page 1-13
• “Reference Design Information” on page 1-14
For information about the graphical user interface, including the boot
loading, target options, and other facilities of the EZ-KIT Lite system,
refer to the online Help.
For more detailed information about the ADSP-BF506F Blackfin proces-
sor, see documents referred to as “Related Documents”.
Package Contents
Your ADSP-BF506F EZ-KIT Lite package contains the following items.
• ADSP-BF506F EZ-KIT Lite board
• VisualDSP++ Installation Quick Reference Card
• CD containing:
D VisualDSP++ software
D ADSP-BF506F EZ-KIT Lite debug software
D USB driver files
D Example programs
• USB cable
Contact the vendor where you purchased your EZ-KIT Lite or contact
Analog Devices, Inc. if any item is missing.
1-2
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human body
and equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
Store unused EZ-KIT Lite boards in the protective shipping package.
The ADSP-BF506F EZ-KIT Lite board is designed to run outside your
personal computer as a stand-alone unit. You do not have to open your
computer case.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which can dam-
age some components. Figure 1-1 shows the default jumper settings,
switches, connector locations, and LEDs used in installation. Confirm
that your board is in the default configuration before using the board.
EZ-KIT Lite Installation
For correct operation, install the software and hardware in the order pre-
sented in the VisualDSP++ Installation Quick Reference Card. Substitute
instructions in step 3 with instructions in this section.
There are two options to connect the EZ-KIT Lite hardware to a personal
computer (PC) running VisualDSP++ 5.0: via an Analog Devices emula-
tor or va a standalone debug module. The standalone debug agent allows a
debug agent to interface to the ADSP-BF506F EZ-KIT Lite. The standal-
one debug agent is shipped with the kit.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-3
EZ-KIT Lite Installation
Figure 1-1. EZ-KIT Lite Hardware Setup
To connect the EZ-KIT Lite to a PC via an emulator:
1. Plug the 5V adaptor into connector P9 (labeled 5V) or plug the
USB cable into ZP1 (labeled USB).
2. Attach the emulator to the header connector P1 (labeled JTAG) on
the EZ-KIT Lite.
1-4
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
To connect the EZ-KIT Lite to a PC via the debug agent:
1. Plug one side of the provided USB cable into the USB connector of
the debug agent ZP1 (labeled USB). Plug the other side of the cable
into a USB port of the PC running VisualDSP++ .
2. Verify that the yellow USB monitor LED on the debug agent,
ZLED2, is lit. This signifies that the board is communicating prop-
erly with the host PC and ready to run VisualDSP++.
EZ-KIT Lite Session Startup
1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start–>Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 2.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
• From the Session menu, Connect to Target.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-5
EZ-KIT Lite Session Startup
3. The Select Processor page of the wizard appears on the screen.
Ensure Blackfin is selected in Processor family. In Choose a target
processor, select ADSP-BF506F. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
5. The Select Platform page of the wizard appears on the screen.
Ensure that the selected platform is ADSP-BF506F EZ-KIT Lite
via Debug Agent. Specify your own Session name for your session
or accept the default name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
6. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-KIT Lite. Once
connected, the main window’s title is changed to include the ses-
sion name set in step 6.
To disconnect from a session, click the disconnect button
or select Session–>Disconnect from Target.
L
To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.
1-6
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
Evaluation License Restrictions
The ADSP-BF506F EZ-KIT Lite installation is part of the the Visu-
alDSP++ installation. The EZ-KIT Lite is a licensed product that offers an
unrestricted evaluation license for the first 90 days. Once the initial unre-
stricted 90-day evaluation license expires:
• VisualDSP++ restricts a connection to the ADSP-BF506F EZ-KIT
Lite via the USB debug agent interface only. Connections to simu-
lators and emulation products are no longer allowed.
• The linker restricts a user program to to ¼ of internal memory
(16 Kbytes), which is 4 Kbytes for code space with no restrictions
for data space.
• The EZ-KIT Lite hardware must be connected and powered up to
use VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-BF506F processor has internal static random access memory
(SRAM) used for instruction or data storage. See Table 1-1. The internal
memory details can be found in the ADSP-BF50x Blackfin Processor Hard-
ware Reference.
The ADSP-BF506F EZ-KIT Lite board includes external serial peripheral
interconnect (SPI) flash and internal flash memories. See Table 1-2; see
also the following “Internal Flash Memory Interface” and “SPI Flash
Memory Interface”.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-7
Internal Flash Memory Interface
Table 1-1. EZ-KIT Lite Internal Memory Map
Start Address
0xFFE0 0000
0xFFC0 0000
0xFFB0 1000
0xFFB0 0000
0xFFA1 4000
0xFFA0 8000
0xFFA0 4000
0xFFA0 0000
0xFF80 8000
0xFF80 4000
0xFF80 0000
0xEF00 1000
Content
CORE MEMORY MAPPED REGISTERS
SYSTEM MEMORY MAPPED REGISTERS
Reserved
INTERNAL SCRATCHPAD RAM (4K BYTES)
Reserved
Reserved
L1 INSTRUCTION SRAM/CACHE (16K BYTES)
L1 INSTRUCTION BANK A SRAM (16K BYTES)
Reserved
L1 DATA BANK A SRAM/CACHE (16K BYTES)
L1 DATA BANK A SRAM (16K BYTES)
Reserved
Table 1-2. EZ-KIT Lite External (Interface-Accessible) Memory Map
Start Address
0xEF00 0000
0x2040 0000
0x2000 0000
0x0000 0000
Content
BOOT ROM (4K BYTES)
Reserved
SYNC FLASH (32M BITS)
Reserved
Internal Flash Memory Interface
Internal parallel flash memory of the ADSP-BF506F EZ-KIT Lite is a
4 MB (2M x 16 bits) Numonyx M58WT032 device, which is internal to
the processor. The address range for flash memory is 0x2000 0000 to
0x203F FFFF.
1-8
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
By default, the EZ-KIT Lite boots from SPI flash memory. The processor
boots from internal parallel flash memory if the boot mode select switch
(SW2) is set to position 1 or 2; see “Boot Mode Select Switch (SW2)” on
page 2-8.
Flash memory code can be modified. For instructions, refer to the online
Help and example program included in the EZ-KIT Lite installation
directory.
SPI Flash Memory Interface
SPI flash memory of the ADSP-BF506F EZ-KIT Lite is a 16 Mb Num-
onyx M25P16 device. The device is selected via SPI0_SEL1.
SPI flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to “Power-On-Self Test”
on page 1-9.
Power-On-Self Test
The power-on-self-test program (POST) tests all EZ-KIT Lite peripherals
and validates functionality as well as connectivity to the processor. Once
assembled, each EZ-KIT Lite if fully tested for an extended period of time
with a POST. All EZ-KIT Lite boards are shipped with a POST
pre-loaded into one of their on-board flash memories. The POST is exe-
cuted by resetting the board and pressing the proper push button(s). The
POST also can be used for reference for a custom software design or hard-
ware troubleshooting. Note that the source code for the POST program is
included in the VisualDSP++ installation directory along with the
readme.txt file, which describes how the board is configured to run a
POST.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-9
LEDs and Push Buttons
LEDs and Push Buttons
The EZ-KIT Lite provides two push buttons and three LEDs for gen-
eral-purpose I/O.
The three LEDs, labeled LED2 through LED4, are accessed via the PF0–2
GPIO ports of the processor. For information on how to program the flag
pins, refer to the ADSP-BF50x Blackfin Processor Hardware Reference
Manual.
The two general-purpose push buttons are labeled PB0and PB1. The status
of each individual button can be read through programmable flag inputs
PF3 and PF4. The flag reads a ‘1’ when a corresponding switch is being
pressed. When the switch is released, the flag reads a ‘0’. A connection
between the push buttons and processor inputs is established through
a DIP switch, SW3. The switch should be turned off when another source is
driving the signals.
An example program is included in the ADSP-BF506F installation direc-
tory to demonstrate functionality of the LEDs and push buttons.
The LED and push button signals also are connected to the expansion
interface II; see “Expansion Interface II Connectors (P2 and P4)” on
page 2-18 and “Expansion Interface II Connector (P3)” on page 2-18.
JTAG Interface
The board contains an on-board debug agent that operates via a USB port.
The ADSP-BF506F EZ-KIT Lite receives all of its power via USB; there-
fore, no power supply is required.
For debugging, the JTAG connector (P1) allows an external emulator
(USB-ICE or HPUSB-ICE) to connect to the board, instead of the
on-board debug agent.
1-10
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/en/embedded-processing-dsp/Blackfin/pro-
cessors/Blackfin_development_tools/fca.html.
Expansion Interface II
The expansion interface II allows an Analog Devices EZ-Extender or a
custom-design daughter board to be tested across various hardware plat-
forms that have the same expansion interface.
The expansion interface II implemented on the ADSP-BF506F EZ-KIT
Lite consists of three connectors, which are 0.1 in. shrouded headers (P2–
4). The connectors contain a majority of the ADSP-BF506F processor’s
signals. For pinout information, go to “ADSP-BF506F EZ-KIT Lite Sche-
matic” on page B-1. The mechanical dimensions of the expansion
connectors can be obtained by contacting “Technical or Customer
Support”.
For more information about daughter boards, visit the Analog Devices
Web site at:
http://www.analog.com/en/embedded-processing-dsp/Blackfin/pro-
cessors/Blackfin_development_tools/fca.html.
Limits to current and interface speed must be taken into consideration
when using the expansion interface. Current for the expansion interface II
is sourced from the EZ-KIT Lite; therefore, the current should be limited
to 1A for 5V and 500 mA for the 3.3V planes. If more current is required,
then a separate power connector and a regulator must be designed on a
daughter card. Additional circuitry can add extra loading to signals,
decreasing their maximum effective speed.
Analog Devices does not support and is not responsible for the
L effects of additional circuitry.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-11
VDDINT Programmable Regulator
VDDINT Programmable Regulator
By default, the EZ-KIT Lite runs at 1.4V. The board contains a program-
mable regulator that supplies the processor’s core with a voltage between
1.1 and 1.4. The voltage is adjusted by writing to the AD5258 digital
potentiometer via the 2-wire interface (TWI) signals.Table 1-3 shows the
appropriate step and corresponding voltage values. For an example of
writing to the AD5258 potentiometer, refer to the POST example. For
more information on the acceptable voltage/frequency values, refer to the
ADSP-BF604/BF506(F) Blackfin Embedded Processor data sheet and
ADSP-BF50x Blackfin Processor Hardware Reference manual. For more
information about the digital potentiometer, refer to the AD5258 data
sheet.
Table 1-3. Table 5. Voltage Values
Step Value
Voltage (V)
1.10
57
46
36
27
18
10
3
1.15
1.20
1.25
1.30
1.35
1.40
Power Measurements
Several locations are provided for measuring the current draw from vari-
ous power planes. Precision 0.1 ohm shunt resistors are available on the
VDDINT, VDDEXT, and VDDFLASH voltage domains. For current
draw, the jumper is removed, voltage across the resistor can be measured
1-12
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF506F EZ-KIT Lite
using an oscilloscope, and the value of the resistor can be measured using a
precision multi-meter. Once the voltage and resistance are measured, the
current can be calculated by dividing the voltage by the resistance. For the
highest accuracy, a differential probe should be used for measuring the
voltage across the resistor.
Example Programs
Example programs are provided with the ADSP-BF506F EZ-KIT Lite to
demonstrate various capabilities of the product. The programs are
installed with the ADSP-BF506F special kit installation, on top of the
VisualDSP++ 5.0 base kit or any VisualDSP++ and can be found in the
<install_path>\Blackfin\Examples\ADSP-BF506F EZ-KIT Lite direc-
tory. Refer to a readme file provided with each example for more
information.
Background Telemetry Channel
The USB debug agent supports the background telemetry channel (BTC),
which facilitates data exchange between VisualDSP++ and the processor
without interrupting processor execution.
The BTC allows you to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check our latest line of
processor emulators at:
http://www.analog.com/en/embedded-processing-dsp/black-
fin/USB-EMULATOR/products/product.html. For more information about
the BTC, see the online Help.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
1-13
Reference Design Information
Reference Design Information
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, lay-
out, fabrication, and assembly of the EZ-KIT Lite.
The information can be found at:
http://www.analog.com/en/embedded-processing-dsp/con-
tent/reference_designs/fca.html.
1-14
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2 ADSP-BF506F EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF506F EZ-KIT
Lite board.
The following topics are covered.
• “System Architecture” on page 2-2
Describes the board’s configuration and explains how the board
components interface with the processor.
• “Programmable Flags” on page 2-3
Shows the locations and describes the programming flags (PFs).
• “Push Buttons and Switches” on page 2-7
Shows the locations and describes the push buttons and switches.
• “Jumpers” on page 2-11
Shows the locations and describes the configuration jumpers.
• “LEDs” on page 2-14
Shows the locations and describes the LEDs.
• “Connectors” on page 2-16
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number infor-
mation is provided for the mating parts.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
Figure 2-1. System Architecture
The EZ-KIT Lite is designed to demonstrate the ADSP-BF506F Blackfin
processor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is controlled by an Analog Devices ADP1715 low
dropout regulator (LDO) and an Analog Devices AD5258 digipot, which
2-2
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Hardware Reference
is configurable over the 2-wire interface (TWI) signals. Refer to the
power-on-self test (POST) example in the ADSP-BF506F installation
directory of VisualDSP++ for information on how to set up the TWI
interface.
The core voltage and clock rate can be set up on the fly by the processor.
The input clock is 25 MHz. The default boot mode for the processor is
SPI flash boot. See “Boot Mode Select Switch (SW2)” for information on
how to change the default boot mode.
Programmable Flags
The processor has 35 general-purpose input/output (GPIO) signals spread
across three ports (PF, PG, and PH). The pins are multi-functional and
depend on the ADSP-BF506F processor setup. The following tables show
how the programmable flag pins are used on the EZ-KIT Lite.
• PF programmable flag pins – Table 2-1
PG programmable flag pins – Table 2-2
PH programmable flag pins – Table 2-3
Table 2-1. Port F Programmable Flag Connections
Processor Pin Other Processor Function
EZ-KIT Lite Function
PF0
PF1
PF2
PF3
TSCLK0/UA0_RX_ALT/TMR6/ Default: LED0
CUD0
Land grid array, expansion interface II
RSCLK0/UA0_TX_ALT/TMR5/ Default: LED1
CDG0
Land grid array, expansion interface II
DT0PRI/PWM0_BH/PPI_D8/
CZM0
Default: LED2
Land grid array, expansion interface II
TFS0/PWM0_BL/PPI_D9/
CDG0
Default: PB0
Land grid array, expansion interface II
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-3
Programmable Flags
Table 2-1. Port F Programmable Flag Connections (Cont’d)
Processor Pin Other Processor Function
EZ-KIT Lite Function
PF4
RFS0/PWM0_CH/PPI_D10/
TACLK0
Default: PB1
Land grid array, expansion interface II
PF5
RFS0/PWM0_CH/PPI_D10/
TACLK0
Default: not used
Land grid array, expansion interface II
PF6
UA1_TX/PWM0_TRIP/
PPI_D12
Default: not used
Land grid array, expansion interface II
PF7
UA1_RX/PWM0_SYNC/
PPI_D13/TACI3
Default: not used
Land grid array, expansion interface II
PF8
UA1_RTS/DT0SEC/PPI_D7
Default: not used
Land grid array, expansion interface II
PF9
UA1_CTS/DR0SEC/PPI_D6/
CZM0
Default: not used
Land grid array, expansion interface II
PF10
PF11
PF12
PF13
PF14
PF15
SPI0_SCK/TMR2/PPI_D5
Default: SPI0_SCK
Land grid array, expansion interface II
SPI0_MISO/PWM0_TRIP/
PPI_D4/TACLK2
Default: SPI0_MISO
Land grid array, expansion interface II
SPI0_MOSI/PWM0_SYNC/
PPI_D3
Default: SPI0_MOSI
Land grid array, expansion interface II
SPI0_SEL1/TMR3/PPI_D2/
SPI0_SS
Default: SPI0_SEL1
Land grid array, expansion interface II
SPI0_SEL2/PWM0_AH/
PPI_D1
Default: not used
Land grid array, expansion interface II
SPI0_SEL3/PWM0_AL/
PPI_D0
Default: not used
Land grid array, expansion interface II
2-4
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ADSP-BF506F EZ-KIT Lite Hardware Reference
Table 2-2. Port G Programmable Flag Connections
Processor Pin Other Processor Function
EZ-KIT Lite Function
PG0
SPI1_SEL3/TMRCLK/
PPI_CLK/ UA1_RX_ALT/
TACI4
Default: CAN_ERR
Land grid array, expansion interface II
PG1
SPI1_SEL2/PPI_FS3/
CAN_RX/ TACI5
Default: CAN_RX
Land grid array, expansion interface II
PG2
SPI1_SEL1/TMR4/CAN_TX/
SPI1_SS
Default: CAN_TX
Land grid array, expansion interface II
PG3
HWAIT/SPI1_SCK/DT1SEC/
UA1_TX_ALT
Default: not used
Land grid array, expansion interface II
PG4
SPI1_MOSI/DR1SEC_ALT/
PWM1_SYNC/TACLK6
Default: SD_WP
Land grid array, expansion interface II
PG5
SPI1_MISO/TMR7/
PWM1_TRIP
Default: SD_CD
Land grid array, expansion interface II
PG6
PG6 ACM_SGLDIFF/SD_D3/
PWM1_AH
Default: ACM_SGLDIFF
SD_D3, land grid array, expansion interface II
PG7
ACM_RANGE/SD_D2/PWM1_AL Default: ACM_RANGE
SD_D2, land grid array, expansion interface II
PG8
DR1SEC/SD_D1/PWM1_BH
DR1PRI/SD_D0/PWM1_BL
Default: ADC_DOUTB
SD_D1, land grid array, expansion interface II
PG9
Default: ADC_DOUTA
SD_D0, land grid array, expansion interface II
PG10
PG11
PG12
PG13
RFS1/SD_CMD/PWM1_CH/
TACI6
Default: ADC_CS
SD_CMD, land grid array, expansion interface II
RSCLK1/SD_CLK/PWM1_CL/
TACLK7
Default: ADC_SCLK
SD_CLK, land grid array, expansion interface II
UA0_RX/SD_D4/PPI_D15/
TACI2
Default: UART0_RX
DS_D4, land grid array, expansion interface II
UA0_TX/SD_D5/PPI_D14/
CZM1
Default: UART0_TX
DS_D5, land grid array, expansion interface II
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-5
Programmable Flags
Table 2-2. Port G Programmable Flag Connections (Cont’d)
Processor Pin Other Processor Function
EZ-KIT Lite Function
PG14
/UA0_RTS/SD_D6/TMR0/
PPI_FS1/CUD1
Default: UART0_RTS
DS_D5, land grid array, expansion interface II
PG15
/UA0_CTS/SD_D7/TMR1/
PPI_FS2/CDG1
Default: UART0_CTS
DS_D7, land grid array, expansion interface II
Table 2-3. Port H Programmable Flag Connections
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PH0
ACM_A2/DT1PRI/SPI0_SEL3 Default: ACM_A2
/WAKEUP
Land grid array, expansion interface II
PH1
PH2
ACM_A1/TFS1/
SPI1_SEL3_ALT/TACLK3
Default: ACM_A1
Land grid array, expansion interface II
ACM_A0/TSCLK1/
Default: ACM_A0
SPI1_SEL2_ALT/TACI7
Land grid array, expansion interface II
2-6
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ADSP-BF506F EZ-KIT Lite Hardware Reference
Push Buttons and Switches
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.
Figure 2-2. Push Button and Switch Locations
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-7
Push Buttons and Switches
UART Setup Switch (SW1)
The UART setup switch (SW1) configures the UART0 signals between the
DCE connector (J1) and processor. Table 2-5 shows the switch settings.
Table 2-4. UART Setup Switch (SW1)
SW1 Position
Function
1 and 3
2
Enable flow control
Disconnects the UART_RXsignal from the processor;
the UART_RXsignal can be used for another function
4
Connects the RTSand CTSsignals together
Allows the host to reset the EZ-KIT Lite via the CTSsignal
Selects the source for the CTSsignal
5
6 and 7
8
Loops the TXand RXsignals together for testing
Boot Mode Select Switch (SW2)
The boot mode select switch (SW2) determines the boot mode of the pro-
cessor. Table 2-5 shows the available boot mode settings. By default, the
ADSP-BF506F processor boots from SPI flash memory.
Table 2-5. Boot Mode Select Switch (SW2)
SW2 Position
Processor Boot Mode
0
1
2
3
4
5
Idle—no boot
Boots from stacked parallel flash in asynchronous mode
Boots from stacked parallel flash in synchronous mode
Boots through SPI0 master from SPI memory
Boots through SPI0 slave from host device
Boots through PPI from host
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ADSP-BF506F EZ-KIT Lite Hardware Reference
Table 2-5. Boot Mode Select Switch (SW2) (Cont’d)
SW2 Position
Processor Boot Mode
6
7
Reserved
Boots through UART0 slave from host device
Push Button Enable Switch (SW3)
The push button enable switch (SW3) disconnects the associated push but-
ton circuit from the general-purpose I/O (GPIO) pins of the processor
and allows the signals to be used on the expansion interface.
ADC Enable Switch (SW4)
The ADC enable switch (SW4) disconnects the ADC from the SPORT1
interface of the processor and allows the ADC signals to be used on the
SD connector or the expansion interface.
CAN Enable Switch (SW5)
The CAN enable switch (SW5) disconnects the CAN transceiver from the
processor and allows the CAN signals to be used on the expansion
interface.
Reset Push Button (SW6)
The reset push button (SW6) resets the processor via a hardware reset. The
reset push button does not reset the on-board debug agent. The only way
to reset the debug agent is to cycle power.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-9
Push Buttons and Switches
Programmable Flag Push Buttons (SW7–8)
Two momentary push buttons (SW7and SW8) are provided for general-pur-
pose user input. The buttons are connected to the PF3–4GPIO pins of the
processor. The push buttons are active high and, when pressed, send a
high (1) to the processor. The GPIO enable switch (SW3) disconnects the
push buttons from the associated push button signals (refer to “Push But-
ton Enable Switch (SW3)” on page 2-9 for more information).
ADC Loopback Switches (SW9–10)
The ADC loopback switches (SW9and SW10) are used for testing only. The
switches connect a test signal to the ADC inputs.
2-10
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ADSP-BF506F EZ-KIT Lite Hardware Reference
Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-3 shows the jumper locations.
Figure 2-3. Configuration Jumper Locations
SPI FLASH CS Enable Jumper (JP1)
The SPI flash CS enable jumper (JP1) connects the SPI0_SEL1 signal to
SPI flash memory. By default, JP1 is installed, and SPI flash is connected.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-11
Jumpers
Voltage Reference Select Jumper (JP2)
The voltage reference select jumper (JP2) selects between a 2.5V on-chip
reference and an external voltage reference. When the jumper is installed
on positions 2 and 3, the on-chip 2.5V reference is used. When the
jumper is installed on positions 1 and 2, an external reference can be con-
nected to the ADC through the DCAPA and DCAPB signals (see “ADC
Voltage Reference (JP6)” on page 2-13). By default, JP2 is installed on
positions 2 and 3.
VDDEXT Power Jumper (JP3)
The VDDEXT power jumper (JP3) is used to measure the processor’s I/O
voltage and current. By default, JP3 is ON, and the current flows through
the two-pin IDC header. To measure power, remove the jumper on JP3
and measure the voltage across the precision resistor and resistance value.
For more information, refer to “Power Measurements” on page 1-12.
VDDINT Power Jumper (JP4)
The VDDINT power jumper (JP4) is used to measure the processor’s core
voltage and current. By default, JP4 is ON, and the current flows through
the two-pin IDC header. To measure power, remove the jumper on JP4
and measure the voltage across the precision resistor and resistance value.
For more information, refer to “Power Measurements” on page 1-12.
VDDFLASH Power Jumper (JP5)
The VDDFLASH power jumper (JP5) is used to measure the internal par-
allel flash voltage and current. By default, JP5 is ON, and the current flows
through the two-pin IDC header. To measure power, remove the jumper
on JP5and measure the voltage across the precision resistor and resistance
value. For more information, refer to “Power Measurements” on
page 1-12.
2-12
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ADSP-BF506F EZ-KIT Lite Hardware Reference
ADC Voltage Reference (JP6)
The ADC voltage reference jumper (JP6) is used to supply a reference
voltage to the ADC. In order to use an external voltage reference, a jumper
must be placed on positions 1 and 2 of JP2. To use the on-board AD780
precision voltage reference, install a jumpers at position 1, 2 and 3, 4. To
supply your own voltage reference, remove all jumpers from JP6 and con-
nect your voltage reference to pins 1 and 3. By default, no jumpers are
installed on JP6.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-13
LEDs
LEDs
This section describes the on-board LEDs. Figure 2-3 shows the LED
locations.
Figure 2-4. LED Locations
2-14
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ADSP-BF506F EZ-KIT Lite Hardware Reference
Reset LED (LED1)
When LED1 is lit, it indicates that the master reset of all the major ICs is
active. The reset signal is controlled by the Analog Devices ADM708
supervisory reset circuit.
GPIO LEDs (LED2–4)
Three LEDs connect to the three general-purpose I/O pins of the proces-
sor (see Table 2-6). The LEDs are active high and lit by writing a “1” to
the correct programmable flag signal.
Table 2-6. GPIO LEDs
LED Reference Designator
Processor Programmable Flag Pin
LED2
LED3
LED4
PF0
PF1
PF2
Power LED (LED5)
When LED5is lit solid, it indicates that power is being properly supplied to
the board.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-15
Connectors
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in
Figure 2-5.
Figure 2-5. Connector Locations
2-16
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Hardware Reference
RS-232 Connector (J1)
Part Description
Manufacturer
Part Number
DB9, female, vertical mount
NORCOMP
191-009-213-L-571
Mating Cable
DIGI-KEY
2m female-to-female cable
AE1020-ND
CAN Connector (J2)
Part Description
Manufacturer
AMP
Part Number
RJ11 modular jack
5558872-1
Mating Cable
4-conductor modular jack cable L-COM
TSP3044
SD Connector (J3)
Part Description
Manufacturer
Part Number
SD 8-bit
MORETHANALL
Memory Card
MHC-W21-601-LF
256 MB
SANDISK-STACK
SDSDB-256-A10
JTAG Connector (P1)
The JTAG header (P1) is the connecting point between the JTAG inter-
face and ADSP-BF506F processor.
Pin 3 is missing to provide keying. Pin 3 in the mating connector should
have a plug.
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-17
Connectors
When an emulator is used with the EZ-KIT Lite, the on-board debug
agent is bypassed.
Expansion Interface II Connectors (P2 and P4)
P2 and P4 are board-to-board connectors providing signals for the SPI,
TWI, UART, SPORT, and GPIO signals of the processor. The connec-
tors are located on the upper edge of the board (one connector is on the
top and one is on the bottom). For more information, see “Expansion
Interface II” on page 1-11.
Part Description
Manufacturer
SAMTEC
Part Number
50-position 0.1’’, SMT header
TSSH-125-01-L-DV-A
Mating Connector
SAMTEC
50-position 0.1’’, SMT socket
SSW-125-22-F-D-VS
Expansion Interface II Connector (P3)
P3 is a board-to-board connector providing signals for the PPI and GPIO
signals of the processor. The connector is located on the upper edge of the
board. For more information, see “Expansion Interface II” on page 1-11.
Part Description
Manufacturer
SAMTEC
Part Number
70-position 0.1’’, SMT header
TSSH-135-01-L-DV-A
Mating Connector
SAMTEC
70-position 0.1’’, SMT socket
SSW-135-22-F-D-VS
2-18
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Hardware Reference
DMAX Land Grid Array Connectors (P5–6)
The DMAX land grid array areas (P5and P6) are intended for the probing
of the processor signals. The pads are exposed and designed to attach a
Tektronix logic analyzer to the connectors listed in the following table.
For more information about the land grid array, consult the Tektronix
web site.
Part Description
Primary retention
Alternate retention
Manufacturer
Tektronix
Part Number
020290800
020291000
Tektronix
ADC Input Connector (P7)
Part Description
Manufacturer
Part Number
24-position 0.1’’, TH header
SAMTEC
TSSH-112-01-L-D
Power Connector (P9)
Part Description
Manufacturer
CUI
Part Number
0.65 mm power jack
045-0883R
Mating Connector
GLOBETEK
5.0VDC@3.6A power supply
GS-1750(R)
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-19
Connectors
2-20
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A ADSP-BF506F EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF506F EZ-KIT Lite Sche-
matic” on page B-1.
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
1
1
74LVC14A
SOIC14
U1
TI
74LVC14AD
2
1
IDT74FCT3244A U5
PY SSOP20
IDT
IDT74FCT3244APYG
3
4
1
2
25MHZ OSC003 U15
EPSON
TI
SG-8002CA MP
SN74LVC1G08
SOT23-5
U18,U20
SN74LVC1G08DBVR
5
6
7
1
1
1
TJA1041 SOIC14 U19
PHILIPS
VISHAY
TJA1041T/N1
SI4411DY SO-8
U3
Si4411DY-T1-E3
M25P16-VMW6G
BF506F M25P16 U4
U4
ST MICRO
8
9
1
1
MIC94042 MLF4 U6
MICREL
MIC94042YFL
ADM708SARZ
ADM708SARZ
SOIC8
U17
ANALOG
DEVICES
10
11
12
1
1
1
ADM3202ARNZ U16
SOIC16
ANALOG
DEVICES
ADM3202ARNZ
ADSP-BF506F
LQFP120
U7
ANALOG
DEVICES
ADSPBF506FBSWZ-
ENG
ADP1864AUJZ
SOT23-6
VR1
ANALOG
DEVICES
ADP1864AUJZ-R7
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A-1
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
13
1
ADP1715
MSOP8
VR3
ANALOG
ADP1715ARMZ-R7
14
15
16
17
1
1
6
1
AD5258
MSOP10
U2
ANALOG
DEVICES
AD5258BRMZ10
ADP1715
MSOP8
VR4
ANALOG
DEVICES
ADP1715ARMZ-1.8-
R7
AD8022 MSOP8 U9-14
ANALOG
DEVICES
AD8022ARMZ
ADP1613
MSOP8
VR2
ANALOG
DEVICES
ADP1613ARMZ-R7
18
19
20
21
1
2
2
1
DIP8 SWT016
DIP6 SWT017
DIP4 SWT018
SW1
C&K
TDA08H0SB1
218-6LPST
SW9-10
SW4-5
J1
CTS
ITT
TDA04HOSB1
191-009-213-L-571
DB9 9PIN
CON038
NORCOMP
22
1
RJ11 4PIN
CON039
J2
TYCO
5558872-1
23
24
1
4
DIP2 SWT020
SW3
C&K
FCI
CKN9064-ND
90726-402HLF
IDC 2X1
IDC2X1
JP1,JP3-5
25
26
27
28
29
1
1
1
1
6
IDC 3X1
IDC3X1
JP2
P1
FCI
90726-403HLF
TSW-107-07-T-D
SSW-112-01-T-D
SMD300F-2
IDC 7X2
IDC7X2
SAMTEC
SAMTEC
TYCO
IDC 12X2
IDC12X2
P7
3A RESETABLE
FUS004
F1
IDC
SJ1-6
DIGI-KEY
S9001-ND
2PIN_JUMPER_
SHORT
A-2
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
DIG CP1-023-ND
30
1
PWR .65MM
CON045
P9
31
32
33
34
35
36
3
1
1
3
2
2
MOMENTARY
SWT024
SW6-8
SW2
PANASONIC EVQ-Q2K03W
ROTARY
SWT027
COPAL
S-8110
SD_CONN
8-BIT CON067
J3
MORETHA-
NALL
MHC-W21-601-LF
YELLOW
LED001
LED2-4
R92,R94
FER2-3
PANASONIC LN1461C
100 1/10W 5%
0805
VISHAY
CRCW0805100RJNEA
600 100MHZ
500MA 1206
STEWARD
HZ1206B601R-10
37
38
2
1
0 1/10W 5% 0805 R71,C101
VISHAY
CRCW08050000Z0EA
DLW5BSN191SQ2
190 100MHZ 5A FER4
FER002
MURATA
39
40
41
42
43
2
0.47UF 16V 10% C76-77
0805
AVX
AVX
AVX
AVX
AVX
0805YC474KAT2A
0805ZC105KAT2A
08056D106KAT2A
08056D475KAT2A
0402ZD104KAT2A
2
1UF 10V 10%
0805
C87-88
8
10UF 6.3V 10%
0805
C7,C13,C21,C33,C71,
C73-74,C121
1
4.7UF 6.3V 10% C113
0805
34
0.1UF 10V 10%
0402
C4-6,C9-12,C20,C22-
24,C31-32,C37-48,C70,
C72,C75,C89-92,C109,
C118
44
24
0.01UF 16V 10% C2-3,C8,C14-19,C25-
AVX
0402YC103KAT2A
0402
30,C81-86,C93,C108,
C122
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A-3
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
45
42
10K 1/16W 5%
0402
R3-6,R9,R11,R14,R19,
R27-38,R69-70,R72-73,
R79,R81-83,R88-91,
R95,R98-101,R108,
VISHAY
CRCW040210K0FKED
R128,R133-134,R137
46
47
3
4.7K 1/16W 5%
0402
R15-17
VISHAY
CRCW04024K70JNED
25
0 1/16W 5% 0402 R21-22,R25-26,R39-40, PANASONIC ERJ-2GE0R00X
R42-43,R45-46,R49-50,
R52-53,R55-56,R58-61,
R63-64,R66-67,R130
48
49
50
51
52
53
54
55
56
57
58
11
2
33 1/16W 5%
0402
R7-8,R18,R20,R135-
136,R138-142
VISHAY
AVX
CRCW040233R0JNEA
0805ZD225KAT2A
2.2UF 10V 10%
0805
C119-120
D8,D10
C34-36,C49-69
C96
2
1A SK12
DO-214AA
DIODES INC B120B-13-F
24
1
10PF 50V 5%
0805
AVX
08055A100JAT2A
1UF 16V 10%
0603
PANASONIC ECJ-1VB1C105K
1
68PF 50V 5%
0603
C112
AVX
06035A680JAT2A
3
4.7UF 6.3V 20% C106-107,C110
0603
PANASONIC ECJ-1VB0J475M
1
470PF 50V 5%
0603
C111
AVX
06033A471JAT2A
10TPE220ML
1
220UF 6.3V 20% CT1
D2E
SANYO
VISHAY
PHYCOMP
5
330 1/10W 5%
0603
R80,R84-87
CRCW0603330RJNEA
232270296001L
1
0 1/10W 5% 0603 R111
A-4
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
59
15
10 1/10W 5%
0603
R23-24,R41,R44,R47-
48,R51,R54,R57,R62,
R65,R68,R75,R77,R113
VISHAY
CRCW060310R0JNEA
60
61
62
63
64
65
66
67
1
2
1
2
1
1
5
7
4700PF 16V 10% C79
0603
DIGI-KEY
AVX
311-1083-2-ND
100PF 50V 5%
0603
C78,C80
06035A101JAT2A
1000PF 50V 5%
0603
C104
PANASONIC ECJ-1VC1H102J
62.0 1/10W 1%
0603
R74,R76
DIGI-KEY
VISHAY
DIGI-KEY
SEI
311-62.0HRTR-ND
CRCW06034K99FKEA
311-24.9KHTR-ND
CSF 1/2 0.05 1%R
1210YD106KAT2A
4.99K 1/16W 1% R112
0603
24.9K 1/10W 1% R123
0603
0.05 1/2W 1%
1206
R121-122,R125-126,
R131
10UF 16V 10%
1210
C97-100,C102,C114,
C117
AVX
68
69
70
1
1
2
GREEN LED001 LED5
PANASONIC LN1361CTR
PANASONIC LN1261CTR
RED LED001
LED1
1000PF 50V 5%
1206
C115-116
AVX
12065A102JAT2A
71
72
73
74
1
1
1
2
255.0K 1/10W
1% 0603
R127
VISHAY
DIGI-KEY
DIGI-KEY
ON SEMI
CRCW06032553FK
311-80.6KHRCT-ND
490-3252-1-ND
80.6K 1/10W 1% R124
0603
22000PF 25V
10% 0402
C94
5A
D6-7
MBRS540T3G
MBRS540T3G
SMC
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A-5
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
75
1
2.5UH 30%
IND013
L3
COILCRAFT MSS1038-252NLB
76
77
78
79
80
81
1
1
1
2
1
2
33.0K 1/16W 1% R2
0402
ROHM
MCR01MZPF3302
1.0K 1/16W 1%
0402
R120
PANASONIC ERJ-2RKF1001X
220PF 50V 10%
0402
C1
DIGI-KEY
DIGI-KEY
DIGI-KEY
ON SEMI
311-1035-2-ND
541-100KJTR-ND
490-3331-1-ND
MBR130LSFT1G
100K 1/16W 5% R1,R114
0402
2.2UF 25V 10%
0805
C103
1A
D4-5
MBR130LSFT1G
SOD-123FL
82
83
84
85
86
87
88
89
2
2
3
2
1
1
1
1
1UH 20%
IND019
L1-2
COILCRAFT ME3220-102MLB
PANASONIC EXB-2HV330JV
33 1/16W 5%
RNS003
RN1-2
1.2K 1/16W 1%
0402
R12-13,R117
R116,R119
VISHAY
CRCW04021K20FKED
4.3 1/4W 5%
1206
PANASONIC ERJ-8GEYJ4R3V
PANASONIC ERJ-2RKF2671X
COILCRAFT MSD7342-223MLC
2.67K 1/16W 1% R118
0402
22UH 20%
IND024
L4
330 100MHZ
1.5A 0805
FER1
C95
MURATA
BLM21PG331SN1D
3300PF 50V 5%
0603
PANASONIC ECJ-1VB1H332K
A-6
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
ADSP-BF506F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer Part Number
90
1
27.4K 1/10W 1% R115
0603
PANASONIC ERJ-3EKF2742V
91
92
93
94
95
1
1
1
1
1
20.0K 1/16W 1% R109
0402
VISHAY
VISHAY
VISHAY
ON SEMI
VISHAY
CRCW040220K0FKED
30A GSOT05
SOT23-3
D2
GSOT05-GS08
GSOT03-GS08
ESD5Z2.5T1G
VESD01-02V-GS08
30A GSOT03
SOT23-3
D3
40A ESD5Z2.5T1 D9
SOD-523
7A
D1
VESD01-02V-GS
08 SOD-52
96
97
1
1
IDC 25x2
IDC25x2_SMTA
P2
P3
SAMTEC
SAMTEC
TSSH-125-01-L-DV-A
TSSH-135-01-L-DV-A
35x2
IDC35x2_SMTA
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A-7
A-8
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
2
3
4
1
2
3
4
ADSP-BF506F EZ-KIT LITE
SCHEMATIC
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
ADSP-BF506F EZ-KIT LITE
TITLE
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
1
17-12-2009_16:20
A
B
C
D
A
B
C
D
3.3V
R14
10K
0402
U7
118
119
2
27
28
29
31
32
38
39
40
43
44
45
46
47
48
49
50
LED0
LED1
PF0/TSCLK0/UA0_RX/TMR6/CUD0
PF1/RSCLK0/UA0_TX/TMR5/CDG0
PF2/DT0PRI/PWM0_BH/PPI_D8/CZM0
PF3/TFS0/PWM0_BL/PPI_D9/CDG0
PF4/RFS0/PWM0_CH/PPI_D10/TACLK0
PF5/DR0PRI/PWM0_CL/PPI_D11/TACLK1
PF6/UA1_TX/PWM0_TRIP/PPI_D12
PF7/UA1_RX/PWM0_SYNC/PPI_D13/TACI3
PF8/UA1_RTS/DT0SEC/PPI_D7
PG0/SPI1_SEL3/TMRCLK/PPI_CLK/UA1_RX/TACI4
PG1/SPI1_SEL2/PPI_FS3/CAN_RX/TACI5
PG2/SPI1_SEL1/TMR4/CAN_TX/SPI1_SS
PG3/HWAIT/SPI1_SCK/DT1SEC/UA1_TX
PG4/SPI1_MOSI/DR1SEC/PWM1_SYNC/TACLK6
PG5/SPI1_MISO/TMR7/PWM1_TRIP
CAN_ERR
CAN_RX
CAN_TX
PG3
1
2
3
4
1
2
3
4
LED2
4
PB0
3
PB1
SD_WP
SD_CD
5
RN2
PF5
7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PF6
PG6/ACM_SGLDIFF/SD_D3/PWM1_AH
PG7/ACM_RANGE/SD_D2/PWM1_AL
PG8/DR1SEC/SD_D1/PWM1_BH
R1A
R2A
R3A
R4A
R5A
R6A
R7A
R8A
R1B
R2B
R3B
R4B
R5B
R6B
R7B
R8B
ACM_SGLDIFF/SD_D3
ACM_RANGE/SD_D2
ADC_DOUTB/SD_D1
ADC_DOUTA/SD_D0
UART0_RX/SD_D4
UART0_TX/SD_D5
UART0_RTS/SD_D6
UART0_CTS/SD_D7
8
PF7
9
PF8
10
14
16
18
19
21
22
PF9
PF9/UA1_CTS/DR0SEC/PPI_D6/CZM0
PF10/SPI0_SCK/TMR2/PPI_D5
PG9/DR1PRI/SD_D0/PWM1_BL
R8
33
SPI0_SCK
SPI0_MISO
SPI0_MOSI
SPI0_SEL1
PF14
PG10/RFS1/SD_CMD/PWM1_CH/TACI6
PG11/RSCLK1/SD_CLK/PWM1_CL/TACLK7
PG12/UA0_RX/SD_D4/PPI_D15/TACI2
PG13/UA0_TX/SD_D5/PPI_D14/CZM1
PG14/UA0_RTS/SD_D6/TMR0/PPI_FS1/CUD1
PG15/UA0_CTS/SD_D7/TMR1/PPI_FS2/CDG1
ADC_CS/SD_CMD
0402
PF11/SPI0_MISO/PWM0_TRIP/PPI_D4/TACLK2
PF12/SPI0_MOSI/PWM0_SYNC/PPI_D3
PF13/SPI0_SEL1/TMR3/PPI_D2/SPI0_SS
PF14/SPI0_SEL2/PWM0_AH/PPI_D1
PF15/SPI0_SEL3/PWM0_AL/PPI_D0
ADC_SCLK/SD_CLK
3.3V
33
RNS003
PF15
3.3V
R19
10K
0402
11
12
113
115
114
NMI
PH0/ACM_A2/DT1PRI/SPI0_SEL3/WAKEUP
PH1/ACM_A1/TFS1/SPI1_SEL3/TACLK3
PH2/ACM_A0/TSCLK1/SPI1_SEL2/TACI7
ACM_A2
ACM_A1
ACM_A0
RESET
RESET
R20
33
0402
U15
4
VDD
1
3
110
111
OE
OUT
CLKIN
XTAL
GND
2
70
71
EXT_WAKE
PG
EXT_WAKE
PG
25MHZ
OSC003
R13
1.2K
0402
R12
1.2K
0402
R140
0402
33
68
37
34
35
33
36
DSP_EMU
DSP_TRST
DSP_TCK
DSP_TMS
DSP_TDI
EMU
TRST
TCK
TMS
TDI
TP1
33
3.3V
120
R7
EXTCLK
0402
55
54
R138
0402
R139
0402
33
33
SCL
SDA
SCL
SDA
C3
0.01UF
R18
0402
33
DSP_TDO
TDO
0402
SW2
1
58
57
56
C
BMODE0
BMODE1
BMODE2
2
6
3
1
2
4
0
4
5
7
R9
10K
0402
ADSP-BF506F
LQFP120_EP
SWT027
ROTARY
3.3V
R16
4.7K
0402
R17
R15
4.7K
0402
4.7K
0402
16 Mb SPI FLASH
SW2: Boot Mode Select Switch
POSITION
BOOT MODE
0
1
2
3
4
5
6
7
Idle-No Boot
"BOOT MODE"
Boot from internal parallel flash in async mode
Boot from internal parallel flash in sync mode
Boot through SPI0 master from SPI memory
Boot through SPI0 slave from host device
Boot through PPI from host
R3
10K
0402
R4
10K
R5
10K
0402
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
0402
Default
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
U4
8
VCC
5
6
1
3
7
2
SPI0_MOSI
SPI0_SCK
SI
SO
SPI0_MISO
Reserved
SCK
CS
Boot thorugh UART0 slave from host device
3.3V
JP1
1
2
SPI0_SEL1
WP
HOLD
DA_5V
3.3V
IDC2X1
GND
4
"JTAG"
M25P16
SO8W
"SPI FLASH CS ENABLE"
R6
10K
R11
10K
0402
0402
3.3V
SJ1
C2
SHORTING
JUMPER
DEFAULT=INSTALLED
0.01UF
0402
DA_5V
P1
1
DSP_TMS
DSP_TCK
DSP_TRST
DSP_TDI
DSP_TMS
DSP_TCK
DSP_TRST
DSP_TDI
2
JTAG_CONN_SELECT
JTAG_CONN_EMU
JTAG_CONN_TMS
JTAG_CONN_TCK
JTAG_CONN_TRST
JTAG_CONN_TDI
JTAG_CONN_TDO
3
4
R1
100K
0402
5
6
7
8
DSP_TDO
DSP_EMU
DSP_TDO
DSP_EMU
9
10
12
14
PG
11
13
R2
33.0K
0402
C1
220PF
0402
IDC7X2
20 Cotton Road
DA_SOFT_RESET
DA_USB_PWR
DA_SOFT_RESET
DA_USB_PWR
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
EXT_PS
EXT_PS
DEBUG_AGENT
Title
ADSP-BF506F EZ-KIT LITE
DSP + SPI FLASH
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
2
17-12-2009_16:20
A
B
C
D
A
B
C
D
VDDEXT
1
2
3
4
1
2
3
4
C7
C6
C5
C4
C20
C8
C15
C16
C14
10UF
0805
0.1UF
0402
0.1UF
0.1UF
0.1UF
0.01UF
0.01UF
0.01UF
0.01UF
0402
0402
0402
0402
0402
0402
0402
VDDEXT
U7
VDDEXT
1
6
13
VDDEXT1
VDDEXT2
VDDEXT3
VDDEXT4
VDDEXT5
VDDEXT6
VDDEXT7
VDDEXT8
VDDEXT9
VDDEXT10
VDDEXT11
VDDEXT12
VDDEXT13
VDDEXT14
VDDEXT15
VDDEXT16
GND1
GND2
GND3
GND4
GND5
17
15
20
23
26
30
41
51
59
62
64
66
67
112
116
108
109
121
C33
10UF
0805
C32
0.1UF
0402
C31
0.1UF
0402
C25
0.01UF
0402
C26
0.01UF
0402
C27
0.01UF
0402
C28
0.01UF
0402
C29
0.01UF
0402
C30
0.01UF
0402
VDDINT
VDDINT
24
42
VDDINT1
VDDINT2
VDDINT3
VDDINT4
VDDINT5
VDDINT6
VDDINT7
C13
10UF
0805
C12
0.1UF
0402
C11
0.1UF
0402
C10
0.1UF
0402
C9
0.1UF
0402
C18
0.01UF
0402
C17
0.01UF
0402
C19
0.01UF
0402
52
53
61
VDDFLASH
65
117
25
63
69
VDDFLASH1
VDDFLASH2
VDDFLASH3
VDDFLASH
ADSP-BF506F
LQFP120_EP
C21
10UF
0805
C22
0.1UF
0402
C23
0.1UF
0402
C24
0.1UF
0402
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
ADSP-BF506F EZ-KIT LITE
DSP POWER, BYPASS CAPS
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
3
17-12-2009_16:20
A
B
C
D
A
B
C
D
R42
0
R50
0
R26
0
0402
R44
10
0402
R48
10
0402
R24
10
U10
U12
U9
3
2
3
2
3
2
IN_VA1
IN_VA3
IN_VA5
IN_VA6
IN_VB5
IN_VB6
0603
0603
0603
1
1
7
1
7
1
7
7
1
VA1
VA3
VA4
VB3
VB4
VA5
VA6
VB5
VB6
R27
10K
R31
10K
0402
R36
10K
AD8022
MSOP8
AD8022
MSOP8
AD8022
MSOP8
0402
0402
C51
C56
C36
10PF
10PF
10PF
R25
R43
0805
R49
0805
0
0805
1
2
3
4
1
2
3
4
0
0
0402
0402
0402
C35
10PF
0805
AGND
AGND
AGND
C52
10PF
0805
C55
10PF
0805
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
R45
R53
0
0402
R40
0
0
0402
R47
10
0603
R51
10
0603
0402
R41
10
0603
U10
U12
U9
5
6
5
6
5
6
IN_VA2
IN_VA4
IN_VB3
IN_VB4
7
VA2
R28
10K
0402
R32
10K
0402
R35
10K
0402
AD8022
MSOP8
AD8022
MSOP8
AD8022
MSOP8
C53
10PF
0805
C58
10PF
0805
C50
10PF
0805
R39
R46
R52
0
0
0
0402
0402
0402
C49
10PF
0805
AGND
AGND
AGND
C54
10PF
0805
C57
10PF
0805
AGND
R59
R63
0
0402
R21
0
0
0402
R57
10
0603
R65
10
0603
0402
R23
10
0603
U11
U13
U14
5
6
3
2
5
6
IN_VB1
7
VB1
R30
10K
0402
R33
10K
0402
R37
10K
0402
AD8022
MSOP8
AD8022
MSOP8
AD8022
MSOP8
C62
10PF
0805
C65
10PF
0805
C69
10PF
0805
R22
R58
R64
0
0
0
0402
0402
0402
C34
10PF
0805
AGND
AGND
AGND
C61
10PF
0805
C66
10PF
0805
AGND
R56
R60
0
0402
R66
0
0
0402
R54
10
0603
R62
10
0603
0402
R68
10
0603
U11
U13
U14
3
2
5
6
3
2
IN_VB2
1
VB2
R29
10K
0402
R34
10K
0402
R38
10K
0402
AD8022
MSOP8
AD8022
MSOP8
AD8022
MSOP8
C60
10PF
0805
C63
10PF
0805
C67
10PF
0805
R67
R55
R61
0
0
0
0402
0402
0402
C68
10PF
0805
AGND
AGND
C59
10PF
0805
C64
10PF
0805
AGND
AGND
+AVCC
-AVCC
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
C37
0.1UF
0402
C38
0.1UF
0402
C39
C40
C41
C42
C43
0.1UF
0402
C44
0.1UF
0402
C45
0.1UF
0402
C48
0.1UF
0402
C47
0.1UF
0402
C46
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0402
0402
0402
0402
0402
Title
ADSP-BF506F EZ-KIT LITE
ADC BUFFERS
Size
C
Board No.
Rev
1.0
10
AGND
AGND
A0226-2009
Date
Sheet
of
4
17-12-2009_16:20
A
B
C
D
A
B
C
D
1
2
3
4
1
2
3
4
PS_5V
3.3V
3.3V
"ADC INPUTS"
P7
1
2
IN_VA1
IN_VA3
IN_VA5
IN_VB1
IN_VB3
IN_VB5
IN_VA2
IN_VA4
IN_VA6
IN_VB2
IN_VB4
IN_VB6
3
4
FER1
330
0805
R69
10K
0402
5
6
7
8
9
10
12
14
16
18
20
22
24
11
13
15
17
19
21
23
U7
SW4 disconnects the DSP from the ADC
SW4
105
103
102
101
1
2
3
4
8
7
6
5
DOUTA
DOUTB
SCLK
CS
ADC_DOUTA/SD_D0
ADC_DOUTB/SD_D1
ADC_SCLK/SD_CLK
ADC_CS/SD_CMD
80
81
83
84
85
86
VA1
VA2
VA3
VA4
VA5
VA6
VA1
VA2
VA3
VA4
VA5
VA6
"ADC ENABLE"
DIP4
SWT018
IDC12X2
95
RANGE
ACM_RANGE/SD_D2
ACM_SGLDIFF/SD_D3
ACM_A0
SGL/DIFF96
92
91
90
89
88
87
100
VB1
VB2
VB3
VB4
VB5
VB6
VB1
VB2
VB3
VB4
VB5
VB6
A0
A1
A2
98
97
ACM_A1
AGND
ACM_A2
"EXT VREF"
75
77
94
REF_SELECT
DCAPA
JP6
1
3
5
2
4
6
DCAPB
SJ7
SJ8
SHORTING
JUMPER
3.3V
IDC3X2_SMT
DEFAULT=NOT INSTALLED
C76
C77
0.47UF
0805
0.47UF
0805
ADSP-BF506F
LQFP120_EP
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
PS_5V
R70
10K
0402
VR5
2
6
5
3
VIN
VOUT
TRIM
TEMP
AGND
AGND
SJ2
8
OP_SEL
3.3V
JP2
1
GND
4
AD780
SOIC8
2
C124
10UF
0805
C125
0.1UF
C123
0.1UF
SW10
3
0402
0402
1
2
3
4
5
6
12
11
10
9
SHORTING
JUMPER
IN_VA1
"VOLTAGE REFERENCE SELECT" IDC3X1
DEFAULT=2 & 3
IN_VA3
IN_VA5
IN_VB1
IN_VB3
IN_VB5
AGND
8
7
R71
0
0805
DIP6
SWT017
SW9
1
2
3
4
5
6
12
11
10
9
IN_VB6
IN_VB4
IN_VB2
IN_VA6
IN_VA4
IN_VA2
AGND
8
7
3.3V
PS_5V
AVDD_ADC
DIP6
SWT017
SW9 & 10 are only used for POST
20 Cotton Road
ANALOG
DEVICES
C74
10UF
0805
C75
0.1UF
0402
C73
10UF
0805
C72
C71
10UF
0805
C70
0.1UF
0402
Nashua, NH 03063
PH: 1-800-ANALOGD
"ADC LOOPBACK"
0.1UF
0402
Title
ADSP-BF506F EZ-KIT LITE
ADC
AGND
Size
C
Board No.
Rev
1.0
10
A0226-2009
17-12-2009_16:20
5
Date
Sheet
of
A
B
C
D
A
B
C
D
1
2
3
4
1
2
3
4
3.3V
PS_5V
3.3V
SW5 disconnects the DSP from the CAN IC
R72
10K
0402
R73
10K
0402
R78
10K
0603
DNP
"CAN ENABLE"
R74
62.0
0603
R75
10
U19
C78
100PF
SW5
0603
1
8
7
6
5
6
7
9
0603
EN
INH
J2
2
3
4
14
8
STB
ERR
WAKE
1
2
3
4
CAN_ERR
CAN_RX
"CAN"
1
4
13
11
12
TXD
RXD
CANH
SPLIT
CANL
DIP4
SWT018
CAN_TX
CON039
R76
62.0
0603
R77
10
0603
C79
4700PF
0603
TJA1041
SOIC14
C80
100PF
0603
3.3V
PS_5V
C81
C82
0.01UF
0.01UF
0402
0402
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
ADSP-BF506F EZ-KIT LITE
CAN
Size
C
Board No.
Rev
1.0
10
A0226-2009
17-12-2009_16:20
6
Date
Sheet
of
A
B
C
D
A
B
C
D
3.3V
3.3V
3.3V
R91
10K
0402
R79
10K
0402
"PB1"
R89
10K
0402
R88
10K
0402
R90
10K
0402
R92
100
U1
0805
U1
1
2
3.3V
5
6
U5
SW7
74LVC14A
SOIC14
MOMENTARY
C87
1UF
0805
2
4
6
8
18
16
14
12
3.3V
74LVC14A
SOIC14
LED0
LED1
LED2
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
SWT024
1
2
3
4
1
2
3
4
U1
9
8
C83
0.01UF
"PB ENABLE"
0402
74LVC14A
SOIC14
R95
10K
0402
11
13
15
17
9
7
5
3
LED4
YELLOW
LED001
LED3
YELLOW
LED001
LED2
YELLOW
LED001
LED5
GREEN
LED001
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
"PB2"
"POWER"
R94
100
0805
SW3
3.3V
U1
1
4
3
U1
PB0
PB1
11
10
12
3
4
2
74LVC14A
SOIC14
SW8
DIP2
SWT020
74LVC14A
SOIC14
MOMENTARY
C88
1UF
0805
R86
R85
R87
R84
SWT024
U1
330
330
330
330
C86
1
OE1
OE2
0.01UF
0402
0603
0603
0603
0603
13
19
74LVC14A
SOIC14
IDT74FCT3244APY
SSOP20
3.3V
3.3V
3.3V
3.3V
LED1
RED
"RESET"
LED001
"DCE"
C90
0.1UF
0402
U16
C89
U20
R81
10K
0402
R83
10K
0402
R82
0.1UF
0402
1
C85
0.01UF
0402
C84
C122
DA_SOFT_RESET
CTS
R80
10K
0.01UF
0402
0.01UF
R134
10K
0402
R100
R99
10K
0402
R98
4
1
J1
C1+
C1-
330
0402
10K
10K
2
0402
0603
0402
0402
3
U17
SN74LVC1G08
SOT23-5
2
6
1
6
2
7
3
8
4
9
5
V+
V-
1
4
8
MR
PFI
RESET
4
5
U18
C2+
C2-
1
2
7
C92
0.1UF
0402
RESET
RESET
4
5
PFO
SN74LVC1G08
SOT23-5
SW6
MOMENTARY
SWT024
ADM708SARZ
SOIC8
11
10
12
9
14
7
UART0_TX/SD_D5
T1IN
T1OUT
T2OUT
R1IN
SW1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
UART0_RTS/SD_D6
UART0_RX/SD_D4
UART0_CTS/SD_D7
T2IN
R141
33
33
13
8
R1OUT
R2OUT
0402
"RESET"
R142
0402
R2IN
3.3V
ADM3202ARNZ
SOIC16
CTS
CON038
3.3V
R101
R108
R137
10K
10K
10K
DIP8
SWT016
0402
0402
0402
C91
0.1UF
0402
J3
RN1
1
2
3
4
5
6
7
8
16
7
8
ADC_DOUTA/SD_D0
ADC_DOUTB/SD_D1
ACM_RANGE/SD_D2
ACM_SGLDIFF/SD_D3
UART0_TX/SD_D5
R1A
R2A
R3A
R4A
R5A
R6A
R7A
R8A
R1B
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CLK
15
R2B
14
9
R3B
13
1
R4B
"UART0 SETUP"
12
10
11
12
13
5
R5B
11
UART0_RTS/SD_D6
UART0_RX/SD_D4
UART0_CTS/SD_D7
R6B
(UART 0)
10
R7B
9
R8B
33
RNS003
C93
C121
10UF
0805
0.01UF
2
CMD
0402
R135
0402
33
33
ADC_SCLK/SD_CLK
ADC_CS/SD_CMD
22
23
24
16
20
17
15
14
MINI_SD_DAT0
MINI_SD_DAT1
MINI_SD_DAT2
MINI_SD_DAT3
MINI_SD_CLK
MINI_SD_CMD
CD
R136
0402
SD_CD
SD_WP
WP
CON067
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
ADSP-BF506F EZ-KIT LITE
RESET, LEDS, PUSH BUTTONS, UART, SD
"SD CARD"
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
17-12-2009_16:20
7
A
B
C
D
A
B
C
D
PS_5V
3.3V
PS_5V
3.3V
PS_5V
3.3V
P3
1
2
GND1
PWR_IN1
PWR_IN2
VDDIO1
P2
P4
3
4
1
2
1
2
GND2
GND1
PWR_IN1
PWR_IN2
VDDIO1
VDDIO2
3.3V1
GND1
PWR_IN1
PWR_IN2
VDDIO1
VDDIO2
3.3V1
5
6
3
4
3
4
GND3
GND2
GND3
GND4
GND5
GND6
DTPRI
DTSEC
TSCLK
TFS
GND2
GND3
GND4
GND5
GND6
DTPRI
DTSEC
TSCLK
TFS
7
8
5
6
5
6
GND4
VDDIO2
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
7
8
7
8
GND5
3.3V1
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
1
2
3
4
1
2
3
4
GND6
3.3V2
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
UART0_RTS/SD_D6
CAN_RX
PF14
PPI0FS1
PPI0FS3
PPI0D1
PPI0FS2
PPI0CLK
PPI0D0
UART0_CTS/SD_D7
3.3V2
3.3V2
CAN_ERR
PF15
LED2
PF8
DRPRI
DRSEC
RSCLK
RFS
PF5
ACM_A2
PG3
DRPRI
DRSEC
RSCLK
RFS
ADC_DOUTA/SD_D0
ADC_DOUTB/SD_D1
ADC_SCLK/SD_CLK
ADC_CS/SD_CMD
PF14
PF9
SPORT0
SPI1
SPORT1
SPI0
SPI0_MOSI
SPI0_SCK
PF8
PPI0D3
PPI0D2
SPI0_SEL1
SPI0_MISO
PF9
LED0
LED1
ACM_A0
ACM_A1
SPI0_SEL1
PF15
PPI0D5
PPI0D4
PB0
PB1
PPI0D7
PPI0D6
CAN_TX
SPISEL1 SPISEL2
CAN_RX
SPISEL1 SPISEL2
PB0
PPI0D9
PPI0D8
LED2
CAN_ERR
SD_WP
SPISEL3
SPIMOSI
SPIMISO
SCL
SPICLK
SPISS
TIMER
SDA
PG3
SPISEL3
SPIMOSI
SPIMISO
SCL
SPICLK
SPISS
TIMER
SDA
SPI0_SCK
PF5
PPI0D11
PPI0D13
PPI0D15
PPI0D17
TIMER2/GPIO
RESET
PPI0D10
PPI0D12
PPI0D14
PPI0D16
TIMER1/GPIO
TIMER3/GPIO
PPI1FS2
PPI1CLK
PP1D0/PPI0D18
PPI1D2/PPI0D20
PPI1D4/PPI0D22
PPI1D6
PB1
CAN_TX
SPI0_MOSI
SPI0_MISO
SCL
SPI0_SEL1
PF7
PF6
SD_CD
UART0_RTS/SD_D6
SDA
UART0_RTS/SD_D6
SDA
UART0_RX/SD_D4
UART0_TX/SD_D5
SCL
UART0_TX/SD_D5
UART0_RTS/SD_D6
RESET
UARTTX UARTRX
UARTRTSUARTCTS
UART0_RX/SD_D4
UART0_CTS/SD_D7
PF6
UARTTX UARTRX
UARTRTSUARTCTS
PF7
UART0
UART1
LED1
LED0
PF8
PF9
RESET
SD_CD
RESET
GPIO1
GPIO3
WAKE
RSVD2
RSVD4
RSVD6
RSVD8
NC
GPIO2
GPIO4
RSVD1
RSVD3
RSVD5
RSVD7
RSVD9
RESET
LED0
RESET
GPIO1
GPIO3
WAKE
RSVD2
RSVD4
RSVD6
RSVD8
NC
GPIO2
GPIO4
RSVD1
RSVD3
RSVD5
RSVD7
RSVD9
PPI1FS1
PPI1FS3
PPI1D1/PPI0D19
PPI1D3/PPI0D21
PPI1D5/PPI0D23
PPI1D7
LED0
LED1
LED1
SD_WP
SD_CD
SD_WP
EXT_WAKE
SD_CD
EXT_WAKE
SD_CD
SD_WP
ACM_SGLDIFF/SD_D3
ADC_DOUTB/SD_D1
ADC_CS/SD_CMD
ACM_RANGE/SD_D2
ADC_DOUTA/SD_D0
ADC_SCLK/SD_CLK
PWM1
PPI1D9
PPI1D8
IDC25X2_SMTA
IDC25X2_SMTA
DNP
PPI1D11
PPI1D13
PPI1D15
PPI1D17
SDA
PPI1D10
PPI1D12
PPI1D14
PPI1D16
NC
SDA
SCL
SCL
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
IDC35X2_SMTA
P5
P6
A1
D0
B1
LED0
GND9
A1
B1
ACM_A2
ACM_A1
D0
GND9
A2
D1
B2
D2
LED1
LED2
A2
B2
D2
D1
ACM_A0
RESET
A3
B3
D3
GND0
PB0
A3
B3
D3
GND0
D4
A4
D4
B4
PB1
PF5
GND10
A4
B4
SCL
SDA
GND10
A5
D5
B5
D6
PF6
PF7
A5
B5
D6
D5
A6
B6
D7
GND1
A6
B6
D7
GND1
A7
B7
CLK1+
GND11
A7
B7
CLK1+
CLK1-
GND2
D10
GND11
A8
B8
D8
CLK1-
PF8
PF9
A8
B8
D8
A9
B9
D9
GND2
A9
B9
D9
A10
D10
B10
SPI0_SCK
GND12
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
B10
GND12
D12
A11
D11
B11
D12
SPI0_MISO
SPI0_MOSI
SPI0_SEL1
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
D11
A12
B12
D13
GND3
GND3
D14
D13
A13
D14
B13
PF14
PF15
GND13
GND13
D16
A14
D15
B14
D16
CAN_ERR
CAN_RX
D15
A15
B15
D17
GND4
GND4
D18
D17
A16
D18
B16
CAN_TX
PG3
GND14
GND14
D20
A17
D19
B17
D20
SD_WP
SD_CD
D19
A18
B18
D21
GND5
GND5
D22
D21
A19
D22
B19
ACM_SGLDIFF/SD_D3
ACM_RANGE/SD_D2
GND15
GND15
CLK2-
CLK2+
GND16
D26
A20
D23
B20
CLK2-
D23
A21
B21
GND6
CLK2+
GND6
D24
A22
D24
B22
ADC_DOUTB/SD_D1
ADC_DOUTA/SD_D0
GND16
A23
D25
B23
D26
ADC_CS/SD_CMD
D25
A24
B24
D27
GND7
ADC_SCLK/SD_CLK
GND7
D28
D27
A25
D28
B25
UART0_RX/SD_D4
UART0_TX/SD_D5
GND17
20 Cotton Road
GND17
D30
A26
D29
B26
D30
ANALOG
DEVICES
UART0_RTS/SD_D6
UART0_CTS/SD_D7
Nashua, NH 03063
PH: 1-800-ANALOGD
D29
A27
B27
D31
GND8
GND8
D31
DMAX_ALT
DNP
DMAX_ALT
DNP
Title
ADSP-BF506F EZ-KIT LITE
EXPANSION INTERFACE, DMAX
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
17-12-2009_16:20
8
A
B
C
D
A
B
C
D
1
2
3
4
1
2
3
4
L1
1UH
IND019
-AVCC
1
2
C98
C97
10UF
1210
10UF
L4
22UH
1210
IND024
D4
3
4
MBR130LSFT1G
SOD-123FL
PS_5V
C103
2.2UF
0805
1
2
L5
22UH
IND024
4 DNP
3
R114
100K
0402
C101
0
0805
D5
L2
1UH
IND019
R113
10
C102
10UF
1210
MBR130LSFT1G
SOD-123FL
0603
+AVCC
C104
1000PF
0603
C100
C99
10UF
1210
10UF
R115
27.4K
0603
1210
R110
0
0603
DNP
VR2
VIN
6
7
3
4
5
2
8
1
SW
FB
FREQ
EN
SS
GND
COMP
R111
0
0603
C96
1UF
0603
C105
1UF
0603
DNP
R109
20.0K
0402
R112
4.99K
0603
ADP1613
MSOP8
C94
22000PF
0402
C95
3300PF
0603
20 Cotton Road
ANALOG
DEVICES
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
ADSP-BF506F EZ-KIT LITE
DUAL POWER REGULATOR
Size
C
Board No.
Rev
1.0
10
A0226-2009
Date
Sheet
of
17-12-2009_16:20
9
A
B
C
D
A
B
C
D
DA_5V
PS_5V
R130
0
0402
SJ3
SHORTING
JUMPER
U6
7
6
8
DEFAULT=INSTALLED
IN1
OUT1
OUT2
EXT_WAKE
Remove JP4 when measuring VDDINT
1
DA_USB_PWR
EN
1.1 - 1.4V @ 500mA
2
FLG
GND
3
MIC2025-1
SOIC8
3.3V
R116
4.3
"VDDINT"
VDDINT TP6
1206
R133
10K
0402
JP4
1
2
1
2
3
4
1
2
3
4
R119
4.3
1206
IDC2X1
R121
0.05
1206
R117
1.2K
0402
EXT_PS
R129
10K
0402
DNP
C110
F1
3A
4.7UF
FER4
190
U2
W
0603
FUS004
FER002
VR3
4
3
2
1
2
3
4
5
10
9
TP3
PS_5V
A
B
1
2
3
4
5
6
7
8
EN
GND1
GND2
GND3
GND4
1
P9
AD0
AD1
SDA
SCL
R120
1.0K
0402
1
IN
C117
10UF
1210
D2
GSOT05
SOT23-3
D1
D8
C116
1000PF
1206
8
C108
D7
VESD01-02V-GS08
SOD-523
SK12
VCC
0.01UF
0402
MBRS540T3G
DO-214AA
OUT
ADJ
3
5A
SMC
7
SDA
SCL
GND
2
POWER
CON045
6
VLOGIC
R118
2.67K
0402
AD5258
MSOP10
ADP1715
MSOP8
"5V"
R128
10K
0402
C109
C106
C107
0.1UF
4.7UF
4.7UF
0402
0603
0603
FER2
600
1206
C115
1000PF
1206
FER3
600
1206
TP2
SHGND
SHGND
MH1 MH2 MH3 MH4
1.8V @ 500mA
0.156
0.156
0.156
0.156
"VDDFLASH"
VDDFLASH
MH5 MH6 MH7 MH8
JP5
1
TP7
2
0.125
0.125
0.125
0.125
3.3V
TP8
IDC2X1
R131
0.05
1206
VR4
1
3
EN
IN
OUT
PS_5V
2
4
D9
D10
SK12
DO-214AA
SS
ESD5Z2.5T1
SOD-523
C119
2.2UF
0805
C118
0.1UF
0402
C120
2.2UF
0805
ADP1715
MSOP8
Remove JP3 when measuring VDDEXT
C114
10UF
1210
SJ4
SHORTING
JUMPER
3.3V @ 2A
DEFAULT=INSTALLLED
SJ6
PGND
SHORTING
JUMPER
DEFAULT=INSTALLLED
VDDEXT
TP4
3.3V
"VDDEXT"
R126
0.05
1206
R125
0.05
1206
R123
24.9K
0603
VR1
Remove JP5 when measuring VDDFLASH
JP3
5
4
6
1
2
U3
IN
1
COMP
IDC2X1
1
2
3
4
5
6
7
8
CS
L3
R122
0.05
1206
2.5UH
C111
C112
470PF
0603
68PF
0603
3
IND013
FB
PGATE
TP5
GND
2
R124
80.6K
0603
ADP1864AUJZ
SOT23-6
D6
D3
GSOT03
SOT23-3
CT1
220UF
D2E
C113
SJ5
MBRS540T3G
SMC
4.7UF
SI4411DY
SO-8
SHORTING
JUMPER
DEFAULT=INSTALLLED
0805
R127
255.0K
0603
PGND
20 Cotton Road
ANALOG
DEVICES
PGND
Nashua, NH 03063
PH: 1-800-ANALOGD
W1
COPPER
Title
ADSP-BF506F EZ-KIT LITE
2A
POWER
Size
C
Board No.
Rev
1.0
10
A0226-2009
PGND
Date
Sheet
of
10
17-12-2009_16:20
A
B
C
D
I INDEX
connectors
A
diagram of locations, 2-16
J1 (RS-232), 2-17
J2 (CAN), 2-17
ADC enable switch (SW4), 2-9
ADC input connector (P7), 2-19
ADC loopback switches (SW9-10), 2-10
ADC voltage ref (JP6), 2-13
architecture, of this EZ-KIT Lite, 2-2
audio
codec enable switch (SW4), 2-9
input connector (P7), 2-19
loopback switches (SW9-10), 2-10
J3 (SD), 2-17
P1 (JTAG), 1-4, 1-10, 2-17
P2 (expansion), 2-18
P3 (expansion), 2-18
P4 (expansion), 2-18
P5-6 (land grid array), 2-19
P7 (ADC input), 2-19
P9 (power), 1-4, 2-19
contents, of this EZ-KIT Lite package, 1-2
customer support, xiv
B
background telemetry channel (BTC), 1-13
bill of materials, A-1
board schematic (ADSP-BF506F), B-1
boot
modes, 2-8
D
default configuration, of this EZ-KIT Lite, 1-3
design reference info, 1-14
DIP switch (SW3), 2-9, 2-10
mode select switch (SW2), 2-8
DMAX land grid array connectors (P5-6), 2-19
C
CAN interface
connector (J2), 2-17
E
example programs, 1-13
expansion interface, 1-11, 2-18
external memory, 1-8
enable switch (SW5), 2-9
clock in (CLK IN) signal, 2-3
configuration, of this EZ-KIT Lite, 1-3
F
flag pins, See programmable flags by name (PFx,
PGx, and PHx)
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
I-1
Index
G
N
general-purpose IO pins (GPIO), 1-10, 2-9,
2-15
notation conventions, xviii
general-purpose push buttons (PB0-1), 1-10
P
package contents, 1-2
PF0-2 (IO) signals, 2-3, 2-15
PF3-15 signals, 2-3
PG0-15 signals, 2-5
PH0-2 signals, 2-6
I
installation, of this EZ-KIT Lite, 1-3
internal flash memory interface, 1-8
IO voltage, 2-2
power
connector (P9), 1-4, 2-19
LED (LED5), 2-15
measurements, 1-12
power-on-self test (POST), 1-9
programmable flag (PF)
inputs PF3-4, 1-10
J
JTAG
interface, 1-10
connector (P1), 1-4, 1-10, 2-17
jumpers
diagram of locations, 2-11
JP1 (SPI flash enable), 2-11
JP2 (voltage reference select), 2-12
JP3 (VDDEXT power), 2-12
JP4 (VDDINT power), 2-12
JP5 (VDDFLASH power), 2-12
JP6 (ADC voltage ref), 2-13
push buttons (SW7-8), 2-10
R
Reduced Instruction Set Computing (RISC), ix
reset
LEDs (LED1), 2-15
push button (SW6), 2-9
restriction, of the evaluation license, 1-7
RS-232 connector (J1), 2-17
L
LEDs
diagram of locations, 2-14
LED1 (reset), 2-15
LED2-4 (PF0-2), 1-10, 2-15
LED5 (power), 2-15
LED8 (reset), 2-15
license restrictions, x, 1-7
S
schematic, of ADSP-BF506F EZ-KIT Lite, B-1
SD connector (J3), 2-17
SPI flash memory
interface, 1-9
CS enable jumper (JP1), 2-11
SRAM memory, 1-7
See also memory map
startup, of this EZ-KIT Lite, 1-5
SW1 (UART setup) switch, 2-8
SW2 (boot mode select) switch, 2-8
M
Media Instruction Set Computing (MISC), ix
memory map, of this EZ-KIT Lite, 1-7
Micro Signal Architecture (MSA), ix
I-2
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
Index
SW3 (push button enable) DIP switch, 1-10,
2-9, 2-10
VDDFLASH, 1-12
pin, 1-12
SW4 (ADC enable) switch, 2-9
SW5 (CAN enable) switch, 2-9
SW6 (reset) push button, 2-9
power jumper (JP5), 2-12
VDDIN
pin, 1-12
SW9-10 (ADC) loopback switches, 2-10
switches, diagram of locations, 2-7
system architecture, of this EZ-KIT Lite, 2-2
VDDINT
power jumper (JP4), 2-12
programmable regulator, 1-12
very-long instruction word (VLIW), ix
VisualDSP++ environment, 1-5
voltage
U
UART setup switch (SW1), 2-8
reference select jumper (JP2), 2-12
values, 1-12
V
VDDEXT, 1-12
pin, 1-12
power jumper (JP3), 2-12
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
I-3
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