HMC7810A [ADI]
Optical Modulator Driver with Internal Attenuator and Power Detector;
| 型号： | HMC7810A |
| 厂家： | 
ADI |
| 描述： | Optical Modulator Driver with Internal Attenuator and Power Detector |
| 文件： | 总14页 (文件大小：1188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Optical Modulator Driver with
Internal Attenuator and Power Detector
Data Sheet
HMC7810A
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
32.0 Gbps maximum data rate
13 ps typical output rise time and fall time
28 GHz bandwidth
Self biased, no power sequencing required
Adjustable gain
DD
PEAK DETECTOR
(VDET, VREF)
V
DD_EXTP
HMC7810A
BIAS TEE
Integrated output peak detector
Low power consumption
INP
OUTP
0.5 W with 3.3 V positive/negative external supply voltage
0.44 W with 2.5 V positive/negative external supply voltage
Use with compact bias tee: 1 inch × 0402 + 1 inch × 0603,
SMT only
16-terminal, 2.9 mm × 2.9 mm, leadless chip carrier (LCC)
package
OUTN
INN
BIAS TEE
Differential balanced outputs
V
DD_EXTN
ATTENUATOR AMPLITUDE
CONTROL
(VCTL)
CONTROL
(VC)
GND
APPLICATIONS
Figure 1.
Communication infrastructure: 400 G 16 QAM, 100 G
DP-QPSK pluggable optical modules in CFP/CFP2
Broadband gain stage and pre-amplifiers
Broadband test and measurement equipment
GENERAL DESCRIPTION
The HMC7810A is a differential input and differential output,
broadband linear amplifier, capable of driving a differential
indium phosphate (InP) Mach-Zehnder (MZ) modulator for
data center interconnect fiber optics or silicon photonics, or
driving a single-ended, electroabsorption modulated laser
(EML) modulator for short reach or metro applications. The
HMC7810A supports data rates up to 32.0 Gbps with a gain
flatness of up to 20 GHz. The integrated peak detector at the
output enables system designers to maintain constant output by
adjusting the gain of the amplifier via the VCTL pin through an
external automatic gain control (AGC) circuit. The IC provides
module designers with scalable supplies for optimizing power
dissipation vs. required linearity. The IC is in a 2.9 mm ×
2.9 mm leadless chip carrier (LCC) package and requires an
external bias tee. The differential input and differential are
externally ac-coupled. No power supply sequencing is required.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2018 Analog Devices, Inc. All rights reserved.
www.analog.com
HMC7810A
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Frequency Domain Properties ....................................................8
Theory of Operation ...................................................................... 10
Applications Information .............................................................. 11
Reflow Solder Profile ................................................................. 11
Evaluation Board ............................................................................ 12
Evaluation Board Schematic..................................................... 12
Evaluation PCB Outline ............................................................ 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 14
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
REVISION HISTORY
6/2018—Rev. 0 to Rev. A
Changes to Charged Device Mode (CDM) Rating, Table 3........ 5
Changes to Ordering Guide .......................................................... 14
2/2018—Revision 0: Initial Version
Rev. A | Page 2 of 14
Data Sheet
HMC7810A
SPECIFICATIONS
All specifications with positive supply voltage (VDD) = 3.3 V, positive and negative external supply voltage (VDD_EXTP/VDD_EXTN) = 2.5 V or
3.3 V, TMIN to TMAX, typical values are specified at TA = 25°C at maximum data rate, unless otherwise stated.
Table 1.
Parameter
Symbol Min Typ Max Unit
Test Conditions/Comments
MAXIMUM DATA RATE
28.3 32.0 Gbps Nonreturn to zero (NRZ), pseudorandom binary
sequence (PRBS31) = 231 − 1
BANDWIDTH
High
28
1
GHz
MHz
Low Cutoff
VOLTAGE RANGE
Differential
Input
With adjusted control voltage (VCTL); for differential input
voltage levels higher than 550 mV p-p, adjust VCTL to
keep the driver in linear operation
0.2
1.0
V
Output
4.4
2.2
V
V
Measured with PRBS31 and differential input of
600 mV p-p and VCTL = −1.5 V
Measured with PRBS31 and differential input of
600 mV p-p and VCTL = −1.5 V
Single-Ended
SMALL SIGNAL GAIN
Differential to Differential
4
2
17
18
12
dB
Adjustable through VCTL control voltage, 1 MHz to
28 GHz, maximum gain: VCTL = −1.5 V,
minimum gain: VCTL = 0 V
Differential to Single-Ended
GAIN FLATNESS
RETURN LOSS
11
1
dB
dB
1 MHz to 28 GHz
1 MHz to 20 GHz, −1.5 V < VCTL < 0 V
Input
Differential
15
10
15
10
15
10
22
dB
dB
dB
dB
dB
dB
dB
100 MHz to 20 GHz, VCTL = −1.15 V
VCTL = −1.5 V
Single-Ended
100 MHz to 10 GHz, VCTL = −1.15 V
VCTL = −1.5 V
Single-Ended Output
100 MHz to 10 GHz
10 GHz to 30 GHz
SIGNAL-TO-NOISE RATIO (SNR)
TOTAL POWER CONSUMPTION
Input voltage (VIN) = 560 mV p-p, VCTL = −1.5 V
VDD = 3.3 V
0.44
0.5
W
W
VDD_EXTP, VDD_EXTN = 2.5 V
VDD_EXTP, VDD_EXTN = 3.3 V
At 1 GHz
TOTAL HARMONIC DISTORTION (THD)
2
%
%
V
At 3 V p-p
3
At 4 V p-p
VC PIN VOLTAGE
VVC
0
0.5
1.5
0
VCTL PIN VOLTAGE
CONTROL SOURCE CURRENT
IVC
VVCTL
−1.5
V
2
1
mA
mA
dB
IVCTL
COMMON-MODE REJECTION RATIO
SUPPLY VOLTAGE TOLERANCE
25
−8
−8
−5
+5
+5
+5
%
%
%
VDD = 3.3 V
VDD_EXTP/VDD_EXTN = 3.3 V
VDD_EXTP/VDD_EXTN = 2.5 V
Rev. A | Page 3 of 14
HMC7810A
Data Sheet
Parameter
RESISTANCE
Input
Symbol Min Typ Max Unit
Test Conditions/Comments
Differential
Single-Ended
Output
100
50
Ω
Ω
Differential
Single-Ended
100
50
Ω
Ω
TIMING SPECIFICATIONS
Table 2.
Parameter
GROUP DELAY VARIATION
OUTPUT
Min
Typ
Max
Unit
Test Conditions/Comments
7.5
ps
1 GHz to 30 GHz
Rise Time
13
13
ps
ps
20% to ~ 80%
Fall Time
20% to ~ 80%
Jitter
VCTL = −1.5 V
Additive RMS
350
400
3
fs
fs
ps
VDD_EXTP, VDD_EXTN = 2.5 V
VDD_EXTP, VDD_EXTN = 3.3 V
VDD_EXTP, VDD_EXTN = 3.3 V and 2.5 V
Deterministic
Rev. A | Page 4 of 14
Data Sheet
HMC7810A
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
Positive VDD Supply to GND
INN and INP to GND
OUTP to GND
VC to GND
VCTL to GND
12 V
2 V
12 V
2.5 V
Table 4. Thermal Resistance
Package Type1
2
3
θJA
θJC
Unit
−2.5 V to +0.5 V
E-16-1
53
51
°C/W
Electrostatic Discharge (ESD) Protection
Human Body Model (HBM)
1 Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with nine thermal vias.
Class 1A,
250 VRF, 500 VDC
Class III, 250 VRF,
500 VDC
2 θJA is the natural convection, junction to ambient thermal resistance
measured in a one cubic foot sealed enclosure.
Charged Device Mode (CDM)
3 θJC is the junction to case thermal resistance.
Maximum Reflow Temperature
Moisture Sensitivity Level 3 (MSL3)
Operating Temperature Range
Maximum Junction Temperature (TJ)
Storage Temperature Range
260°C
−40°C to +130°C
175°C
−65°C to +150°C
300°C
ESD CAUTION
Lead Temperature (Soldering, 60 sec)
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 5 of 14
HMC7810A
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16
15
14
13
12
11
10
9
GND
1
2
3
GND
INN
OUTN
OUTP
GND
HMC7810A
TOP VIEW
(Not to Scale)
INP
4
GND
5
6
7
8
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THIS PIN
IS NOT CONNECTED INTERNALLY.
2. EXPOSED PAD. THE LCC PACKAGE HAS AN
EXPOSED PAD THAT MUST BE CONNECTED TO
SUPPLY GND.
Figure 2. Pin Configuration
Table 5. Pin Function and Descriptions
Pin No.
Mnemonic
GND
INN
Description
1, 4, 9, 12
2
Supply GND.
Data Negative Differential Input.
3
INP
Data Positive Differential Input.
5, 7, 14
6
8
NIC
VCTL
VC
Not Internally Connected. This pin is not connected internally.
Analog Attenuator Control Voltage.
Amplitude Control Voltage.
10
11
13
15
16
OUTP
OUTN
VREF
VDET
VDD
Positive Differential Output.
Negative Differential Output.
Reference Voltage for Detector.
Detector Voltage Output.
Supply Voltage.
EPAD
Exposed Pad. The LCC package has an exposed pad that must be connected to supply GND.
Rev. A | Page 6 of 14
Data Sheet
HMC7810A
TYPICAL PERFORMANCE CHARACTERISTICS
Time domain properties, typical 32 Gbps NRZ output eye diagram, measured with PRBS31 pattern and 600 mV p-p differential input.
1 OPEN
950mV
1 OPEN
950mV
0 OPEN
–920mV
0 OPEN
–920mV
CURRENT
686fs
13.11ps
8.28
MINIMUM
674fs
13.11ps
8.28
MAXIMUM
699fs
13.33ps
8.37
TOTAL MEAS
JITTER RMS
RISE TIME
EYE SNR
28
28
28
28
BIT RATE
DCD(%)
2%
RISE TIME CROSSING %
13.200ps 51.2%
EYE AMPL
2.317V
SNR
EYE HEIGHT (AMPL)
1.869V
31.780GBPS
15.52
FALL TIME
13.130ps
JITTER (p-p)
4.6545ps
JITTER (rms)
767.5fs
EYE AMP
3.19V
3.19V
3.19V
Figure 3. Single-Ended Output, 2.3 V p-p Swing
Figure 6. Differential Output, VCTL = −1 V
1 LEVEL
2.26V
1 LEVEL
2.26V
0 LEVEL
–2.28V
0 LEVEL
–2.28V
CURRENT
1.058ps
14.44ps
15.46
MINIMUM
1.045ps
14.44ps
15.33
MAXIMUM
1.089ps
12.67ps
15.46
TOTAL MEAS
JITTER RMS
RISE TIME
EYE SNR
29
29
29
29
BIT RATE
DCD(%)
0%
RISE TIME CROSSING %
13.685ps 49.6%
EYE AMPL
4.536V
SNR
16.59
JITTER (p-p)
5.4185ps
EYE HEIGHT (AMPL)
3.716V
32.060GBPS
FALL TIME
13.545ps
JITTER (rms)
905.5fs
EYE AMP
4.76V
4.75V
4.76V
Figure 4. Differential Output, 4.5 V p-p Swing
Figure 7. Differential Output, VCTL = −1.5 V
CURRENT
969fs
14.22ps
7.25
MINIMUM
933fs
13.56ps
7.24
MAXIMUM
980fs
14.22ps
7.30
TOTAL MEAS
JITTER RMS
RISE TIME
EYE SNR
29
29
29
29
EYE AMP
1.95V
1.94V
1.95V
Figure 5. Differential Output, VCTL = 0 V
Rev. A | Page 7 of 14
HMC7810A
Data Sheet
FREQUENCY DOMAIN PROPERTIES
16
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
VCTL = 0V
VCTL = 0.1V
VCTL = 0.4V
VCTL = 0.5V
VCTL = 0.6V
VCTL = 0.7V
+130°C
+25°C
–40°C
VCTL = 0.2V
VCTL = 0.3V
14
12
10
8
6
4
2
VCTL = 0.8V
VCTL = 0.9V
VCTL = 1.0V
VCTL = 1.1V
VCTL = 1.2V
VCTL = 1.3V
VCTL = 1.4V
VCTL = 1.5V
0
–2
0.01
4.79
9.57
14.35
19.13
23.91
28.69
200
300
400
500
600
700
800
FREQUENCY (GHz)
DIFFERENTIAL INPUT (mV p-p)
Figure 8. Differential to Single-Ended Gain (S21) vs. Frequency with Respect
to the VCTL Pin, Measurement Taken with EV1HMC7810ALC3 Evaluation
Board (Fixture Not De-Embedded)
Figure 11. Differential Output vs. Differential Input, Measured at 1 GHz
Sine Wave
0
–5
0.12
0.10
0.08
0.06
0.04
0.02
0
–10
–15
–20
–25
–30
–35
–40
–45
–50
–55
VCTL = –1V
VCTL = –1.1V
VCTL = –1.2V
VCTL = –1.3V
VCTL = –1.4V
VCTL = –1.5V
–60
–65
0.01
4.79
9.57
14.35
19.13
23.91
28.69
–1.5
–1.3
–1.1
–0.9
–0.7
–0.5
–0.3
–0.1
FREQUENCY (GHz)
ANALOG ATTENUATION (V)
Figure 9. Differential to Differential Gain (S11) vs. Frequency with Respect to
the VCTL Pin, Measurement Taken with EV1HMC7810ALC3 Evaluation Board
(Fixture De-Embedded)
Figure 12. Peak Voltage (VPEAK) = Detector Output Voltage (VDET) – Reference
Voltage (VREF) vs. Analog Attenuation
0
–5
300
250
200
150
100
50
–10
–15
–20
–25
–30
–35
–40
–45
–50
–55
–60
+130°C, S11 (dB)
+130°C, S22 (dB)
+25°C, S11 (dB)
+25°C, S22 (dB)
–40°C, S11 (dB)
–40°C, S22 (dB)
–65
–70
0.01
4.79
9.57
14.35
19.13
23.91
28.69
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
FREQUENCY (GHz)
DIFFERENTIAL OUTPUT (V)
Figure 10. Differential to Differential Gain (S11, S22) vs. Frequency,
VCTL Pin = −1.5 V, Zoomed for Gain Flatness (Fixture De-Embedded)
Figure 13. VPEAK = VDET – VREF vs. Differential Output
Rev. A | Page 8 of 14
Data Sheet
HMC7810A
9
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
+130°C
+25°C
–40°C
8
7
6
5
4
3
2
1
0
900mV p-p
700mV p-p
500mV p-p
300mV p-p
–1.5
–1.3
–1.1
–0.9
–0.7
(V)
–0.5
–0.3
–0.1
200
300
400
500
600
700
800
V
DIFFERENTIAL INPUT (mV p-p)
CTL
Figure 14. Total Harmonic Distortion (THD) vs. Differential Input
Figure 16. Differential Output vs. VCTL, Voltage Measured at Various
Differential Input Voltages, 32 Gbps PRBS31 Data at the Input
8.0
7.5
800mV p-p
7.0
600mV p-p
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
400mV p-p
200mV p-p
–1.5
–1.4
–1.3
–1.2
–1.1
(V)
–1.0
–0.9
–0.8
–0.7
V
CTL
Figure 15. Total Harmonic Distortion vs. VCTL, Voltage Measured at Various
Differential Input Voltages
Rev. A | Page 9 of 14
HMC7810A
Data Sheet
THEORY OF OPERATION
The HMC7810A includes an integrated analog that allows a gain
adjustment of at least 6 dB. When VCTL is −1.5 V, the gain is
maximum, and when VCTL is 0 V, the gain is minimum. The
HMC7810A contains a peak detector that behaves linearly with
respect to the output swing. The peak detector has two outputs,
VDET and VREF. Use the difference of these voltages to read the
output voltage swing. To implement an external automatic gain
control, use an analog attenuator and the features of the peak
detector.
The HMC7810A is a broadband linear amplifier with a differential
input and output. The device supports a maximum data rate of
32.0 Gbps with a typical bandwidth of 28 GHz. The HMC7810A
is self biased and does not requires any bias sequencing or current
adjustment circuitry. The device has two external supply voltages:
V
V
DD = 3.3 V supply at the supply pin and VDD_EXTP/VDD_EXTN. The
DD_EXTP/VDD_EXTN supply has two options: 2.5 V, which achieves
better jitter performance, and 3.3 V, which achieves higher
output voltage swings.
Rev. A | Page 10 of 14
Data Sheet
HMC7810A
APPLICATIONS INFORMATION
The HMC7810A can drive Mach-Zehnder modulators in
differential or single-ended operation. To keep the output swing
constant at a desired value, build an analog or digital gain control
loop. To build a gain control loop, use the voltage difference of
the VREF and VDET pins (VPEAK) as an input to an analog or
digital gain control mechanism to drive the VCTL pin (see
Figure 17). The HMC7810A requires an external bias from the
output side; however, the modulator bias can be provided after a
dc blocking capacitance.
REFLOW SOLDER PROFILE
Figure 18 shows the typical, Pb-free reflow solder profile.
60 TO 150
SECONDS
RAMP UP
3°C/SECOND MAX
260 – 5°C/260 + 0°C
217°C
150°C TO 200°C
RAMP DOWN
6°C/SECOND MAX
MODULAR
TIME (Second)
60 TO 180
SECONDS
POSITIVE
V
DD_EXTP
BIAS
20 TO 40
SECONDS
480 SECONDS MAX
Figure 18. Typical Pb-Free Reflow Solder Profile
MACH-ZEHNDER
MODULATOR
INP
INN
OUTP
OUTN
V
MODULAR
NEGATIVE
BIAS
DD_EXTN
ANALOG OR
DIGITAL
GAIN CONTROL
Figure 17. Analog or Digital Gain Control Loop
Rev. A | Page 11 of 14
HMC7810A
Data Sheet
EVALUATION BOARD
EVALUATION BOARD SCHEMATIC
Figure 19 shows the schematic for the EV1HMC7810ALC3 evaluation board. Table 6 lists the bill of materials.
TP2
TP3
VDET
VREF
C16
C13
C19
1nF
C18
C21
C20
1nF
TP1
C22
100nF
OUTN
J4
VDD
C10
4.7µF
C17
1nF
C15
100pF
1492-04A-5
FB4
FB3
470Ω
470Ω
U1
HMC7810ALC3
16 15 14 13
C4
L8
10µH
R4
475Ω
L6
10µH
R3
475Ω
J1
INN
1
2
3
4
12
GND
GND
100nF
11
OUTN
TP11
TP9
INN
INP
V
V
BIAS_EML_N
DD_EXTN
1492-04A-5
10
OUTP
C32
100pF 1nF
C33
C34
1µF
C35
100pF 1nF
C36
C37
1µF
C5
9
J2
INP
GND
GND
100nF
1492-04A-5
C1
100nF
5
6
7
8
OUTP
J3
1492-04A-5
TP4
TP5
TP6
VCTL
FB2
470Ω
FB1
470Ω
C7
1nF
TP10
GND
TP8
NIC
VC
C8
L4
10µH
R2
475Ω
L2
10µH
R1
475Ω
TP7
V
V
BIAS_EML_P
DD_EXTP
C9
1nF
C29
100pF 1nF
C30
C31
1µF
C38
100pF 1nF
C39
C40
1µF
C25
C26
C27
J5
J6
J7
J8
C28
Figure 19. Evaluation Board Schematic
Table 6. Bill of Materials
Qty. Reference Designator
Description
Manufacturer/Part Number
1
4
EV1HMC7810ALC3
C1, C4, C5, C22
Evaluation board
100 nF, 16 V, tin, ultra broadband capacitor
Analog Devices, Inc./EV1HMC7810ALC3
American Technical
Ceramics/ATC550L101KT16T
5
9
1
C7, C9, C17, C19, C20, C30,
C33, C36, C39
C8, C13, C16, C18, C21, C25 to Do not populate
C28
1 nF, 50 V, X7R, 0402, ceramic capacitor
Murata/GRM15555C1H101J
Not applicable
C10
4.7 μF, 25 V, 10%, X7R, 0603, gold terminal ceramic
Capax Technologies,
capacitors
Inc./0603X475K250GW
5
4
4
4
3
4
4
C15, C29, C32, C35, C38
C31, C34, C37, C40
FB1 to FB4
J1 to J4
J5 to J8
100 pF, 50 V, 5%, C0G, 0402, ceramic capacitors
1 μF, 16 V, 10%, X5R, 0402, ceramic capacitors
Ferrite chips, 470 Ω, 200 mA, 0402
Connectors, K connector
Do not populate
Inductors, 10 μH, 0603, 5%, 0.18 A
475 Ω, 1/10 W, 1%, 0402, resistors, SMD
Murata/GRM155R71H102KA01D
Taiyo Yuden/EMK105BJ105KV-F
Murata/BLM15GG471SN1D
SRI Connector Gage Co./25-146-1000-92
L2, L4, L6, L8
R1 to R4
Coilcraft/0603LS-103XJLB
Panasonic/ERJ-2RKF470X
Rev. A | Page 12 of 14
Data Sheet
HMC7810A
Qty. Reference Designator
Description
Manufacturer/Part Number
8
1
1
1
TP1 to TP4, TP6 to TP9
Test point, PC compact, 0.063 inch, red
Do not populate
Test point, PC, compact, 0.063 inch, black
Optical modulator driver with internal attenuator and
power detector
Keystone Electronics/5005
TP5
TP10
U1
Keystone Electronics/5006
Analog Devices/HMC7810ALC3
EVALUATION PCB OUTLINE
THRU CAL
600-01085-00-2
GND
TP10
VDD
VDET
V_EX_N
VREF
TP2
TP1
TP3
TP9
C10
J4
INN
OUTN
SEE NOTE 4
4×
C20
J1
C17
C19
C34
C33
C32
C4
C35
FB3
L8
R4
C36
L6
R3
FB4
VB_E
TP8
C22
C1
C37
C40
U1
FB2
R2
R1
L2
C39
L4
FB1
C38
C29
C30
C31
C5
J2
OUTP
INP
V_EX_P
VC
VCTL
TP4
J3
TP6
TP7
1
PCB
NOTES
1. SOLDER QUALITY TO IPC-A-610 CLASS 2.
2. MANUALLY DISPENSE SOLDER (ITEM 5) FOR ALL COMPONENTS.
3. J1 TO J4, ATTACH TO PCB WITH CENTER PIN ON TOP SIDE TRACE.
MANUALLY DISPENSE SOLDER (ITEM 5) TO CENTER PIN AND
GROUND LEADS, TOP AND BOTTOM. AFTER REFLOW, SOLDER
MUST JOIN CONNECTOR AND PCB EDGE.
4. TRIM EDGE PLATING WITH ITEM 6 (106356).
Figure 20. Evaluation Board PCB
Rev. A | Page 13 of 14
HMC7810A
Data Sheet
OUTLINE DIMENSIONS
3.05
2.90 SQ
2.75
0.36
0.30
0.24
PIN 1
0.08
BSC
INDICATOR
PIN 1
1.60
13
16
1
12
0.50
BSC
EXPOSED
PAD
1.50 SQ
1.40
9
4
8
5
0.32
BSC
BOTTOM VIEW
TOP VIEW
SIDE VIEW
1.50
REF
0.90
0.80
0.70
2.10 BSC
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SEATING
PLANE
SECTION OF THIS DATA SHEET.
Figure 21. 16-Terminal Leadless Ceramic Chip Package [LCC]
(E-16-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range Package Description
Lead Finish
Nickel/gold (NiAu)
NiAu
Package Option
E-16-1
E-16-1
HMC7810ALC3
HMC7810ALC3TR
EV1HMC7810ALC3
–40°C to +130°C
–40°C to +130°C
16-Terminal Leadless Ceramic Chip Carrier [LCC]
16-Terminal Leadless Ceramic Chip Carrier [LCC]
Evaluation Board with Bias Tee and AC-Coupled
Input/Output Capacitors
1 All models are RoHS compliant parts.
©2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16229-0-7/18(A)
Rev. A | Page 14 of 14
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