HMC8142 [ADI]
HMC8142;
ADI 
81 GHz to 86 GHz, E-Band Power Amplifier
With Power Detector
Data Sheet
HMC8142
FEATURES
GENERAL DESCRIPTION
Gain: 21 dB typical
The HMC8142 is an integrated E-band gallium arsenide (GaAs),
Output power for 1 dB compression (P1dB): 25 dBm typical
Saturated output power (PSAT): 26 dBm typical
Output third-order intercept (OIP3): 29 dBm typical
Input return loss: 12 dB typical
Output return loss: 8 dB typical
DC supply: 4 V at 450 mA
pseudomorphic high electron mobility transistor (pHEMT),
monolithic microwave integrated circuit (MMIC), medium power
amplifier with a temperature compensated on-chip power detector
that operates from 81 GHz to 86 GHz. The HMC8142 provides
21 dB of gain, 25 dBm of output power at 1 dB compression,
29 dBm of output third-order intercept, and 26 dBm of saturated
output power at 20% power added efficiency (PAE) from a 4 V
power supply. The HMC8142 exhibits excellent linearity and is opti-
mized for E-band communications and high capacity wireless
backhaul radio systems. The amplifier configuration and high gain
make it an excellent candidate for last stage signal amplification
before the antenna. All data is taken with the chip in a 50 Ω test
fixture connected via a 3 mil wide × 0. 5 mil thick × 7 mil long
ribbon on each port.
No external matching required
Die size: 3.039 mm × 1.999 mm × 0.05 mm
APPLICATIONS
E-band communication systems
High capacity wireless backhaul radio systems
Test and measurement
FUNCTIONAL BLOCK DIAGRAM
4
5
6
7
9
11
10
8
V
V
V
DD3
DD1
DD2
V
DD4
HMC8142
12
13
14
3
2
RFIN
RFOUT
1
V
V
V
V
GG4
GG1
GG2
GG3
V
V
DET
REF
20
18
24
22
17
25
23
21
19
16
15
Figure 1.
Rev. A
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HMC8142* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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DOCUMENTATION
Application Notes
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Data Sheet
• HMC8142: 81 GHz to 86 GHz, E-Band Power Amplifier With
Power Detector Data Sheet
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HMC8142
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 12
Applications Information .............................................................. 13
Typical Application Circuit....................................................... 13
Assembly Diagram ..................................................................... 14
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Interface Schematics..................................................................... 6
Typical Performance Characteristics ............................................. 7
Mounting and Bonding Techniques for Millimeterwave
GaAs MMICs .................................................................................. 15
Handling Precautions ................................................................ 15
Mounting..................................................................................... 15
Wire Bonding.............................................................................. 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
2/16—Revision A: Initial Version
Rev. A | Page 2 of 16
Data Sheet
HMC8142
SPECIFICATIONS
TA = 25°C, VDDx = 4 V, IDD = 450 mA, unless otherwise noted.
Table 1.
Parameter
Min
81
Typ
Max
Unit
OPERATING CONDITIONS
Radio Frequency (RF) Range
PERFORMANCE
86
GHz
Gain
19
21
0.02
25
26
29
12
8
dB
Gain Variation over Temperature
Output Power for 1 dB Compression (P1dB)
Saturated Output Power (PSAT
Output Third-Order Intercept (OIP3) at Maximum Gain1
Input Return Loss
Output Return Loss
dB/°C
dBm
dBm
dBm
dB
22.5
)
dB
POWER SUPPLY
Total Supply Current (IDD)2
450
mA
1 Data taken at output power (POUT) = 12 dBm/tone, 1 MHz spacing.
2 Adjust VGGx from −2 V to 0 V to achieve the total drain current, IDD = 450 mA.
Rev. A | Page 3 of 16
HMC8142
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
Table 3. Thermal Resistance
Package Type
Parameter
Rating
1
Drain Bias Voltage (VDD1 to VDD4
)
4.5 V
θJC
Unit
Gate Bias Voltage (VGG1 to VGG4
)
−3 V to 0 V
175°C
25-Pad Bare Die [CHIP]
48.33 °C/W
Maximum Junction Temperature (to
Maintain 1 Million Hours Mean Time to
Failure (MTTF))
1 Based on ABLETHERM® 2600BT as die attach epoxy with thermal
conductivity of 20 W/mK.
ESD CAUTION
Storage Temperature Range
Operating Temperature Range
−65°C to +150°C
−55°C to +85°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 4 of 16
Data Sheet
HMC8142
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
4
5
6
7
8
9
10
11
V
V
V
V
DD4
GND
DD1
GND
DD2
GND
DD3
GND
GND
RFOUT
GND
12
GND
RFIN
GND
3
2
1
HMC8142
TOP VIEW
(Not to Scale)
13
14
GND
25
V
GND
23
V
GND
21
V
GND
19
V
GG1
24
GG2
GG3
GG4
GND
17
V
V
REF
DET
22
20
18
16
15
Figure 2. Pad Configuration
Table 4. Pad Function Descriptions
Pad No. Mnemonic
Description
Ground Connection (See Figure 3).
1, 3, 4, 6, 8, 10, 12, 14, GND
17, 19, 21, 23, 25
2
RFIN
RF Input. AC couple RFIN and match it to 50 Ω (See Figure 4).
Drain Bias Voltage for the Power Amplifier (See Figure 5).
RF Output. AC couple RFOUT and match it to 50 Ω (see Figure 6).
Detector Voltage for the Power Detector (See Figure 7). VDET is the dc voltage representing the RF
output power rectified by the diode, which is biased through an external resistor. Refer to the
typical application circuit for the required external components (see Figure 40).
5, 7, 9, 11
13
15
VDD1 to VDD4
RFOUT
VDET
16
VREF
Reference Voltage for the Power Detector (See Figure 7). VREF is the dc bias of diode biased through
an external resistor used for the temperature compensation of VDET. Refer to the typical application
circuit for the required external components (see Figure 40).
18, 20, 22, 24
Die Bottom
VGG4 to VGG1
GND
Gate Bias Voltage for the Power Amplifier (See Figure 8). Refer to the typical application circuit for
the required external components (see Figure 40).
Ground. The die bottom must be connected to the RF/dc ground (see Figure 3).
Rev. A | Page 5 of 16
HMC8142
Data Sheet
INTERFACE SCHEMATICS
GND
RFOUT
Figure 3. GND Interface
Figure 6. RFOUT Interface
V
, V
DET
REF
RFIN
Figure 4. RFIN Interface
Figure 7. VDET, VREF Interface
V
TO V
DD4
DD1
V
TO V
GG1
GG4
Figure 5. VDD1 to VDD4 Interface
Figure 8. VGG4 to VGG1 Interface
Rev. A | Page 6 of 16
Data Sheet
HMC8142
TYPICAL PERFORMANCE CHARACTERISTICS
30
25
24
23
22
21
20
19
18
17
16
15
25
20
15
GAIN
INPUT RETURN LOSS
OUTPUT RETURN LOSS
10
5
0
–5
T
T
T
= +85°C
= +25°C
= –55°C
–10
–15
–20
A
A
A
79
80
81
82
83
84
85
86
87
88
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 9. Broadband Gain and Return Loss Response vs. Frequency,
Drain Current (IDD) = 450 mA
Figure 12. Gain vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
25
24
–5
–7
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
23
22
21
20
19
18
17
16
15
–9
–11
–13
–15
–17
–19
–21
–23
–25
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 10. Gain vs. Frequency at Various Drain Currents (IDD
)
Figure 13. Input Return Loss vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
0
–2
–4
–6
–8
–44
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
–46
–48
–50
–52
–54
–56
–58
–60
–62
–64
–10
–12
–14
–16
–18
–20
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 11. Output Return Loss vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
Figure 14. Reverse Isolation vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
Rev. A | Page 7 of 16
HMC8142
Data Sheet
30
29
28
27
26
25
24
23
22
21
20
30
29
28
27
26
25
24
23
22
21
20
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 15. Output P1dB vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
Figure 18. Output P1dB vs. Frequency at Various Drain Currents (IDD)
30
29
28
27
26
25
24
23
30
29
28
27
26
25
24
23
22
21
20
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
22
21
20
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 16. PSAT vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA
Figure 19. PSAT vs. Frequency at Various Drain Currents (IDD)
35
35
34
33
32
31
30
29
28
27
26
25
34
33
32
31
30
29
28
27
26
25
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 17. Output IP3 vs. Frequency at Various Temperatures,
Drain Current (IDD) = 450 mA, POUT/Tone = 12 dBm
Figure 20. Output IP3 vs. Frequency at Various Drain Currents (IDD),
POUT/Tone = 12 dBm
Rev. A | Page 8 of 16
Data Sheet
HMC8142
35
34
33
32
31
30
29
28
27
26
25
35
34
33
32
31
30
29
28
27
26
25
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
12dBm
14dBm
16dBm
8
9
10
11
P
12
13
14
15
16
81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0
/TONE (dBm)
FREQUENCY (GHz)
OUT
Figure 24. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD
)
Figure 21. Output IP3 vs. Frequency at Various POUT/Tones,
Drain Current (IDD) = 450 mA
at RF = 81 GHz
35
34
35
34
33
32
31
30
29
28
27
26
25
I
I
I
= 350mA
= 400mA
= 450mA
I
I
I
= 350mA
= 400mA
= 450mA
DD
DD
DD
DD
DD
DD
33
32
31
30
29
28
27
26
25
8
9
10
11
P
12
13
14
15
16
8
9
10
11
P
12
13
14
15
16
/TONE (dBm)
/TONE (dBm)
OUT
OUT
Figure 25. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD
)
Figure 22. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD
)
at RF = 86 GHz
at RF = 83.5 GHz
30
30
GAIN (dB)
29
GAIN (dB)
29
P1dB (dBm)
P1dB (dBm)
P
(dBm)
P
(dBm)
SAT
SAT
28
27
26
25
24
23
22
21
20
28
27
26
25
24
23
22
21
20
350
400
(mA)
450
350
400
(mA)
450
I
I
DD
DD
Figure 26. Gain, Output P1dB, and PSAT vs. Drain Current (IDD
)
Figure 23. Gain, Output P1dB, and PSAT vs. Drain Current (IDD
)
at RF = 83.5 GHz
at RF = 81 GHz
Rev. A | Page 9 of 16
HMC8142
Data Sheet
30
29
28
27
26
25
24
23
22
21
28
24
20
16
12
8
580
560
540
520
500
480
GAIN (dB)
P1dB (dBm)
P
(dBm)
SAT
P
OUT
GAIN
PAE
4
460
440
I
DD
0
20
350
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
400
(mA)
450
INPUT POWER (dBm)
I
DD
Figure 27. Gain, Output P1dB, and PSAT vs. Drain Current (IDD
)
Figure 30. POUT, Gain, PAE, and IDD vs. Input Power at RF = 81 GHz,
Drain Current (IDD) = 450 mA
at RF = 86 GHz
28
24
20
16
12
8
580
560
540
520
500
480
460
440
28
580
560
540
520
500
480
460
440
24
20
16
12
8
P
OUT
P
OUT
GAIN
GAIN
4
4
PAE
PAE
I
DD
I
DD
0
0
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 28. POUT, Gain, PAE, and IDD vs. Input Power at RF = 83.5 GHz,
Drain Current (IDD) = 450 mA
Figure 31. POUT, Gain, PAE, and IDD vs. Input Power at RF = 86 GHz,
Drain Current (IDD) = 450 mA
28
24
20
16
12
8
560
530
500
470
440
410
380
350
28
560
530
500
470
440
410
380
350
24
20
16
12
8
P
P
OUT
OUT
GAIN
GAIN
4
4
PAE
PAE
I
I
DD
DD
0
0
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 29. POUT, Gain, PAE, and IDD vs. Input Power at RF = 81 GHz,
Drain Current (IDD) = 350 mA
Figure 32. POUT, Gain, PAE, and IDD vs. Input Power at RF = 83.5 GHz,
Drain Current (IDD) = 350 mA
Rev. A | Page 10 of 16
Data Sheet
HMC8142
28
24
20
16
12
8
560
530
500
470
440
410
380
350
50
45
40
35
30
25
20
81GHz
82GHz
83GHz
84GHz
85GHz
86GHz
P
OUT
GAIN
4
PAE
I
DD
0
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11
8
9
10
11
12
13
14
15
16
INPUT POWER (dBm)
P
/TONE (dBm)
OUT
Figure 36. Output IMD3 vs. POUT/Tone at Various Frequencies,
Drain Current (IDD) = 450 mA
Figure 33. POUT, Gain, PAE, and IDD vs. Input Power at RF = 86 GHz,
Drain Current (IDD) = 350 mA
3.0
2.5
2.0
1.5
3.0
2.5
2.0
1.5
81GHz
82GHz
83GHz
84GHz
85GHz
86GHz
1.0
0.5
0
81GHz
82GHz
83GHz
84GHz
85GHz
86GHz
1.0
0.5
0
–15 –13 –11 –9
–7
–5
–3
–1
1
3
5
7
–15 –13 –11 –9
–7
–5
–3
–1
1
3
5
7
INPUT POWER (dBm)
INPUT POWER (dBm)
Figure 37. Power Dissipation vs. Input Power at Various Frequencies,
Drain Current (IDD) = 350 mA, TA = 85°C
Figure 34. Power Dissipation vs. Input Power at Various Frequencies,
Drain Current (IDD) = 450 mA, TA = 85°C
10
10
T
T
T
= +85°C
= +25°C
= –55°C
T
T
T
= +85°C
= +25°C
= –55°C
A
A
A
A
A
A
1
1
0.1
0.1
0.01
–16
0.01
–16
–11
–6
–1
4
9
14
19
24
29
–11
–6
–1
4
9
14
19
24
29
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
Figure 35. Detector Output Voltage (VOUT) vs. Output Power at Various
Temperatures, Drain Current (IDD) = 450 mA, RF = 81 GHz
Figure 38. Detector Output Voltage (VOUT) vs. Output Power at Various
Temperatures, Drain Current (IDD) = 450 mA, RF = 86 GHz
Rev. A | Page 11 of 16
HMC8142
Data Sheet
THEORY OF OPERATION
The architecture of the HMC8142 power amplifier is shown in
Figure 39. The HMC8142 uses four cascaded gain stages to form an
amplifier with a combined gain of 21 dB and saturated output
power (PSAT) of 26 dBm. At the output of the last stage, a coupler
taps off a small portion of the output signal. The coupled signal
is presented to an on-chip diode detector for external monitoring of
the output power. A matched reference diode is included to help
correct for detector temperature dependencies. See the application
circuit shown in Figure 40 for further details on biasing the
different blocks and using the detector features.
RFIN
RFOUT
V
V
DET
REF
Figure 39. Power Amplifier Circuit Architecture
Rev. A | Page 12 of 16
Data Sheet
HMC8142
APPLICATIONS INFORMATION
1. Apply a −2 V bias to the VGG1 to VGG4 pads.
2. Apply 4 V to the VDD1 to VDD4 pads.
3. Adjust VGG1 to VGG4 between −2 V and 0 V to achieve a
total amplifier drain current of 450 mA.
TYPICAL APPLICATION CIRCUIT
A typical application circuit for the HMC8142 is shown in
Figure 40. Combine supply lines as shown in the application
circuit schematic to minimize external component count and
simplify power supply routing.
To power down the HMC8142, follow the procedure in reverse.
The HMC8142 uses several amplifier, detector, and attenuator
stages. All stages use depletion mode pHEMT transistors. It is
important to follow the following power-up bias sequence to
ensure transistor damage does not occur.
For additional guidance on general bias sequencing, see the
MMIC Amplifier Biasing Procedure application note.
V
, V
, V
, V
DD1
DD2
DD3 DD4
4.7µF
0.01µF
120pF
120pF
8
120pF
120pF
4
5
6
7
9
10 11
V
V
V
DD4
DD2
DD3
V
DD1
3
2
12
13
RFIN
RFOUT
RFOUT
RFIN
1
14
V
V
GG1
GG3
V
V
GG4
V
V
DET
GG2
REF
16 15
25
24
23
22
21
20
19
18
17
+5V
100kΩ 100kΩ
+5V
10kΩ
120pF
120pF
120pF
120pF
10kΩ
V
= V
– V
OUT
REF DET
10kΩ
10kΩ
V
, V
, V
, V
GG1 GG2 GG3 GG4
4.7µF
0.01µF
–5V
SUGGESTED INTERFACE CIRCUIT
Figure 40. Typical Application Circuit
Rev. A | Page 13 of 16
HMC8142
Data Sheet
ASSEMBLY DIAGRAM
4.7µF
0.01µF
120pF
120pF
120pF
9
120pF
10 11
4
5
6
7
8
50Ω TRANSMISSION LINE
3 MIL WIDE GOLD RIBBON
(WEDGE BOND)
3
2
1
12
13
14
3 MIL WIDE GOLD RIBBON
(WEDGE BOND)
25 24 23 22
21 20 19 18
17 16 15
6 MIL NOMINAL GAP
120pF
120pF
120pF
120pF
0.01µF
4.7µF
Figure 41. Assembly Diagram
Rev. A | Page 14 of 16
Data Sheet
HMC8142
MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GAAS MMICS
Attach the die directly to the ground plane eutectically or with
conductive epoxy.
Transients
Suppress instrument and bias supply transients while bias is
applied. To minimize inductive pickup, use shielded signal and
bias cables.
To bring RF to and from the chip, use 50 Ω microstrip trans-
mission lines on 0.127 mm (5 mil) thick alumina thin film
substrates (see Figure 42).
General Handling
Handle the chip on the edges only using a vacuum collet or with
a sharp pair of bent tweezers. Because the surface of the chip
has fragile air bridges, never touch the surface of the chip with a
vacuum collet, tweezers, or fingers.
0.05mm (0.002") THICK GaAs MMIC
RIBBON BOND
0.076mm
(0.003")
MOUNTING
The chip is back metallized and can be die mounted with gold/tin
(AuSn) eutectic preforms or with electrically conductive epoxy.
The mounting surface must be clean and flat.
RF GROUND PLANE
Eutectic Die Attach
0.127mm (0.005") THICK ALUMINA
THIN FILM SUBSTRATE
It is best to use an 80% gold/20% tin preform with a work
surface temperature of 255°C and a tool temperature of 265°C.
When hot 90% nitrogen/10% hydrogen gas is applied, maintain
tool tip temperature at 290°C. Do not expose the chip to a
temperature greater than 320°C for more than 20 sec. No more
than 3 sec of scrubbing is required for attachment.
Figure 42. Routing RF Signals
To minimize bond wire length, place microstrip substrates as
close to the die as possible. The typical die to substrate spacing
is 0.076 mm to 0.152 mm (3 mil to 6 mil).
Epoxy Die Attach
HANDLING PRECAUTIONS
ABLETHERM 2600BT is recommended for die attachment.
Apply a minimum amount of epoxy to the mounting surface so
that a thin epoxy fillet is observed around the perimeter of the
chip after placing it into position. Cure the epoxy per the schedule
provided by the manufacturer.
To avoid permanent damage, adhere to the precautions in the
following sections.
Storage
All bare die ship in either waffle or gel-based ESD protective
containers, sealed in an ESD protective bag. After opening the
sealed ESD protective bag, all die must be stored in a dry
nitrogen environment.
WIRE BONDING
RF bonds made with 3 mil × 0.5 mil gold ribbon are recom-
mended for the RF ports. These bonds must be thermosonically
bonded with a force of 40 g to 60 g. DC bonds of 1 mil
(0.025 mm) diameter, thermosonically bonded, are recommended.
Create ball bonds with a force of 40 g to 50 g and wedge bonds
with a force of 18 g to 22 g. Create all bonds with a nominal
stage temperature of 150°C. Apply a minimum amount of
ultrasonic energy to achieve reliable bonds. Keep all bonds as
short as possible, less than 12 mil (0.31 mm).
Cleanliness
Handle the chips in a clean environment. Never use liquid
cleaning systems to clean the chip.
Static Sensitivity
Follow ESD precautions to protect against ESD strikes.
Rev. A | Page 15 of 16
HMC8142
Data Sheet
OUTLINE DIMENSIONS
3.039
0.05
0.200
0.200 0.200
0.200
0.200
0.600
0.600
0.089
0.114
4
5
6
7
8
9
10
11
0.168
0.764
0.130
0.130
12
13
14
3
2
1.999
1
0.764
0.09
0.191
0.106
25
24
23
22
21
20
19
18
17
16
15
SIDE VIEW
0.600
0.600
0.200 0.200 0.200
0.200 0.200 0.200
TOP VIEW
(CIRCUIT SIDE)
0.200 0.200
0.003
0.014
Figure 43. 25-Pad Bare Die [CHIP]
(C-25-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
−55°C to +85°C
−55°C to +85°C
Package Description
25-Pad Bare Die [CHIP]
25-Pad Bare Die [CHIP]
Package Option2
C-25-2
HMC8142
HMC8142-SX
C-25-2
1 The HMC8142-SX consists of two pairs of the die in a gel pack for sample orders.
2 This is a waffle pack option; contact Analog Devices, Inc., sales representatives for additional packaging options.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13425-0-2/16(A)
Rev. A | Page 16 of 16
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