LT1809CS8#PBF [ADI]
Single 180MHz, 350V/µs Rail-to-Rail Input and Output Low Distortion Op Amps;型号: | LT1809CS8#PBF |
厂家: | ADI |
描述: | Single 180MHz, 350V/µs Rail-to-Rail Input and Output Low Distortion Op Amps 放大器 光电二极管 |
文件: | 总24页 (文件大小:291K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1809/LT1810
Single/Dual 180MHz, 350V/µs
Rail-to-Rail Input and Output
Low Distortion Op Amps
DESCRIPTION
FEATURES
TheLT®1809/LT1810aresingle/duallowdistortionrail-to-
rail input and output op amps with a 350V/μs slew rate.
These amplifiers have a –3dB bandwidth of 320MHz at
n
–3dB Bandwidth: 320MHz, A = 1
V
n
Gain-Bandwidth Product: 180MHz, A ≥ 10
V
n
Slew Rate: 350V/μs
n
Wide Supply Range: 2.5V to 12.6V
unity-gain,again-bandwidthproductof180MHz(A ≥10)
V
n
Large Output Current: 85mA
andan85mAoutputcurrenttofittheneedsoflowvoltage,
n
Low Distortion, 5MHz: –90dBc
high performance signal conditioning systems.
n
Input Common Mode Range Includes Both Rails
The LT1809/LT1810 have an input range that includes
both supply rails and an output that swings within 20mV
of either supply rail to maximize the signal dynamic range
in low supply applications.
n
Output Swings Rail-to-Rail
n
Input Offset Voltage, Rail-to-Rail: 2.5mV Max
n
Common Mode Rejection: 89dB Typ
n
Power Supply Rejection: 87dB Typ
n
The LT1809/LT1810 have very low distortion (–90dBc) up
to 5MHz that allows them to be used in high performance
data acquisition systems.
Open-Loop Gain: 100V/mV Typ
n
Shutdown Pin: LT1809
n
Single in 8-Pin SO and 6-Pin SOT-23 Packages
n
Dual in 8-Pin SO and MSOP Packages
TheLT1809/LT1810maintaintheirperformanceforsupplies
from 2.5V to 12.6V and are specified at 3V, 5V and 5V
supplies. The inputs can be driven beyond the supplies
without damage or phase reversal of the output.
n
Operating Temperature Range: –40°C to 85°C
n
Low Profile (1mm) SOT-23 (ThinSOT™) Package
APPLICATIONS
The LT1809 is available in the 8-pin SO package with the
standard op amp pinout and the 6-pin SOT-23 package.
The LT1810 features the standard dual op amp pinout and
isavailablein8-pinSOandMSOPpackages.Thesedevices
can be used as a plug-in replacement for many op amps
to improve input/output range and performance.
n
Driving A/D Converters
n
Low Voltage Signal Processing
n
Active Filters
n
Rail-to-Rail Buffer Amplifiers
n
Video Line Driver
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
Distortion vs Frequency
–40
A
V
V
= +1
= 2V
High Speed ADC Driver
V
IN
S
P-P
–50
–60
5V
=
5V
5V
V
P-P
IN
R3
49.9Ω
+
–
LTC®1420
PGA GAIN = 1
REF = 2.048V
1V
–70
12 BITS
10Msps
R
L
= 100Ω, 2ND
•
•
•
LT1809
–5V
+A
IN
C1
470pF
–80
–A
IN
R2
1k
–90
1809 TA01a
R
L
= 100Ω, 3RD
R
= 1k, 3RD
L
–5V
–100
R1
1k
R
L
= 1k, 2ND
–110
0.3
1
10
30
FREQUENCY (MHz)
1809 TA01b
180910fa
1
LT1809/LT1810
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V to V ) .............................12.6V
Input Voltage (Note 2)............................................... V
Input Current (Note 2)......................................... 10mA
Output Short-Circuit Duration (Note 3)............ Indefinite
Operating Temperature Range (Note 4) ...–40°C to 85°C
(Note 1)
+
–
Specified Temperature Range (Note 5) ....–40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
S
PIN CONFIGURATION
TOP VIEW
TOP VIEW
+
SHDN
–IN
1
2
3
4
8
7
6
5
NC
OUT 1
–
6 V
+
V
–
+
V
2
5 SHDN
4 –IN
+IN
OUT
NC
+IN 3
–
V
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, θ = 145°C/W (Note 9)
JMAX
JA
T
JMAX
= 150°C, θ = 100°C/W (Note 9)
JA
TOP VIEW
+
TOP VIEW
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
OUT A
–IN A
+IN A
1
2
3
4
8 V
OUT B
–IN B
+IN B
7 OUT B
6 –IN B
5 +IN B
A
–
V
B
–
V
MS8 PACKAGE
8-LEAD PLASTIC MSOP
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, θ = 130°C/W (Note 9)
JA
JMAX
T
JMAX
= 150°C, θ = 100°C/W (Note 9)
JA
ORDER INFORMATION
LEAD FREE FINISH
LT1809CS6#PBF
LT1809IS6#PBF
LT1809CS8#PBF
LT1809IS8#PBF
LT1810CMS8#PBF
LT1810IMS8#PBF
LT1810CS8#PBF
LT1810IS8#PBF
TAPE AND REEL
PART MARKING
LTKY
PACKAGE DESCRIPTION
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
8-Lead Plastic SO
SPECIFIED TEMPERATURE RANGE
LT1809CS6#TRPBF
LT1809IS6#TRPBF
LT1809CS8#TRPBF
LT1809IS8#TRPBF
LT1810CMS8#TRPBF
LT1810IMS8#TRPBF
LT1810CS8#TRPBF
LT1810IS8#TRPBF
0°C to 70°C
LTUF
–40°C to 85°C
0°C to 70°C
1809
1809I
8-Lead Plastic SO
–40°C to 85°C
0°C to 70°C
LTRF
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic SO
LTTQ
–40°C to 85°C
0°C to 70°C
1810
1810I
8-Lead Plastic SO
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
180910fa
2
LT1809/LT1810
ELECTRICAL CHARACTERISTICS TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
0.6
0.6
0.6
0.6
2.5
2.5
3.0
3.0
mV
mV
mV
mV
OS
–
+
–
–
+
+
Input Offset Shift
V
CM
V
CM
= V to V
LT1809 SO-8
0.3
0.3
2.0
2.5
mV
mV
ΔV
OS
–
= V to V
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
0.7
6
mV
+
–
I
B
Input Bias Current
V
CM
V
CM
= V
1.8
–13
8
μA
μA
= V + 0.2V
–27.5
–
+
Input Bias Current Shift
V
CM
= V + 0.2V to V
14.8
35.5
μA
ΔI
B
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
CM
V
CM
= V
0.1
0.2
4
8
μA
μA
–
= V + 0.2V
+
I
OS
Input Offset Current
V
CM
V
CM
= V
0.05
0.2
1.2
4
μA
μA
–
= V + 0.2V
–
+
Input Offset Current Shift
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
V
= V + 0.2V to V
0.25
16
5
5.2
μA
nV/√Hz
pA/√Hz
pF
ΔI
CM
OS
e
f = 10kHz
f = 10kHz
n
i
n
C
A
2
IN
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
25
4
15
80
10
42
V/mV
V/mV
V/mV
VOL
S
S
S
O
O
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100ꢀ to V /2
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
L
–
–
+
+
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
66
61
82
78
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
60
55
82
78
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
+
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
71
65
87
87
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
V
V
No Load
12
50
180
50
120
375
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
Short-Circuit Current
No Load
20
80
80
mV
mV
mV
OH
I
I
= 5mA
180
650
SOURCE
SOURCE
= 25mA
330
I
I
V = 5V
45
35
85
70
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Supply Current, Shutdown
12.5
17
mA
S
V = 5V, V
= 0.3V
= 0.3V
0.55
0.31
1.25
0.90
mA
mA
S
SHDN
SHDN
V = 3V, V
S
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
420
220
750
500
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
0.1
75
μA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
t
ON
V
SHDN
= 0.3V to 4.5V, R = 100
80
ns
L
180910fa
3
LT1809/LT1810
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply,
ELECTRICAL CHARACTERISTICS
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
= 4.5V to 0.3V, R = 100
MIN
TYP
50
MAX
UNITS
ns
t
Turn-Off Time
V
SHDN
OFF
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
160
300
23.5
–86
27
MHz
V/μs
MHz
dB
V = 5V, A = –1, R = 1k, V = 4V
S
V
L
O
P-P
FPBW
THD
Full Power Bandwidth
Total Harmonic Distortion
Settling Time
V = 5V, V
= 4V
OUT P-P
S
V = 5V, A = 1, R = 1k, V = 2V , f = 5MHz
S
V
L
O
P-P C
t
S
0.1%, V = 5V, V
= 2V, A = –1, R = 500ꢀ
ns
S
STEP
V
L
Differential Gain (NTSC)
Differential Phase (NTSC)
V = 5V, A = 2, R = 150ꢀ
0.015
0.05
%
ΔG
S
V
L
V = 5V, A = 2, R = 150ꢀ
Deg
Δθ
S
V
L
The l denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open;
VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
l
l
l
l
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
1
1
1
1
3.0
3.0
3.5
3.5
mV
mV
mV
mV
OS
–
+
–
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
9
9
25
25
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
V
= V to V
LT1809 SO-8
0.5
0.5
2.5
3.0
mV
mV
ΔV
CM
CM
OS
–
= V to V
–
+
l
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V , V = V
1.2
6.5
10
40
mV
CM
CM
+
l
l
I
Input Bias Current
V
CM
V
CM
= V – 0.2V
2
–14
μA
μA
B
–
= V + 0.4V
–30
–
+
l
l
Input Bias Current Shift
V
CM
= V + 0.4V to V – 0.2V
16
μA
ΔI
B
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
CM
V
CM
= V – 0.2V
0.1
0.5
5
10
μA
μA
–
= V + 0.4V
+
–
l
l
I
OS
Input Offset Current
V
CM
V
CM
= V – 0.2V
0.05
0.40
1.5
4.5
μA
μA
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.45
6
μA
ΔI
CM
OS
l
l
l
A
VOL
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
20
3.5
12
75
8.5
40
V/mV
V/mV
V/mV
S
S
S
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100ꢀ to V /2
O
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
O
L
–
–
+
+
l
l
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
64
60
80
75
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
l
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V , V = V
58
54
80
75
dB
dB
S
CM
CM
V = 3V, V = V , V = V
S
CM
CM
–
+
l
l
l
l
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
70
64
83
83
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
l
l
l
V
No Load
12
55
200
60
140
400
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
180910fa
4
LT1809/LT1810
The l denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
Output Voltage Swing HIGH (Note 7)
No Load
50
110
370
120
220
700
mV
mV
mV
OH
I
I
= 5mA
SOURCE
SOURCE
= 25mA
l
l
I
I
Short-Circuit Current
V = 5V
S
40
30
75
65
mA
mA
SC
S
V = 3V
l
Supply Current per Amplifier
Supply Current, Shutdown
15
20
mA
S
l
l
V = 5V, V
= 0.3V
= 0.3V
0.58
0.35
1.4
1.1
mA
mA
S
SHDN
SHDN
V = 3V, V
S
l
l
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
420
220
850
550
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
l
l
l
l
l
l
l
l
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
2
μA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
145
250
20
MHz
V/μs
MHz
V = 5V, A = –1, R = 1k, V = 4V
S
V
L
O
P-P
FPBW
Full Power Bandwidth
V = 5V, V
S
= 4V
OUT P-P
The l denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open;
VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
l
l
l
l
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
1
1
1
1
3.5
3.5
4.0
4.0
mV
mV
mV
mV
OS
–
+
–
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
9
9
25
25
μV/°C
μV/°C
OS
CM
CM
–
+
l
l
V
CM
V
CM
= V to V
LT1809 SO-8
0.5
0.5
3.0
3.5
mV
mV
ΔV
OS
–
= V
+
–
l
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
1.2
7
mV
CM
CM
(Note 10)
+
–
l
l
I
Input Bias Current
V
V
= V – 0.2V
2
12
47
μA
μA
B
CM
CM
= V + 0.4V
–35
–17
–
+
l
Input Bias Current Shift
V
CM
= V + 0.4V to V – 0.2V
19
μA
ΔI
B
+
–
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.2
0.6
6
12
μA
μA
CM
CM
= V + 0.4V
+
–
l
l
I
OS
Input Offset Current
V
CM
V
CM
= V – 0.2V
0.08
0.5
2
6
μA
μA
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.58
7.5
μA
ΔI
CM
OS
l
l
l
A
VOL
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
17
2.5
10
60
7
35
V/mV
V/mV
V/mV
S
S
S
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100ꢀ to V /2
O
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
O
L
180910fa
5
LT1809/LT1810
The l denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
V = 5V, V = V to V
MIN
TYP
MAX
UNITS
–
–
+
+
l
l
CMRR
Common Mode Rejection Ratio
63
58
80
75
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
l
l
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
57
52
78
72
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
+
l
l
l
l
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
69
63
83
83
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
l
l
l
V
V
No Load
18
60
210
70
150
450
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
l
l
l
Output Voltage Swing HIGH (Note 7)
Short-Circuit Current
No Load
55
130
240
750
mV
mV
mV
OH
I
I
= 5mA
120
375
SOURCE
SOURCE
= 25mA
l
l
I
I
V = 5V
30
25
70
60
mA
mA
SC
S
V = 3V
S
l
Supply Current per Amplifier
Supply Current, Shutdown
15
21
mA
S
l
l
V = 5V, V
= 0.3V
= 0.3V
0.58
0.35
1.5
1.2
mA
mA
S
SHDN
SHDN
V = 3V, V
S
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
●
●
420
220
900
600
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
●
●
●
●
●
●
●
●
3
μA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
SHDN
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
V = 5V, A = -1, R = 1k, V = 4V
P-P
140
180
14
MHz
V/μs
MHz
S
V
L
O
FPBW
Full Power Bandwidth
V = 5V, V
S
= 4V
OUT P-P
TA = 25°C. VS = 5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
0.8
0.8
0.8
0.8
3.0
3.0
3.5
3.5
mV
mV
mV
mV
OS
–
+
–
–
+
+
Input Offset Voltage Shift
V
CM
V
CM
= V to V
LT1809 SO-8
0.35
0.35
2.5
3.0
mV
mV
ΔV
OS
–
= V to V
+
–
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V , V = V
1
6
mV
CM
CM
+
I
Input Bias Current
V
CM
V
CM
= V
2
10
μA
μA
B
–
= V + 0.2V
–30
–12.5
180910fa
6
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–
+
Input Bias Current Shift
V
CM
= V + 0.2V to V
14.5
40
μA
ΔI
B
+
–
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V
0.1
0.4
5
10
μA
μA
CM
CM
= V + 0.2V
+
–
I
OS
Input Offset Current
V
CM
V
CM
= V
0.05
0.40
2
5
μA
μA
= V + 0.2V
–
+
Input Offset Current Shift
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
V
= V + 0.2V to V
0.45
16
5
7
μA
nV/√Hz
pA/√Hz
pF
ΔI
CM
OS
e
f = 10kHz
f = 10kHz
f = 100kHz
n
i
n
C
IN
2
A
VOL
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
30
4.5
100
12
V/mV
V/mV
O
L
V = –2.5V to 2.5V, R = 100ꢀ
O
L
–
+
CMRR
Common Mode Rejection Ratio
V
CM
V
CM
= V to V
70
64
89
89
dB
dB
V
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
71
65
87
90
dB
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
No Load
V
V
12
50
180
60
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
140
425
SINK
SINK
Output Voltage Swing HIGH (Note 7)
No Load
SOURCE
SOURCE
35
90
310
100
200
700
mV
mV
mV
I
I
= 5mA
= 25mA
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
55
85
15
mA
mA
mA
μA
SC
20
1.3
750
75
S
V
V
V
= 0.3V
= 0.3V
= 0.3V
0.6
420
0.1
SHDN
SHDN
SHDN
I
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
μA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
A = –1, R = 1k, V = 4V,
110
175
180
350
MHz
V/μs
V
L
O
Measured at V = 3V
O
FPBW
THD
Full Power Bandwidth
Total Harmonic Distortion
Settling Time
V
= 8V
14
–90
34
MHz
dB
OUT
P-P
A = 1, R = 1k, V = 2V , f = 5MHz
V
L
O
P-P C
t
S
0.1%, V
= 8V, A = –1, R = 500ꢀ
ns
STEP
V
L
Differential Gain (NTSC)
Differential Phase (NTSC)
A = 2, R = 150ꢀ
0.01
0.01
%
ΔG
V
L
A = 2, R = 150ꢀ
Deg
Δθ
V
L
180910fa
7
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
temperature range. VS = 5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
l
l
l
l
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
1
1
1
1
3.25
3.25
3.75
3.75
mV
mV
mV
mV
OS
–
+
–
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
10
10
25
25
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
V
= V to V
LT1809 SO-8
0.5
0.5
2.75
3.25
mV
mV
ΔV
CM
CM
OS
–
= V to V
–
+
l
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V to V
1.2
6.5
mV
CM
+
l
l
l
I
Input Bias Current
V
CM
V
CM
V
CM
= V – 0.2V
2.5
–15
17.5
12.5
μA
μA
μA
B
–
= V + 0.4V
–37.5
–
+
ΔI
Input Bias Current Shift
= V + 0.4V to V – 0.2V
50
B
+
–
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.1
0.5
6
12
μA
μA
CM
CM
= V + 0.4V
+
–
l
l
I
OS
Input Offset Current
V
CM
V
CM
= V – 0.2V
0.06
0.5
2.25
6
μA
μA
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.56
8.25
μA
ΔI
CM
OS
l
l
A
VOL
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100ꢀ
27
3.5
80
10
V/mV
V/mV
O
O
L
L
–
+
l
l
l
l
l
CMRR
Common Mode Rejection Ratio
V
V
= V to V
69
63
86
86
dB
dB
V
CM
CM
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
70
64
83
83
dB
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
l
l
l
V
V
No Load
20
50
210
80
160
475
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
l
l
l
Output Voltage Swing HIGH (Note 7)
No Load
60
120
370
140
240
750
mV
mV
mV
I
I
= 5mA
SOURCE
SOURCE
= 25mA
l
l
l
l
l
l
l
l
l
l
l
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
45
75
17.5
0.6
420
3
mA
mA
mA
μA
SC
25
1.5
850
S
V
V
V
= 0.3V
= 0.3V
= 0.3V
SHDN
SHDN
SHDN
I
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
μA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
A = –1, R = 1k, V = 4V,
85
170
300
MHz
V/μs
140
V
L
O
Measured at V = 3V
O
l
FPBW
Full Power Bandwidth
V
OUT
= 8V
12
MHz
P-P
180910fa
8
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C
temperature range. VS = 5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
–v
l
l
l
l
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
= V
= V
LT1809 SO-8
LT1809 SO-8
1
1
1
1
3.75
3.75
4.25
4.25
mV
mV
mV
mV
OS
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
10
10
25
25
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
CM
V
CM
= V to V
LT1809 SO-8
0.5
0.5
3.00
3.75
mV
mV
ΔV
OS
–
= V to V
–
+
l
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V to V
1.2
7.5
14
59
mV
CM
+
l
l
I
Input Bias Current
V
V
= V – 0.2V
2.8
–17
μA
μA
B
CM
CM
–
= V + 0.4V
–45
–
+
l
Input Bias Current Shift
V
CM
= V + 0.4V to V – 0.2V
19.8
μA
ΔI
B
+
–
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.1
0.6
7
14
μA
μA
CM
CM
= V + 0.4V
+
–
l
l
I
OS
Input Offset Current
V
V
= V – 0.2V
0.08
0.6
2.5
8
μA
μA
CM
CM
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.68
10.5
μA
ΔI
CM
OS
l
l
A
VOL
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100ꢀ
22
3
70
10
V/mV
V/mV
O
O
L
L
–
+
l
l
l
l
l
CMRR
Common Mode Rejection Ratio
V
V
= V to V
68
86
86
dB
dB
V
CM
CM
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
62
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
69
63
83
83
dB
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
No Load
l
l
l
V
V
23
60
220
100
170
525
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
l
l
l
Output Voltage Swing HIGH (Note 7)
No Load
75
130
375
160
260
775
mV
mV
mV
I
I
= 5mA
SOURCE
SOURCE
= 25mA
l
l
l
l
l
l
l
l
l
l
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
30
75
19
mA
mA
mA
μA
SC
25
1.6
900
S
V
V
V
= 0.3V
= 0.3V
= 0.3V
0.65
420
4
SHDN
SHDN
SHDN
I
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
μA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
A = –1, R = 1k, V = 4V,
80
160
220
MHz
V/μs
l
l
110
V
L
O
Measured at V = 3V
O
l
FPBW
Full Power Bandwidth
V
= 8V
8.5
MHz
OUT
P-P
180910fa
9
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 1.4V, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 8: This parameter is not 100% tested.
Note 9: Thermal resistance varies depending upon the amount of PC board
–
metal attached to the V pin of the device. θ is specified for a certain
JA
–
amount of 2oz of copper metal trace connecting to the V pin as described
in the thermal resistance tables in the Applications Information section.
Note 10: Matching parameters are the difference between the two
amplifiers of the LT1810.
Note 4: The LT1809C/LT1809I and LT1810C/LT1810I are guaranteed
functional over the operating temperature range of –40°C and 85°C.
Note 5: The LT1809C/LT1810C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1809C/LT1810C are designed,
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LT1809I/LT1810I are guaranteed to meet specified performance from
–40°C to 85°C.
180910fa
10
LT1809/LT1810
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Distribution, VCM = 0V
(PNP Stage)
VOS Distribution, VCM = 5V
(NPN Stage)
ΔVOS Shift for VCM = 0V to 5V
50
40
30
20
50
40
30
20
25
20
15
10
V
= 5V, 0V
V
= 5V, 0V
V
= 5V, 0V
S
S
S
10
0
10
0
5
0
–3
–1
0
1
2
3
–2
–3
–1
0
1
2
3
–2
–1
0
0.25 0.5 0.75
1
–0.75 –0.5 –0.25
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (mV)
1809 G01
1809 G02
1809 G03
Offset Voltage
Input Bias Current
Supply Current vs Supply Voltage
vs Input Common Mode
vs Common Mode Voltage
2.0
1.5
10
5
25
20
15
V
= 5V, 0V
V
= 5V, 0V
S
S
TYPICAL PART
T
= 25°C
A
T
= 125°C
= 25°C
A
0
T
= 125°C
A
T
= 125°C
A
1.0
0.5
T
= –55°C
A
–5
T
= 25°C
A
T
A
–10
–15
–20
–25
–30
T
A
= –55°C
A
0
10
5
T
= 25°C
A
T
= –55°C
A
–0.5
–1.0
–1.5
T
= 125°C
T
= –55°C
2
A
0
1
3
5
0
4
0
1
3
4
5
6
–1
2
0
1
2
3
4
5
6
7
8
9
10
INPUT COMMON MODE VOLTAGE (V)
COMMON MODE VOLTAGE (V)
TOTAL SUPPLY VOLTAGE (V)
1809 G05
1809 G06
1809 G04
Output Saturation Voltage
Output Saturation Voltage
Input Bias Current vs Temperature
vs Load Current (Output Low)
vs Load Current (Output High)
10
1
5
3
10
1
V
= 5V, 0V
V
= 5V, 0V
V
= 5V, 0V
S
S
S
V
= 5V
CM
1
–1
–3
–5
–7
–9
–11
–13
–15
T
= 125°C
= 25°C
0.1
A
0.1
V
= 0V
CM
T
T
= 125°C
A
A
0.01
0.001
0.01
0.001
T
= –55°C
T
= 25°C
A
A
T
= –55°C
A
0.01
0.1
1
10
100
–50 –35 –20 –5 10 25 40 55 70 85
TEMPERATURE (°C)
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
1809 G09
1809 G08
1809 G07
180910fa
11
LT1809/LT1810
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current
vs SHDN Pin Voltage
Output Short-Circuit Current
Minimum Supply Voltage
vs Power Supply Voltage
1.0
0.8
120
100
80
18
16
14
12
10
8
V
= V– + 0.5V
= –55°C
CM
V
= 5V, 0V
T
= 25°C
T
= –55°C
S
A
A
T
= 125°C
A
0.6
T
= 125°C
60
A
0.4
“SINKING”
40
0.2
T
A
= 25°C
T
A
20
0
0
T
= 125°C
A
–0.2
–0.4
–0.6
–0.8
–1.0
–20
–40
–60
–80
–100
“SOURCING”
6
T
= 25°C
A
T
= –55°C
A
4
T
= 125°C
A
T
= –55°C
A
2
T
= 25°C
2.0
A
0
1.5
2.5 3.0 3.5
4.0 4.5 5.0
1.5
2.5 3.0 3.5
4.0 4.5 5.0
2.0
0
4
5
1
2
3
POWER SUPPLY VOLTAGE ( V)
TOTAL SUPPLY VOLTAGE (V)
SHDN PIN VOLTAGE (V)
1809 G11
1809 G10
1809 G12
SHDN Pin Current
vs SHDN Pin Voltage
Open-Loop Gain
Open-Loop Gain
2.5
2.0
2.5
2.0
50
0
V
= 3V, 0V
V
= 5V, 0V
V
= 5V, 0V
S
S
S
1.5
1.5
–50
1.0
1.0
–100
–150
–200
–250
–300
–350
–400
–450
T
= 125°C
A
0.5
0.5
T
= –55°C
R
= 1k
T
A
= 25°C
R = 1k
L
A
L
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–0.5
–1.0
–1.5
–2.0
–2.5
R
= 100Ω
R = 100Ω
L
L
0
1
2
3
4
5
0
0.5
1.5
2.0
2.5
3.0
1.0
0
1
3
OUTPUT VOLTAGE (V)
4
5
2
OUTPUT VOLTAGE (V)
SHDN PIN VOLTAGE (V)
1809 G13
1809 G14
1809 G15
Warm-Up Drift vs Time
(LT1809S8)
Open-Loop Gain
Offset Voltage vs Output Current
15
10
2.5
2.0
180
160
140
120
100
80
V
S
=
5V
T = 25°C
A
V
=
5V
S
V
S
= 5V
1.5
T
= 25°C
A
1.0
5
0
T
A
= 125°C
0.5
R
L
= 1k
L
0
T
= –55°C
V
= 5V, 0V
= 3V, 0V
A
–0.5
–1.0
–1.5
–2.0
–2.5
S
–5
–10
–15
60
V
S
R
= 100Ω
40
20
0
–100–80 –60 –40 –20
0
20 40 60 80 100
40
TIME AFTER POWER UP (SEC)
–5 –4 –3 –2 –1
0
1
2
3
4
5
0
20
60 80 100 120 140 160
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
1809 G17
1809 G16
1809 G18
180910fa
12
LT1809/LT1810
TYPICAL PERFORMANCE CHARACTERISTICS
0.1Hz to 10Hz
Output Voltage Noise
Input Noise Voltage vs Frequency
Input Noise Current vs Frequency
100
90
20
16
12
8
10
8
V
= 5V, 0V
V
= 5V, 0V
S
S
80
6
70
4
60
50
2
0
NPN ACTIVE
= 4.5V
40
30
20
10
0
–2
–4
–6
–8
–10
PNP ACTIVE
= 2.5V
V
CM
V
CM
PNP ACTIVE
4
V
CM
= 2.5V
NPN ACTIVE
V
CM
= 4.5V
0
0.1
1
10
100
0.1
1
10
100
TIME (2s/DIV)
FREQUENCY (kHz)
FREQUENCY (kHz)
1809 G19
1809 G20
1809 G21
Gain Bandwidth and Phase
Margin vs Supply Voltage
Gain Bandwidth and Phase
Margin vs Temperature
Slew Rate vs Temperature
55
55
50
45
40
35
450
T
= 25°C
= 1k
A
L
50
45
40
35
30
V
=
5V
R
S
400
350
300
250
200
150
100
50
PHASE MARGIN
V
= 5V
S
PHASE MARGIN
V
= 3V, 0V
S
V
= 5V, 0V
S
190
185
180
175
170
165
160
200
190
180
170
160
150
V
=
5V
S
GAIN BANDWIDTH
A
= 1
V
F
L
R = R = 1k
V
= 3V, 0V
G
S
R
= 1k
RISING AND FALLING
SLEW RATE
GAIN BANDWIDTH
–55
0
25
50
75 100 125
–25
0
50
75 100 125
0
2
4
6
8
10
–25
–55
25
TEMPERATURE (°C)
TOTAL SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
1809 G23
1809 G22
1809 G24
Gain and Phase vs Frequency
Closed-Loop Gain vs Frequency
Closed-Loop Gain vs Frequency
15
12
9
15
12
9
60
50
100
A
= +1
A = +2
V
V
PHASE
80
V
= 3V, 0V
V = 5V
S
S
40
60
6
6
V
= 3V
V
= 3V
5V
S
S
30
40
3
3
V
= 5V
S
V
=
S
0
0
20
20
V
= 5V
S
V
= 3V, 0V
S
–3
–6
–9
–12
–15
–3
–6
–9
10
0
GAIN
0
–20
–40
–60
–10
–20
C
= 5pF
= 1k
L
L
–12
R
–15
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M 500M
100k
1M
10M
100M 500M
FREQUENCY (Hz)
1809 G25
1809 G26
1809 G27
180910fa
13
LT1809/LT1810
TYPICAL PERFORMANCE CHARACTERISTICS
Common Mode Rejection Ratio
Power Supply Rejection Ratio
vs Frequency
Output Impedance vs Frequency
vs Frequency
110
100
90
600
100
100
90
V
= 5V, 0V
V
= 5V, 0V
= 25°C
V
= 5V, 0V
S
S
A
S
T
80
POSITIVE
SUPPLY
80
70
10
1
70
60
60
50
A
= 10
NEGATIVE
SUPPLY
V
A
= 2
V
50
40
30
20
10
40
30
20
10
0
A
= 1
V
0.1
0.01
10k
100k
1M
10M
100M 500M
100k
1M
10M
FREQUENCY (Hz)
100M 500M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
1809 G29
1809 G28
1809 G30
Series Output Resistor
vs Capacitive Load
Series Output Resistor
vs Capacitive Load
0.01% Settling Time
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
INPUT SIGNAL
GENERATION
(2V/DIV)
V
A
= 5V, 0V
= +2
V
A
= 5V, 0V
= +1
S
V
S
V
R
R
= 10Ω
= ∞
S
L
OUTPUT
SETTLING
RESOLUTION
(2mV/DIV)
R
S
R
L
= 10Ω,
= ∞
R
R
= 20Ω
= ∞
S
L
R
S
= 20Ω, R = ∞
L
R
= R = 50Ω
S
L
1809 G33
20ns/DIV)
V
V
A
=
OUT
= –1
= 500Ω
5V
4V
S
R
= R = 50Ω
S
L
=
0
0
V
10
100
CAPACITIVE LOAD (pF)
1000
10
100
1000
R
L
CAPACITIVE LOAD (pF)
t
= 110ns (SETTLING TIME)
S
1809 G32
1809 G31
Distortion vs Frequency
Distortion vs Frequency
Distortion vs Frequency
–40
–50
–40
–50
–40
–50
A
V
V
= +2
= 2V
A
V
V
= +1
= 2V
= 5V
A
V
V
= +1
= 2V
V
O
S
V
O
S
V
O
S
P-P
P-P
P-P
=
5V
=
5V
–60
–60
–60
R
L
= 100Ω, 2ND
R
= 1k, 2ND
L
–70
–70
–70
R
= 100Ω, 2ND
L
R
R
= 100Ω, 2ND
= 100Ω, 3RD
1
L
–80
–80
–80
R
L
= 1k, 2ND
–90
–90
–90
R
L
= 100Ω, 3RD
L
R
L
= 1k, 3RD
10
R
= 1k, 3RD
L
R
= 1k, 3RD
10
R
1
= 100Ω, 3RD
L
L
–100
–100
–100
R
= 1k, 2ND
L
–110
–110
–110
0.3
30
0.3
30
0.3
1
10
30
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
1809 G36
1809 G35
1809 G34
180910fa
14
LT1809/LT1810
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Undistorted Output
Signal vs Frequency
Distortion vs Frequency
–40
–50
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
V
= 5V
S
A
V
V
= +2
= 2V
= 5V
V
O
S
P-P
A
= –1
V
–60
R
= 100Ω, 2ND
L
–70
A
= +2
V
R
= 100Ω, 3RD
L
–80
R
= 1k, 2ND
L
R
= 1k, 3RD
L
–90
–100
–110
0.3
1
10
30
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
1809 G37
1809 G38
5V Large-Signal Response
5V Small-Signal Response
5V Large-Signal Response
1809 G39
1809 G41
1809 G40
10ns/DIV)
10ns/DIV)
10ns/DIV)
V
A
=
= +1
= 1k
5V
V
A
=
= +1
= 1k
5V
V
A
= 5V
= +1
= 1k
S
V
L
S
V
L
S
V
L
R
R
R
5V Small-Signal Response
Output Overdriven Recovery
Shutdown Response
V
IN
(1V/DIV)
V
SHDN
0V)
0V)
0V)
V
OUT
V
OUT
0V)
(2V/DIV)
1809 G42
1809 G43
1809 G44
10ns/DIV)
10ns/DIV)
100ns/DIV)
V
A
=
= +1
= 1k
5V
V
A
= 5V, 0V
= +2
V
A
= 5V, 0V
= +2
= 100Ω
S
V
L
S
V
S
V
L
R
R
180910fa
15
LT1809/LT1810
APPLICATIONS INFORMATION
Rail-to-Rail Characteristics
Power Dissipation
TheLT1809/LT1810haveaninputandoutputsignalrange
that includes both negative and positive power supply.
Figure 1 depicts a simplified schematic of the amplifier.
Theinputstageiscomprisedoftwodifferentialamplifiers,
a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active
overdifferentrangesofcommonmodeinputvoltage.The
PNP differential pair is active for common mode voltages
betweenthenegativesupplytoapproximately1.5Vbelow
the positive supply. As the input voltage moves closer
toward the positive supply, the transistor Q5 will steer
The LT1809/LT1810 amplifiers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150°C. The LT1809 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1810 is in an SO-8
–
or 8-lead MSOP package. All packages have the V sup-
ply pin fused to the lead frame to enhance the thermal
conductancewhenconnectingtoagroundplaneoralarge
metal trace. Metal trace and plated through-holes can be
used to spread the heat generated by the device to the
backside of the PC board. For example, on a 3/32" FR-4
board with 2oz copper, a total of 660 square millimeters
connected to Pin 4 of LT1810 in an SO-8 package (330
square millimeters on each side of the PC board) will bring
the tail current I to the current mirror Q6/Q7, activating
1
the NPN differential pair and causing the PNP pair to
become inactive for the rest of the input common mode
range up to the positive supply.
the thermal resistance, θ , to about 85°C/W. Without
JA
A pair of complementary common emitter stages
Q14/Q15 form the output stage, enabling the output to
swing from rail-to-rail. The capacitors C1 and C2 form
the local feedback loops that lower the output impedance
at high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
–
extra metal trace connected to the V pin to provide a heat
sink, the thermal resistance will be around 105°C/W. More
information on thermal resistance for all packages with
–
various metal areas connecting to the V pin is provided
in Tables 1, 2 and 3 for thermal consideration.
+
V
R6
10k
R3
R4
R5
Q16
Q17
+
–
+
V
V
V
Q12
ESDD5
D9
D1
ESDD1
ESDD2
Q11
Q13
Q15
R7
100k
I
1
C2
SHDN
+IN
–IN
D6
D5
D8
D7
Q5
V
BIAS
I
2
D2
ESDD6
OUT
C
C
–
V
–
V
Q4 Q3
Q1 Q2
D3
BUFFER
AND
ESDD4
ESDD3
OUTPUT BIAS
Q10
–
+
V
V
D4
Q9
R1
Q8
R2
BIAS
GENERATION
C1
Q14
Q7
Q6
–
V
1809 F01
Figure 1. LT1809 Simplified Schematic Diagram
180910fa
16
LT1809/LT1810
APPLICATIONS INFORMATION
Example:AnLT1810inSO-8mountedona2500mm2 area
of PC board without any extra heat spreading plane con-
nected to its V– pin has a thermal resistance of 105°C/W,
θJA. Operating on 5V supplies with both amplifiers
simultaneously driving 50ꢀ loads, the worst-case power
dissipation is given by:
Table 1. LT1809 6-Lead SOT-23 Package
COPPER AREA
TOPSIDE (mm )
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2
2
(mm )
270
2500
2500
2500
2500
135°C/W
145°C/W
160°C/W
200°C/W
100
20
0
2
P
= 2 • (10 • 25mA) + 2 • (2.5) /50
= 0.5 + 0.250 = 0.750W
D(MAX)
Device is mounted on topside.
Table 2. LT1809/LT1810 SO-8 Package
COPPER AREA
The maximum ambient temperature that the part is al-
lowed to operate is:
TOPSIDE
(mm )
BACKSIDE BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2
2
2
(mm )
(mm )
T = T – (P • 105°C/W)
D(MAX)
A
J
1100
330
35
1100
330
35
0
2500
2500
2500
2500
2500
65°C/W
85°C/W
95°C/W
100°C/W
105°C/W
= 150°C – (0.750W • 105°C/W) = 71°C
To operate the device at higher ambient temperature, con-
–
35
nect more metal area to the V pin to reduce the thermal
resistance of the package as indicated in Table 2.
0
0
Device is mounted on topside.
Input Offset Voltage
Table 3. LT1810 8-Lead MSOP Package
COPPER AREA
The offset voltage will change depending upon which
input stage is active and the maximum offset voltage is
TOPSIDE
BACKSIDE BOARD AREA
THERMAL RESISTANCE
guaranteed to be less than 3mV. The change of V over
OS
2
2
2
(mm )
(mm )
(mm )
(JUNCTION-TO-AMBIENT)
the entire input common mode range (CMRR) is less than
2.5mV on a single 5V and 3V supply.
540
100
100
30
540
100
0
2500
2500
2500
2500
2500
110°C/W
120°C/W
130°C/W
135°C/W
140°C/W
Input Bias Current
0
The input bias current polarity depends upon a given input
common voltage at whichever input stage is operating.
When the PNP input stage is active, the input bias cur-
rents flow out of the input pins and flow into the input pins
when the NPN input stage is activated. Because the input
offset current is less than the input bias current, matching
the source resistances at the input pin will reduce total
offset error.
0
0
Device is mounted on topside.
Junction temperature T is calculated from the ambient
J
temperature T and power dissipation P as follows:
A
D
T = T + (P • θ )
J
A
D
JA
The power dissipation in the IC is the function of the
supply voltage, output voltage and the load resistance.
For a given supply voltage, the worst-case power dis-
Output
The LT1809/LT1810 can deliver a large output current,
so the short-circuit current limit is set around 90mA to
prevent damage to the device. Attention must be paid to
keepthejunctiontemperatureoftheICbelowtheabsolute
maximumratingof150°C(refertothePowerDissipation
section)whentheoutputiscontinuouslyshort-circuited.
sipation P
occurs at the maximum supply current
D(MAX)
with the output voltage at half of either supply voltage (or
the maximum swing is less than 1/2 the supply voltage).
P
is given by:
D(MAX)
2
P
= (V • I
) + (V /2) /R
S(MAX) S L
D(MAX)
S
180910fa
17
LT1809/LT1810
APPLICATIONS INFORMATION
The output of the amplifier has reverse-biased diodes
connected to each supply. If the output is forced beyond
either supply, unlimited current will flow through these
diodes. If the current is transient and limited to several
hundred milliamps, no damage to the device will occur.
of 10ꢀ to 50ꢀ should be connected between the output
and the capacitive load to avoid ringing or oscillation. The
feedback should still be taken from the output so that the
resistor will isolate the capacitive load to ensure stability.
Graphsoncapacitiveloadsindicatethetransientresponse
of the amplifier when driving capacitive load with a speci-
fied series resistor.
Overdrive Protection
When the input voltage exceeds the power supplies, two
pairs of crossing diodes, D1 to D4, will prevent the out-
put from reversing polarity. If the input voltage exceeds
either power supply by 700mV, diodes D1/D2 or D3/D4
will turn on, keeping the output at the proper polarity.
For the phase reversal protection to perform properly,
the input current must be limited to less than 5mA. If
the amplifier is severely overdriven, an external resistor
should be used to limit the overdrive current.
Feedback Components
Whenfeedbackresistorsareusedtosetupgain,caremust
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
does not degrade stability. For instance, the LT1809 in a
noninverting gain of 2, set up with two 1k resistors and a
capacitance of 3pF (device plus PC board), will probably
ring in transient response. The pole that is formed at
106MHzwillreducephasemarginby34degreeswhenthe
crossover frequency of the amplifier is around 70MHz. A
capacitor of 3pF or higher connected across the feedback
resistor will eliminate any ringing or oscillation.
The LT1809/LT1810’s input stages are also protected
against differential input voltages of 1.4V or higher by
back-to-back diodes, D5/D8, that prevent the emitter-
base breakdown of the input transistors. The current in
these diodes should be limited to less than 10mA when
they are active. The worst-case differential input voltage
usually occurs when the input is driven while the output
is shorted to ground in a unity-gain configuration. In ad-
dition, the amplifier is protected against ESD strikes up
to 3kV on all pins by a pair of protection diodes on each
pin that are connected to the power supplies as shown
in Figure 1.
SHDN Pin
The LT1809 has a SHDN pin to reduce the supply current
to less than 1.25mA. When the SHDN pin is pulled low,
it will generate a signal to power down the device. If the
pin is left unconnected, an internal pull-up resistor of 10k
will keep the part fully operating as shown in Figure 1. The
output will be high impedance during shutdown, and the
turn-on and turn-off time is less than 100ns. Because the
inputs are protected by a pair of back-to-back diodes, the
input signal will feed through to the output during shut-
down mode if the amplitude of signal between the inputs
is larger than 1.4V.
Capacitive Load
The LT1809/LT1810 is optimized for high bandwidth and
low distortion applications. It can drive a capacitive load
about 20pF in a unity-gain configuration and more with
highergain.Whendrivingalargercapacitiveload,aresistor
180910fa
18
LT1809/LT1810
TYPICAL APPLICATIONS
Driving A/D Converters
andresistors,anNPOchipcapacitorandmetal-filmsurface
mount resistors, should be used since these components
can add to distortion. The voltage glitch of the converter,
due to its sampling nature, is buffered by the LT1809 and
the ability of the amplifier to settle it quickly will affect the
spurious-free dynamic range of the system. Figure 2 to
Figure7depicttheLT1809drivingtheLTC1420atdifferent
configurations and voltage supplies. The FFT responses
showbetterthan90dBofSFDRfora 5Vsupply,and80dB
on a 5V single supply for the 1.394MHz signal.
The LT1809/LT1810 have a 27ns settling time to 0.1% of
a 2V step signal and 20ꢀ output impedance at 100MHz
makingitidealfordrivinghighspeedA/Dconverters. With
the rail-to-rail input and output and low supply voltage
operation, the LT1809 is also desirable for single supply
applications. As shown in Figure 2, the LT1809 drives a
10Msps, 12-bit ADC, the LTC1420. The lowpass filter, R3
and C1, reduces the noise and distortion products that
might come from the input signal. High quality capacitors
0
–20
5V
–40
–60
5V
V
P-P
IN
R3
49.9Ω
+
–
1V
LTC1420
PGA GAIN = 1
REF = 2.048V
12 BITS
10Msps
•
•
•
LT1809
–5V
+A
IN
–80
–100
–120
C1
470pF
–A
IN
R2
1k
1809 F02
–5V
R1
1k
0
1
2
3
4
5
FREQUENCY (MHz)
1809 F03
Figure 2. Noninverting A/D Driver
Figure 3. 4096 Point FFT Response
0
1k
–20
5V
5V
–40
–60
1k
V
P-P
IN
–
2V
49.9Ω
LTC1420
PGA GAIN = 1
REF = 2.048V
12 BITS
10Msps
•
•
•
LT1809
–5V
+A
IN
–A
IN
+
470pF
–80
–100
–120
1809 F04
–5V
0
1
2
3
4
5
FREQUENCY (MHz)
1809 F05
Figure 5. 4096 Point FFT Response
Figure 4. Inverting A/D Driver
180910fa
19
LT1809/LT1810
TYPICAL APPLICATIONS
0
–20
5V
5V
–40
–60
V
P-P
ON 2.5V DC
IN
3
2
7
1V
+
–
49.9Ω
470pF
LTC1420
PGA GAIN = 2
REF = 4.096V
6
1
12 BITS
10Msps
•
•
•
LT1809
+A
IN
1
–A
IN
–80
–100
–120
2
4
V
CM
3
1809 F06
1k
1μF
1k
0
1
2
3
4
5
0.15μF
FREQUENCY (MHz)
1809 F07
Figure 7. 4096 Point FFT Response
Figure 6. Single Supply A/D Driver
5
4
V
= 5V
5V
S
3
C1
33μF
R1
5k
2
C3
1000μF
3
2
7
LT1809
4
75Ω
COAX CABLE
R5
75Ω
V
+
–
IN
1
6
R
R2
5k
T
V
OUT
0
75Ω
R
LOAD
–1
–2
–3
–4
–5
75Ω
R4
1k
1809 F08
C4
R3
1k
3pF
+
C2
150μF
0.2
1
10
100
FREQUENCY (MHz)
1809 F09
Figure 8. 5V Single Supply Video Line Driver
Figure 9. Video Line Driver Frequency Response
Single Supply Video Line Driver
resistor, R5. The back termination will eliminate any re-
flection of the signal that comes from the load. The input
The LT1809 is a wideband rail-to-rail op amp with a large
output current that allows it to drive video signals in low
supply applications. Figure 8 depicts a single supply
video line driver with AC coupling to minimize the qui-
escent power dissipation. Resistors R1 and R2 are used
to level-shift the input and output to provide the largest
signal swing. A gain of 2 is set up with R3 and R4 to re-
termination resistor, R , is optional—it is used only if
T
matching of the incoming line is necessary. The values of
C1, C2 and C3 are selected to minimize the droop of the
luminancesignal.Insomelessstringentrequirements,the
valueofcapacitorscouldbereduced.The–3dBbandwidth
of the driver is about 95MHz on 5V supply and the amount
of peaking will vary upon the value of capacitor C4.
store the signal at V , which is attenuated by 6dB due
OUT
to the matching of the 75ꢀ line with the back-terminated
180910fa
20
LT1809/LT1810
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
0.889 0.127
(.035 .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 0.102
(.118 .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 0.038
(.0165 .0015)
TYP
8
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4
0.53 0.152
(.021 .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
0.1016 0.0508
(.009 – .015)
(.004 .002)
0.65
(.0256)
BSC
TYP
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
180910fa
21
LT1809/LT1810
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636 Rev B)
2.90 BSC
(NOTE 4)
0.62
MAX
0.95
REF
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
180910fa
22
LT1809/LT1810
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 .005
.160 .005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 .005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
180910fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT1809/LT1810
TYPICAL APPLICATION
Single 3V Supply, 4MHz, 4th Order Butterworth Filter
in Figure 10. On a 3V supply, the filter has a passband of
Benefiting from a low voltage supply operation, low dis-
tortion and rail-to-rail output of LT1809, a low distortion
filter that is suitable for antialiasing can be built as shown
4MHz with 2.5V signal and a stopband that is greater
P-P
than 70dB to frequency of 100MHz.
232Ω
47pF
274Ω
22pF
232Ω
665Ω
220pF
V
IN
–
274Ω
562Ω
470pF
–
1/2 LT1810
V
1/2 LT1810
+
OUT
+
V
S
1809 F10
2
Figure 10. Single 3V Supply, 4MHz, 4th Order Butterworth Filter
10
0
–10
–20
–30
–40
–50
–60
–70
V
V
= 3V, 0V
S
–80
–90
= 2.5V
P-P
IN
10k
100k
1M
10M
100M
FREQUENCY (Hz)
1809 F11
Figure 11. Filter Frequency Response
RELATED PARTS
PART NUMBER
LT1395
DESCRIPTION
COMMENTS
800V/μs Slew Rate, Shutdown
High DC Accuracy, 1.35mV V
400MHz Current Feedback Amplifier
Dual/Quad 45MHz, 45V/μs Rail-to-Rail Input and Output Op Amps
LT1632/LT1633
, 70mA Output Current,
OS(MAX)
Max Supply Current 5.2mA per Amplifier
LT1630/LT1631
LT1806/LT1807
Dual/Quad 30MHz, 10V/μs Rail-to-Rail Input and Output Op Amps
High DC Accuracy, 525μV V , 70mA Output Current,
OS(MAX)
Max Supply Current 4.4mA per Amplifier
Single/Dual 325MHz, 140V/μs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 550μV V
, Low Noise 3.5nV/√Hz,
OS(MAX)
Low Distortion –80dBc at 5MHz
180910fa
LT 0709 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2000
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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