LT8672HDDB#TRPBF_技术文档

LT8672

Active Rectifier Controller

with Reverse Protection

FEATURES

DESCRIPTION

The LT^®8672 is an active rectifier controller for reverse

input protection. It drives an external N-channel MOSFET

to replace a power Schottky diode. Its very low quiescent

currentandfasttransientresponsemeetthetoughrequire-

ments in automotive applications where AC input signals

of up to 100kHz are present. These signals are rectified

with minimum power dissipation on the external FET,

simplifying thermal management on the PCB.

n

AEC-Q100 Qualified for Automotive Applications

n

Reverse Input Protection to –40V

n

Improved Performance Compared to a

Schottky Diode

n

Reduce Power Dissipation by >90%

n

Reduce Drop to 20mV

n

Ultrafast Transient Response

n

Rectifies 6V Up to 50kHz

Rectifies 2V Up to 100kHz

P-P

n

With a drop of only 20mV, the LT8672 solution eases the

minimum input voltage requirement during cold crank

and start-stop, allowing simpler and more efficient cir-

cuits. If the input power source fails or is shorted, a fast

turn-offminimizesreversecurrenttransients.Anavailable

shutdown mode reduces the quiescent current to 3.5μA.

n

Wide Operating Voltage Range: 3V to 42V

Low 20µA Quiescent Current in Operation

Low 3.5µA Shutdown Current

Accurate 1.21V Enable Pin Threshold

Small 10-Lead MSOP Package, 10-Lead 3mm ×

2mm DFN Package and 3mm × 2mm Side-Wettable

DFN Package

An integrated auxiliary boost regulator provides the re-

quired boost voltage to turn the external FET fully on. A

power good pin signals when the external FET is ready to

take load current.

APPLICATIONS

n

Automotive Battery Protection

All registered trademarks and trademarks are the property of their respective owners.

n

Industrial Supplies

n

Portable Instrumentation

TYPICAL APPLICATION

Rectification of Input Ripple

12V, 5A Automotive Reverse Battery Protection

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1μF

100μH

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Rev. D

1

Document Feedback

For more information www.analog.com

LT8672

ABSOLUTE MAXIMUM RATINGS

(Notes 1 and 2)

Operating Junction Temperature Range (Notes 3, 4)

E-, I-Grades ..................................... −40°C to 125°C

J-, H-Grades .................................... −40°C to 150°C

Storage Temperature Range ................ −65°C to 150°C

Lead Temperature (Soldering, 10 sec)

DRAIN ...................................................... –0.3V to 42V

SOURCE, EN/UVLO ................................... –40V to 42V

DRAIN–SOURCE ......................................... –5V to 54V

AUX .......................................................... V

+ 13V

+ 17V

+ 0.3V

DRAIN

SOURCE

GATE .........................V

– 0.3V to V

AUX

SOURCE

MS Package .................................................... 300°C

GATE ................................... V

– 67V to V

AUX

PG .............................................................. –0.3V to 5V

PIN CONFIGURATION

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Rev. D

2

For more information www.analog.com

LT8672

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING*

LTGYT

PACKAGE DESCRIPTION

10-Lead Plastic MSOP

TEMPERATURE RANGE

–40°C to 125°C

–40°C to 150°C

LT8672EMS#PBF

LT8672EMS#TRPBF

LT8672IMS#TRPBF

LT8672JMS#TRPBF

LT8672HMS#TRPBF

LT8672IMS#PBF

LTGYT

LT8672JMS#PBF

LTGYT

LT8672HMS#PBF

LTGYT

MINI REEL

LT8672EDDB#TRMPBF

LT8672IDDB#TRMPBF

LT8672JDDB#TRMPBF

LT8672HDDB#TRMPBF

AUTOMOTIVE PRODUCTS**

LT8672EMS#WPBF

LT8672IMS#WPBF

LT8672JMS#WPBF

LT8672HMS#WPBF

LT8672EDDB#TRPBF

LT8672IDDB#TRPBF

LT8672JDDB#TRPBF

LT8672HDDB#TRPBF

LGYS

10-Lead (3mm × 2mm) Plastic DFN

–40°C to 125°C

–40°C to 150°C

LT8672EMS#WTRPBF

LT8672IMS#WTRPBF

LT8672JMS#WTRPBF

LT8672HMS#WTRPBF

LTGYT

10-Lead Plastic MSOP

–40°C to 125°C

–40°C to 150°C

–40°C to 125°C

LT8672EDDBM#WTRMPBF LT8672EDDBM#WTRPBF LHJR

LT8672IDDBM#WTRMPBF LT8672IDDBM#WTRPBF LHJR

LT8672JDDBM#WTRMPBF LT8672JDDBM#WTRPBF LHJR

10-Lead (3mm × 2mm) Plastic Side-

Wettable DFN Package

10-Lead (3mm × 2mm) Plastic Side-

Wettable DFN Package

–40°C to 125°C

–40°C to 150°C

10-Lead (3mm × 2mm) Plastic Side-

Wettable DFN Package

Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These

models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local

Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.

Rev. D

3

For more information www.analog.com

LT8672

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_SOURCE= V_DRAIN= 12V, unless otherwise noted. (Note 3)

PARAMETER

CONDITIONS

MIN

TYP

2.85

3.5

MAX

UNITS

l

Minimum Drain Voltage

Total System Quiescent Current

3

V

= 0V

5

15

µA

EN/UVLO

= 2V, Active Rectifier Controller

20

26

39

µA

l

In Regulation (Note 4)

Pin Voltage Rising

Pin Voltage Falling

EN/UVLO Pin Threshold High

EN/UVLO Pin Threshold Low

EN/UVLO Pin Hysteresis

EN/UVLO Pin Current

1.22

1.16

1.28

1.21

70

1.34

1.26

V

mV

µA

Ω

V

= 2V

–0.1

0.1

EN/UVLO

PG Pin Leakage

= 3.3V

PG

l

PG Pull-Down Resistance

Auxiliary Boost Regulator

= 0.1V

650

2000

l

Regulation Voltage V

– V

10.2

75

11

100

2

11.8

120

V

mA

Ω

AUX

DRAIN

Power NMOS Current Limit

Power NMOS On-Resistance

Catch Diode Forward Voltage

AUXSW Pin Leakage

I

= 100mA

0.8

V

DIODE

V

= 12V

–0.2

0.2

µA

AUXSW

Active Rectifier Controller

SOURCE–DRAIN Regulation Voltage

SOURCE–DRAIN Fast Pull-Up Threshold

DRAIN Current

l

10

60

20

75

12

5

25

90

mV

µA

With Gate Driver in Regulation

SOURCE Current

µA

mA

Fault Condition, V

= –40V

–1

SOURCE

l

Maximum Gate Drive (GATE–SOURCE)

Gate Pull-Up Current

10.2

–26

170

11

11.8

V

mA

–50

300

Gate Pull-Down Current

l

Gate-Source Off Voltage for Reverse SOURCE

Fault Condition, V

= –5V, I

= 1mA

GATE

0.01

0.3

V

SOURCE

= –40V, I

= 1mA

l

Gate Turn-Off Delay Time

Gate Turn-On Delay Time

Step (V

GATE SOURCE

–V

) from 130mV to −70mV

0.6

1.1

µs

SOURCE DRAIN

V

–V

< 1V, C

= 10nF

GATE–SOURCE

l

Step (V

GATE SOURCE

–V

> 5V , C

) from −70mV to 130mV

1.7

3.1

µs

SOURCE DRAIN

V

–V

= 10nF

GATE–SOURCE

l

Maximum Frequency of AC Input Signal to Be

Rectified

AC Input Ripple < 6V , C

= 10nF

50

100

kHz

P-P GATE–SOURCE

AC Input Ripple < 2V , C

P-P GATE–SOURCE

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect the device

reliability and lifetime.

Note 2: Positive currents flow into pins, negative currents flow out of pins.

Minimum and Maximum values refer to absolute values.

Note 3: The LT8672E is guaranteed to meet performance specifications

from 0°C to 125°C junction temperature. Specifications over the −40°C

to 125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LT8672I is guaranteed over the full −40°C to 125°C operating junction

temperature range. The LT8672J and the LT8672H are guaranteed over

the full −40°C to 150°C operating junction temperature range. Operating

lifetime is derated at junction temperatures greater than 125°C.

Note 4: Total system current with active rectifier controller in regulation.

Rev. D

4

For more information www.analog.com

LT8672

TYPICAL PERFORMANCE CHARACTERISTICS

GATE Current vs

Forward Voltage Drop

Total Input Current in Regulation

Total Input Current in Shutdown

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Fast Pull-Down Current

Fast Pull-Up Current

Forward Regulation Voltage

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GATE Turn-Off Time vs

GATE Capacitance

GATE Turn-On Time vs

GATE Capacitance

Fast Pull-Down Threshold

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Rev. D

5

For more information www.analog.com

LT8672

TYPICAL PERFORMANCE CHARACTERISTICS

Auxiliary Boost Regulator

Current Limit

Fast Pull-Up Threshold

AUX–DRAIN Regulation Voltage

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EN/UVLO Pin Thresholds

Fast Pull-Up to PG Low Delay

Dropout Performance

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Auxiliary Boost Regulator

Switching Waveforms

Auxiliary Boost Regulator

Response to Fast Pull-Up

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Rev. D

6

For more information www.analog.com

LT8672

PIN FUNCTIONS

EN/UVLO (Pin 1): The LT8672’s active rectifier controller

and the auxiliary boost regulator are shut down when this

pin is below 1.21V. Tie to DRAIN if this shutdown feature

is not used.

AUX (Pin 7): Auxiliary Boost Regulator Output. This pin

is used to provide a drive voltage, higher than the input

voltage, to the gate driver of the active rectifier controller.

Connect a 1µF capacitor between this pin and the DRAIN

pin as close as possible to the IC. Do not place a capacitor

to any other node than DRAIN on this pin.

GND (Pin 2): This pin has no function in the application

and should be connected to ground.

DRAIN (Pin 8): Drain Voltage Sense and Supply Voltage.

Thevoltagesensedatthispinisusedtocontroltheexternal

MOSFET gate. It also provides current to the LT8672’s

internal circuitry. Connect this pin as close as possible

to the drain of the external N-channel MOSFET. This pin

must be locally bypassed with at least 4.7µF.

PG (Pin 3): The PG pin is the open drain output of an in-

ternalmonitorcircuitry. PGpullslowifanyofthefollowing

criteria is met: the part is in shutdown, the AUX voltage

has not reached its regulation value during start-up or

the gate driver’s fast pull-up path is active for more than

17µs. If the PG pin is used to control the output load, it can

protect the MOSFET from being overloaded under these

conditions. PG output is valid when DRAIN is above the

minimum input voltage.

SOURCE(Pin9):SourceConnection.SOURCEisthereturn

path of the gate fast pull-down. The voltage sensed at this

pin is also used to control the MOSFET gate. Connect

this pin as close as possible to the source of the external

N-channel MOSFET.

GND (Pin 4): This is the ground of all the internal circuitry.

Tie directly to the local GND plane.

GATE (Pin 10): Gate Drive Output. This pin drives the gate

of the external N-channel MOSFET. Connect this pin to the

gate of the MOSFET.

NC (Pin 5): This pin is not connected internally. Connect

it to ground or leave it floating.

AUXSW(Pin6):OutputoftheInternalPowerSwitchofthe

Auxiliary Boost Regulator. This node should be kept small

on the PCB for good performance and low EMI. Connect

the boost inductor between this pin and the DRAIN pin.

Exposed Pad (Pin 11, DFN Only): The exposed pad must

either be left floating or be connected to the GND pin.

Rev. D

7

For more information www.analog.com

LT8672

BLOCK DIAGRAM

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ꢀꢁꢂ

ꢀꢁꢂꢃꢄꢅꢆ

ꢋꢌꢈꢆꢄꢌR

ꢍꢌꢂꢆꢉ

ꢐ

ꢀ

ꢁ

ꢀꢁꢂꢃꢄꢅꢆ

ꢅꢈꢃꢎꢍꢅ

ꢐ.ꢑꢐꢇ

ꢚꢛꢜꢑ ꢎD

Rev. D

8

For more information www.analog.com

LT8672

OPERATION

The LT8672 is an active rectifier controller including an

integrated auxiliary boost regulator for fast turn on of the

externalN-channelMOSFET. Operationisbestunderstood

by referring to the Block Diagram.

The EN/UVLO pin can be used to shut down the active

rectifiercontroller andauxiliary boost regulator. By setting

EN/UVLOlow, totalsysteminputcurrentisreducedtoless

than 3.5µA. The conduction path on the external MOSFET

would only be through its body diode.

Active Rectifier Controller

Note that it typically takes 7ms for the internal supply

voltages to stabilize once the DRAIN voltage exceeds the

minimum voltage of 2.85V.

TheactiverectifiercontrollercontrolsanexternalN-channel

MOSFET (M1) to form an ideal diode. The GATE amplifier

senses across DRAIN and SOURCE and drives the gate of

the MOSFET to regulate the forward voltage to 20mV. As

the load current increases, GATE is driven higher until a

point is reached where the MOSFET is fully on. If the load

current is reduced, the GATE amplifier drives the MOSFET

Auxiliary Boost Regulator

The auxiliary boost regulator uses a hysteretic control

scheme in conjunction with a constant low side current

limit of 100mA. When the AUX–DRAIN voltage is below

its nominal value of typically 11V, the low side power

gate lower to maintain a 20mV drop. If the voltage V

DRAIN

isreducedtoapointwhereaforwarddropof20mVcannot

switch is turned on. The L

inductor current rises, until

AUX

be supported, the GATE amplifier drives the MOSFET off.

it reaches the low side current limit of 100mA, at which

point the low side switch is turned off and the inductor

DuringfastSOURCE–DRAINtransientssuchasfastvarying

input (SOURCE) signals where the regulating 20mV loop

is too slow, fast pull-up (FPU) and fast pull-down (FPD)

currentpathsturnonandofftheexternalMOSFETquickly.

This rectifies the input signal the same way a diode would

do but with much less power dissipation.

discharges into C

until its current falls to zero. Then,

AUX

thelowsideswitchturnsonagain, unlesstheAUX–DRAIN

voltage has risen above its nominal value. In this case,

all high power circuitry is shut off in order to reduce the

quiescent current.

The SOURCE and GATE pins are protected against reverse

input voltages of up to –40V. GATE is pulled to SOURCE

whenSOURCEgoesnegative, turningofftheMOSFETand

isolating DRAIN from the negative input.

Thiscontrolschemeresultsinaswitchingfrequencywhich

depends on inductor value and DRAIN voltage.

Power Good Pin (PG)

The open drain power good pin PG goes high impedance

whennofaultispresent.ThisindicatestheexternalMOSFET

is operating properly.

The gate voltage for the external MOSFET is provided by

the auxiliary boost regulator, which regulates its output

AUX to 11V above DRAIN.

Rev. D

9

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

Active Rectifier Controller

The LT8672 operates from 3V to 42V and withstands an

absolutemaximumrangeof–40Vto42Vwithoutdamage.

In automotive applications the LT8672 operates through

load dump, cold crank and two-battery jumps, and it

survivesreversebatteryconnectionswhilealsoprotecting

the load. Furthermore, due to its fast response to changes

in the external MOSFET’s forward voltage, it can rectify

Blocking diodes are commonly placed in series with sup-

ply inputs to protect against supply reversal. The LT8672

replaces diodes in these applications with a MOSFET to

reduce both the voltage drop and power loss associated

with a passive solution. The curve shown in Figure 1 illus-

tratesthedramaticimprovementinpowerlossachievedin

a practical application. This represents significant savings

in board area by greatly reducing power dissipation in the

pass device. At low input voltages, the improvement in

forwardvoltagelossisreadilyappreciatedwhereheadroom

is tight, as shown in Figure 2.

input ripple with amplitudes as high as 6V up to 50kHz.

P-P

Rectification up to 100kHz is possible with amplitudes as

high as 2V . The fast gate drive capability of the LT8672

P-P

prevents the external MOSFET from overheating during

thesedemandingconditionssinceitsbodydiodeconducts

current only for a very small portion of the ripple period.

ꢀꢁ

The LT8672 does not require any bypass capacitor at the

SOURCE pin (C

in the Block Diagram). Should such

BYP

ꢀ

ꢀꢁꢂꢃꢄꢄꢅꢆ DꢇꢃDꢈ ꢉꢀꢊꢋꢌꢍꢎꢍꢁꢄꢏ

a capacitor be needed for other reasons, for example as

part of an up-front EMI filter, its capacitance must not

exceed 60nF; otherwise, the gate driver’s stability may be

impaired. This applies to the total capacitance connected

to SOURCE on the PCB.

ꢀꢁꢂꢃR

ꢀꢁꢂꢃD

It is important to note that the EN/UVLO pin, while dis-

ablingtheLT8672andreducingitscurrentconsumptionto

3.5μA, does not disconnect the load from the input since

the MOSFET’s body diode is ever-present.

ꢀꢁꢂꢃꢄꢅ ꢆꢇꢂꢈꢉꢊꢋꢌꢉꢍꢌꢂꢎ

ꢀ

ꢀꢁ

ꢀꢁRRꢂꢃꢄ ꢅꢆꢇ

ꢀꢁꢂꢃ ꢄꢅꢆ

Figure 1. Power Dissipation Comparison Between

MOSFET and Schottky Diode

Shutdown Mode/Undervoltage Lockout

In shutdown, the LT8672 pulls GATE low to SOURCE,

turning off the MOSFET and reducing current consump-

tion to 3.5μA. Shutdown does not interrupt forward

current flow; a path is still present through M1’s body

diode. When enabled, the LT8672 operates as an active

rectifier. If shutdown is not needed, connect EN/UVLO to

DRAIN. EN/UVLO may be driven with a 3.3V or 5V logic

signal. To disable the part, EN/UVLO must be pulled down

below 1.21V.

ꢀ.ꢁ

ꢀꢁꢂꢃꢄꢅꢆꢅꢇꢈꢉ

ꢀꢁꢂꢃꢄꢄꢅꢆ DꢇꢃDꢈ

ꢀ.ꢁ

ꢀ

ꢀꢁꢂꢃꢄꢅꢆꢇꢄꢈꢇꢂꢉ

ꢀꢁꢂꢃꢄꢅ

ꢀ

ꢀꢁ

ꢀꢁRRꢂꢃꢄ ꢅꢆꢇ

ꢀꢁ

ꢀꢁꢂꢃ ꢄꢅꢃ

Figure 2. Forward Voltage Drop Comparison

Between MOSFET and Schottky Diode

Rev. D

10

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

Adding a resistive divider from SOURCE to EN/UVLO, as

shown in Figure 3, programs the LT8672 to disable itself

Input Short-Circuit Faults and Negative Transients

For fast negative input transients, the LT8672 relies on

its fast pull-down (FPD) comparator. But since the FPD

threshold is negative, reverse current is built up in the

external MOSFET prior to an FPD turn-off. This process

resembles the reverse recovery of a diode, although

cause and timing differ. Since there is always a parasitic

or, in case of an up front EMI filter, intended inductance

in front of SOURCE, the reverse current stores energy

in this inductance. This energy pulls the SOURCE node

negative, once the external MOSFET is finally turned off.

A zero impedance short-circuit directly across the input

and ground is especially troublesome because it permits

the highest possible reverse current to build up.

when V

is below a threshold voltage V

,

BATT

given by:

BATT(EN/UVLO)

⎛

⎜

⎝

⎞

V_{BATT EN/UVLO}

(

)

⎟

R1=R2

–1

⎟

1.21V

⎠

ꢀꢁꢂꢃꢄꢅ

ꢄ

ꢀꢁꢂRꢃꢄ

ꢅꢆꢇꢇ

ꢑ

ꢐ

Rꢀ

Rꢃ

ꢀ.ꢃꢀꢄ

ꢀꢁꢂꢃꢄꢅꢆ

ꢍꢎꢆꢅꢏꢍ

ꢀꢁꢂ

ꢈꢉꢊꢃ ꢂꢋꢌ

Figure 3. EN/UVLO Pin Allows Programmable

Undervoltage Lockout

This negative transient on SOURCE may potentially

be destructive to the LT8672, since the voltage on the

SOURCE pin is limited to –40V. To prevent damage to the

LT8672, protect the SOURCE pin as shown in Figure 4

by clamping to the ground node with two TVS diodes.

Negative spikes, seen after the MOSFET turns off during

an FPD event, are clamped by D2. The example, an 18V

TVS, is a good choice for automotive applications, where

a reversed battery could produce a reverse voltage of up

to 14.4V, at which D2 should not conduct any current. D2

is not required if reverse-input protection is not needed.

Note that due to the comparator’s hysteresis, the LT8672

will not be enabled until V rises slightly above

BATT

V

. If EN/UVLO is connected using a high

BATT(EN/UVLO)

ohmic resistor, it is subject to capacitive coupling from

nearby clock lines or traces exhibiting high dV/dt. Bypass

EN/UVLO to GND with 1nF to eliminate injection.

This capacitor, if sized accordingly, will also prevent

negative voltage transients on V

disabling the LT8672.

from inadvertently

BATT

ꢑꢒꢓꢉꢊ ꢓꢌRꢌꢔꢑꢊꢑꢏ

ꢑꢒDꢉꢏꢊꢌꢒꢏꢖ ꢈR

ꢖꢗꢑ ꢄꢑꢐꢊꢖR

RꢖꢇꢖRꢔꢖ RꢖꢏꢈꢇꢖRꢘ ꢏꢉRRꢖꢒꢊ

ꢎ

ꢙ

ꢇ

ꢋꢌꢊꢊ

ꢇ

ꢈꢉꢊ

ꢎ

Dꢀ

DDꢁꢂꢃꢄꢄꢅ

ꢆꢀꢇ

Dꢀ

ꢆ.ꢂꢍꢄ

ꢏ

ꢐꢈꢌD

ꢑꢒꢓꢉꢊ

ꢔꢕꢈRꢊ

ꢁꢂꢃꢄꢅꢆꢆꢇ

ꢆꢆꢈ

1μF

100μH

Dꢀ

ꢁꢂꢃꢄꢅꢆꢇꢈ

ꢆꢇꢉ

ꢀꢁꢂRꢃꢄ

ꢀꢁꢂꢃ DRꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂꢃꢄ

ꢀꢁꢂꢃꢄꢅ

ꢀꢁꢂꢃꢄꢅꢆ

ꢀꢁ

ꢀꢁD

ꢀꢁꢂꢃ ꢄꢅꢆ

Figure 4. Reverse Recovery Produces an Inductive Spike at the SOURCE Pin. The Polarity of Step Recovery

Is Shown Across the Parasitic Inductance (See Text for D3)

Rev. D

11

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

D1 protects SOURCE in the positive direction during load

steps and overvoltage conditions. The example, a 33V

TVS, is a good choice for automotive applications, where

a load dump could produce an overvoltage at which D1

should not conduct any current.

ꢀ_ꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

ꢀ_ꢀꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

If neither D1 nor any reverse current protection (D2) is

needed, a diode is still required at SOURCE to protect the

LT8672 from negative inductive spikes caused by any

parasitic input inductance.

ꢀꢁꢁꢂꢃꢄDꢅꢆ

For input voltages4V greater than V

of the external

ꢀꢁꢂꢃ ꢄꢅꢆ

GS(MAX)

MOSFET, a direct short (minimal inductance of less than

Figure 5. Rectification of Input Ripple Waveform

(f = 1kHz, 5A Load Current)

a few nH) at the SOURCE node on the PCB could tempo-

rarily increase the V of the external MOSFET above its

GS

V

. If such a short is to be expected, D3 is needed

to protect the external MOSFET.

GS(MAX)

ꢀ_ꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

Any leakage current in D3 will increase the total quiescent

current accordingly. In addition, D3’s leakage current

should not exceed 5µA, as it would otherwise create an

offset at the gate driver’s input, increasing the SOURCE–

DRAIN regulation voltage.

ꢀ_ꢀꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

Rectification of Fast Input Ripple

ꢀꢁꢂꢃꢄDꢅꢆ

The LT8672 is specifically designed to address the chal-

lenging specifications for battery connected automotive

electronic control units (ECUs). For example, according

to automotive norms ISO16750 or LV124 an ECU may be

subjectedtoanACripplesuperimposedonitssupply, with

ꢀꢁꢂꢃ ꢄꢅꢁ

Figure 6. Rectification of Input Ripple Waveform

(f = 30kHz, 5A Load Current)

frequencies of up to 30kHz and amplitudes of up to 6V

.

P-P

ꢀ_ꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

Due to its gate driver’s high output current and short delay

times, the LT8672 is able to control the external MOSFET

rapidly enough even at these frequencies to keep power

dissipationandreversecurrentconductiontoaminimum.

In addition, this significantly reduces the ripple current in

the output capacitor.

ꢀ_ꢀꢀꢀꢀ

ꢀꢁꢂDꢃꢁ

Figure 5, Figure 6 and Figure 7 show input and output

waveforms for various input ripple frequencies.

ꢀꢁꢂꢃDꢄꢅ

ꢀꢁꢂꢃ ꢄꢅꢂ

Figure 7. Rectification of Input Ripple Waveform

(f = 100kHz, 5A Load Current)

Rev. D

12

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

MOSFET Selection

For fast gate drive operation choose a MOSFET with the

smallest total gate charge Q

that also satisfies the

GTOT

All load current passes through an external MOSFET, M1.

The important characteristics of the MOSFET are on-

B

and R

requirements. A MOSFET with smaller

notonlyreducesreversecurrentduringtheturn-off

VDSS

DS(ON)

Q

GTOT

resistance, R

VDSS

gate charge Q

, the maximum drain-source voltage,

DS(ON)

phase but also stays cooler during rectification of high

amplitude ripple on the input.

B

, the gate threshold voltage V

and the total

GS(TH)

.

GTOT

If the MOSFET has an integrated gate protection, its

leakage should not exceed 5µA, as this would otherwise

create an offset at the gate driver’s input, increasing the

SOURCE–DRAIN regulation voltage.

Gate drive is compatible with standard threshold and

logic-level MOSFETs over the entire operating range of

3V to 42V. For logic-level MOSFETs, V

15V or higher.

should be

GS(MAX)

When the LT8672 rectifies an AC ripple voltage, the aver-

age current through the external MOSFET still equals the

load current, but the peak current is much higher. Since

the MOSFET’s power dissipation is proportional to the

square of this current as described above, the average

power dissipation during rectification exceeds the power

dissipationinsteadystate.Theactualpeakcurrentdepends

on the external components and their parasitics. Figure 8

shows a simple model which can be used to estimate the

Themaximumallowabledrain-sourcevoltage,B

,must

VDSS

be higher than the power supply voltage. If the input is

grounded, the full supply voltage will appear across the

MOSFET. If the input is reversed and the output is held up

by a charged capacitor, battery or power supply, the sum

of the input and output voltages will appear across the

MOSFET and require a B

> V

+ |V

|.

VDSS

OUT

BATT

The MOSFET’s on-resistance, R , directly affects

DS(ON)

the forward voltage drop and power dissipation. Desired

forward voltage drop should be less than that of a diode

for reduced power dissipation; 60mV is a good starting

point. Choose a MOSFET which has:

peak current by computer simulation. R

represents

BATT

the impedance of the voltage source V

, the inductor

BATT

models the combined inductance of the cable and, if

present, the EMI filter inductor. The ideal diode has no

resistanceandaforwardvoltageof0V.R

represents

LOAD

DS(ON)

Forward Voltage Drop

R_DS(ON)

<

theon-resistanceoftheexternalMOSFET, whileC

and

I_LOAD

R

ESR

representtheelectrolyticcapacitoranditsequivalent

series resistance.

The resulting power dissipation is

2

P =I

•R

DS ON

d

LOAD

(

)

ꢍDꢅꢉꢈ

DꢍꢂDꢅ

ꢈ

ꢀ ꢈ

ꢅꢏꢍ

ꢇꢉꢎꢈꢅ

R

Dꢆꢊꢂꢋꢌ

R

ꢎꢉꢄꢄ

ꢁ

ꢂꢃꢄ

ꢁ

ꢎꢉꢄꢄ

ꢀ

ꢇ

ꢈꢂꢉD

R

ꢅꢆR

ꢀꢁꢂꢃ ꢄꢅꢀ

Figure 8. Simplified Application Model Including All Relevant Parasitics

Rev. D

13

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

= 470µF,

whereV istherippleamplitudeinV,ftheripplefrequency

AC

LOAD

= 16mΩ, R

= 5mΩ, L

+ L = 1µH, and

in Hz, C

the capacitance of the electrolytic capacitor

EMI

LOAD

in F, and I

the load current in A. Note that any ripple

LOAD

with a load current of 10A. But this power increases to

1.13Wwhena6V AC-ripplewithafrequencyof10kHzis

caused by the equivalent series resistance of C

will

LOAD

increase V accordingly, in particular at high frequencies.

P-P

R

superimposed on V

. Removing any inductance raises

BATT

Since the power supply rejection of the load usually de-

this power even further to 1.3W, while the RMS current

in C reaches 12.6A.

grades with frequency, it is often desirable to limit V at

R

LOAD

a given frequency f. Using the above equation, the neces-

This model can also be used to select an electrolytic ca-

pacitor which can handle the corresponding RMS current

for the duration of the AC-ripple.

sary minimum capacitance C

can be calculated from:

LOAD

4V_AC– V_R

C_LOAD

=

• I_LOAD

4V_AC• V_R• f

Electrolytic Capacitor and Ripple Voltage

For example, if the ripple voltage V is to be kept below

R

During rectification, the electrolytic capacitor C

re-

LOAD

2V at f = 5kHz, V = 3V (6V ), and a load current of

AC

P-P

= 417µF.

duces the ripple voltage seen by the load. Figure 9 shows

the corresponding waveforms for the rectification of a

sinusoidal SOURCE ripple voltage.

I

= 5A, then C

LOAD

When selecting an electrolytic capacitor also keep in mind

the high peak currents at high frequencies as discussed

in the previous section.

ꢀ_R

Automotive Cold Crank

ꢀ_ꢀꢀ

Duringtheso-called“coldcrank”(e.g.LV124E-11)acar’s

battery voltage may drop to 3.2V. As a result, the high

voltage drop of traditional reverse protection schemes

using passive rectifiers like Schottky diodes require the

supplied circuitry to work at minimum input voltages as

low as 2.5V. Buck-boost regulators may then be needed

instead of simpler and more efficient buck regulators in

ordertoprovideastable3Vsupplyoftenrequiredbymany

microcontrollers.

ꢀ_DRꢀꢀꢀ

ꢀ_{ꢀꢀꢀRꢀꢀ}

ꢀꢁꢂꢃ ꢄꢅꢆ

ꢀꢁꢂꢃ

Figure 9. Waveforms For Rectification Of a

Sinusoidal SOURCE Ripple Voltage

The LT8672’s minimum input operating voltage of 3V al-

lows the active rectifier to operate through the cold crank

pulse with minimum drop between input and output. This

allows use of a buck regulator with a minimum operating

voltage of 3V and low dropout characteristics like the

LT8650S to generate a 3V supply.

The load is exposed to the remaining ripple voltage V ,

which depends on C

tude, and load current. This ripple voltage decreases with

frequency and is approximately:

R

, ripple frequency, ripple ampli-

LOAD

Figure 10 shows input and output waveforms during a

cold crank pulse, comparing the LT8672 active rectifier

controller to a Schottky diode.

4V • I

AC LOAD

V =

R

4V • f • C

+ I

LOAD LOAD

AC

Rev. D

14

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

This maximum available AUX current is achieved at the

boost regulator’s maximum switching frequency which

can be approximated by following equation:

ꢀꢁ

ꢀ_ꢀꢀꢀDꢀꢀꢀ

ꢀꢁꢂꢃꢄꢄꢅꢆ DꢇꢃDꢈ ꢉꢆꢄꢊꢋꢌꢍꢎꢋꢋ

ꢀꢁ

ꢀ

ꢀ_ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ

ꢀ_ꢀꢀꢀꢀ

1180 •(V

– 0.2)

DRAIN

f

=

AUXSW(MAX)

(V

+11.6)•(10L

+3V

– 0.6)

DRAIN

AUX

DRAIN

ꢀ

where f

is the maximum switching frequency

AUXSW(MAX)

in MHz, V

is the DRAIN pin voltage in volts and L

AUX

ꢀ

DRAIN

ꢀ_ꢀꢀꢀꢀꢀꢁꢂꢃꢄꢄꢅꢆꢇ

is the boost regulator inductor in μH.

ꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢆ

ꢀꢁꢂꢃ ꢄꢅꢆ

However, depending on the total average current required

by the gate driver on the AUX pin to switch the external

MOSFET on and off periodically, the boost regulator might

enterdiscontinuousmodeandswitchatalowerfrequency

given by the following equation:

Figure 10. Automotive Cold Crank Waveforms

Auxiliary Boost Regulator

The auxiliary boost regulator provides a boosted voltage

to the gate driver to enhance the external MOSFET fully

with at least 10V of gate drive.

2.9 •I

AUX

f

=

AUXSW

L

AUX

It uses a hysteretic control scheme in conjunction with

a constant low side current limit of 100mA. This control

scheme results in a switching frequency with a maximum

valuewhichdependsoninductorvalueandDRAINvoltage.

where f

is the switching frequency in MHz, I

is

AUX

AUXSW

the average current required by the gate driver in mA and

is the boost regulator inductor in μH.

L

AUX

During rectification of input ripple, fully charging and

discharging the gate capacitance of the external MOSFET

requires an average AUX current

Recommended boost regulator external passive compo-

nentsarea1μF/16V ceramiccapacitoranda47μH to100μH

inductor. The inductor’s saturation current should be at

least120mA anditsESRshouldnotexceed10Ω,therefore

smallchipinductorslikeCBC2518T470KorCBC2518T101K

from Taiyo Yuden or those from the XPL2010 series from

Coilcraft are good options.

f •Q_G

I_AUX

=

1000

where f is the ripple frequency in kHz, Q is the total gate

G

charge of the external MOSFET in nC, and I

is the AUX

AUX

The boost regulator maximum output current available to

the gate driver on the AUX pin can be approximated by

the following equation:

current in mA drawn by the gate driver. For example, recti-

ficationofa6V –50kHzinputripplesuperimposedonthe

P-P

12Vbatteryvoltage,usinganexternalMOSFETwith100nC

of total gate charge under full load conditions, requires an

average turn on gate current of 5mA which the gate driver

takes from the AUX pin. Under these conditions, the boost

regulatorrunswithaswitchingfrequencyof145kHzusing

a 100μH inductor. The maximum available AUX current is

approximately 23mA with the boost regulator switching

at about 595kHz.

V

– 1

DRAIN

I

= 50 •

AUX MAX

(

)

V

+11.8

DRAIN

where I

is the maximum boost regulator output

DRAIN

AUX(MAX)

currentinmAandV

istheDRAINpinvoltageinvolts.

When the active rectifier is in steady state conditions, the

AUXpincurrentrequiredbythegatedriverisapproximately

1μA and the boost regulator is most of the time in sleep

Rev. D

15

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

mode waking up only from time to time to maintain the

AUX pin voltage 11V above DRAIN.

Power Good Pin

The power good pin is the output of internal monitoring

circuitry, which signals when the external MOSFET is able

to pass the full load current with a voltage of less than

75mV between its source and drain. PG only goes high if

the LT8672 is enabled, and the AUX voltage has reached

its regulation value during start-up, and if the gate driver’s

fast pull-up path is not engaged for more than 17µs. This

allows detection of a number of system faults.

Figure11,Figure12andFigure13showtypicalwaveforms

with 1µA, 5mA, and 10mA of AUX load current.

ꢀ_{ꢀꢀꢀꢀꢀ}

ꢀꢁꢂꢃDꢄꢂ

ꢀ_ꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢆ

For example, the gate of the external MOSFET may be

shorted to ground or source. It would then be impossible

to turn it on, which would keep the gate driver’s fast pull-

up path active indefinitely, thereby pulling PG low. The

fast pull-up path would never be active for so long in a

correctly working system, because charging the external

MOSFET’s gate requires much less time.

ꢀ_ꢀꢀꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢃ

ꢀꢁꢂꢃꢄDꢅꢆ

ꢀꢁꢂꢃ ꢄꢅꢅ

Figure 11. Auxiliary Boost Regulator Waveforms for

1µA Load on AUX (Steady State in Regulation)

An insufficient AUX voltage (for example during start-up

or due to a system fault) may be able to deliver sufficient

gate-source voltage to the external MOSFET for small load

currents, but not for high load currents. Therefore PG is

pulled low if AUX remains too low during start-up.

ꢀ_{ꢀꢀꢀꢀꢀ}

ꢀꢁꢂꢃDꢄꢂ

ꢀ_ꢀ

PG is valid (and pulls low) even in shutdown. Although

this may increase the overall shutdown current through

the external pull-up resistor on PG, it keeps the system

correctly informed about the shutdown status of the

LT8672 and that it cannot enhance the external MOSFET.

ꢀꢁꢁꢂꢃꢄDꢅꢆ

ꢀ_ꢀꢀꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢃ

ꢀꢁꢂꢃDꢄꢅ

ꢀꢁꢂꢃ ꢄꢅꢃ

Thus, if PG is used to control the load current in the

external MOSFET, its body diode can be prevented from

conducting large currents for a prolonged period of time.

This significantly reduces the amount of heat generated

by the external MOSFET even in fault conditions.

Figure 12. Auxiliary Boost Regulator Waveforms for

5mA Load on AUX

ꢀ_{ꢀꢀꢀꢀꢀ}

ꢀꢁꢂꢃDꢄꢂ

Thefastpull-uppathisactivewhentheexternalMOSFET’s

forward voltage exceeds 75mV, therefore it is recom-

mended to choose a MOSFET large enough not to exceed

this threshold with maximum load current. If the PG flag

is ignored in the application, the MOSFET can be pushed

to higher forward voltages provided that its power dis-

sipation is kept within safe levels.

ꢀ_ꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢆ

ꢀ_ꢀꢀꢀ

ꢀꢁꢁꢂꢃꢄDꢅꢃ

ꢀꢁꢂꢃDꢄꢅ

ꢀꢁꢂꢃ ꢄꢅꢆ

Figure 13. Auxiliary Boost Regulator Waveforms for

10mA Load on AUX

Rev. D

16

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

The PG output is valid when DRAIN is above the minimum

inputvoltage.Figure14andFigure15showpowergoodpin

waveformsunderseveral“MOSFETNotReady”conditions.

Layout Considerations

ConnecttheSOURCEandDRAINpinsascloseaspossible

to the MOSFET source and drain pins. Keep the traces to

the MOSFET wide and short to minimize resistive losses

as shown in Figure 16 and Figure 17. Place surge sup-

pressors and necessary transient protection components

close to the LT8672 using short lead lengths. Keep more

than minimum distance from GATE traces to other nodes

to prevent leakage that could turn the MOSFET on. Only

SOURCEandDRAINtracesareallowedtorunbesideGATE

traces. Use no-clean flux to minimize PCB contamination.

ꢀ_ꢀꢀꢀD

ꢀꢁꢂꢃDꢄꢅ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢅꢄ

ꢀ_{ꢀꢀꢁRꢂꢃꢄDRꢅꢆꢇ}

ꢀꢁꢂꢃꢄDꢅꢃ

ꢀꢁꢂꢃ

Note that the integrated boost regulator causes switched

ꢀ_ꢀꢀ

ꢀꢁꢂDꢃꢁ

currents to flow in C

and C

and in the pins AUX,

AUX

OUT

AUXSW, and GND. The loops formed by C

and C

OUT

AUX

ꢀꢁꢂꢃꢄDꢅꢆ

should be minimized by placing these capacitors as close

ꢀꢁꢂꢃ ꢄꢅꢆ

ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ

as possible to the LT8672 as shown in Figure 16 and Fig-

ure 17. C

can be split into two capacitors C

(close

OUT

OUT1

Figure 14. PG Waveform Showing How PG Responds

to a Very Long Fast Pull-Up Condition

to the LT8672) and C

(further away), provided that

OUT2

C

has a capacitance of at least 1µF.

OUT1

ꢀꢁꢂ

ꢀ

ꢀ_{ꢀꢀꢀꢀꢀꢀꢀ}

ꢀꢁꢂDꢃꢁ

ꢁꢂꢃ

ꢀ

ꢁꢂꢃꢃ

ꢀ_{ꢀꢀꢀꢀDRꢀꢀꢀ}

ꢀꢁꢂDꢃꢁ

ꢀ

ꢁꢂꢃꢄ

ꢀ_ꢀꢀ

ꢀꢁꢂDꢃꢁ

ꢀꢁꢂꢃꢄ

ꢀ

ꢁꢂꢃ

ꢀꢁꢁꢂꢃꢄDꢅꢆ

ꢀꢁꢂꢃ ꢄꢅꢆ

ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ

ꢀꢁꢂꢃꢄꢅ

ꢀ

ꢁꢂꢃ

ꢀꢁꢂ

Figure 15. PG Waveform Showing How PG Behaves

During Start-Up and How It Depends on EN/UVLO

ꢀ

ꢁꢂꢃꢄ

ꢀꢁD

ꢀꢁꢂꢃ ꢄꢅꢁ

ꢀꢁꢂꢃ

Figure 16. Recommended PCB Layout for the LT8672 (MSOP)

Rev. D

17

For more information www.analog.com

LT8672

APPLICATIONS INFORMATION

ꢀꢁꢂ

ꢀ

ꢁꢂꢃ

ꢀ

ꢁꢂꢃꢃ

ꢀ

ꢁꢂꢃꢄ

ꢀ

ꢁꢂꢃ

ꢀꢁꢂ

ꢀꢁꢂꢃꢄ

ꢀ

ꢁꢂꢃ

ꢀ

ꢁꢂꢃꢄ

ꢀꢁꢂꢃꢄꢅ

ꢀꢁD

ꢀꢁꢂꢃ ꢄꢅꢂ

ꢀꢁꢂꢃ

Figure 17. Recommended PCB Layout for the LT8672 (DFN)

Rev. D

18

For more information www.analog.com

LT8672

TYPICAL APPLICATIONS

Active Rectifier for 12V Automotive Applications

ꢀꢁ ꢂꢃꢂꢀꢄꢅ ꢆꢁꢇDꢂ

ꢀꢁDꢂꢃꢃꢄꢃꢅꢆꢇꢈꢃꢉ

ꢀ

ꢁꢂꢃ

ꢄꢅ

ꢆꢅꢃꢃ

ꢇꢈꢀ

Dꢀ

ꢝ

ꢉ

C

ꢁꢂꢃ

ꢉ

ꢎꢁꢅD

ꢊꢋꢏꢌꢍ

ꢁꢂꢃꢄꢅꢆꢆꢇ

ꢆꢆꢈ

AUX

L

AUX

ꢊ.ꢋꢌꢍ

1μF

100μH

Dꢀ

ꢁꢂꢃꢄꢅꢆꢇꢈ

ꢆꢇꢉ

ꢀꢁꢂRꢃꢄ ꢀꢁꢂꢃ DRꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂꢃꢄ

ꢀꢁꢂꢃꢄꢅ

ꢁꢐ ꢁꢍꢍ

ꢀꢁ

ꢀꢁꢂꢃꢄꢅꢆ

ꢉ

ꢒ ꢑꢋRꢓ ꢄꢏ ꢓ ꢏꢔꢏꢄ

ꢒ ꢑꢋRꢓ ꢄꢏ ꢓ ꢇꢈꢇꢏ

ꢒ ꢑꢕꢎꢈꢏꢇꢏꢖꢇꢏꢊꢗꢎ

ꢅꢂꢑ

ꢁꢂꢃ

ꢅꢂꢑ

ꢀꢁD

ꢎ

ꢔꢛꢋꢈ ꢃꢅꢏꢜ

ꢉ

ꢒ ꢘꢘꢘꢍꢙꢇꢀꢊꢋꢇꢅꢚ

ꢎꢁꢅD

Active Rectifier for 12V Automotive Applications with EMI Filter at DRAIN

ꢀꢁ ꢂꢃꢂꢀꢄꢅ

ꢆꢁꢇDꢂ

ꢐ

ꢋꢎꢛ

ꢖꢗꢘ

ꢀꢁꢂꢃꢄꢅRꢆꢇꢈꢉꢊ

ꢈ

ꢌꢅꢄꢄ

ꢋꢃꢈ

ꢈ

ꢉꢊꢄ

ꢠ

ꢋꢆꢅ

Dꢀ

ꢍ

ꢉꢊꢄ

ꢍ

ꢐꢉꢅD

C

ꢁꢂꢃꢄꢅꢆꢆꢇ

ꢆꢆꢈ

ꢖꢗꢘ

ꢇ.ꢂꢎꢏ

L

ꢋꢎꢏ

AUX

ꢑꢆꢆꢆꢎꢏ

1μF

100μH

Dꢀ

ꢁꢂꢃꢄꢅꢆꢇꢈ

ꢆꢇꢉ

ꢀꢁꢂRꢃꢄ ꢀꢁꢂꢃ DRꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂꢃꢄ

ꢀꢁꢂ ꢃꢂꢄꢅꢀR

ꢀꢁꢂꢃꢄꢅ

ꢉꢡ ꢉꢏꢏ

ꢀꢁꢂꢃꢄꢅꢆ

ꢀꢁ

ꢍ

ꢓ ꢍ ꢔ ꢒꢂRꢓ ꢕꢆ ꢓ ꢆꢀꢆꢕ

ꢅꢊꢒ ꢉꢊꢄ

ꢖꢗꢘ

ꢔ ꢒꢂRꢓ ꢕꢆ ꢓ ꢋꢃꢋꢆ

ꢀꢁD

ꢐ

ꢔ ꢒꢙꢐꢃꢆꢋꢆꢚꢋꢆꢇꢗꢐ

ꢅꢊꢒ

ꢖꢗꢘ

ꢀꢁꢂꢃ ꢄꢅꢆꢇ

ꢔ ꢘꢛꢐꢙꢁꢂꢁꢂꢜꢝꢖRꢋRꢆꢗꢕꢋ

ꢍ

ꢔ ꢃꢞ ꢖꢖꢖꢏꢟꢋꢈꢋꢕꢃꢅꢗ

ꢐꢉꢅD

Active Rectifier for 12V Automotive Applications with High Load

ꢀꢁ ꢂꢃꢂꢀꢄꢅ ꢆꢁꢇDꢂ

ꢀꢁꢂꢃꢄꢄꢅꢄꢆꢇ

ꢀ

ꢇꢈ

ꢁꢂꢃ

ꢉꢄꢀ

ꢄꢅꢆ

ꢞ

Dꢀ

ꢊ

ꢁꢂꢃ

ꢊ

ꢏꢁꢆDꢐ

C

L

AUX

100μH

ꢁꢂꢃꢄꢅꢆꢆꢇ

ꢆꢆꢈ

ꢋ.ꢌꢍꢎ

AUX

ꢉꢅꢅꢅꢅꢍꢎ

1μF

Dꢀ

ꢀꢁꢂRꢃꢄ ꢀꢁꢂꢃ DRꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂꢃꢄ

ꢁꢂꢃꢄꢅꢆꢇꢈ

ꢆꢇꢉ

ꢀꢁꢂꢃꢄꢅ

ꢊ

ꢒ ꢑꢌRꢓ ꢔꢅ ꢓ ꢅꢕꢅꢔ

ꢒ ꢑꢌRꢓ ꢔꢅ ꢓ ꢉꢄꢉꢅ

ꢒ ꢑꢖꢏꢄꢅꢉꢅꢗꢉꢅꢋꢘꢏ

ꢆꢂꢑ

ꢁꢂꢃ

ꢁꢈ ꢁꢎꢎ

ꢀꢁ

ꢀꢁꢂꢃꢄꢅꢆ

ꢊ

ꢏ

ꢀꢁD

ꢆꢂꢑ

ꢊ

ꢒ ꢔꢙ ꢘꢆꢏꢄꢄꢔꢅꢚꢚꢅꢉꢌꢛꢜ

ꢕꢝꢌꢄ ꢃꢆꢅꢔ

ꢏꢁꢆD

Rev. D

19

For more information www.analog.com

LT8672

PACKAGE DESCRIPTION

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1ꢀꢀ1 Rev F)

0.889 0.127

(.035 .005)

5.10

(.201)

MIN

3.20 – 3.45

(.12ꢀ – .13ꢀ)

3.00 0.102

(.118 .004)

(NOTE 3)

(.0197)

0.497 0.07ꢀ

(.019ꢀ .003)

REF

0.50

0.305 0.038

(.0120 .0015)

TYP

10 9

8

7 ꢀ

BSC

RECOMMENDED SOLDER PAD LAYOUT

3.00 0.102

(.118 .004)

(NOTE 4)

4.90 0.152

(.193 .00ꢀ)

DETAIL “A”

0.254

(.010)

0° – ꢀ° TYP

GAUGE PLANE

1

2

3

4 5

0.53 0.152

(.021 .00ꢀ)

0.8ꢀ

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.101ꢀ 0.0508

(.004 .002)

0.50

(.0197)

BSC

MSOP (MS) 0213 REV F

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

Rev. D

20

For more information www.analog.com

LT8672

PACKAGE DESCRIPTION

DDB Package

10-Lead Plastic DFN (3mm × 2mm) COL

ꢃReꢪeꢫeꢬꢭe ꢘꢊꢏ Dꢍꢎ ꢮ ꢁꢠꢓꢁꢩꢓꢂꢠꢚꢂ Rev ꢨꢇ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢁ.ꢩꢁ ±ꢁ.ꢁꢠ

ꢀ.ꢠꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢙꢠ ±ꢁ.ꢁꢠ

ꢕꢌꢏꢖꢌꢎꢆ

ꢉꢗꢊꢘꢅꢈꢆ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢠꢁ ꢝꢄꢏ

ꢀ.ꢠ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

RꢆꢏꢉꢑꢑꢆꢈDꢆD ꢄꢉꢘDꢆR ꢕꢌD ꢕꢅꢊꢏꢞ ꢌꢈD Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ

R ꢦ ꢁ.ꢂꢂꢠ

ꢁ.ꢠꢁ ±ꢁ.ꢁꢠ

ꢚ.ꢁꢁ ±ꢁ.ꢂꢁ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢊꢢꢕ

ꢣ

R ꢦ ꢁ.ꢁꢠ

ꢊꢢꢕ

ꢂꢁ

ꢀ.ꢁꢁ ±ꢁ.ꢂꢁ

ꢕꢅꢈ ꢂ ꢝꢌR

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢊꢉꢕ ꢑꢌRꢖ

ꢕꢅꢈ ꢂ

R ꢦ ꢁ.ꢀꢁ ꢉR

ꢃꢄꢆꢆ ꢈꢉꢊꢆ ꢣꢇ

ꢁ.ꢂꢀꢠ × ꢛꢠ°

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢏꢞꢌꢑꢐꢆR

ꢠ

ꢂ

ꢃDDꢝꢂꢁꢇ Dꢐꢈ ꢁꢀꢂꢣ Rꢆꢒ ꢨ

ꢁ.ꢥꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢀꢁꢁ Rꢆꢐ

ꢁ.ꢠꢁ ꢝꢄꢏ

ꢀ.ꢠ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢁ ꢧ ꢁ.ꢁꢠ

ꢝꢉꢊꢊꢉꢑ ꢒꢅꢆꢍꢤꢆꢜꢕꢉꢄꢆD ꢕꢌD

ꢈꢉꢊꢆꢋ

ꢂ. DRꢌꢍꢅꢈꢎ ꢏꢉꢈꢐꢉRꢑꢄ ꢊꢉ ꢒꢆRꢄꢅꢉꢈ ꢃꢍꢆꢏDꢓꢂꢇ ꢅꢈ ꢔꢆDꢆꢏ ꢕꢌꢏꢖꢌꢎꢆ ꢉꢗꢊꢘꢅꢈꢆ ꢑꢁꢓꢀꢀꢙ

ꢀ. DRꢌꢍꢅꢈꢎ ꢈꢉꢊ ꢊꢉ ꢄꢏꢌꢘꢆ

ꢚ. ꢌꢘꢘ Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ ꢌRꢆ ꢅꢈ ꢑꢅꢘꢘꢅꢑꢆꢊꢆRꢄ

ꢛ. Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ ꢉꢐ ꢆꢜꢕꢉꢄꢆD ꢕꢌD ꢉꢈ ꢝꢉꢊꢊꢉꢑ ꢉꢐ ꢕꢌꢏꢖꢌꢎꢆ Dꢉ ꢈꢉꢊ ꢅꢈꢏꢘꢗDꢆ

ꢑꢉꢘD ꢐꢘꢌꢄꢞ. ꢑꢉꢘD ꢐꢘꢌꢄꢞꢟ ꢅꢐ ꢕRꢆꢄꢆꢈꢊꢟ ꢄꢞꢌꢘꢘ ꢈꢉꢊ ꢆꢜꢏꢆꢆD ꢁ.ꢂꢠꢡꢡ ꢉꢈ ꢌꢈꢢ ꢄꢅDꢆ

ꢠ. ꢆꢜꢕꢉꢄꢆD ꢕꢌD ꢄꢞꢌꢘꢘ ꢝꢆ ꢄꢉꢘDꢆR ꢕꢘꢌꢊꢆD

ꢣ. ꢄꢞꢌDꢆD ꢌRꢆꢌ ꢅꢄ ꢉꢈꢘꢢ ꢌ RꢆꢐꢆRꢆꢈꢏꢆ ꢐꢉR ꢕꢅꢈ ꢂ ꢘꢉꢏꢌꢊꢅꢉꢈ ꢉꢈ ꢊꢞꢆ ꢊꢉꢕ ꢌꢈD ꢝꢉꢊꢊꢉꢑ ꢉꢐ ꢕꢌꢏꢖꢌꢎꢆ

Rev. D

21

For more information www.analog.com

LT8672

PACKAGE DESCRIPTION

DDBM Package

10-Lead Plastic SIDE WETTABLE DFN (3mm × 2mm)

ꢃReꢩeꢪeꢫꢬe ꢘꢊꢏ Dꢍꢎ ꢭ ꢁꢠꢓꢁꢨꢓꢂꢣꢠꢠ Rev ꢌꢇ

R ꢦ ꢁ.ꢂꢂꢠ

ꢁ.ꢠꢁ ±ꢁ.ꢂꢁ

ꢚ.ꢁꢁ ±ꢁ.ꢂꢁ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢊꢢꢕ

ꢣ

ꢂꢁ

ꢀ.ꢁꢁ ±ꢁ.ꢂꢁ

ꢕꢅꢈ ꢂ ꢝꢌR

ꢊꢉꢕ ꢑꢌRꢖ

ꢕꢅꢈ ꢂ

ꢃꢀ ꢄꢅDꢆꢄꢇ

R ꢦ ꢁ.ꢀꢁ ꢉR

ꢃꢄꢆꢆ ꢈꢉꢊꢆ ꢣꢇ

ꢁ.ꢀꢠ × ꢛꢠ°

ꢁ.ꢀꢠ ±ꢁ.ꢂꢁ

ꢏꢞꢌꢑꢐꢆR

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢠ

ꢂ

ꢃDDꢝꢑꢂꢁꢇ Dꢐꢈ ꢂꢀꢂꢨ Rꢆꢒ ꢌ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢥꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢀꢁꢁ Rꢆꢐ

ꢁ.ꢠꢁ ꢝꢄꢏ

Dꢆꢊꢌꢅꢘ ꢌ

ꢀ.ꢠꢁ ±ꢁ.ꢂꢁ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢁ ꢧ ꢁ.ꢁꢠ

ꢝꢉꢊꢊꢉꢑ ꢒꢅꢆꢍꢤꢆꢜꢕꢉꢄꢆD ꢕꢌD

Dꢆꢊꢌꢅꢘ ꢌ

ꢈꢉꢊꢆꢋ

ꢂ. DRꢌꢍꢅꢈꢎ ꢏꢉꢈꢐꢉRꢑꢄ ꢊꢉ ꢒꢆRꢄꢅꢉꢈ ꢃꢍꢆꢏDꢓꢂꢇ ꢅꢈ ꢔꢆDꢆꢏ ꢕꢌꢏꢖꢌꢎꢆ ꢉꢗꢊꢘꢅꢈꢆ ꢑꢁꢓꢀꢀꢙ

ꢀ. DRꢌꢍꢅꢈꢎ ꢈꢉꢊ ꢊꢉ ꢄꢏꢌꢘꢆ

ꢚ. ꢌꢘꢘ Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ ꢌRꢆ ꢅꢈ ꢑꢅꢘꢘꢅꢑꢆꢊꢆRꢄ

ꢊꢆRꢑꢅꢈꢌꢘ ꢘꢆꢈꢎꢊꢞ

ꢁ.ꢠꢁ ꢁ.ꢂꢁ

ꢁ.ꢀꢁꢚ Rꢆꢐ

ꢊꢆRꢑꢅꢈꢌꢘ ꢊꢞꢅꢏꢖꢈꢆꢄꢄ

ꢛ. Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ ꢉꢐ ꢆꢜꢕꢉꢄꢆD ꢕꢌD ꢉꢈ ꢝꢉꢊꢊꢉꢑ ꢉꢐ ꢕꢌꢏꢖꢌꢎꢆ Dꢉ ꢈꢉꢊ ꢅꢈꢏꢘꢗDꢆ

ꢑꢉꢘD ꢐꢘꢌꢄꢞ. ꢑꢉꢘD ꢐꢘꢌꢄꢞꢟ ꢅꢐ ꢕRꢆꢄꢆꢈꢊꢟ ꢄꢞꢌꢘꢘ ꢈꢉꢊ ꢆꢜꢏꢆꢆD ꢁ.ꢂꢠꢡꢡ ꢉꢈ ꢌꢈꢢ ꢄꢅDꢆ

ꢠ. ꢆꢜꢕꢉꢄꢆD ꢕꢌD ꢄꢞꢌꢘꢘ ꢝꢆ ꢄꢉꢘDꢆR ꢕꢘꢌꢊꢆD

ꢁ.ꢂꢁ Rꢆꢐ

ꢁ.ꢁꢠ Rꢆꢐ

ꢕꢘꢌꢊꢆD ꢌRꢆꢌ

ꢣ. ꢄꢞꢌDꢆD ꢌRꢆꢌ ꢅꢄ ꢉꢈꢘꢢ ꢌ RꢆꢐꢆRꢆꢈꢏꢆ ꢐꢉR ꢕꢅꢈ ꢂ ꢘꢉꢏꢌꢊꢅꢉꢈ ꢉꢈ ꢊꢞꢆ ꢊꢉꢕ ꢌꢈD ꢝꢉꢊꢊꢉꢑ ꢉꢐ ꢕꢌꢏꢖꢌꢎꢆ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

ꢁ.ꢥꢁ ±ꢁ.ꢁꢠ

ꢀ.ꢠꢠ ±ꢁ.ꢁꢠ

ꢂ.ꢂꢠ ±ꢁ.ꢁꢠ

ꢕꢌꢏꢖꢌꢎꢆ

ꢉꢗꢊꢘꢅꢈꢆ

ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ

ꢁ.ꢠꢁ ꢝꢄꢏ

ꢀ.ꢠꢁ ±ꢁ.ꢁꢠ

ꢃꢀ ꢄꢅDꢆꢄꢇ

RꢆꢏꢉꢑꢑꢆꢈDꢆD ꢄꢉꢘDꢆR ꢕꢌD ꢕꢅꢊꢏꢞ ꢌꢈD Dꢅꢑꢆꢈꢄꢅꢉꢈꢄ

Rev. D

22

For more information www.analog.com

LT8672

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

04/18 Added DFN package option

Clarified Figure 16 and Figure 17

Added Figure 17

1, 2, 6

16

17

Added DFN package drawing

20

B

C

09/18 Clarified Gate Turn-On and Turn-Off Delay Time

3

10/18 Added J-Grade temperature option

2, 3

2

Clarified θ

JC

D

04/19 Added J-Grade side-wettable plank option DFN package with W Flow (LT8672JDDBM#WTRPBF)

Added side-wettable flank DFN package drawing

2

20

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications

subject to change without notice. No license Fisogrramnoterdebiynfimorpmlicaattiioonnowr wotwhe.arwniasleougn.cdeormany patent or patent rights of Analog Devices.

23

LT8672

TYPICAL APPLICATION

Active Rectifier for 12V Automotive Applications with EMI Filter at SOURCE

ꢀ

ꢁꢂꢃ

ꢄꢅꢆ

ꢀꢁ ꢂꢃꢂꢀꢄꢅ ꢆꢁꢇDꢂ

ꢀꢁDꢂꢃꢃꢄꢃꢅꢆꢇꢈꢃꢉ

ꢇ

ꢍꢌꢊꢊ

ꢄꢎꢇ

ꢈꢉꢊ

ꢋꢌ

ꢞ

Dꢀ

ꢏ

ꢈꢉꢊ

ꢏ

ꢀ

ꢁꢂꢃꢄ

ꢅꢆꢇꢈ

C

ꢀꢈꢌD

ꢁꢂꢃꢄ

L

ꢁꢂꢃꢄꢅꢆꢆꢇ

ꢆꢆꢈ

AUX

ꢐ.ꢑꢅꢒ

AUX

ꢐꢑꢓꢅꢒ

ꢄꢅꢆ

1μF

100μH

Dꢀ

ꢀꢁꢂRꢃꢄ ꢀꢁꢂꢃ DRꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂꢃꢄ

ꢁꢂꢃꢄꢅꢆꢇꢈ

ꢆꢇꢉ

ꢀꢁꢂ ꢃꢂꢄꢅꢀR

ꢀꢁꢂꢃꢄꢅ

ꢏ

ꢕ ꢏ

ꢖ ꢔꢑRꢕ ꢋꢓ ꢕ ꢓꢗꢓꢋ

ꢌꢉꢔ ꢁꢂꢃꢄ ꢁꢂꢃꢎ

ꢈꢉꢊ

ꢈꢟ ꢈꢒꢒ

ꢀꢁ

ꢀꢁꢂꢃꢄꢅꢆ

ꢏ

ꢀ

ꢖ ꢔꢑRꢕ ꢋꢓ ꢕ ꢄꢎꢄꢓ

ꢖ ꢔꢘꢀꢎꢓꢄꢓꢙꢄꢓꢐꢂꢀ

ꢖ ꢃꢆꢀꢘꢎꢋꢎꢋꢍDꢁRꢚRꢚꢂꢌꢄ

ꢀꢁD

ꢌꢉꢔ

ꢀ

ꢗꢝꢑꢎ ꢊꢌꢓꢎ

ꢁꢂꢃ

ꢏ

ꢖ ꢁꢁꢁꢒꢛꢄꢇꢐꢑꢄꢌꢜ

ꢀꢈꢌD

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT3667/LT3668

40V (60V

), 400mA Step-Down Switching Regulator with

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, 40V

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MAX

IN(MIN)

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Ideal Diode Controller with Reverse Input Protection

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SD

, –40V

Reverse Protection, I =

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IN(MAX)

150µA, I = <9µA, MSOP-8 and 2mm × 3mm DFN-6 Packages

42V, 2A, 94% Efficiency, 2.2MHz Synchronous Micropower

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, 42V

IN(MIN)

, 0.8V

, I = 2.5µA, I = <1µA,

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Step-Down DC/DC Converter with I = 2.5μA

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Q

42V, Dual 4A, 95% Efficiency, 2.2MHz Synchronous Silent

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SD

Switcher 2 Step-Down DC/DC Converter with I = 6.2μA

Q

42V, 6A, 95% Efficiency, 2.2MHz Synchronous Silent

3.4V

, 42V

IN(MIN)

, 0.97V

IN(MAX)

, I = 2.5µA, I = <1µA,

OUT(MIN) Q SD

Switcher^®2 Step-Down DC/DC Converter with I = 2.5μA

4mm × 4mm LQFN-24 Package

Q

65V, 8A, 95% Efficiency, 2.2MHz Synchronous Silent Switcher 2 3.4V

, 65V , 0.8V

IN(MIN)

, I = 2.5µA, I = <1µA,

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IN(MAX)

Step-Down DC/DC Converter with I = 2.5μA

4mm × 6mm LQFN-32 Package

Q

LT8609/LT8609A/

LT8609B

42V, 2A, 94% Efficiency, 2.2MHz Synchronous Micropower

3V , 42V , 0.8V

, I = 2.5µA, I = <1µA,

OUT(MIN) Q SD

IN(MIN)

IN(MAX)

Step-Down DC/DC Converter with I = 2.5μA

MSOP-10E Package

Q

LT8640

LT8612

LT8602

42V, 5A, 95% Efficiency, 2.2MHz Synchronous Silent Switcher 2 3.4V

,42V

, 0.97V

, I = 2.5µA, I = <1µA,

IN(MIN)

IN(MAX)

OUT(MIN) Q SD

Step-Down DC/DC Converter with I = 2.5μA

3mm × 4mm QFN-16 Package

Q

42V, 6A, 96% Efficiency, 2.2MHz Synchronous Micropower

3.4V , 42V , 0.97V

, I = 3.0µA, I = <1µA,

OUT(MIN) Q SD

IN(MIN)

IN(MAX)

Step-Down DC/DC Converter with I = 2.5μA

3mm × 6mm QFN-28 Package

Q

42V, Quad Output (2.5A + 1.5A + 1.5A + 1.5A) 95% Efficiency,

3V , 42V , 0.8V

, I = 25µA, I = <1µA,

Q SD

IN(MIN)

IN(MAX)

OUT(MIN)

2.2MHz Synchronous Micropower Step-Down DC/DC Converter 6mm × 6mm QFN-40 Package

with I = 25μA

Q

Rev. D

D16853-0-04/19

www.analog.com

 ANALOG DEVICES, INC. 2017-2019

24

For more information www.analog.com


型号：	LT8672HDDB#TRPBF
厂家：	ADI
描述：	Active Rectifier Controller with Reverse Protection
文件：	总24页 (文件大小：1837K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT8672HDDB#TRPBF [ADI]

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