OP186GRT-REEL7 [ADI]

IC OP-AMP, 6000 uV OFFSET-MAX, 0.17 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier;
OP186GRT-REEL7
型号: OP186GRT-REEL7
厂家: ADI    ADI
描述:

IC OP-AMP, 6000 uV OFFSET-MAX, 0.17 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier

放大器 光电二极管
文件: 总12页 (文件大小:189K)
中文:  中文翻译
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5 A, Rail-to-Rail  
a
Output Operational Amplifier  
OP186  
FUNCTIONAL BLOCK DIAGRAM  
5-Lead SOT-23  
FEATURES  
Low Supply Current: 5.5 A max  
Single-Supply Operation: 2.2 V to 12 V  
Wide Bandwidth: 160 kHz  
Wide Input Voltage Range  
Rail-to-Rail Output Swing  
No Phase Reversal  
(RT Suffix)  
1
2
3
5
4
V–  
OUT  
V+  
OP186  
TOP VIEW  
(Not to Scale)  
+IN  
–IN  
Output Short Circuit Current: ؎10 mA  
APPLICATIONS  
Portable Phones  
Comparator  
Battery Powered Instrumentation  
Safety Monitoring  
Remote Sensors  
Low Voltage Strain Gauge Amplifiers  
GENERAL DESCRIPTION  
The OP186 is a single, low voltage, ultralow power single-  
supply, amplifier featuring rail-to-rail outputs. Specifications are  
guaranteed at +2.2 V, +2.7 V, and +5.0 V single supply as well  
as ±5 V dual supplies.  
Fabricated on Analog Device’s CBCMOS process, the OP186  
features a bipolar input and an output that swings to within  
millivolts of the supplies while continuing to sink or source  
current all the way to the supplies.  
Applications for these amplifiers include safety monitoring,  
portable equipment, battery and power supply control, and as  
signal conditioning and interface for transducers in very low  
power systems.  
The output’s ability to swing rail-to-rail and not increase supply  
current when the output is driven to a supply enables the  
OP186 to be used as a comparator in very low power systems.  
The OP186 is specified over the extended industrial (–40°C to  
+125°C) temperature range. The OP186 is available in the  
SOT-23-5 package.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1998  
OP186–SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS (VS = +2.2 V, VCM = +1.1 V, TA = +25؇C unless otherwise noted)  
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Units  
INPUT CHARACTERISTICS  
Offset Voltage  
1
VOS  
0.8  
3
5
6
7
10  
2
mV  
mV  
nA  
nA  
nA  
nA  
0°C TA +125°C  
0°C TA +125°C  
0°C TA +125°C  
Input Bias Current  
Input Offset Current  
IB  
IOS  
0.1  
5
Input Voltage Range  
Common-Mode Rejection Ratio  
VCM  
CMRR  
0
1.2  
V
dB  
dB  
V/mV  
V/mV  
µV/°C  
pA/°C  
pA/°C  
VCM = 0 V to 1.2 V  
0°C TA +125°C  
RL = 1 M, VO = 0.3 V to 1.9 V  
0°C TA +125°C  
65  
60  
5
90  
18  
Large Signal Voltage Gain  
AVO  
2
Offset Voltage Drift  
Bias Current Drift  
Offset Current Drift  
VOS/T  
IB/T  
IOS/T  
3.5  
30  
3
OUTPUT CHARACTERISTICS  
Output Voltage High  
VOH  
VOL  
ISC  
RL = 100 kto GND  
0°C to +125°C  
RL = 100 kto V+  
0°C to +125°C  
2.125 2.16  
V
V
mV  
mV  
µA  
2.1  
Output Voltage Low  
Short Circuit Limit  
25  
60  
75  
±500  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 2.2 V to 12 V  
0°C TA +125°C  
78  
76  
95  
4
dB  
dB  
µA  
µA  
Supply Current/Amplifier  
5
5.5  
0°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Turn-On Time  
SR  
RL = 100 k, CL = 15 pF  
AV = 1, VO = 1  
60  
17  
V/ms  
µs  
AV = 20, VO = 1  
35  
150  
60  
µs  
kHz  
Degrees  
Gain Bandwidth Product  
Phase Margin  
GBP  
Φo  
NOISE PERFORMANCE  
Voltage Noise Density  
Current Noise Density  
en  
in  
f = 1 kHz  
80  
<1  
nV/Hz  
pA/Hz  
NOTE  
1VOS is tested under a no load condition.  
Specifications subject to change without notice.  
–2–  
REV. 0  
OP186  
(V = +2.7 V, VCM = +1.35 V, TA = +25؇C unless otherwise noted)1  
ELECTRICAL CHARACTERISTICS  
S
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Units  
INPUT CHARACTERISTICS  
Offset Voltage  
2
VOS  
IB  
0.6  
3
5
6
7
10  
2
mV  
mV  
nA  
nA  
nA  
nA  
–40°C TA +125°C  
–40°C TA +125°C  
–40°C TA +125°C  
Input Bias Current  
Input Offset Current  
IOS  
0.1  
5
Input Voltage Range  
Common-Mode Rejection Ratio  
VCM  
CMRR  
0
1.7  
V
dB  
dB  
V/mV  
V/mV  
µV/°C  
pA/°C  
pA/°C  
VCM = 0 V to 1.7 V  
65  
60  
5
90  
22  
–40°C TA +125°C  
RL = 1 M, VO = 0.3 V to 2.4 V  
–40°C TA +125°C  
Large Signal Voltage Gain  
AVO  
2
Offset Voltage Drift  
Bias Current Drift  
Offset Current Drift  
VOS/T  
IB/T  
IOS/T  
3.5  
30  
3
OUTPUT CHARACTERISTICS  
Output Voltage High  
VOH  
VOL  
ISC  
RL = 100 kto GND  
–40°C to +125°C  
RL = 100 kto V+  
–40°C to +125°C  
2.625 2.665  
V
V
mV  
mV  
mA  
2.6  
Output Voltage Low  
Short Circuit Limit  
22  
50  
75  
±0.8  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 2.7 V to 12 V  
–40°C TA +125°C  
78  
76  
95  
dB  
dB  
µA  
µA  
Supply Current/Amplifier  
4.2  
5.5  
7
–40°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Turn-On Time  
SR  
RL =100 k, CL = 15 pF  
AV = 1, VO = 1  
61  
17  
V/ms  
µs  
AV = 20, VO = 1  
25  
155  
59  
µs  
kHz  
Degrees  
Gain Bandwidth Product  
Phase Margin  
GBP  
Φo  
NOISE PERFORMANCE  
Voltage Noise Density  
Current Noise Density  
en  
in  
f = 1 kHz  
80  
<1  
nV/Hz  
pA/Hz  
NOTES  
1+2.7 V specifications are guaranteed by +2.2 V and ±5 V testing.  
2VOS is tested under a no load condition.  
Specifications subject to change without notice.  
REV. 0  
–3–  
OP186–SPECIFICATIONS  
(V = +5.0 V, VCM = +2.5 V, TA = +25؇C unless otherwise noted)1  
ELECTRICAL CHARACTERISTICS  
S
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Units  
INPUT CHARACTERISTICS  
Offset Voltage  
2
VOS  
0.6  
3
5
6
7
10  
2
mV  
mV  
nA  
nA  
nA  
nA  
–40°C TA +125°C  
–40°C TA +125°C  
–40°C TA +125°C  
Input Bias Current  
Input Offset Current  
IB  
IOS  
0.1  
5
Input Voltage Range  
Common-Mode Rejection Ratio  
VCM  
CMRR  
0
4
V
dB  
dB  
V/mV  
V/mV  
µV/°C  
pA/°C  
pA/°C  
VCM = 0 V to 4.0 V  
65  
60  
5
90  
40  
–40°C TA +125°C  
RL = 1 M, VO = 0.5 V to 4.5 V  
–40°C TA +125°C  
–40°C TA +125°C  
Large Signal Voltage Gain  
AVO  
2
Offset Voltage Drift  
Bias Current Drift  
Offset Current Drift  
VOS/T  
IB/T  
IOS/T  
3.3  
25  
3
OUTPUT CHARACTERISTICS  
Output Voltage High  
VOH  
VOL  
ISC  
RL = 100 kto GND  
–40°C TA +125°C  
RL = 100 kto V+  
4.925 4.965  
4.9  
20  
V
V
mV  
mV  
mA  
Output Voltage Low  
Short Circuit Limit  
50  
75  
–40°C TA +125°C  
±3.5  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 2.7 V to 12 V  
–40°C TA +125°C  
78  
76  
95  
dB  
dB  
µA  
µA  
Supply Current/Amplifier  
4.7  
6
7.5  
–40°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Gain Bandwidth Product  
Phase Margin  
SR  
GBP  
Φo  
RL = 100 k, CL = 15 pF  
62  
155  
59  
V/ms  
kHz  
Degrees  
Saturation Recovery Time  
60  
µs  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
en p-p  
en  
0.1 Hz to 10 Hz  
f = 1 kHz  
f = 10 kHz  
6
µV p-p  
80  
70  
<1  
nV/Hz  
nV/Hz  
pA/Hz  
Current Noise Density  
in  
NOTES  
1+5 V specifications are guaranteed by +2.2 V and ± 5 V testing.  
2VOS is tested under a no load condition.  
Specifications subject to change without notice.  
–4–  
REV. 0  
OP186  
(VS = ؎5.0 V, TA = +25؇C unless otherwise noted)  
ELECTRICAL CHARACTERISTICS  
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Units  
INPUT CHARACTERISTICS  
Offset Voltage  
1
VOS  
IB  
0.6  
3
5
6
7
10  
2
mV  
mV  
nA  
nA  
nA  
nA  
–40°C TA +125°C  
–40°C TA +125°C  
–40°C TA +125°C  
Input Bias Current  
Input Offset Current  
IOS  
0.1  
5
Input Voltage Range  
Common-Mode Rejection  
VCM  
CMRR  
–5  
65  
60  
50  
10  
+4  
V
dB  
dB  
V/mV  
V/mV  
µV/°C  
pA/°C  
pA/°C  
VCM = –5.0 V to +4.0 V  
–40°C TA +125°C  
RL = 1 M, VO = ±4.0 V,  
–40°C TA +125°C  
90  
Large Signal Voltage Gain  
AVO  
250  
Offset Voltage Drift  
Bias Current Drift  
Offset Current Drift  
VOS/T  
IB/T  
IOS/T  
3
25  
3
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
VO  
ISC  
RL = 100 kto GND  
–40°C to +125°C  
±4.95 ±4.98  
±4.90  
V
V
mA  
Short Circuit Limit  
±10  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = ±1.35 V to ±6 V  
–40°C TA +125°C  
VO = 0 V  
78  
76  
95  
dB  
dB  
µA  
µA  
Supply Current/Amplifier  
5.2  
7
8
–40°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Gain Bandwidth Product  
Phase Margin  
±SR  
GBP  
Φo  
RL = 100 k, CL = 15 pF  
62  
170  
58  
V/ms  
kHz  
Degrees  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
en p-p  
en  
0.1 Hz to 10 Hz  
f = 1 kHz  
f = 10 kHz  
6
µV p-p  
80  
70  
<1  
nV/Hz  
nV/Hz  
pA/Hz  
Current Noise Density  
in  
NOTE  
1VOS is tested under a no load condition.  
Specifications subject to change without notice.  
REV. 0  
–5–  
OP186  
ABSOLUTE MAXIMUM RATINGS1  
1
Package Type  
Units  
JA  
JC  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16 V  
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . GND to VS + 10 V  
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . ±3.5 V  
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite  
Storage Temperature Range  
5-Lead SOT-23 (RT)  
230  
140  
°C/W  
NOTE  
1θJA is specified for worst case conditions, i.e., θJA is specified for device in socket  
for SOT packages.  
RT Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Operating Temperature Range  
ORDERING GUIDE  
OP186G . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C  
Junction Temperature Range  
RT Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature Range (Soldering, 60 sec) . . . . . . .+300°C  
Temperature  
Range  
Package  
Description  
Package  
Option  
Model  
OP186GRT –40°C to +125°C 5-Lead SOT-23  
RT-5  
NOTES  
1Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those listed in the operational sections  
of this specification is not implied. Exposure to absolute maximum rating condi-  
tions for extended periods may affect device reliability.  
2For supplies less than ± 5 V the differential input voltage is limited to the supplies.  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection.  
Although the OP186 features proprietary ESD protection circuitry, permanent damage may  
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
–6–  
REV. 0  
Typical Performance Characteristics–  
OP186  
45  
45  
40  
35  
45  
40  
35  
V
T
= +5V  
V
T
= +2.2V  
V
T
= +2.7V  
S
= +25؇C  
A
S
S
40  
35  
= +25؇C  
= +25؇C  
A
A
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
0
0
0
؊2 ؊1.5 ؊1 ؊0.5  
0
0.5  
1
1.5  
2
؊2 ؊1.5 ؊1 ؊0.5  
0
0.5  
1
1.5  
2
؊2 ؊1.5 ؊1 ؊0.5  
0
0.5  
1
1.5  
2
INPUT OFFSET VOLTAGE – mV  
INPUT OFFSET VOLTAGE – mV  
INPUT OFFSET VOLTAGE – mV  
Figure 3. Input Offset Voltage  
Distribution  
Figure 1. Input Offset Voltage  
Distribution  
Figure 2. Input Offset Voltage  
Distribution  
0
؊1  
؊2  
45  
350  
300  
V
T
= ؎5V  
S
40  
35  
= +25؇C  
V
= +2.2V  
A
S
250  
200  
30  
25  
20  
15  
10  
5
V
= +2.2V  
S
؊3  
؊4  
؊5  
؊6  
؊7  
150  
100  
50  
V
= ؎5V  
S
V
= +2.7V  
S
V
= ؎5V  
S
0
؊50  
0
؊100  
0
20 40 60 80 100 120 140  
TEMPERATURE – ؇C  
؊40 ؊20  
؊2 ؊1.5 ؊1 ؊0.5  
0
0.5  
1
1.5  
2
؊40 ؊20  
0
20 40 60 80 100 120 140  
TEMPERATURE – ؇C  
INPUT OFFSET VOLTAGE – mV  
Figure 6. Input Bias Current vs.  
Temperature  
Figure 5. Input Offset Voltage vs.  
Temperature  
Figure 4. Input Offset Voltage  
Distribution  
1.0  
0
0.4  
0.3  
V
T
= +5V  
S
0.5  
0
= +25؇C  
؊1  
A
؊2  
؊3  
؊4  
؊5  
؊6  
؊7  
0.2  
0.1  
V = +2.7V, +5V  
S
؊0.5  
؊1.0  
؊1.5  
؊2.0  
؊2.5  
V
= +2.7V  
S
0
–0.1  
–0.2  
–0.3  
V
= ؎5.5V  
S
؊3.0  
؊3.5  
؊4.0  
0
20 40 60 80 100 120 140  
؊20  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0  
COMMON-MODE VOLTAGE – Volts  
؊40  
0
20 40 60 80 100 120 140  
–40 –20  
TEMPERATURE – ؇C  
TEMPERATURE – ؇C  
Figure 7. Input Bias Current vs.  
Temperature  
Figure 8. Input Bias Current vs.  
Common-Mode Voltage  
Figure 9. Input Offset Current vs.  
Temperature  
REV. 0  
–7–  
OP186  
1k  
1k  
1k  
V
T
= +5V  
V
T
= +2.7V  
V
T
= ؎5V  
S
= +25؇C  
A
S
S
= +25؇C  
= +25؇C  
A
A
100  
100  
100  
SOURCE  
SOURCE  
SOURCE  
SINK  
SINK  
SINK  
10  
1
10  
1
10  
1
0.1  
0.1  
0.1  
1
10  
100  
1000  
1
10  
100  
1000  
1
10  
100  
1000  
LOAD CURRENT – A  
LOAD CURRENT – A  
LOAD CURRENT – A  
Figure 11. Output Voltage to Supply  
Rail vs. Load Current  
Figure 12. Output Voltage to Supply  
Rail vs. Load Current  
Figure 10. Output Voltage to Supply  
Rail vs. Load Current  
70  
70  
70  
V
T
= ؎5V  
S
V
T
= +5V  
V
T
= +2.2V  
= +25؇C  
= 100k⍀  
S
S
60  
60  
50  
40  
30  
20  
10  
60  
50  
40  
= +25؇C  
= 100k⍀  
= +25؇C  
= 100k⍀  
A
A
A
50  
40  
R
R
R
L
L
L
GAIN  
GAIN  
GAIN  
0
0
0
30  
20  
45  
45  
30  
20  
45  
90  
90  
90  
PHASE  
PHASE  
PHASE  
135  
10  
0
135  
180  
10  
135  
180  
225  
270  
0
–10  
–20  
–30  
180  
225  
270  
0
–10  
–20  
–30  
225  
270  
؊10  
؊20  
؊30  
100  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
FREQUENCY – Hz  
1M  
100  
1k  
10k  
100k  
FREQUENCY – Hz  
1M  
FREQUENCY – Hz  
Figure 13. Open-Loop Gain and  
Phase vs. Frequency  
Figure 14. Open-Loop Gain and  
Phase vs. Frequency  
Figure 15. Open-Loop Gain and  
Phase vs. Frequency  
50  
120  
100  
80  
60  
40  
20  
0
120  
T
= +25؇C  
A
+2.7V Յ V Յ +5V  
V
T
= +5V  
= +25؇C  
=
S
S
+2.7V Յ V Յ +5V  
S
T
= +25؇C  
R
=
A
40  
30  
L
A
R
100  
80  
L
20  
10  
60  
40  
20  
0
–10  
–20  
–30  
10  
100  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
1M  
10  
100k  
FREQUENCY – HZ  
1M  
10M  
1k  
10k  
FREQUENCY – Hz  
FREQUENCY – Hz  
Figure 16. Closed-Loop Gain vs.  
Frequency  
Figure 17. CMRR vs. Frequency  
Figure 18. PSRR vs. Frequency  
–8–  
REV. 0  
OP186  
65  
3
2
5
V
V
A
R
= +5V  
= 100mV p-p  
S
60  
55  
50  
45  
40  
IN  
= +1  
VCL  
4
3
2
= 100k⍀  
= +25؇C  
L
+OS  
V
= +5V  
= 4V p-p  
= +1  
S
T
A
V
IN  
A
R
VCL  
؊OS  
35  
30  
25  
20  
15  
10  
=
L
T
= +25؇C  
A
V
= +2.7V  
= 2V p-p  
= +1  
S
V
IN  
A
R
1
0
VCL  
=
L
T
= +25؇C  
A
1
0
5
0
10  
100  
CAPACITANCE – pF  
1000  
10  
100  
1k  
10k  
100k  
10  
100  
1k  
FREQUENCY – Hz  
10k  
100k  
FREQUENCY – Hz  
Figure 19. Small Signal Overshoot  
vs. Load Capacitance  
Figure 20. Maximum Output Swing  
vs. Frequency  
Figure 21. Maximum Output Swing  
vs. Frequency  
6
6.5  
6
4.5  
4.25  
4
T
= +25؇C  
5.5  
5
A
4.5  
4
5.5  
3.75  
= ؎5V  
V
S
3.5  
3.5  
3
5
4.5  
4
V
= +5V  
S
3.25  
2.5  
2
3
2.75  
1.5  
1
2.5  
V
= +2.2V  
V
= +5V  
=
= +25؇C  
S
S
3.5  
R
T
L
2.25  
2
0.5  
0
V
= +2.7V  
0
S
A
3
0
0.5  
1
1.5  
2 2.5 3 3.5 4 4.5 5 5.5 6  
20 40 60 80 100 120 140  
2.5  
3
0
0.5  
1
1.5  
2
3.5 4 4.5 5 5.5 6  
–40 –20  
COMMON MODE VOLTAGE – V  
SUPPLY VOLTAGE – ؎V  
TEMPERATURE – ؇C  
Figure 23. Supply Current vs. Supply  
Voltage  
Figure 24. Supply Current vs.  
Common-Mode Voltage  
Figure 22. Bias Current vs.  
Temperature  
V
S
= ؎1.35V  
= +1  
V
= +5V  
= +1  
V
= +2.7V  
= +1  
S
S
A
R
C
T
A
R
C
T
A
R
C
T
V
L
L
V
L
L
V
L
L
= 100k⍀  
= 50pF  
= +25؇C  
= 100k⍀  
= 50pF  
= +25؇C  
= 100k⍀  
= 50pF  
= +25؇C  
A
A
A
50mV  
100s  
500mV  
100s  
1.0V  
100s  
Figure 27. Small Signal Transient  
Response  
Figure 25. Large Signal Transient  
Response  
Figure 26. Large Signal Transient  
Response  
REV. 0  
–9–  
OP186  
V
= +5V  
S
T
= +25؇C  
A
V
= ؎1.35V  
S
A
= CIRCUIT  
VOL  
V
= ؎2.5V  
= +1  
S
V
= ؎1V p-p  
IN  
A
R
C
V
L
R
=
L
= 100k⍀  
= 50pF  
= +25؇C  
T
= +25؇C  
A
L
T
A
500mV  
100s  
50mV  
100s  
1.0V  
200s  
Figure 30. Saturation Recovery Time  
Figure 28. Small Signal Transient  
Response  
Figure 29. No Phase Reversal  
1.0V  
100s  
V
= –2.5V  
S
A
= CIRCUIT  
VOL  
V
= –1V p-p  
IN  
R
=
L
T
= +25؇C  
A
Figure 31. Saturation Recovery Time  
APPLICATIONS  
The OP186 is very similar in design to the OP181. Please see the  
OP181/OP281/OP481 data sheet for applications information.  
Design of the OP186 was based on the OP181. The major dif-  
ference is that the trim structures have been removed. This  
results in the offset of the OP186 being higher than the OP181.  
There are no other major changes to the circuit. Other perfor-  
mance differences, such as the higher bandwidth and slightly  
higher supply current, also result from the removal of the trim  
resistors.  
–10–  
REV. 0  
OP186  
SPICE MODEL  
RPS1 70 0 1E6  
RPS2 71 0 1E6  
CPS1 99 70 1E-5  
CPS2 50 71 1E-5  
* OP186 SPICE Macro-model Typical Values  
* 2/98, Ver. 1  
* TAM / ADSC  
*
EPSY 98 72 POLY(2) (70,0) (0,71) 0 1 1  
RPS3 72 73 1.59E6  
* Copyright 1998 by Analog Devices  
*
CPS3 72 73 500E-12  
RPS4 73 98 15.9  
* Refer to “README.DOC” file for License State-  
* ment. Use of this  
*
* model indicates your acceptance of the terms  
* and provisions in  
* INTERNAL VOLTAGE REFERENCE  
*
* the License Statement.  
EREF 98 0 POLY(2) (99,0) (50,0) 0 .5 .5  
*
GSY 99 50 POLY(1) (99,50) 2E-6 .1E-6  
* Node Assignments  
*
*
noninverting input  
* POLE AT 600kHz; ZERO AT 900kHz  
*
|
|
|
|
|
|
1
inverting input  
*
*
|
|
|
|
|
2
positive supply  
G1 98 20 (4,6) 11.3E-6  
*
|
negative supply  
R1 20 98 88.46E3  
*
|
|
|
|
output  
R2 20 21 176.8E3  
*
|
|
|
C2 21 98 1E-12  
*
|
*
.SUBCKT OP186  
99  
50 45  
* GAIN STAGE  
*
*
* INPUT STAGE  
*
G4 98 30 (20,98) 19.54E-6  
R7 30 98 111.6E6  
Q1  
Q2  
4
6
1 3 PIX  
7 5 PIX  
CF 45 30 32E-12  
D3 30 31 DX  
RC1 4 50 100E3  
RC2 6 50 100E3  
D4 32 30 DX  
V3 99 31 0.6  
RE1  
RE2  
C1  
3
5
4
8 6.452E3  
8 6.452E3  
6 50E-15  
V4 32 50 0.6  
*
* OUTPUT STAGE  
I1 99 8 1E-6  
*
EOS  
IOS  
7
1
2 POLY(2) (12,98) (73,98) 800E-6 1 1  
2 50E-12  
M1 45 46 99 99 POX L=2u W=100u  
M2 45 47 50 50 NOX L=2u W=98u  
EG1 99 46 POLY(1) (98,30) 0.82 1  
EG2 47 50 POLY(1) (30,98) 0.79 1  
*
V1 99 9 0.9  
V2 99 10 0.9  
D1  
D2  
*
3
9 DX  
5 10 DX  
* MODELS  
*
* CMRR 90dB, ZERO AT 1kHz  
.MODEL POX PMOS (LEVEL=2, KP=10E-6,  
+ VTO=-0.75, LAMBDA=0.01)  
.MODEL NOX NMOS (LEVEL=2, KP=17E-6,  
+ VTO=0.75, LAMBDA=0.01)  
.MODEL PIX PNP (BF=185,KF=1.6E-12,AF=1)  
.MODEL DX D(IS=1E-14)  
.ENDS OP186  
*
ECM1 11 98 POLY(2) (1,98) (2,98) 0 .5 .5  
RCM1 11 12 1.59E6  
CCM1 11 12 100E-12  
RCM2 12 98 50  
*
* PSRR=100dB, ZERO AT 200Hz  
*
REV. 0  
–11–  
OP186  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
5-Lead SOT-23  
(RT Suffix)  
0.1181 (3.00)  
0.1102 (2.80)  
5
1
4
3
0.1181 (3.00)  
0.1024 (2.60)  
0.0669 (1.70)  
0.0590 (1.50)  
2
PIN 1  
0.0374 (0.95) BSC  
0.0748 (1.90)  
BSC  
0.0079 (0.20)  
0.0031 (0.08)  
0.0512 (1.30)  
0.0354 (0.90)  
0.0571 (1.45)  
0.0374 (0.95)  
10؇  
0؇  
SEATING  
PLANE  
0.0197 (0.50)  
0.0138 (0.35)  
0.0059 (0.15)  
0.0019 (0.05)  
0.0217 (0.55)  
0.0138 (0.35)  
–12–  
REV. 0  

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