OP200AZ [ADI]
Dual Low Offset, Low Power Operational Amplifier; 双低失调,低功耗运算放大器型号: | OP200AZ |
厂家: | ADI |
描述: | Dual Low Offset, Low Power Operational Amplifier |
文件: | 总12页 (文件大小:364K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Dual Low Offset, Low Power
Operational Amplifier
a
OP200
PIN CONNECTIONS
FEATURES
Low Input Offset Voltage: 75 ꢀV Max
Low Offset Voltage Drift, Over –55ꢁC TA +125ꢁC:
0.5 ꢀV/ꢁC Max
16-Pin SOIC
(S-Suffix)
<
<
Low Supply Current (Per Amplifier): 725 mA Max
High Open-Loop Gain: 5000 V/mV Min
Low Input Bias Current: 2 nA Max
Low Noise Voltage Density: 11 nV/÷Hz at 1 kHz
Stable with Large Capacitive Loads: 10 nF Typ
Pin Compatible to OP221, MC1458, and LT1013 with
Improved Performance
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
–IN A
+IN A
NC
OUT A
NC
–
–
NC
V–
V+
NC
NC
+IN B
–IN B
NC
NC
Available in Die Form
OUT B
NC
GENERAL DESCRIPTION
The OP200 is the first monolithic dual operational amplifier to
offer OP77 type precision performance. Available in the industry
standard 8-pin pinout, the OP200 combines precision performance
with the space and cost savings offered by a dual amplifier.
NC = NO CONNECT
EPOXY MINI-DI
(P-Suffix),
P
The OP200 features an extremely low input offset voltage of less
than 75 mV with a drift below 0.5 mV/∞C, guaranteed over the full
military temperature range. Open-loop gain of the OP200 exceeds
5,000,000 into a 10 kW load; input bias current is under 2 nA;
CMR is over 120 dB and PSRR below 1.8 mV/V. On-chip zener-
zap trimming is used to achieve the extremely low input offset
voltage of the OP200 and eliminates the need for offset pulling.
8-Pin Hermetic DIP
(Z-Suffix)
V+
1
2
3
4
8
7
6
5
OUT A
–IN A
+IN A
V–
A
OUT B
–IN B
+IN B
–
+
Power consumption of the OP200 is very low, with each amplifier
drawing less than 725 mA of supply current. The total current
drawn by the dual OP200 is less than one-half that of a single
OP07, yet the OP200 offers significant improvements over this
industry standard op amp. The voltage noise density of the OP200,
11 nV/÷Hz at 1 kHz, is half that of most competitive devices.
B
+
–
The OP200 is an ideal choice for applications requiring multiple
precision op amps and where low power consumption is critical.
The OP200 is pin compatible with the OP221, LM158,
MC1458/1558, and LT1013.
For a quad precision op amp, see the OP400.
V+
BIAS
OUT
VOLTAGE
LIMITING
NETWORK
+IN
–IN
V–
Figure 1. Simplified Schematic (One of two amplifiers is shown.)
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
OP200–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(VS = ±15 V, TA = 25ꢁC, unless otherwise noted.)
OP200A/E
OP200F
OP200G
Parameter
Symbol Conditions
Min Typ Max Min Typ Max Min Typ Max
Unit
Input Offset Voltage VOS
25
75
50
150
80
200
mV
Long Term Input
Voltage Stability
0.1
0.1
0.1
mV/mo
nA
Input Offset Current IOS
VCM = 0 V
0.05 1.0
0.05 2.0
0.05 3.5
Input Bias Current
IB
VCM = 0 V
0.1
0.5
2.0
0.1
0.5
4.0
0.1
0.5
5.0
nA
Input Noise Voltage en p-p
0.1 Hz to 10 Hz
mVp-p
nV/ΊHz
Input Noise
en
fO = 10 Hz
fO = 1000 Hz
22
11
36
18
22
11
36
18
22
11
Voltage Density1
Input Noise Current in p-p
0.1 Hz to 10 Hz
fO = 10 Hz
15
15
15
pAp-p
pA/ΊHz
MW
Input Noise
Current Density
Input Resistance
in
0.4
10
0.4
10
0.4
10
Differential Mode RIN
Input Resistance
Common Mode
RINCM
AVO
125
125
125
GW
Large Signal
Voltage Gain
VO - ±10 V
RL = 10 kW
RL = 2 kW
5000 12000
2000 3700
3000 7000
1500 3200
3000 7000
1500 3200
M/mV
NOTES
1Sample tested
2Guaranteed but not 100% tested
3Guaranteed by CMR test
–2–
REV. A
OP200
(VS = 15 V, –55ꢁC £ TA £ +125ꢁC for OP200A, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
OP200A
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
125
0.5
Unit
Input Offset Voltage
Average Input Offset Voltage Drift
Input Offset Current
Input Bias Current
45
mV
TCVOS
IOS
0.2
mV/∞C
nA
VCM = 0 V
VCM = 0 V
0.15
0.9
2.5
IB
5.0
nA
Large Signal Voltage Gain
AVO
VO = 10 V
RL = 10 W
RL = 2 kW
3000
1000
9000
2700
V/mV
V/mV
Input Voltage Range*
IVR
±12
±12.5
130
V
Common-Mode Rejection
Power Supply Rejection Ratio
Output Voltage Swing
CMR
PSRR
VO
VCM = ±12 V
115
dB
VS = +3 V to +18 V
0.2
3.2
mV/V
RL = 10 kW
RL = 2 kW
±12
±11
±12.4
±12
V
V
Supply Current Per Amplifier
Capacitive Load Stability
ISY
No Load
AV = +1
600
8
775
mA
nF
NOTE
*Guaranteed by CMR test.
ELECTRICAL CHARACTERISTICS (VS = ꢂ15 V, TA = 25ꢁC, unless otherwise noted.)
OP200A/E
OP200F
OP200G
Parameter
Symbol Conditions
Min
Typ Max Min Typ Max Min Typ Max
Unit
Input Voltage Range3 IVR
±12
±13
135
0.4
±12
±13
135
0.4
±12
±13
130
0.6
V
Common-Mode
Rejection
CMR
VCM = ±12 V
120
115
110
dB
Power Supply
VS = ±3 V
to ±18 V
Rejection Ratio
PSRR
VO
1.8
3.2
5.6
mV/V
Output Voltage
Swing
RL= 10 kW
RL = 2 kW
±12
±11
±12.6
±12.2
±12
±11
±12.6
±12.2
±12
±11
±12.6
±12.2
V
V
Supply Current
Per Amplifier
ISY
SR
No Load
570
725
570
725
570
725
mA
Slew Rate
0.1
0.15
0.1
0.15
0.1
0.15
V/mS
Gain Bandwidth
Product
GBWP
AV = 1
500
500
500
kHz
Channel Separation2
VO = 20 Vp-p
fO = 10 Hz
CS
123
145
3.2
123
145
3.2
123
145
3.2
dB
pF
Input Capacitance
CIN
Capacitive Load
Stability
AV = 1
No Oscillations
10
10
10
nF
NOTES
1Sample tested
2Guaranteed but not 100% tested
3Guaranteed by CMR test
–3–
REV. A
OP200–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (VS = ±15 V, –40ꢁC £ TA £ +85ꢁC, unless otherwise noted.)
OP200E
Min
OP200F
OP200G
Parameter
Symbol Conditions
Typ Max Min Typ Max Min Typ Max
Unit
Input Offset Voltage VOS
35
100
80
250
110
300
mV
Average Input Offset
Voltage Drift
TCVOS
0.2
0.5
0.5
1.5
0.6
0.1
0.5
2.0
mV/∞C
nA
Input Offset Current IOS
VCM = 0 V
VCM = 0 V
0.08 2.5
0 3 5.0
0.08 3.5
6.0
Input Bias Current
IB
0.3
70
10.0
nA
Large-Signal
Voltage Gain
VO = ±10 V
RL= 10 kW
RL = 2 kW
AVO
3000 10000
1500 3200
2000 5000
1000 2500
2000 5000
1000 2500
V/mV
V/mV
Input Voltage
Range*
IVR
±12
±12.5
±12
±12.5
±12
±12.5
V
Common-Mode
Rejection
CMR
PSRR
VCM = ±12 V
115
130
110
130
105
130
0.3
dB
Power Supply
Rejection Ratio
VS = ±3 V
to ±18 V
0.15 3.2
0.15 5.6
10.0
775
mV/V
Output Voltage
Swing
VO
RL = 10 kW
RL = 2 kW
±12
±11
±12.4
±12
±12
±11
±12.4
±12
±12
±11
±12.4
±12.2
V
V
Supply Current
Per Amplifier
ISY
No Load
600
775
600
775
600
mA
Capacitive Load
Stability
AV = 1
No Oscillations
10
10
10
10
10
10
nF
nF
NOTE
*Guaranteed by CMR test.
–4–
REV. A
OP200
1/2
20Vp-p @ 10Hz
V
V
100ꢄ
10kꢄ
1
OP200
50kꢄ
50ꢄ
1/2
TO SPECTRUM
ANALYZER
e
OUT
OP200
1/2
1/2
2
OP200
OP200
e
(nV/ Hz) = 2 ꢅ e
(nV/ Hz) ꢅ 101
V
OUT
OUT
1
CHANNEL SEPARATION = 20 LOG
V /1000
2
Figure 2. Channel Separation Test Circuit
Figure 3. Noise Test Schematic
ABSOLUTE MAXIMUM RATINGS1
ORDERING GUIDE
Package
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ±30 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous
Storage Temperature Range
P, S, Z-Package . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300∞C
Junction Temperature (TJ) . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
TA = 25ꢁC
OS Max
(ꢀV)
Operating
Temperature
Range
V
CERDIP
8-Pin
Plastic
75
75
150
200
200
OP200AZ
OP200EZ
OP200FZ*
MIL
XIND
XIND
XIND
XIND
OP200GP
OP200GS
OP200A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55∞C to +125∞C
OP200E, OP200F . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
OP200G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
*Not for new design, obsolete April 2002.
For military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at
2
Package Type
ꢃJA
ꢃJC
Unit
www.dscc.dla.mil/programs/milspec/default.asp
8-Pin Hermetic DIP (Z)
8-Pin Plastic DIP (P)
16-Pin SOL (S)
148
96
92
16
37
27
∞C/W
∞C/W
∞C/W
SMD Part Number
ADI Equivalent
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
5962-8859301M2A
5962-8859301MPA
OP200ARCMDA
OP200AZMDA
otherwise noted.
2
JA is specified for worst case mounting conditions, i.e., JA is specified for
device in socket for CERDIP and P-DIP packages; JA is specified for device
soldered to printed circuit board for SOL package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP200 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–
–Typical Performance Characteristics
OP200
60
3
2
T
= 25ꢁC
= ꢂ15V
A
S
V = ꢂ15V
S
V
= ꢂ15V
S
V
50
40
30
20
2
1
5
1
0
–1
–2
–3
10
0
–75 –50 –25
0
25
50
75 100 125
0
1
2
3
4
5
–75 –50 –25
0
25
50
75 100 125
TIME – Minutes
TEMPERATURE – ꢁC
TEMPERATURE – ꢁC
TPC 1. Warm-Up Drift
TPC 2. Input Offset Voltage
vs. Temperature
TPC 3. Input Bias Current vs.
Temperature
300
250
200
150
100
50
140
120
100
1.0
0.8
0.6
T
= 25ꢁC
V
= ꢂ15V
A
S
T
= 25ꢁC
S
A
S
V
= ꢂ15V
V
= ꢂ15V
80
60
0.4
0.2
0
40
20
0
0
–75 –50 –25
0
25
50
75 100 125
1
10
100
1k
10k
100k
–15
–10
–5
0
5
10
15
TEMPERATURE – ꢁC
FREQUENCY – Hz
COMON-MODE VOLTAGE – V
TPC 4. Input Offset Current vs.
Temperature
TPC 5. Input Bias Current vs.
Common-Mode Voltage
TPC 6. Common-Mode Rejection
vs. Frequency
100
1000
T
= 25ꢁC
= ꢂ15V
T
= 25ꢁC
= ꢂ15V
A
S
A
S
V
V
100
10
1
10
100
1k
1
10
100
1k
FREQUENCY – Hz
FREQUENCY – Hz
TPC 7. Voltage Noise Density
vs. Frequency
TPC 8. Current Noise Density
vs. Frequency
TPC 9. 0.1 to 10Hz Noise
–6–
REV. A
OP200
1.18
1.16
1.14
1.12
1.10
1.08
1.06
1.16
1.15
1.14
1.13
140
120
100
80
TWO AMPLIFIERS
= 25ꢁC
NEGATIVE
SUPPLY
TWO AMPLIFIERS
= ꢂ15V
T
A
V
S
POSITIVE
SUPPLY
60
40
1.12
1.11
20
0
T
= 25ꢁC
A
–75 –50 –25
0
25
50
75 100 125
0.1
1
10
100
1k
10k
100k
ꢂ2
ꢂ6
ꢂ10
ꢂ14
ꢂ16
FREQUENCY – Hz
TEMPERATURE – ꢁC
SUPPLY VOLTAGE – V
TPC 10. Total Supply Current
vs. Supply Voltage
TPC 11. Total Supply Current
vs. Temperature
TPC 12. Power Supply Rejection
vs. Temperature
0.7
0.6
0.5
0.4
0.3
6000
140
120
100
80
V
= ꢂ15V
= 2kꢄ
T
= 25ꢁC
= ꢂ15V
S
L
A
S
R
V
5000
4000
3000
2000
60
0
PHASE
90
135
40
GAIN
10k
20
0.2
0.1
1000
0
180
0
–20
10
–75 –50 –25
0
25
50
75 100 125
–75 –50 –25
0
25
50
75 100 125
1M
100
1k
100k
TEMPERATURE – ꢁC
TEMPERATURE – ꢁC
FREQUENCY – Hz
TPC 13. Power Supply Rejection
vs. Temperature
TPC 14. Open Loop Gain vs.
Temperature
TPC 15. Open Loop Gain and
Phase Shift vs. Frequency
140
30
1
A
A
A
= 100
= 10
= 1
V
T
= 25ꢁC
T
= 25ꢁC
A
S
A
S
V
= ꢂ15V
V
= ꢂ15V
120
100
25
20
15
10
5
V
V
A
= 1000
V
0.1
80
60
40
A
= 100
= 10
= 1
V
V
A
A
0.01
T
= 25ꢁC
= ꢂ15V
A
S
V
V
20
0
V
R
= 10V p-p
OUT
= 2kꢄ
L
0
10
0.001
100
1k
FREQUENCY – Hz
10k
10
100
1k
10k
100k
1M
100
1k
10k
100k
FREQUENCY – Hz
FREQUENCY – Hz
TPC 16. Closed Loop Gain
vs. Frequency
TPC 17. Maximum Output Swing
vs. Frequency
TPC 18. Total Harmonic Distortion
vs. Frequency
–7–
REV. A
OP200
50
29
28
27
26
25
24
23
22
150
140
130
120
T
= 25ꢁC
A
S
T
= 25ꢁC
45
40
A
S
V
= ꢂ15V
V
= ꢂ15V
FALLING
RISING
35
30
25
20
15
10
SINKING
110
100
90
SOURCING
1
5
0
0
0.5
1.0
1.5
1.0
1.5
3.0
0
2
3
4
5
10
100
1k
10k
100k
CAPACITIVE LOAD – nF
TIME – Minutes
FREQUENCY – Hz
TPC 19. Overshoot vs.
Capacitive Load
TPC 20. Short-Circuit
Current vs. Time
TPC 21. Channel Separation
vs. Frequency
TPC 22. Large-Signal
Transient Response
TPC 23. Small-Signal
Transient Response
TPC 24. Small-Signal Transient
Response CLOAD = 1 nF
APPLICATIONS INFORMATION
+15V
The OP200 is inherently stable at all gains and is capable of
driving large capacitive loads without oscillating. Nonetheless,
good supply decoupling is highly recommended. Proper supply
decoupling reduces problems caused by supply line noise and
improves the capacitive load driving capability of the OP200.
3
2
8
1/2
V
1
IN
V
OP200AZ
OUT
5
6
7
1/2
4
OP200AZ
–15V
20kꢄ
APPLICATIONS
20kꢄ
5kꢄ
5kꢄ
DUAL LOW-POWER INSTRUMENTATION AMPLIFIER
A dual instrumentation amplifier that consumes less than 33 mW
of power per channel is shown in Figure 4. The linearity of the
instrumentation amplifier exceeds 16 bits in gains of 5 to 200
and is better than 14 bits in gains from 200 to 1000. CMRR is
above 115 dB (Gain = 1000). Offset voltage drift is typically
0.2 mV/∞C over the military temperature range which is compa-
rable to the best monolithic instrumentation amplifiers. The
bandwidth of the low-power instrumentation amplifier is a func-
tion of gain and is shown below:
V
REF
R
G
40000
V
=
5 +
V
+ V
OUT
IN REF
R
G
Figure 4. Dual Low-Power Instrumentation Amplifier
The output signal is specified with respect to the reference
input, which is normally connected to analog ground. The
reference input can be used to offset the output from –10 V
to +10 V if required.
Gain
Bandwidth
5
10
100
1000
150 kHz
67 kHz
7.5 kHz
500 Hz
–8–
REV. A
OP200
PRECISION ABSOLUTE VALUE AMPLIFIER
PRECISION CURRENT PUMP
The circuit of Figure 5 is a precision absolute value amplifier
with an input impedance of 10 MW. The high gain and low
TCVOS of the OP200 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP200
exceeds 120 dB, yielding an error of less than 2 ppm.
Maximum output current of the precision current pump shown
in Figure 6 is ±10 mA. Voltage compliance is ±10 V with ±15 V
supplies. Output impedance of the current transmitter exceeds
3 MW with linearity better than 16 bits.
R3
R1
10kꢄ
10kꢄ
2
3
R5
+15
C2
100ꢄ
1/2
1
I
V
R2
OUT
0.1pF
OP200EZ
IN
10kꢄ
+15
8
R1
R3
1kꢄ
1kꢄ
5
6
R4
7
1/2
1kꢄ
6
C1
D1
OP200EZ
30pF
1N4148
1/2
7
3
8
V
< 10V
OP200AZ
OUT
4
1/2
1
5
0V < V
OUT
OP200AZ
V
RS
V
IN
100ꢄ
IN
D1
2
I
=
=
= 10mA/V
V
OUT
IN
1N4148
C2
4
–15
R2
0.1pF
2kꢄ
Figure 6. Precision Current Pump
–15
DUAL 12-BIT VOLTAGE OUTPUT DAC
Figure 5. Precision Absolute Value Amplifier
The dual output DAC shown in Figure 7 is capable of providing
untrimmed 12-bit accurate operation over the entire military
temperature range. Offset voltage, bias current and gain errors
of the OP-200 contribute less than 1/lO of an LSB error at 12
bits over the military temperature range.
5V
21
V
DD
R
A
8
FB
3
2
DAC-8222EW
10V
REFERENCE
VOLTAGE
DAC A
1/2
I
A
V
A
OUT
4
REF
2
–
DAC8212AV
1/2
1
4
OUTA
–15V
OP200AZ
3
+
DAC DATA BUS
PINS 6(MSB) – 17(LSB)
23
24
1
R
B
FB
DAC B
1/2
I
B
V
B
OUT
6
5
22 REF
–
DAC8212AV
1/2
7
OUTB
OP200AZ
AGND
18
DAC A/DAC B
+
19
20
DAC
CS
CONTROL
WR
DGND
5
Figure 7. Dual 12-Bit Voltage Output DAC
REV. A
–9–
OP200
+5V
DUAL PRECISION VOLTAGE REFERENCE
–2.5V
A dual OP200 and a REF-43, a 2.5 V reference, can be used to
build a ±2.5 V precision voltage reference. Maximum output
current from each reference is ±10 mA with load regulation
under 25 mV/mA. Line regulation is better than 15 mV/V and
output voltage drift is under 20 mV/∞C. Output voltage noise
from 0.1 Hz to 10 Hz is typically 75 mV p-p. R1 and D1 ensure
correct start-up.
R2
10kꢄ
R1
22kꢄ
2
3
8
D1
1N914
1/2
OP-200AZ
2
4
R4
R3
10kꢄ
6
6
PROGRAMMABLE HIGH RESOLUTION WINDOW
COMPARATOR
5kꢄ
REF-43A
–5V
7
1/2
4
OP200AZ
The programmable window comparator shown in Figure 9 is
easily capable of 12-bit accuracy over the full military tempera-
ture range. A dual CMOS 12-bit DAC, the DAC-8212, is used
in the voltage switching mode to set the upper and lower thresh-
olds (DAC A and DAC B, respectively).
5
–2.5V
Figure 8. Dual Precision Voltage Reference
15V
V
IN
21
V
DD
8
DAC A
1/2
I
A
R
A
4
10V
2
OUT
REF
3
2
+
REFERENCE
DAC8212AV
1/2
1
5V
R1
OP200AZ
10kꢄ
D1
–
R3
1N4148
TTL OUT
10kꢄ
DAC DATA BUS
PINS 6(MSB) – 17(LSB)
–15V
Q1
R4
2N2222
D2
4
5
10kꢄ
+
1N4148
R2
1/2
7
10kꢄ
OUTB
OP200AZ
DAC B
1/2
R
B
I
B
REF 22
24
OUT
–
DAC8212AV
18
19
20
DAC A/DAC B
DAC
CONTROL
SIGNALS
CS
WR
DGND AGND
5
1
Figure 9. Programmable High Resolution Window Comparator
–10–
REV. A
OP200
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
PIN CONNECTIONS
16-Pin SOIC
(S-Suffix)
0.4133 (10.50)
0.3977 (10.00)
16
1
9
8
0.2992 (7.60)
0.2914 (7.40)
0.4193 (10.65)
0.3937 (10.00)
PIN 1
0.1043 (2.65)
0.0926 (2.35)
0.0291 (0.74)
0.0098 (0.25)
0.050 (1.27)
BSC
ꢅ 45ꢁ
8ꢁ
0ꢁ
0.0192 (0.49)
0.0138 (0.35)
0.0118 (0.30)
0.0040 (0.10)
SEATING
PLANE
0.0500 (1.27)
0.0157 (0.40)
0.0125 (0.32)
0.0091 (0.23)
Epoxy MINI-DI
(P-Suffix)
P
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
0.240 (6.10)
1
4
0.325 (8.25)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.015 (0.381)
0.008 (0.204)
0.022 (0.558) 0.070 (1.77) SEATING
PLANE
0.014 (0.356) 0.045 (1.15)
8-Pin Hermetic DIP
(Z-Suffix)
0.005 (0.13) 0.055 (1.4)
MIN
MAX
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
4
0.100 (2.54)
0.405 (10.29) MAX
BSC
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
15
0
0.023 (0.58) 0.070 (1.78)
0.014 (0.36) 0.030 (0.76)
PLANE
REV. A
–11–
OP200
Revision History
Location
Page
Data Sheet changed from REV. 0 to REV. A.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
–12–
REV. A
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