OP207-903Y [ADI]
DUAL OP-AMP, 230uV OFFSET-MAX, CDIP14, CERAMIC, DIP-14;
| 型号： | OP207-903Y |
| 厂家： | 
ADI |
| 描述： | DUAL OP-AMP, 230uV OFFSET-MAX, CDIP14, CERAMIC, DIP-14 放大器 CD |
| 文件： | 总5页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Tuesday, Apr 1, 2008 10:08 AM /
Dual Ultra-Low Vos Matched
Operational Amplifier
OP207
1.0
SCOPE
This specification documents the detail requirements for space qualified product manufactured on
Analog Devices, Inc.’s QML certified line per MIL-PRF-38535 Level V except as modified herein.
The manufacturing flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM
brochure is to be considered a part of this specification http://www.analog.com/aerospace
This data sheet specifically details the space grade version of this product. A more detailed
operational description and a complete data sheet for commercial product grades can be found at
www.analog.com/OP207
2.0
Part Number. The complete part number(s) of this specification follow:
Part Number
Description
OP207-903Y
Dual Ultra-Low VOS Matched Operational Amplifier
Letter
Y
Descriptive designator
GDIP1-T14
Case Outline (Lead Finish per MIL-PRF-38535)
14-Lead ceramic dual-in-line package (CERDIP)
NOTES:
1. Device may be operated even if insertion is
reversed; this is due to inherent symmetry of
pin locations of amplifiers A and B
14
13
12
11
10
9
V+ (A)
OUT (A)
V- (A)
+IN (B)
-IN (B)
NULL (B)
NULL (B)
V+ (B)
2. V-(A) and V-(B) are internally connected via
substrate resistance
8
7
6
5
OUT (B)
V- (B)
4
3
+IN (A)
-IN (A)
2
1
NULL (A)
NULL (A)
Figure 1 - Terminal connections.
ASD0010727
Rev. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its use,
nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license
is granted by implication or otherwise under any patent or patent rights of
Analog Devices. Trademarks and registered trademarks are the property of
their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106,
U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2008 Analog Devices, Inc. All rights reserved.
OP207
3.0
Absolute Maximum Ratings. (TA = 25°C, unless otherwise noted)
Supply Voltage.........................................................................±22V
Power Dissipation ...................................................................500mW
Differential Input Voltage .......................................................±30V
Input Voltage (Note 1) ............................................................±22V
Output Short-Circuit Duration ................................................Indefinite
Operating Temperature Range ................................................-55°C to +125°C
Storage Temperature Range ....................................................-65°C to +150°C
Lead Temperature (Soldering, 60 sec.) ...................................+300°C
Junction Temperature (TJ)……………………………………+150°C
NOTES:
For supply voltages less than ±22V, the absolute maximum input voltage is equal to the supply voltages.
3.1
Thermal Characteristics:
Thermal Resistance, CERDIP (Y) Package
Junction-to-Case (ĬJC) = 29°C/W Max
Junction-to-Ambient (4JA) = 91°C/W Max
ASD0010727 Rev. F | Page 2 of 5
OP207
4.0
Electrical Table:
Table I
Parameter
See notes at end of table
Symbol
VOS
Conditions
Note 1
Sub-
group
1
2, 3
1
Limit Limit
Units
Min
Max
100
230
500
1.3
PV
ꢀ
ꢀ
Input Offset Voltage
M, D, L, R 3/
TA = -55°C, +25°C, +125°C
Average Input Offset Voltage
Drift 4/
1, 2, 3
PV/°C
TCVOS
IOS
1
2, 3
1
1
2, 3
1
2.8
5.6
25
±3.0
±5.6
±125
nA
Input Offset Current
Input Bias Current
M, D, L, R 3/
IB
M, D, L, R 3/
Input Voltage Range 4/
Common-Mode Rejection Ratio
IVR
Note 2
VCM = ±13V
1, 2, 3
1
2, 3
1
2, 3
4
4, 5, 6
4
4
5, 6
4
1
1
±13
106
103
V
dB
4/
CMRR
PSRR
VS = ±3V to ±18V
20
32
Power Supply Rejection Ratio
4/
PV/V
±12.5
±12
±10
200
150
100
V
RL = 10K:
RL = 2K:
RL = 1K:
VO = ± 10V, RL = 2K:
Output Voltage Swing 4/
VO
V/mV
mA
Large Signal Voltage Gain
Power Supply Current
AVO
ISY
M, D, L, R 3/
No Load, Both Amplifiers
M, D, L, R 3/
8
8
Input Noise Voltage 4/
Input Noise Current 4/
en
in
fO = 1Hz to 100 Hz
fO = 1Hz to 100 Hz
Rp = 20K:
7
7
1
1
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
1
150
8
nVRMS
pARMS
mV
0.5
VOSadj+
VOSadj-
Offset Adjustment Range 4/
Input Offset Voltage Match 4/
-0.5
90
180
±3.5
±6.0
±3.5
±6.5
±3.5
±6.5
Rp = 20K:
PV
'VOS
'IB+
Average Non- Inverting Bias
Current 4/
nA
Non-Inverting Offset Current 4/
Inverting Offset Current 4/
'IOS+
'IOS-
Common Mode Rejection Ratio
Match 4/
Power Supply Rejection Ratio
Match 4/
103
100
dB
PV/V
mA
'CMRR
VS = ±3V to ±18V
32
51
58
-5
'PSRR
ISC+
ISC-
CS
5
-55
126
Output Short Circuit Current 4/
Channel Separation 4/
4
dB
TABLE I NOTES:
1/ VS = ±15V, RS = 50 ohm, unless otherwise specified
2/ IVR is defined as the VCM range used for the CMRR test.
3/ Post irradiation limit. Subgroup 1 parameters without limit are read and recorded but not guaranteed.
4/ Not tested post irradiation.
ASD0010727 Rev. F | Page 3 of 5
OP207
4.1
Electrical Test Requirements:
Table II
Test Requirements
Subgroups (in accordance
with MIL-PRF-38535,
Table III)
Interim Electrical Parameters
Final Electrical Parameters
Group A Test Requirements
1
1, 2, 3, 4, 5, 6, 7 1/ 2/
1, 2, 3, 4, 5, 6
Group C end-point electrical parameters
Group D end-point electrical parameters
Group E end-point electrical parameters
1 2/
1
1
Notes:
1/ PDA applies to subgroup 1. VOS and delta’s excluded from PDA.
2/ See table III for delta limits.
4.2
Table III. Burn-in test delta limits.
Table III
TEST
TITLE
BURN-IN LIFETEST
ENDPOINT ENDPOINT
DELTA
LIMIT
UNITS
wV
VOS
±100
±3
±175
±4
±75
±1
±I
B
nA
5.0
Life Test/Burn-In Circuit:
5.1 HTRB is not applicable for this drawing.
5.2 Burn-in is per MIL-STD-883 Method 1015 test condition B.
5.3 Steady state life test is per MIL-STD-883 Method 1005, test condition B.
ASD0010727 Rev. F | Page 4 of 5
OP207
Rev
Description of Change
Date
A
Initiate
Mar. 28, 2000
Mar. 19, 2002
May 13, 2003
Update web address. Correct PSRR units from V/wV to wV/V. Table I: reference
to note 4 deleted, note 4 not in datasheet. Symbol for Inverting offset current
should be ෙ IOS-. Table II, note 1 add “VOS and delta’s excluded from PDA”.
Update Table III with Life test end-point = datasheet + delta.
B
C
Update web address. Add note 4 to indicate parameters not tested post irradiation
D
E
Delete burn-in and radiation bias circuits
Updated header/footer & added to scope description, and deleted
OP207R903Y – part is no longer offered.
Aug. 5, 2003
Feb. 14, 2008
Add Junction Temperature +150°C to 3.0 Absolute Maximum Ratings &
remove "see figure 2" in 5.2 Burn-In Section because there is no figure 2
F
March 31, 2008
© 2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective
companies.
Printed in the U.S.A.
03/08
ASD0010727 Rev. F | Page 5 of 5
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