OP283GBC [ADI]
IC DUAL OP-AMP, 1250 uV OFFSET-MAX, 5 MHz BAND WIDTH, UUC8, 0.063 X 0.092 INCH, DIE-8, Operational Amplifier;
| 型号： | OP283GBC |
| 厂家： | 
ADI |
| 描述： | IC DUAL OP-AMP, 1250 uV OFFSET-MAX, 5 MHz BAND WIDTH, UUC8, 0.063 X 0.092 INCH, DIE-8, Operational Amplifier 运算放大器 |
| 文件： | 总12页 (文件大小：418K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5 MHz Single-Supply
Operational Amplifiers
a
OP183/OP283
P IN CO NNECTIO NS
FEATURES
Single-Supply – +3 Volts to +36 Volts
Wide Bandw idth – 5 MHz
Low Offset Voltage – <1 m V
High Slew Rate – 10 V/ s
Low Noise – 10 nV/ √Hz
Unity-Gain Stable
8-Lead Nar r ow-Body SO
8-Lead Epoxy D IP
(P Suffix)
(S Suffix)
1
2
3
4
8
7
6
5
NULL
–IN
1
2
3
4
8
7
6
5
NC
OP183
V+
OP183
Input and Output Range Includes GND
No Phase Reversal
TOP VIEW
(Not to Scale)
+IN
OUT
NULL
V–
APPLICATIONS
Multim edia
NC = NO CONNECT
Telecom
ADC Buffers
Wide Band Filters
Microphone Pream plifiers
8-Lead Nar r ow-Body SO
(S Suffix)
8-Lead Epoxy D IP
(P Suffix)
1
2
3
4
8
7
6
5
OUTA
–INA
+INA
V–
1
2
3
4
8
7
6
5
V+
GENERAL D ESCRIP TIO N
OUTB
–INB
+INB
OP283
T he OP183 is a single-supply, 5 MHz bandwidth amplifier with
slew rates of 10 V/µs. T he OP283 is a dual version. Both can
operate from voltages as low as 3 volts and up to 36 volts. T his
combination of slew rate and bandwidth yields excellent single-
supply ac performance making them ideally suited for telecom and
multimedia audio applications.
TOP VIEW
(Not to Scale)
OP283
In addition to its ac characteristics, the OP183 family provides
good dc performance with guaranteed 1 mV offset. Noise is a
respectable 10 nV/√Hz. Supply current is only 1.2 mA per amplifier.
T hese amplifiers are well suited for single-supply applications that
require moderate bandwidths even when used in high gain configu-
rations. T his makes them useful in filters and instrumentation.
T heir output drive capability and very wide full power bandwidth
make them a good choice for multimedia headphone drivers or
microphone input amplifiers.
T he OP183 and OP283 are available in 8-pin plastic DIP and SO-8
surface mount packages. T hey are specified over the extended
industrial (–40°C to +85°C) temperature range.
REV. B
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood. MA 02062-9106, U.S.A.
Tel: 617/ 329-4700 Fax: 617/ 326-8703
OP183/OP283–SPECIFICATIONS
(@ V = +5.0 V, T = +25؇C unless otherwise noted)
ELECTRICAL CHARACTERISTICS
S
A
P ar am eter
Sym bol
Conditions
Min
Typ
Max
Units
INPUT CHARACT ERIST ICS
Offset Voltage
VOS
IB
VCM = 2.5 V, VOUT = 2.5 V,
–40°C ≤ T A ≤ +85°C
VCM = 2.5 V, VOUT = 2.5 V,
–40°C ≤ T A ≤ +85°C
VCM = 2.5 V, VOUT = 2.5 V,
–40°C ≤ T A ≤ +85°C
0.025
1.0
mV
mV
nA
nA
nA
nA
V
1.25
600
750
Input Bias Current
Input Offset Current
350
430
IOS
11
±50
+3.5
Input Voltage Range
0
Common-Mode Rejection Ratio
CMRR
VCM = 0 to 3.5 V
–40°C ≤ T A ≤ +85°C
RL = 2 kΩ, 0.2 ≤ VO ≤ 3.8 V
70
100
104
dB
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
AVO
∆VOS/∆T
∆IB/∆T
V/mV
µV/°C
nA/°C
4
–1.6
OUT PUT CHARACT ERIST ICS
Output Voltage High
VOH
VOL
ISC
RL = 2 kΩ to GND
RL = 2 kΩ to GND
Source
+4.0
4.22
50
25
V
Output Voltage Low
Short Circuit Limit
75
mV
mA
mA
Sink
30
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = +4 V to +6 V,
–40°C ≤ T A ≤ +85°C
VO = 2.5 V,
70
104
1.2
dB
Supply Current/Amplifier
–40°C ≤ T A ≤ +85°C
1.5
±18
mA
V
Supply Voltage Range
VS
+3
5
DYNAMIC PERFORMANCE
Slew Rate
SR
RL = 2 kΩ
10
>50
1.5
5
V/µs
kHz
µs
Full-Power Bandwidth
Settling T ime
BWp
tS
1% Distortion
T o 0.01%
Gain Bandwidth Product
GBP
MHz
Phase Margin
φm
46
Degrees
NOISE PERFORMANCE
Voltage Noise
en
0.1 Hz to 10 Hz
2
µV p-p
p-p
Voltage Noise Density
Current Noise Density
en
in
f = 1 kHz, VCM = 2.5 V
10
0.4
nV/√Hz
pA/√Hz
ELECTRICAL CHARACTERISTICS (@ V = +3.0 V, T = +25؇C unless otherwise noted)
S
A
P ar am eter
Sym bol
Conditions
Min
Typ
Max
Units
INPUT CHARACT ERIST ICS
Offset Voltage
VOS
IB
VCM = 1.5 V, VOUT = 1.5 V,
–40°C ≤ T A ≤ +85°C
VCM = 1.5 V, VOUT = 1.5 V,
–40°C ≤ T A ≤ +85°C
VCM = 1.5 V, VOUT = 1.5 V,
–40°C ≤ T A ≤ +85°C
0.3
1.0
mV
mV
nA
nA
nA
nA
V
1.25
600
750
Input Bias Current
Input Offset Current
350
IOS
11
±50
+1.5
Input Voltage Range
0
Common-Mode Rejection Ratio
CMRR
AVO
VCM = 0 V to 1.5 V,
–40°C ≤ T A ≤ +85°C
RL = 2 kΩ, 0.2 ≤ VO ≤ 1.8 V
70
100
103
260
dB
V/mV
Large Signal Voltage Gain
OUT PUT CHARACT ERIST ICS
Output Voltage High
VOH
VOL
ISC
RL = 2 kΩ to GND
RL = 2 kΩ to GND
Source
+2.0
2.25
90
25
V
Output Voltage Low
Short Circuit Limit
125
1.5
mV
mA
mA
Sink
30
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = +2.5 V to +3.5 V,
–40°C ≤ T A ≤ +85°C
–40°C ≤ T A ≤ +85°C, VO = 1.5 V
60
113
1.2
dB
mA
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Gain Bandwidth Product
GBP
en
5
MHz
NOISE PERFORMANCE
Voltage Noise Density
f = 1 kHz, VCM = 1.5 V
10
nV/√Hz
–2–
REV. B
OP183/OP283
(@ V = ؎15.0 V, T = +25؇C unless otherwise noted)
ELECTRICAL CHARACTERISTICS
S
A
P ar am eter
Sym bol
Conditions
Min Typ
Max
Units
INPUT CHARACT ERIST ICS
Offset Voltage
VOS
IB
0.01
1.0
1.25
600
750
±50
+13.5
mV
mV
nA
nA
nA
V
–40°C ≤ T A ≤ +85°C
Input Bias Current
300
400
11
–40°C ≤ T A ≤ +85°C
–40 ≤ TA ≤ +85°C
Input Offset Current
Input Voltage Range
IOS
–15
Common-Mode Rejection Ratio CMRR
VCM = –15 V to +13.5 V,
–40°C ≤ T A ≤ +85°C
RL = 2 kΩ
70
86
dB
Large Signal Voltage Gain
Offset Voltage Drift
AVO
100
1000
3
–1.6
V/mV
µV/°C
nA/°C
mV
∆VOS/∆T
∆IB/∆T
VOS
Bias Current Drift
Long T erm Offset Voltage
Note 1
1.5
OUT PUT CHARACT ERIST ICS
Output Voltage High
VOH
VOL
ISC
RL = 2 kΩ to GND, –40°C ≤ T A ≤ +85°C
RL = 2 kΩ to GND, –40°C ≤ T A ≤ +85°C
Source
Sink
+13.9 14.1
V
V
mA
mA
Ω
Output Voltage Low
Short-Circuit Limit
–14.05 –13.9
30
50
15
Open -Loop Output Impedance
ZOUT
f = 1 MHz, AV = +1
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = ±2.5 V to ±18 V,
–40°C ≤ T A ≤ +85°C
VS = ±18 V, VO = 0 V,
–40°C ≤ T A ≤ +85°C
70
112
dB
Supply Current/Amplifier
Supply Voltage Range
1.2
1.75
±18
mA
V
VS
+3
10
DYNAMIC PERFORMANCE
Slew Rate
SR
BWp
tS
GBP
φm
RL = 2 kΩ
1% Distortion
T o 0.01%
15
50
1.5
5
V/µs
kHz
µs
MHz
degrees
Full-Power Bandwidth
Settling T ime
Gain Bandwidth Product
Phase Margin
56
NOISE PERFORMANCE
Voltage Noise
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
2
10
0.4
µV p-p
nV/√Hz
pA/√Hz
Voltage Noise Density
Current Noise Density
NOT ES
1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125 °C, with an LT PD of 1.3.
Specifications subject to change without notice.
(@ V = +5.0 V, T = +25؇C unless otherwise noted)
WAFER TEST LIMITS
S
A
P ar am eter
Sym bol
Conditions
Lim it
Units
Offset Voltage
Input Bias Current
VOS
IB
IOS
CMRR
PSRR
AVO
VOH
VOL
ISY
VS = ±15 V, VO = 0 V
VCM = 2.5 V
VCM = 2.5 V
VCM = 0 V to 3.5 V
V = ±2.5 V to ±18 V
RL = 2 kΩ, 0.2 ≤ VO ≤ 3.8 V
RL = 2 kΩ
1.0
±600
±50
70
mV max
nA max
nA max
dB min
dB min
V/mV min
V min
Input Offset Current
Common-Mode Rejection
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
70
100
4.0
75
RL = 2 kΩ
VS = ±15 V, VO = 0 V, RL = ∞
mV max
mA max
1.5
NOT E
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
REV.B
–3–
OP183/OP283
ABSO LUTE MAXIMUM RATINGS1
D ICE CH ARACTERISTICS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V
Output Short-Circuit Duration to GND . . . . . . . . . . . . Indefinite
Storage T emperature Range
V+
OUT NULL
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating T emperature Range
OP183/OP283G . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction T emperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead T emperature Range (Soldering 60 Sec) . . . . . . . . . . +300°C
NULL
–IN IN+
V–
3
P ackage Type
θJA
θJC
Units
OP183 Die Size 0.058 X 0.063 Inch, 3,717 Sq. Mils
Substrate (Die Backside) Is Connected to V–.
Transistor Count, 30.
8-Pin Plastic DIP (P)
8-Pin SOIC (S)
103
158
43
43
°C/W
°C/W
NOT ES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2For supply voltages less than ±7 V, the absolute maximum input voltage is equal
V+ OUTB
–INB
+INB
to the supply voltage. Maximum input current should not exceed
2 mA.
3θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket
for P-DIP packages; θJA is specified for device soldered in circuit board for SOIC
packages.
O RD ERING GUID E
Tem perature
Range
P ackage
D escription
P ackage
O ption
Model
OP183GP
OP183GS
–40°C to +85°C
–40°C to +85°C
8-Pin Plastic DIP
8-Pin SOIC
N-8
SO-8
OUTA
–INA
V–
+INA
OP283GP
OP283GS
–40°C to +85°C
–40°C to +85°C
8-Pin Plastic DIP
8-Pin SOIC
N-8
SO-8
OP283 Die Size 0.063 X 0.092 Inch, 5,796 Sq. Mils
Substrate (Die Backside) Is Connected to V–.
Transistor Count, 55.
–4–
REV. B
Typical Characteristics–OP183/OP283
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
160
V
300X
OP AMPS
= +5V
V
= ±15V
V = +5V
S
S
S
300X
OP AMPS
140
120
100
80
590X
OP AMPS
60
40
20
0
–600 –400 –200
0
+200 +400 +600
–600 –400 –200
0
+200 +400 +600
–600 –400 –200
0
+200 +400 +600
INPUT OFFSET VOLTAGE – µV
INPUT OFFSET VOLTAGE – µV
INPUT OFFSET VOLTAGE – µV
Figure 1. OP183 Input Offset Voltage
Distribution @ +5 V
Figure 2. OP183 Input Offset Voltage
Distribution @ ±15 V
Figure 3. OP283 Input Offset Voltage
Distribution @ +5 V
160
160
160
≤–40°C ≤ T ≤ +85°C
V
= ±15V
≤–40°C ≤ T ≤ +85°C
A
S
A
300X OP AMPS
140
140
120
100
80
590X
OP AMPS
300X OP AMPS
140
PLASTIC PACKAGE
PLASTIC PACKAGE
120
120
100
80
60
40
20
0
100
80
60
40
20
0
60
40
20
0
0
2
4
6
8
10
12
–600 –400 –200
0
+200 +400 +600
0
2
4
6
8
10
12
INPUT OFFSET VOLTAGE – µV
TCV – µV/°C
OS
TCV – µV/°C
OS
Figure 4. OP283 Input Offset Voltage
Distribution @ ±15 V
Figure 5. OP183 Input Offset Voltage
Drift (TCVOS) Distribution @ +5 V
Figure 6. OP183 Input Offset Voltage
Drift (TCVOS) Distribution @ ±15 V
3
200
200
≤–40°C ≤ T ≤ +85°C
590X OP AMPS
≤–40°C ≤ T ≤ +85°C
590X OP AMPS
A
A
180
180
160
140
120
100
80
PLASTIC PACKAGE
160
140
120
100
80
PLASTIC PACKAGE
2
1
60
60
ΩT = +25°C
A
40
40
R
V
= 2kΩ
L
= +3V
S
20
20
0
0
0
1k
10k
100k
1M
10M
0
2
4
6
8
10 12
14 16
0
2
4
6
8
10 12
14 16
FREQUENCY – Hz
TCV – µV/°C
TCV – µV/°C
OS
OS
Figure 8. OP283 Input Offset Voltage
Drift (TCVOS) Distribution @ ±15 V
Figure 9. OP183/OP283 Maxim um
Output Swing vs. Frequency @ +3 V
Figure 7. OP283 Input Offset Voltage
Drift (TCVOS) Distribution @ +5 V
REV.B
–5–
OP183/OP283–Typical Characteristics
30
25
20
15
10
5
5
4
3
2
1
0
1
-p
SINK
100m
10m
1m
SOURCE
ΩT = +25°C
ΩT = +25°C
A
A
R
V
= 2kΩ
= ±15V
R
V
= 2kΩ
= +5V
L
L
S
S
0
1k
10k
100k
1M
10M
1k
1µ
10k
100k
1M
10M
10µ
100µ
1m
10m
FREQUENCY – Hz
FREQUENCY – Hz
LOAD CURRENT – Amps
Figure 10. OP183/OP283 Maxim um
Output Swing vs. Frequency @ +5 V
Figure 11. OP183/OP283 Maxim um
Output Swing vs. Frequency @ ±15 V
Figure 12. Output Voltage vs. Sink
& Source Current
1.50
500
600
T
V
= +25°C
= ±15V
A
V
V
= ±15V
&
= +5V
∞V = ±18V
S
S
S
R
=
∞
1.25
1.00
0.75
0.50
0.25
0
L
500
400
300
200
100
0
400
300
200
100
0
S
V
= +3V
S
V
R
= +3V
V
R
= +5V
S
S
=
∞
=
∞
L
L
–75 –50 –25
0
25 50 75 100 125
–15
–10
–5
0
5
10 13.5
–75 –50 –25
0
25 50 75 100 125
TEMPERATURE – °C
COMMON-MODE VOLTAGE – Volts
TEMPERATURE – °C
Figure 13. Input Bias Current vs.
Com m on-Mode Voltage
Figure 14. Input Bias Current vs.
Tem perature
Figure 15. Supply Current per
Am plifier vs. Tem perature
1.50
1.25
1.00
0.75
0.50
0.25
0
60
60
T
= +25°C
A
50
40
30
20
10
0
50
40
30
20
10
0
–I
SC
–I
SC
+I
SC
+I
SC
0
±2.5 ±5 ±7.5 ±10 ±12.5 ±15 ±17.5 ±20
SUPPLY VOLTAGE – Volts
–75 –50 –25
0
25 50 75 100 125
–75 –50 –25
0
25 50 75 100 125
TEMPERATURE – °C
TEMPERATURE – °C
Figure 16. Supply Current per
Am plifier vs. Supply Voltage
Figure 17. Short-Circuit Current vs.
Tem perature @ +5 V
Figure 18. Short-Circuit Current vs.
Tem perature @ ±15 V
–6–
REV. B
OP183/OP283
140
140
90
80
70
60
50
T
V
= +25°C
= ±15V
ΩT = +25°C
T
V
= +25°C
= ±15V
A
A
A
V
R
= +3V
= 10kΩ
S
S
120
100
80
60
40
20
0
120
100
80
60
40
20
0
S
L
+PSRR
GAIN
40
30
20
PHASE
MARGIN 135
= 43°
–PSRR
90
PHASE
10k
45
0
10
0
–10
–45
100
100
1k
10k
100k
1M
1k
10k
100k
1M
1k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
FREQUENCY – Hz
Figure 19. Com m on-Mode Rejection
vs. Frequency
Figure 20. Power Supply Rejection
vs. Frequency
Figure 21. Open-Loop Gain and Phase
vs. Frequency @ +3 V
90
90
1000
900
ΩT = +25°C
ΩT = +25°C
A
A
80
80
V
R
= ±15V
= 10kΩ
V
R
= +5V
= 10kΩ
S
S
ΩV = +5V
S
L
70
60
50
70
60
50
L
800
R
= 2kΩ
L
700
600
500
400
300
200
100
0
GAIN
GAIN
40
30
20
40
30
20
PHASE
MARGIN 135
= 56°
PHASE
MARGIN 135
= 46°
90
90
V = ±15V
S
PHASE
10k
PHASE
10k
OR
= +3V
= 2kΩ
45
0
10
0
45
0
10
0
V
S
R
L
–10
–45
–10
–45
10M
1k
1k
100k
1M
10M
100k
1M
–75 –50 –25
0
25 50 75 100 125
FREQUENCY – Hz
FREQUENCY – Hz
TEMPERATURE – °C
Figure 24. Open-Loop Gain vs.
Tem perature
Figure 22. Open-Loop Gain and Phase
vs. Frequency @ +5 V
Figure 23. Open-Loop Gain and Phase
vs. Frequency @ ±15 V
25
30
25
20
15
10
5
50
T
= +25°C
T
V
= +25°C
= ±15V
A
A
V
= ±15V
OR
S
S
40
30
20
15
10
5
ΩV = ±15V
S
A
= +100
= +10
V
V
= +3V, +15V
S
R
= 2kΩ
L
± SLEW RATE
20
A
V
10
ΩV = ±5V
S
R
= 2kΩ
0
L
A
= +1
± SLEW RATE
V
–10
0
0
–20
1k
–75 –50 –25
0
25 50 75 100 125
1k
100
FREQUENCY – Hz
10
10k
10k
100k
FREQUENCY – Hz
1M
10M
TEMPERATURE – °C
Figure 27. Voltage Noise Density
vs. Frequency
Figure 25. Closed-Loop Gain vs.
Frequency
Figure 26. Slew Rate vs. Tem perature
REV.B
–7–
OP183/OP283–Typical Characteristics
80
70
100
90
80
70
60
50
40
30
20
10
0
6.0
5.0
4.0
3.0
2.0
1.0
0
T
V
= +25°C
= ±15V
ΩT = +25°C
A
A
T
V
= +25°C
= ±15V
OR
A
V
= ±15V
S
S
S
S
R
= 2kΩ
L
V
= +3\+5V
60
50
NEGATIVE
EDGE
A
= +10
V
40
30
20
A
= +1
V
POSITIVE
EDGE
10
0
100
0
1k
10k
100k
1M
10
100
200
300
100
1k
10k
CAPACITANCE – pF
FREQUENCY – Hz
FREQUENCY – Hz
Figure 28. Current Noise Density
vs. Frequency
Figure 29. Closed-Loop Output
Im pedance vs. Frequency
Figure 30. Sm all Signal Overshoot
vs. Load Capacitance
1S
100
90
100
90
100
90
10
10
10
0%
0%
0%
5V
1µS
5mV
50mV
200nS
Figure 33. 0.1 Hz to 10 Hz Noise
Figure 31. Large Signal Perform ance
Figure 32. Sm all Signal Perform ance
@ ± 2.5 V
@ ±15 V
@ ±15 V
OP283
V
= ±2.5V
S
600Ω
A
V
= +1
= 1V
RF = 0
V
1S
1kΩ
2kΩ
5kΩ
IN
RMS
80kHz LOW PASS FILTER
100
90
10Ω
10
0%
NO LOAD
5mV
FREQUENCY – Hz
Figure 34. 0.1 Hz to 10 Hz Noise
Figure 35. THD + Noise vs. Frequency for Various Loads
@ ±15 V
–8–
REV. B
OP183/OP283
AP P LICATIO NS
+5 Volt O nly Ster eo D AC for Multim edia
T he OP283’s low noise and single supply capability are ideally
suited for stereo DAC audio reproduction or sound synthesis
applications such as multimedia systems. Figure 38 shows an 18-bit
stereo DAC output setup that is powered from a single +5 volt
supply. T he low noise preserves the 18-bit dynamic range of the
AD1868. For DACs that operate on dual supplies, the OP283 can
also be powered from the same supplies.
O P 183 O ffset Adjust
Figure 36 shows how the OP183’s offset voltage can be adjusted by
connecting a potentiometer between Pins 1 and 5, and connecting
the wiper to VEE. T he recommended value for the potentiometer is
10 kΩ. T his will give an adjustment range of approximately ±1 mV.
If larger adjustment span is desired, a 50 kΩ potentiometer will
yield a range of ±2.5 mV.
V
CC
+5V SUPPLY
7
AD1868
18-BIT
DAC
VBL
VOL
3
V
L
1
16
15
14
13
8
3
2
220µF
6
OP183
V
LEFT
CHANNEL
OUTPUT
2
3
OS
1
LL
DL
1/2 OP283
4
Ω9.76kΩ
Ω7.68k
4
18-BIT
SERIAL
REG.
2
Ω
47kΩ
5
1
V
REF
V
100pF
330pF
EE
4
CK
Ω7.68kΩ
5
6
7
8
AGND 12
11
DR
LR
18-BIT
SERIAL
REG.
VREF
Ω7.68kΩ
VOR
10
DGND
18-BIT
100pF
7
Ω7.68kΩ
VBR
9
DAC
6
V
S
220µF
RIGHT
CHANNEL
OUTPUT
Ω9.76kΩ
330pF
1/2 OP283
5
Figure 36. OP183 Offset Adjust
P hase Rever sal
47kΩ
T he OP183 family is protected against phase reversal as long as
both of the inputs are within the range of the positive supply and
the negative supply minus 0.6 volts. However if there is a possibility
of either input going beyond these limits, then the inputs should be
protected with a series resistor to limit input current to 2 mA.
Figure 38. +5 Volt Only 18-Bit Stereo DAC
Low Voltage H eadphone Am plifier s
Figure 39 shows a stereo headphone output amplifier for the
AD1849 16-bit SoundPort Stereo Codec device. T he pseudo-
reference voltage is derived from the common-mode voltage
generated internally by the AD1849, thus providing a convenient
bias for the headphone output amplifiers.
D ir ect Access Ar r angem ent
T he OP183/OP283 can be used in a single supply Direct Access
Arrangement (DAA) as is shown in Figure 37. T his figure shows a
portion of a typical DAA capable of operating from a single +5 volt
supply and it should also work on +3 volt supplies with minor
modifications. Amplifiers A2 and A3 are configured so that the
transmit signal T XA is inverted by A2 and is not inverted by A3.
T his arrangement drives the transformer differentially so that the
drive to the transformer is effectively doubled over a single amplifier
arrangement. T his application takes advantage of the OP183/283’s
ability to drive capacitive loads, and to save power in single supply
ΩOPTIONAL
GAIN
1kΩ
Ω5kΩ
V
REF
+5V
10µF
31
LOUT1L
220µF
Ω16Ω
HEADPHONE
LEFT
L VOLUME
CONTROL
1/2 OP283
Ω10kΩ
Ω47kΩ
applications.
+5V
300pF
AD1849
Ω37.4kΩ
V
1/2 OP283
REF
0.1µF
A1
Ω20kΩ
RXA
OP283
19
CMOUT
LOUT1R
0.0047µF
Ω20kΩ
Ω10kΩ
220µF
Ω16Ω
HEADPHONE
RIGHT
Ω3.3kΩ
1/2 OP283
29
A2
Ω475Ω
Ω47kΩ
R VOLUME
CONTROL
10µF
OP283
Ω5kΩ
Ω22.1kΩ
OPTIONAL
GAIN
Ω1kΩ
0.1µF
TXA
750pF
V
0.33µF
REF
Ω20kΩ
Ω20kΩ
Ω20kΩ
Figure 39. Headphone Output Am plifier for Multim edia
Sound Codec
A3
OP283
SoundPort is a registered trademark of Analog Devices Inc.
2.5V
REF
Figure 37. Direct Access Arrangem ent
REV.B
–9–
OP183/OP283
Low Noise Micr ophone Am plifier for Multim edia
T he OP183 family is ideally suited as a low noise microphone
preamp for low voltage audio applications. Figure 40 shows a gain
of 100 stereo preamp for the AD1849 16-bit SoundPort Stereo
Codec chip. T he common-mode output buffer serves as a “phan-
tom power” driver for the microphones.
bandwidth and is not sensitive to false-ground perturbations. T he
simple false-ground circuit shown achieves good rejection of low
frequency interference using standard off-the-shelf components.
Amplifier A3 biases A1 and A2 to the middle of their input
common-mode range. When operating on a +3 V supply, the
center of the OP283’s common-mode range is 0.75 V. T his notch
filter effectively squelches 60 Hz pickup at a filter Q of 0.75. T o
reject 50 Hz interference, simply change the resistors in the twin-T
section (R1 through R5) from 2.67 kΩ to 3.16 kΩ.
Ω10kΩ
+5V
T he filter section uses an OP283 dual op amp in a twin-T configu-
ration whose frequency selectivity is very sensitive to the relative
matching of the capacitors and resistors in the twin-T section.
Mylar is the material of choice for the capacitors, and the relative
matching of the capacitors and resistors determines the filter’s pass
band symmetry. Using 1% resistors and 5% capacitors produces
satisfactory results.
17
1/2 OP283
10µF
MINL
Ω50Ω
LEFT
ELECTRET
CONDENSER
MIC
Ω20Ω
Ω10kΩ
Ω100Ω
INPUT
AD1849
+5V
CMOUT
19
1/2 OP213
A Low Voltage Fr equency Synthesizer for Wir eless
Tr ansceiver
Ω100Ω
Ω20Ω
Ω10kΩ
Ω50Ω
T he OP183’s low noise and the low voltage operation capability
serves well for the loop filter of a frequency synthesizer. Figure 42
shows a typical application in a radio transceiver. T he phase noise
performance of the synthesizer depends on low noise contribution
from each component in the loop as the noise is amplified by the
frequency division factor of the prescaler.
10µF
MINR
15
1/2 OP283
RIGHT
ELECTRET
CONDENSER
MIC
INPUT
Ω10kΩ
Figure 40. Low Noise Stereo Microphone Am plifier for
Multim edia Sound CODEC
+3V
CRYSTAL
A +3 Volt 50 H z/60 H z Active Notch Filter with False Gr ound
T o process ac signals, it may be easier to use a false-ground bias
rather than the negative supply as a reference ground. T his would
reject the power-line frequency interference which oftentimes can
obscure low frequency physiological signals, such as heart rates,
blood pressures, EEGs, ECGs, et cetera.
OP183
REFERENCE
OSCILLATOR
PHASE
DETECTOR
V
CONTROL
÷
RF
OUT
VCO
PRESCALER
VARACTER
DIODE
Ω
R2
2.67kΩ
900MHz
+3V
ΩR1
2.67kΩ
C2
1µF
C1
1µF
1/2 OP283
Figure 42. A Low Voltage Frequency Synthesizer for a
Wireless Transceiver
2
3
8
1
5
A1
4
VO
7
VIN
ΩR3
2.67kΩ
ΩR4
2.67kΩ
A2
6
T he resistors used in the low-pass filter should be of low to
moderate values to reduce noise contribution due to the input bias
current as well as the resistors themselves. T he filter cutoff
frequency should be chosen to optimize the loop constant.
ΩR6
10kΩ
Ω
×C3
2µF
(1µF × 2)
R5
1/2 OP283
1.33kΩ
(2.67kΩ ÷ 2)
ΩR7
1kΩ
ΩR8
1kΩ
ΩR11
10kΩ
Ω
Q = 0.75
NOTE: FOR 50Hz APPLICATIONS
C5
0.015µF
+3V
CHANGE R1–R4 TO 3.1kΩ
AND R5 TO 1.58kΩ (3.16kΩ ÷ 2).
ΩR12
70Ω
2
3
ΩR9
75kΩ
1
A3
OP183
0.75V
C6
1µF
C4
1µF
ΩR10
25kΩ
A1, A2, AND A3 = 1/2 OP283
Figure 41. +3 Volt Supply 50 Hz/60 Hz Notch Filter with
Pseudo Ground
Figure 41 shows a 50 Hz/60 Hz active notch filter for eliminating
line noise in patient monitoring equipment. It has several kilohertz
–10–
REV. B
OP183/OP283
7
QB9
RB4
QB6
RB5
QB7
RB6
QB8
QB10
QB11
Q7
Q8
RB3
R9
Q12
R1
R2
QD2
CC2
Q6
Q1
Q2
Q5
2
3
CC3
JB1
QD1
Z1
R8
6
CF1
Q4
R5
QB5A
Q3
QD3
CB1
1
5
QB4
A
CO
R7
QB3
QB1
R3A
B
R4A
R4B
Q11
R10
R11
CC1
Q10
QB13
QB14
QB2
R3AT
R3B
R4AT
R4LT
QB12
R3LT
RB2
RB1
4
Figure 43. OP183 Sim plified Schem atic
G1
R5
C2
D1
D2
E1
V2
*
98
9
9
9
(4,5) 6.28E-4
1.59E9
10E-12
DX
* OP283 SPICE Macro-model
*
*
* Copyright 1993 by Analog Devices
*
* Refer to “README.DOC” file for License Statement.
* Use of this model indicates your acceptance of the terms and
* provisions in the License Statement.
*
Rev. A, 9/93
JCB/ADI
98
98
10
9
98
11
9
11
10
50
DX
POLY(1) 99 98 -1.35 1.03
–0.63
* COMMON MODE ST AGE WIT H ZERO AT 353 Hz
*
* Node assignments
ECM
R7
C4
R8
*
*POLE AT 20 MHz
*
GP2
RP2
CP2
*
14
14
14
15
98
15
15
98
POLY(2) (1,98) (2,98) 0 3.5 3.5
1E6
3.75E-11
1
*
*
*
*
*
*
noninverting input
|
|
|
|
|
inverting input
|
positive supply
|
|
|
|
|
|
negative supply
|
|
output
|
.SUBCKT OP283 2
*
* INPUT ST AGE AND POLE AT 600 kHz
*
1
99 50 45
98
31
31
31
98
98
(9,98) 1E-6
1E6
7.96E-15
I1
99
4
5
8
1
1E-4
6
*ZERO AT 1.5 MHz
*
Q1
Q2
CIN
R1
R2
C1
QP
QP
3
7
EZ1
RZ1
RZ2
CZ1
*
32
32
33
32
98
33
98
33
(31,98) 1E6
1E6
1
1
2
4
5
5
8
8
2
1.5PF
1591
1591
83.4E-12
1075
1075
12.5E-9
50
50
4
6
7
1
3
2
1
106E-15
R3
R4
*POLE AT 10 MHz
*
GP10
RP10
CP10
*
IOS
EOS
DC1
DC2
*
98
40
40
40
98
98
(33,98) 1E-6
1E6
15.9E-15
2
POLY(1) (15,98) 25E-6 1
36
36
DZ
DZ
* OUT PUT ST AGE
*
* GAIN ST AGE AND DOMINANT POLE AT 10 Hz
*
RO1
99
45
140
EREF
98
0
POLY(2) (99,0) (50,0) 0 0.5 0.5
REV.B
–11–
OP183/OP283
RO2
G7
G8
G9
D7
D8
V7
V8
45
45
50
98
60
62
61
98
99
99
40
50
99
45
60
61
60
98
62
50
50
41
140
D10
V5
V6
*
42
41
45
40
45
42
DX
1.2
1.5
(99,40)
(40,50)
(45,40)
DX
DX
DC 0
7.14E-3
7.14E-3
7.14E-3
* MODELS USED
*
.MODEL DX D
.MODEL DZ D(IS=1E-15 BV=7.0)
.MODEL QP PNP(BF=143)
.ENDS
DC 0
(99,50)5E-6
POLY(2) V7 V8 1.075E-3 1 1
DX
GSY
FSY
D9
O UTLINE D IMENSIO NS
Dimensions shown in inches and (mm).
8-Lead P lastic D IP (N-8)
8
5
0.280 (7.11)
0.240 (6.10)
PIN 1
1
4
0.325 (8.25)
0.430 (10.92)
0.348 (8.84)
0.300 (7.62)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
MAX
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.100
(2.54)
0.070 (1.77)
0.045 (1.15)
0.022 (0.558)
0.014 (0.356)
BSC
8-Lead Nar r ow-Body SO (SO -8)
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.2440 (6.20)
0.2284 (5.80)
0.1968 (5.00)
0.1890 (4.80)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
–12–
REV. B
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