OP492GSZ-REEL1 [ADI]
Dual/Quad Single-Supply Operational Amplifiers;
| 型号： | OP492GSZ-REEL1 |
| 厂家： | 
ADI |
| 描述： | Dual/Quad Single-Supply Operational Amplifiers |
| 文件： | 总20页 (文件大小：386K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual/Quad Single-Supply
Operational Amplifiers
OP292/OP492
PIN CONFIGURATIONS
FEATURES
Single-supply operation: 4.5 V to 33 V
Input common-mode includes ground
Output swings to ground
High slew rate: 3 V/μs
OUTA
–INA
+INA
–V
1
2
3
4
8
7
6
5
+V
OP292
OUTB
–INB
+INB
TOP VIEW
(Not to Scale)
High gain bandwidth: 4 MHz
Low input offset voltage
Figure 1. 8-Lead Narrow-Body SOIC (S-Suffix)
High open-loop gain
No phase inversion
OUTD
14
OUTA
–INA
+INA
+V
1
2
3
4
5
6
7
13 –IND
12 +IND
11 –V
OP492
APPLICATIONS
TOP VIEW
(Not to Scale)
+INB
–INB
OUTB
10 +INC
Disk drives
Mobile phones
9
8
–INC
OUTC
Servo controls
Figure 2. 14-Lead Narrow-Body SOIC (S-Suffix)
Modems and fax machines
Pagers
Power supply monitors and controls
Battery-operated instrumentation
GENERAL DESCRIPTION
The OP292/OP492 are low cost, general-purpose dual and quad
operational amplifiers designed for single-supply applications
and are ideal for 5 V systems.
The OP292/OP492 series is unity-gain stable and features an
outstanding combination of speed and performance for single-
or dual-supply operation. The OP292/OP492 provide a high
slew rate, high bandwidth, with open-loop gain exceeding
40,000 and offset voltage under 800 Ω (OP292) and 1 mV
(OP492). With these combinations of features and low supply
current, the OP292/OP492 series is an excellent choice for
battery-operated applications.
Fabricated on Analog Devices, Inc., CBCMOS process, the
OP292/OP492 series has a PNP input stage that allows the input
voltage range to include ground. A BiCMOS output stage
enables the output to swing to ground while sinking current.
The OP292/OP492 series performance is specified for single- or
dual-supply voltage operation over the extended industrial
temperature range (−40°C to +125°C).
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1993–2009 Analog Devices, Inc. All rights reserved.
OP292/OP492
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Applications....................................................................... 14
Direct Access Arrangement for Telephone Line Interface ... 14
Single-Supply Instrumentation Amplifier .............................. 14
DAC Output Amplifier.............................................................. 14
50 Hz/60 Hz Single-Supply Notch Filter................................. 15
Four-Pole Bessel Low-Pass Filter ............................................. 15
Low Cost, Linearized Thermistor Amplifier.............................. 15
Applications....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution.................................................................................. 6
Typical Performance Characteristics ............................................. 7
Applications Information .............................................................. 13
Phase Reversal............................................................................. 13
Power Supply Considerations................................................... 13
Single-Supply Ultrasonic Clamping/Limiting Receiver
Amplifier ..................................................................................... 16
Precision Single-Supply Voltage Comparator ........................ 16
Programmable Precision Window Comparator .................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
5/09—Rev. B to Rev. C
Deleted 8-Lead PDIP and 14-Lead PDIP........................Universal
Changes to Features Section and General Description Section. 1
Changed VS = 5 V to VS = 15 V.................................................... 4
Changes to Table 3 and Table 4....................................................... 6
Changes to Figure 21 Caption and Figure 24 Caption .............. 10
Changes to Figure 29...................................................................... 11
Changes to Figure 35...................................................................... 13
Deleted OP292 SPICE Macro-model Section............................. 14
Changes to Figure 38...................................................................... 14
Changes to Figure 39 and Figure 41............................................. 15
Deleted OP492 SPICE Macro-model Section............................. 16
Changes to Figure 44...................................................................... 16
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 17
10/02—Rev. A to Rev. B
Edits to Outline Dimensions......................................................... 18
1/02—Rev. 0 to Rev. A
Deleted Wafer Test Limits ............................................................... 4
Deleted Dice Characteristics........................................................... 4
Edits to Ordering Guide ................................................................ 20
Rev. C | Page 2 of 20
OP292/OP492
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 5 V, VCM = 0 V, VO = 2 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
OP292
VOS
VOS
IB
0.1
0.3
0.5
0.1
0.3
0.5
450
0.75
3.0
7
0.8
1.2
2.5
1
1.5
2.5
700
2.5
5.0
50
mV
mV
mV
mV
mV
mV
nA
μA
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
OP492
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
Input Offset Current
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
μA
nA
IOS
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
100
0.4
700
1.2
4.0
nA
μA
V
Input Voltage Range
0
Common-Mode Rejection Ratio
CMRR
AVO
VCM = 0 V to 4.0 V
75
70
65
25
10
5
95
93
90
200
100
50
2
1
6
400
1.5
2
dB
dB
dB
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 0.1 V to 4 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Large Signal Voltage Gain
V/mV
V/mV
V/mV
μV/°C
μV/Month
pA/°C
pA/°C
pA/°C
pA/°C
Offset Voltage Drift
Long-Term VOS Drift1
Bias Current Drift
ΔVOS/ΔT
ΔVOS/ΔT
ΔIB/ΔT
10
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Offset Current Drift
ΔIOS/ΔT
OUTPUT CHARACTERISTICS
Output Voltage Swing
High
VOUT
RL = 100 kΩ to GND
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to GND
4.0
3.8
3.7
4.3
4.1
3.9
8
12
280
300
8
V
V
V
mV
mV
mV
mV
mA
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to V+
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ to V+
Low
VOUT
20
20
450
550
−40°C ≤ TA ≤ +125°C
Short-Circuit Current Limit
POWER SUPPLY
ISC
5
Power Supply Rejection Ratio
PSRR
ISY
VS = 4.5 V to 30 V, VO = 2 V
−40°C ≤ TA ≤ +125°C
VO = 2 V
75
70
95
90
0.8
dB
dB
mA
Supply Current Per Amp
1.2
Rev. C | Page 3 of 20
OP292/OP492
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Slew Rate
SR
RL = 10 kΩ
−40°C ≤ TA ≤ +125°C
3
2
4
75
100
V/μs
V/μs
MHz
Degrees
dB
1
Gain Bandwidth Product
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise
GBP
φm
CS
fO = 1 kHz
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
25
15
0.7
μV p-p
nV/√Hz
pA/√Hz
Voltage Noise Density
Current Noise Density
1 Long-term offset voltage drift is guaranteed by 1,000 hours life test performed on three independent wafer lots at 125°C with LTPD of 1.3.
VS = 15 V, VCM = 0 V, VO = 2 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
OP292
1.0
1.2
1.5
1.4
1.7
2
375
0.5
7
2.0
2.5
3
2.5
2.8
3
700
1
50
100
1.2
+11
mV
mV
mV
mV
mV
mV
nA
μA
nA
nA
μA
V
dB
dB
V/mV
V/mV
V/mV
μV/°C
pA/°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
OP492
VOS
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
IB
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
20
0.4
Input Voltage Range1
Common-Mode Rejection Ratio
−11
78
75
25
10
5
CMRR
AVO
VCM = 11 V
100
95
120
75
60
4
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 10 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
ΔVOS/ΔT
ΔIB/ΔT
10
3
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL = 2 kΩ to GND
11
10
13.8
13.5
12.2
11
14.3
14.0
10.5
V
V
V
mV
mA
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to GND
−40°C ≤ TA ≤ +125°C
Short circuit to GND
Short-Circuit Current Limit
POWER SUPPLY
ISC
8
Power Supply Rejection Ratio
PSRR
ISY
VS = 2.25 V to 15 V
−40°C ≤ TA ≤ +125°C
VO = 0 V
75
70
86
83
1
dB
dB
mA
Supply Current Per Amp
1.4
Rev. C | Page 4 of 20
OP292/OP492
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Slew Rate
SR
RL =10 kΩ
−40°C ≤ TA ≤ +125°C
2.5
2
4
3
4
75
100
V/μs
V/μs
MHz
Degrees
dB
Gain Bandwidth Product
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise
GBP
φm
CS
fO = 1 kHz
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
25
15
0.7
μV p-p
nV/√Hz
pA/√Hz
Voltage Noise Density
Current Noise Density
1 Input voltage range is guaranteed by CMRR tests.
Rev. C | Page 5 of 20
OP292/OP492
ABSOLUTE MAXIMUM RATINGS
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage
33 V
−15 V to +14 V
V1
Unlimited
−65°C to +150°C
−40°C to +125°C
−65°C to +125°C
300°C
Input Voltage Range1
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature Range (Soldering, 60 sec)
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in the circuit board for the surface-mount packages.
1 For supply voltages less than 36 V, the absolute maximum input voltage is
equal to the supply voltage.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC
14-Lead SOIC
θJA
θJC
43
36
Unit
°C/W
°C/W
158
120
ESD CAUTION
Rev. C | Page 6 of 20
OP292/OP492
TYPICAL PERFORMANCE CHARACTERISTICS
160
140
120
100
80
200
V
V
= 5V
S
V
V
= 5V
S
= 0V
175
150
125
100
75
CM
= 25°C
= 0V
CM
= 25°C
T
A
T
A
720 OP AMPS
600 OP AMPS
60
40
50
20
25
0
0
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1 0.2 0.3 0.4 0.5 0.6
–500 –400 –300 –200 –100
0
100 200 300 400 500
INPUT OFFSET VOLTAGE, V (mV)
OS
INPUT OFFSET VOLTAGE, V (µV)
OS
Figure 3. OP292 Input Offset Voltage Distribution @ 5 V
Figure 6. OP492 Input Offset Voltage Distribution @ 5 V
320
280
240
200
160
120
80
240
200
160
120
80
V
V
= ±15V
S
V
V
= ±15V
S
= 0V
CM
= 0V
CM
T
= 25°C
A
T
= 25°C
A
720 OP AMPS
600 OP AMPS
40
40
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
OS
1.6
1.8
2.0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
OS
1.6
1.8
2.0
INPUT OFFSET VOLTAGE, V (mV)
INPUT OFFSET VOLTAGE, V (mV)
Figure 4. OP292 Input Offset Voltage Distribution @ 15 V
Figure 7. OP492 Input Offset Voltage Distribution @ 15 V
160
140
120
100
80
160
140
V
V
= 5V
S
V
V
= 5V
S
= 0V
CM
= 0V
CM
–40°C ≤ T ≤ +125°C
A
–40°C ≤ T ≤ +125°C
A
600 OP AMPS
600 OP AMPS
120
100
80
60
40
20
0
60
40
20
0
0
0.4
0.8
1.2
1.6
2.0
OS
2.4
2.8
3.2
3.6
4.0
0
0.5
1.0
1.5
2.0
2.5
OS
3.0
3.5
4.0
4.5
5.0
TCV (µV/°C)
TCV (µV/°C)
Figure 5. OP292 Temperature Drift (TCVOS) Distribution @ 5 V
Figure 8. OP492 Temperature Drift (TCVOS) Distribution @ 5 V
Rev. C | Page 7 of 20
OP292/OP492
200
240
210
V
V
= ±15V
S
V
V
= 5V
S
= 0V
CM
175
150
125
100
75
= 0V
CM
–40°C ≤ T ≤ +125°C
A
–40°C ≤ T ≤ +125°C
A
600 OP AMPS
180
150
120
90
600 OP AMPS
60
50
30
25
0
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
TCV (µV/°C)
OS
TCV (µV/°C)
OS
Figure 9. OP292 Temperature Drift (TCVOS) Distribution @ 15 V
Figure 12. OP492 Temperature Drift (TCVOS) Distribution @ 15 V
600
900
V
V
= 5V
= 4V
S
V
V
= 5V
= 4V
800
700
600
500
400
300
200
100
0
S
O
500
400
300
200
100
0
R = 10kΩ
L
O
R
= 10kΩ
L
R
= 2kΩ
L
R
= 2kΩ
L
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. OP492 Open-Loop Gain vs. Temperature @ 5 V
Figure 10. OP292 Open-Loop Gain vs. Temperature @ 5 V
400
350
300
250
200
150
100
50
250
200
V
V
= ±15V
= ±10V
V
V
= ±15V
= ±10V
S
S
O
O
R
= 10kΩ
L
150
100
50
R
= 10kΩ
L
R
= 2kΩ
R
= 2kΩ
L
L
0
0
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 14. OP492 Open-Loop Gain vs. Temperature @ 15 V
Figure 11. OP292 Open-Loop Gain vs. Temperature @ 15 V
Rev. C | Page 8 of 20
OP292/OP492
1.4
1.2
1.0
0.8
0.6
0.4
0.2
1.4
1.2
1.0
0.8
0.6
0.4
0.2
V
V
= ±15V
= +5V
S
S
V
V
= ±15V
= +5V
S
S
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 15. OP292 Supply Current per Amplifier vs. Temperature
Figure 18. OP492 Supply Current per Amplifier vs. Temperature
6
6
V
V
= ±15V
= ±10V
V
V
= ±15V
= ±10V
+SR
S
S
O
O
+SR
5
4
3
2
1
0
5
4
3
2
1
0
–SR
–SR
+SR
+SR
–SR
–SR
V
V
= 5V
= 0.1V, 4V
V
V
= 5V
= 0.1V, 4V
S
S
O
O
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 16. OP292 Slew Rate vs. Temperature
Figure 19. OP492 Slew Rate vs. Temperature
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
T
= 25°C
T
= 25°C
= 10kΩ
= 10kΩ
A
A
V+ = 5V
V– = 0V
R
V
S
R
L
= 10kΩ
L
GAIN
GAIN
PHASE
MARGIN
= 92°
PHASE
MARGIN
= 83°
135
+135
PHASE
PHASE
90
45
+90
+45
0
0
–45
–45
–10
–10
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. OP292/OP492 Open-Loop Gain and Phase vs. Frequency @ 5 V
Figure 20. OP292/OP492 Open-Loop Gain and Phase vs. Frequency @ 15 V
Rev. C | Page 9 of 20
OP292/OP492
50
40
30
20
10
0
50
40
30
20
10
0
T
= 25°C
A
T
= 25°C
= ±15V
V+ = 5V
V– = 0V
A
V
S
–10
–10
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. OP292/OP492 Closed-Loop Gain vs. Frequency @ 5 V
Figure 24. OP292/OP492 Closed-Loop Gain vs. Frequency @ 15 V
120
120
T
= 25°C
A
T
= 25°C
= ±15V
A
V+ = 5V
V– = 0V
V
100
80
60
40
20
0
100
80
60
40
20
0
S
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22. OP292/OP492 CMR vs. Frequency @ 5 V
Figure 25. OP292/OP492 CMR vs. Frequency @ 15 V
120
100
80
60
40
20
0
120
100
80
60
40
20
0
T
= 25°C
= 5V
T
= 25°C
V = ±15V
S
A
A
V
S
+PSSR
–PSSR
100
1k
10k
100k
1M
100
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
Figure 23. OP292/OP492 PSR vs. Frequency @ 5 V
Figure 26. OP292/OP492 PSR vs. Frequency @ 15 V
Rev. C | Page 10 of 20
OP292/OP492
4.8
4.6
4.4
4.2
4.0
3.8
15.0
14.0
V
= ±15V
R
= 100kΩ
S
L
V
= 5V
S
R
= 10kΩ
L
13.0
R
= 100kΩ
= 10kΩ
L
R
= 2kΩ
L
12.0
11.0
R
L
10.0
R
= 2kΩ
–14.0
–14.5
–15.0
L
R
= 2kΩ
L
R
= 10kΩ
L
R
= 100kΩ
L
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 27. OP292/OP492 VOUT Swing vs. Temperature @ 5 V
Figure 30. OP292/OP492 VOUT Swing vs. Temperature @ 15 V
10
600
V
V
= ±15V
= 0V
V
V
= 5V
S
S
= 0V
CM
CM
500
400
300
200
100
0
OP492
OP492
1
OP292
OP292
0.1
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 28. OP292/OP492 Input Bias Current vs. Temperature @ 5 V
Figure 31. OP292/OP492 Input Bias Current vs. Temperature @ 15 V
–40
–60
0.50
0.48
0.46
–RAIL
0.44
+15V
0.42
0.40
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
0.20
0.18
V
R
V
= +5V, ±15V
= 2kΩ
= 3V p-p
S
L
–80
–90
O
A
V
IN
–100
–110
–120
–15V
+RAIL
0
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
FREQUENCY (Hz)
V
(V)
IN
Figure 29. OP292/OP492 Channel Separation
Figure 32. OP292/OP492 IB Current vs. Common-Mode Voltage
Rev. C | Page 11 of 20
OP292/OP492
CH A 800dV FS
100dV/DIV
MKR: 16.9µV/Hz
0Hz
MKR: 1000Hz
25kHz
BW: 150Hz
Figure 33. Voltage Noise Density
Rev. C | Page 12 of 20
OP292/OP492
APPLICATIONS INFORMATION
PHASE REVERSAL
1V/DIV
The OP492 has built-in protection against phase reversal when
the input voltage goes to either supply rail. In fact, it is safe for
the input to exceed either supply rail by up to 0.6 V with no risk
of phase reversal. However, the input should not go beyond the
positive supply rail by more than 0.9 V; otherwise, the output
will reverse phase. If this condition occurs, the problem can be
fixed by adding a 5 kΩ current limiting resistor in series with
the input pin. With this addition, the input can go to more than
5 V beyond the positive rail without phase reversal.
5V
0V
10V p-p
OP492
2kΩ
4ms/DIV
Figure 35. No Negative Rail Phase Reversal, Even with Input Signal
at 5 V Below Ground
An input voltage that is as much as 5 V below the negative rail
will not result in phase reversal.
POWER SUPPLY CONSIDERATIONS
The OP292/OP492 are designed to operate equally well at single
+5 V or 15 V supplies. The lowest supply voltage recommended
is 4.5 V.
1V
100
90
5V
It is a good design practice to bypass the supply pins with a
0.1 μF ceramic capacitor. It helps improve filtering of high
frequency noise.
0V
OP492
11.8V p-p
2kΩ
10
0%
For dual-supply operation, the negative supply (V−) must be
applied at the same time, or before V+. If V+ is applied before V−,
or in the case of a loss of the V− supply, while either input is
connected to ground or another low impedance source, excessive
input current may result. Potentially damaging levels of input
current can destroy the amplifier. If this condition can exist,
simply add a l kΩ or larger resistor in series with the input to
eliminate the problem.
5µs
Figure 34. Output Phase Reverse If Input Exceeds
the Positive Supply (V+) by More Than 0.9 V
Rev. C | Page 13 of 20
OP292/OP492
TYPICAL APPLICATIONS
DIRECT ACCESS ARRANGEMENT FOR TELEPHONE
LINE INTERFACE
5V
5
8
1/2
OP292
7
V
V
IN
OUT
Figure 36 shows a 5 V single-supply transmit/receive telephone line
interface for a modem circuit. It allows full duplex transmission
of modem signals on a transformer-coupled 600 V line in a
differential manner. The transmit section gain can be set for the
specific modem device output. Similarly, the receive amplifier
gain can be appropriately selected based on the modem device
input requirements. The circuit operates on a single 5 V supply.
The standard value resistors allow the use of a SIP-packaged
resistor array; coupled with a quad op amp in a single package,
this offers a compact, low part count solution.
4
1/2
OP292
1
V
20kΩ
5kΩ
5kΩ
20kΩ
REF
40kΩ
5 +
V
=
+V
REF
OUT
R
G
R
G
Figure 37. Single-Supply Instrumentation Amplifier
In this configuration, the output can swing to near 0 V;
however, be careful because the common-mode voltage range of
the input cannot operate to 0 V. This is because of the limitation
of the circuit configuration where the first amplifier must be able to
swing below ground to attain a 0 V common-mode voltage,
which it cannot do. Depending on the gain of the instrumentation
amplifier, the input common-mode extends to within about 0.3 V
of zero. The worst-case common-mode limit for a given gain
can be easily calculated.
TX GAIN ADJUST
50kΩ
TO
TELEPHONE
LINE
0.1µF
20kΩ
TRANSMIT
TXA
300kΩ
300kΩ
1:1
T1
1/4
OP492
20kΩ
20kΩ
DAC OUTPUT AMPLIFIER
6.2V
6.2V
The OP292/OP492 are ideal for buffering the output of single-
supply DACs. Figure 38 shows a typical amplifier used to buffer
the output of a CMOS DAC that is connected for single-supply
operation. To do that, the normally current output 12-bit CMOS
DAC (R-2R ladder type) is connected backward to produce a
voltage output. This operating configuration necessitates a low
voltage reference. In this case, a 1.235 V low power reference is
used. The relatively high output impedance (10 kΩ) is buffered
by the OP292, and at the same time, gained up to a much more
usable level. The potentiometer provides an accurate gain trim
for a 4.095 V full-scale, allowing 1 mV increment per LSB of
control resolution.
1/4
OP492
5V DC
MODEM
5kΩ
100pF 5kΩ
10µF
20kΩ
5V
RX GAIN ADJUST
20kΩ 50kΩ
0.1µF
20kΩ
20kΩ
0.1µF
1/4
OP492
RECEIVE
RXA
20kΩ
The DAC8043 device comes in an 8-lead PDIP package, providing
a cost-effective, compact solution to a 12-bit analog channel.
Figure 36. Universal Direct Access Arrangement for Telephone Line Interface
5V
SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER
1/2
OP292
V
OUT
5V
A low cost, single-supply instrumentation amplifier can be built
as shown in Figure 37. The circuit uses two op amps to form a
high input impedance differential amplifier. Gain can be set by
selecting resistor RG, which can be calculated using the transfer
function equation. Normally, VREF is set to 0 V. Then the output
voltage is a function of the gain times the differential input
voltage. However, the output can be offset by setting VREF from
0 V to 4 V, as long as the input common-mode voltage of the
amplifier is not exceeded.
5V
1mV/LSB
0V – 4.095V
FS
DAC8043
V
DD
V
1
2
3
4
REF
8
7
6
5
7.5kΩ
NC
R
CLK
FB
20kΩ
1.235V
SRI
I
OUT
8.45kΩ
AD589
LD
GND
500kΩ
LD SRI CLK
DIGITAL
CONTROL
Figure 38. 12-Bit Single-Supply DAC with Serial Bus Control
Rev. C | Page 14 of 20
OP292/OP492
50 Hz/60 Hz SINGLE-SUPPLY NOTCH FILTER
5V
5V
6
Figure 39 shows a notch filter that achieves nearly 30 dB of
60 Hz rejection while powered by only a single 12 V supply.
The circuit also works well on 5 V systems. The filter uses a
twin-T configuration, whose frequency selectivity depends
heavily on the relative matching of the capacitors and resistors in
the twin-T section. Mylar is a good choice for the capacitors of
the twin-T, and the relative matching of the capacitors and resistors
determines the pass-band symmetry of the filter. Using 1%
resistors and 5% capacitors produces satisfactory results.
2
3
1/2
7
8
4
0.022µF
5kΩ
V
OP292
OUT
5
1
1/2
OP292
0.01µF
1.1kΩ 14.3kΩ
V
IN
1.78kΩ 16.2kΩ
5kΩ
100µF
2200pF
3300pF
Figure 40. Four-Pole Bessel Low-Pass Filter Using Sallen-Key Topology
LOW COST, LINEARIZED THERMISTOR AMPLIFIER
An inexpensive thermometer amplifier circuit can be implemented
using low cost thermistors. One such implementation is shown
in Figure 41. The circuit measures temperature over the range
of 0°C to 70°C to an accuracy of 0.3°C as the linearization
circuit works well within a narrow temperature range. However, it
can measure higher temperatures but at a slightly reduced accuracy.
To achieve the aforementioned accuracy, the nonlinearity of the
thermistor must be corrected. This is done by connecting the
thermistor in parallel with the 10 kΩ in the feedback loop of the
first stage amplifier. A constant operating current of 281 μA is
supplied by the resistor R1 with the 5 V reference from the
REF195 such that the self-heating error of the thermistor is
kept below 0.1°C.
The amount of rejection and the Q of the filter is solely determined
by one resistor and is shown in the table with Figure 39. The
bottom amplifier is used to split the supply to bias the amplifier
to midlevel. The circuit can be modified to reject 50 Hz by simply
changing the resistors in the twin-T section (Rl through R4)
from 2.67 kΩ to 3.16 kΩ and by changing R5 to ½ of 3.16 kΩ. For
best results, the common value resistors can be from a resistor
array for optimum matching characteristics.
R2
2.67kΩ
R1
C1
1µF
C2
1µF
12V
2.67kΩ
1/4
OP492
1/4
OP492
V
V
OUT
IN
In many cases, the thermistor is placed some distance from the
signal conditioning circuit. Under this condition, a 0.1 μF capacitor
placed across R2 will help to suppress noise pickup.
R3
2.67kΩ
R4
2.67kΩ
R6
100kΩ
R5
1.335kΩ
(2.67k ÷ 2)
C3
2µF
(1µF × 2)
R
Q
R7
1kΩ
This linearization network creates an offset voltage that is corrected
by summing a compensating current with Potentiometer P1.
The temperature dependent signal is amplified by the second
stage, producing a transfer coefficient of −10 mV/°C at the output.
8kΩ
12V
R8
100kΩ
6V
1/4
OP492
R9
100kΩ
+
C4
1µF
To calibrate, a precision decade box can be used in place of the
thermistor. For 0°C trim, the decade box is set to 32.650 kΩ,
and P1 is adjusted until the output of the circuit reads 0 V. To
trim the circuit at the full-scale temperature of 70°C, the decade
box is then set to 1.752 kΩ, and P2 is adjusted until the circuit
reads −0.70 V.
R
(kΩ)
REJECTION (dB) VOLTAGE GAIN
FILTER Q
Q
1.0
1.33
1.50
1.60
1.80
1.90
1.95
0.75
1.00
1.25
2.50
5.00
10.00
40
35
30
25
20
15
2.0
3.0
8.0
18
1
R
T
10kΩ NTC
15V
38
2
R1
17.8kΩ
2
NOTES
R1
P2
200Ω
70°CTRIM
REF195
1.0µF
1. FOR 50Hz APPLICATION CHANGE R12 TO R4 TO 3.16kΩ
AND R5 TO 1.58kΩ (3.16kΩ ÷ 2)
17.8kΩ
R3
10kΩ
R6
7.87kΩ
1µF
1/2
Figure 39. Single-Supply 50 Hz/60 Hz Notch Filter
OP292
5V
R4
41.2kΩ
1/2
OP292
FOUR-POLE BESSEL LOW-PASS FILTER
V
OUT
–10mV/°C
R5
The linear phase filter in Figure 40 is designed to roll off at a
voice-band cutoff frequency of 3.6 kHz. The four poles are
formed by two cascading stages of 2-pole Sallen-Key filters.
806kΩ
P1
10kΩ
0°CTRIM
1
2
R
= ALPHATHERMISTOR 13A1002-C3.
T
R1 = 0.1% IMPERIAL ASTRONICS M015.
NOTES
1. ALL RESISTORS ARE 1%, 25ppm/°C EXCEPT R5 = 1%, 100ppm/°C.
Figure 41. Low Cost Linearized Thermistor Amplifier
Rev. C | Page 15 of 20
OP292/OP492
SINGLE-SUPPLY ULTRASONIC
CLAMPING/LIMITING RECEIVER AMPLIFIER
PRECISION SINGLE-SUPPLY VOLTAGE
COMPARATOR
Figure 42 shows an ultrasonic receiver amplifier using the
nonlinear impedance of low cost diodes to effectively control
the gain for wide dynamic range. This circuit amplifies a 40 kHz
ultrasonic signal through a pair of low cost clamping amplifiers
before feeding a band-pass filter to extract a clean 40 kHz signal
for processing.
The OP292/OP492 have excellent overload recovery characteristics,
making them suitable for precision comparator applications.
Figure 43 shows the saturation recovery characteristics of the
OP492. The amplifier exhibits very little propagation delay. The
amplifier compares a signal to precisely <0.5 mV offset error.
1V
The signal is ac-coupled into the false-ground bias node by
virtue of the capacitive piezoelectric sensing element. Rather
than using an amplifier to generate a supply splitting bias, the
false ground voltage is generated by a low cost resistive voltage
divider.
100
90
+5V
1kΩ
3V p-p
OP492
2kΩ
–15V
Each amplifier stage provides ac gain while passing on the dc
self-bias. As long as the output signal at each stage is less than
the forward voltage of a diode, each amplifier has unrestricted
gain to amplify low level signals. However, as the signal strength
increases, the feedback diodes begin to conduct, shunting
the feedback current, and thus reducing the gain. Although
distorting the waveform, the diodes effectively maintain a
relatively constant amplitude even with large signals that
otherwise would saturate the amplifier. In addition, this design
is considerably more stable than the feedback type AGC.
10
0%
20kΩ
2.21kΩ
5V
5µs
Figure 43. OP492 Has Fast Overload Recovery for Comparator Applications
PROGRAMMABLE PRECISION WINDOW
COMPARATOR
The OP292/OP492 can be used for precise level detection, such
as in test equipment where a signal is measured within a range
(see Figure 44). A pair of 12-bit DACs sets the threshold voltage
level. The DACs have serial interface, which minimizes
interconnection requirements. The DAC8512 has a control
resolution of 1 mV/bit. Therefore, for 5 V supply operation, the
maximum DAC output is 4.095 V. However, the OP292 accepts
a maximum input of 4.0 V.
The overall circuit has a gain range from −2 to −400, where the
inversion comes from the band-pass filter stage. Operating with
a Q of 5, the filter restores a clean, undistorted signal to the output.
The circuit also works well with 5 V supply systems.
12V
5V
68pF
5V
600kΩ
12V
DAC8512
3
12V
8
RECEIVER
1
2
3
8
7
1
1/2
OP292
7.5V
DAC
REF
1/4
OP492
56.2kΩ
2
1MΩ
14kΩ
CS
CLK
SDI
DECODE
HIGH
1/4
OP492
4
1/4
OP492
68pF
6
5
V
OUT
CONTROL
PANASONIC
EFR-RTB40K2
4
12V
600kΩ
7.5V
LD
390kΩ
100kΩ
10kΩ
10kΩ
0.01µF
CLR
6.04kΩ
1MΩ
1µF
5V
0.01µF
0.01µF
DAC8512
6
5
1
8
7
6
5
1/2
OP292
7
REF
DAC
2
3
4
Figure 42. 40 kHz Ultrasonic Clamping/Limiting Receiver Amplifier
LOW
CONTROL
ANALOG
INPUT
Figure 44. Programmable Window Comparator with
12-Bit Threshold Level Control
Rev. C | Page 16 of 20
OP292/OP492
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
0.50 (0.0197)
0.25 (0.0098)
45°
BSC
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 46. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
OP292GS
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
8-Lead Narrow Body SOIC_N
8-Lead Narrow Body SOIC_N
8-Lead Narrow Body SOIC_N
8-Lead Narrow Body SOIC_N
14-Lead Narrow Body SOIC_N
14-Lead Narrow Body SOIC_N
14-Lead Narrow Body SOIC_N
14-Lead Narrow Body SOIC_N
R-8
R-8
R-8
R-8
OP292GS-REEL
OP292GSZ1
OP292GSZ-REEL1
OP492GS
R-14
R-14
R-14
R-14
OP492GS-REEL
OP492GSZ1
OP492GSZ-REEL1
1 Z = RoHS Compliant Part.
Rev. C | Page 17 of 20
OP292/OP492
NOTES
Rev. C | Page 18 of 20
OP292/OP492
NOTES
Rev. C | Page 19 of 20
OP292/OP492
NOTES
©1993–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00310-0-5/09(C)
Rev. C | Page 20 of 20
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