OP777AR [ADI]

Precision Micropower Single Supply Operational Amplifier; 精密微功耗单电源运算放大器
OP777AR
型号: OP777AR
厂家: ADI    ADI
描述:

Precision Micropower Single Supply Operational Amplifier
精密微功耗单电源运算放大器

运算放大器 放大器电路 光电二极管
文件: 总12页 (文件大小:163K)
中文:  中文翻译
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Precision Micropower  
Single Supply  
Operational Amplifier  
a
OP777  
FUNCTIONAL BLOCK DIAGRAMS  
8-Lead MSOP  
FEATURES  
Low Offset Voltage: 100 V Max  
Low Input Bias Current: 10 nA Max  
Single-Supply Operation: 2.7 V to 30 V  
Dual-Supply Operation: 1.35 V to 15 V  
Low Supply Current: 270 A/Amp  
Unity Gain Stable  
(RM Suffix)  
NC  
IN  
IN  
Vꢀ  
1
8
NC  
V+  
OUT  
NC  
OP777  
4
5
NC = NO CONNECT  
No Phase Reversal  
8-Lead SOIC  
(R Suffix)  
APPLICATIONS  
Precision Current Measurement  
Line or Battery-Powered Instrumentation  
Remote Sensors  
NC  
NC  
V+  
1
2
3
4
8
7
6
5
IN  
+IN  
Vꢀ  
OP777  
Precision Filters  
OUT  
NC  
NC = NO CONNECT  
GENERAL DESCRIPTION  
The OP777 is a precision single supply amplifier featuring  
micropower operation and rail-to-rail output ranges. This ampli-  
fier provides improved performance over the industry-standard  
OP07 with 15 V supplies and offers the further advantage of  
true single supply operation down to 2.7 V, and smaller package  
footprint than any other high-voltage precision bipolar amplifier.  
Outputs are stable with capacitive loads of over 1000 pF. Supply  
current is less than 300 µA per amplifier at 5 V. 500 series resis-  
tors protect the inputs, allowing input signal levels to exceed either  
power supply rail by up to 3 V without causing phase reversal of the  
output signal or causing damage to the amplifier. The proprietary  
fabrication process yields a very low-voltage noise corner frequency  
under 10 Hz, greatly improving the low-frequency noise perfor-  
mance of the OP07 and similar amplifiers. The specially fabricated  
input PNP transistors operate with very low input bias currents while  
allowing operation with large differential voltages, eliminating a  
common limitation of many precision amplifiers and enabling  
application of the OP777 in precision comparator and rectifier  
circuits. This large differential voltage capability also further reduces  
the need for external protection devices such as clamping diodes.  
Applications for these amplifiers include both line powered and  
portable instrumentation, remote sensor signal conditioning, and  
precision filters.  
The OP777 is specified over the extended industrial (–40°C to  
+85°C) temperature range and is available in 8-lead MSOP and  
8-lead SOIC packages. The OP777 uses a standard operational  
amplifier pinout, allowing for easy drop-in replacement of lower  
performance amplifiers in most circuits. Surface mount devices  
in MSOP packages are available in tape and reel only.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  
OP777–SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS (VS = 5.0 V, VCM = 2.5 V, TA = 25C unless otherwise noted)  
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
100  
200  
11  
2
4
µV  
–40°C TA +85°C  
–40°C TA +85°C  
–40°C TA +85°C  
µV  
Input Bias Current  
Input Offset Current  
Input Voltage Range  
IB  
IOS  
nA  
nA  
V
0
Common-Mode Rejection Ratio  
Large Signal Voltage Gain  
Offset Voltage Drift  
CMRR  
AVO  
VOS/T  
VCM = 0 V to 4 V  
RL = 10 k, VO = 0.5 V to 4.5 V  
–40°C TA +85°C  
104  
300  
110  
500  
0.3  
dB  
V/mV  
µV/°C  
1.3  
OUTPUT CHARACTERISTICS  
Output Voltage High  
Output Voltage Low  
VOH  
VOL  
IOUT  
IL = 1 mA, –40°C TA +85°C  
IL = 1 mA, –40°C TA +85°C  
VDROPOUT < 1 V  
4.88  
120  
V
mV  
mA  
140  
Short Circuit Limit  
10  
POWER SUPPLY  
Power Supply Rejection Ratio  
Supply Current/Amplifier  
PSRR  
ISY  
VS = 3 V to 30 V  
VO = 0 V  
–40°C TA +85°C  
130  
270  
dB  
µA  
µA  
270  
320  
DYNAMIC PERFORMANCE  
Slew Rate  
Gain Bandwidth Product  
SR  
GBP  
RL = 2 kΩ  
0.2  
0.7  
V/µs  
MHz  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
enp-p  
en  
in  
0.1 Hz to 10 Hz  
f = 1 kHz  
f = 1 kHz  
0.4  
15  
0.13  
µVp-p  
nV/Hz  
pA/Hz  
Specifications subject to change without notice.  
–2–  
REV. 0  
OP777  
ELECTRICAL CHARACTERISTICS (VS = 15.0 V, VCM = 0 V, TA = 25C unless otherwise noted)  
Parameter  
Symbol  
Conditions  
Min  
Typ Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
100  
200  
10  
2
+14  
µV  
–40°C TA +85°C  
–40°C TA +85°C  
–40°C TA +85°C  
µV  
Input Bias Current  
Input Offset Current  
Input Voltage Range  
Common-Mode Rejection Ratio  
Large Signal Voltage Gain  
Offset Voltage Drift  
IB  
IOS  
nA  
nA  
V
dB  
V/mV  
µV/°C  
–15  
110  
1,000 2,500  
0.3  
CMRR  
AVO  
VOS/T  
V
CM = –15 V to +14 V  
120  
RL = 10 k, VO = –14.5 V to +14.5 V  
–40°C TA +85°C  
1.3  
OUTPUT CHARACTERISTICS  
Output Voltage High  
Output Voltage Low  
VOH  
VOL  
IOUT  
IL = 1 mA, –40°C TA +85°C  
IL = 1 mA, –40°C TA +85°C  
14.9  
V
V
mA  
–14.9  
Short Circuit Limit  
30  
POWER SUPPLY  
Power Supply Rejection Ratio  
Supply Current/Amplifier  
PSRR  
ISY  
VS = 1.5 V to 15 V  
VO = 0 V  
–40°C TA +85°C  
120  
130  
350  
dB  
µA  
µA  
350  
400  
DYNAMIC PERFORMANCE  
Slew Rate  
Gain Bandwidth Product  
SR  
GBP  
RL = 2 kΩ  
0.2  
0.7  
V/µs  
MHz  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
enp-p  
en  
in  
0.1 Hz to 10 Hz  
f = 1 kHz  
f = 1 kHz  
0.4  
15  
0.13  
µVp-p  
nV/Hz  
pA/Hz  
Current Noise Density  
Specifications subject to change without notice.  
REV. 0  
–3–  
OP777  
ABSOLUTE MAXIMUM RATINGS*  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V  
Input Voltage . . . . . . . . . . . . . . . . . . . . . VS– – 3 V to VS+ + 3 V  
1
Package Type  
JA  
JC  
Unit  
8-Lead MSOP (RM)  
8-Lead SOIC (R)  
190  
158  
44  
43  
°C/W  
°C/W  
Differential Input Voltage . . . . . . . . . . . . . .  
Supply Voltage  
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite  
Storage Temperature Range  
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Operating Temperature Range  
NOTE  
1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered  
in circuit board for surface-mount packages.  
OP777 . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C  
Junction Temperature Range  
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C  
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV  
*Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those listed in the operational sections  
of this specification is not implied. Exposure to absolute maximum rating condi-  
tions for extended periods may affect device reliability.  
ORDERING GUIDE  
Temperature  
Range  
Package  
Description  
Package  
Option  
Branding  
Information  
Model  
OP777ARM  
OP777AR  
–40°C to +85°C  
–40°C to +85°C  
8-Lead MSOP  
8-Lead SOIC  
RM-8  
SO-8  
A1A  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the OP777 features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recom-  
mended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
–4–  
REV. 0  
Typical Performance Characteristics–  
OP777  
30  
220  
220  
V
V
T
= 15V  
= 0V  
= 40C TO +85C  
A
V
V
T
= 5V  
= 2.5V  
= 25C  
V
V
T
= 15V  
= 0V  
= 25C  
SY  
SY  
SY  
200  
180  
160  
200  
180  
160  
CM  
CM  
CM  
25  
20  
15  
10  
5
A
A
140  
120  
100  
80  
140  
120  
100  
80  
60  
60  
40  
40  
20  
0
20  
0
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
100  
0
20 40 60 80 100  
100  
0
20 40 60 80 100  
8060 4020  
8060 4020  
INPUT OFFSET DRIFT V/C  
OFFSET VOLTAGE – V  
OFFSET VOLTAGE V  
Figure 3. Input Offset Voltage Drift  
Distribution  
Figure 1. Input Offset Voltage  
Distribution  
Figure 2. Input Offset Voltage  
Distribution  
10k  
30  
25  
20  
15  
10  
5
10k  
1k  
V
T
= 15V  
= 25C  
V
T
= 5V  
= 25C  
S
S
V
V
= 15V  
= 0V  
= 25C  
SY  
A
A
CM  
1k  
T
A
SINK  
100  
10  
100  
10  
SOURCE  
SINK  
1.0  
1.0  
SOURCE  
0.1  
0
0.1  
0
0
0.001  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
3
5
7
4
6
8
LOAD CURRENT mA  
INPUT BIAS CURRENT nA  
LOAD CURRENT mA  
Figure 6. Output Voltage to Supply  
Rail vs. Load Current  
Figure 4. Input Bias Current  
Distribution  
Figure 5. Output Voltage to Supply  
Rail vs. Load Current  
350  
10  
5
500  
V
= 15V  
T
= 25C  
SY  
A
I
(V = 15V)  
400  
200  
100  
0
SY+ SY  
300  
250  
200  
150  
100  
50  
0
I
(V = 5V)  
SY+ SY  
5  
10  
15  
20  
25  
30  
100  
200  
300  
400  
500  
I
(V = 5V)  
SYSY  
I
(V = 15V)  
SYSY  
0
0
5
10  
15  
20  
25  
30  
35  
6040 20  
0
20 40 60 80 100 120 140  
6040 20  
0
20 40 60 80 100 120 140  
SUPPLY VOLTAGE V  
TEMPERATURE C  
TEMPERATURE C  
Figure 9. Supply Current vs.  
Supply Voltage  
Figure 7. Input Bias Current vs.  
Temperature  
Figure 8. Supply Current vs.  
Temperature  
REV. 0  
–5–  
OP777  
60  
50  
70  
60  
50  
70  
60  
50  
40  
30  
20  
10  
0
V
C
R
= 5V  
V = 15V  
SY  
V
C
R
= 15V  
SY  
SY  
= 0  
C
= 0  
= 0  
=
LOAD  
LOAD  
LOAD  
LOAD  
=
R
= 2kꢇ  
LOAD  
LOAD  
40  
0
0
A
= 100  
V
30  
45  
40  
30  
45  
20  
90  
90  
A
= 10  
V
10  
135  
180  
225  
270  
20  
10  
135  
180  
225  
270  
0
A
= +1  
V
10  
20  
30  
40  
0
10  
10  
20  
30  
20  
30  
100  
1k  
10k  
100k  
1M  
10M  
100M  
1k  
10k  
100k  
1M  
10M 100M  
10  
100 1k  
10k 100k 1M 10M 100M  
FREQUENCY Hz  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 11. Open Loop Gain and  
Phase Shift vs. Frequency  
Figure 12. Closed Loop Gain vs.  
Frequency  
Figure 10. Open Loop Gain and  
Phase Shift vs. Frequency  
300  
270  
240  
210  
180  
150  
120  
90  
300  
270  
240  
210  
180  
150  
120  
90  
60  
V
= 5V  
V
C
R
= 5V  
V
= 15V  
SY  
SY  
SY  
50  
40  
= 0  
= 2kꢇ  
A = 1  
V
LOAD  
LOAD  
A
= 100  
V
30  
A
= 1  
V
20  
A
= 10  
V
10  
0
A
= +1  
V
10  
20  
30  
40  
A
= 100  
100k  
V
60  
A
= 10  
60  
A
= 10  
V
A
= 100  
1k  
V
V
30  
30  
0
0
100  
1k  
10k  
1M  
10M 100M  
100  
10k  
100k  
1M  
10M 100M  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY Hz  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 14. Output Impedance vs.  
Frequency  
Figure 15. Output Impedance vs.  
Frequency  
Figure 13. Closed Loop Gain vs.  
Frequency  
V
R
C
= 15V  
= 2kꢇ  
= 300pF  
V
C
R
= 2.5V  
= 300pF  
= 2kꢇ  
V
R
C
= 2.5V  
= 2kꢇ  
= 300pF  
SY  
SY  
SY  
L
L
L
L
L
L
V
= 100mV  
IN  
TIME 100s/DIV  
TIME 10s/DIV  
TIME 100s/DIV  
Figure 17. Large Signal Transient  
Response  
Figure 18. Small Signal Transient  
Response  
Figure 16. Large Signal Transient  
Response  
–6–  
REV. 0  
OP777  
40  
35  
30  
25  
20  
15  
10  
5
35  
30  
25  
20  
V
= 2.5V  
= 2kꢇ  
= 100mV  
V
= 15V  
= 2kꢇ  
L
= 100mV  
V
= 15V  
= 300pF  
= 2kꢇ  
SY  
SY  
SY  
R
V
R
V
C
R
V
L
L
L
IN  
IN  
= 100mV  
IN  
+OS  
OS  
15  
10  
5
0
0
1
10  
100  
1k  
1
10  
100  
1k  
10k  
TIME 10s/DIV  
CAPACITANCE pF  
CAPACITANCE pF  
Figure 19. Small Signal Transient  
Response  
Figure 20. Small Signal Overshoot  
vs. Load Capacitance  
Figure 21. Small Signal Overshoot  
vs. Load Capacitance  
V
A
= 15V  
= 1  
S
INPUT  
INPUT  
V
+200mV  
INPUT  
0V  
0V  
OUTPUT  
V
R
A
= 15V  
= 10kꢇ  
= 100  
V
R
A
= 2.5V  
= 10kꢇ  
= 100  
SY  
SY  
200mV  
L
L
V
V
V
= 200mV  
V
= 200mV  
IN  
IN  
+2V  
0V  
0V  
2V  
OUTPUT  
OUTPUT  
TIME 400s/DIV  
TIME 40s/DIV  
TIME 40s/DIV  
Figure 22. Positive Overvoltage  
Recovery  
Figure 23. Negative Overvoltage  
Recovery  
Figure 24. No Phase Reversal  
140  
140  
140  
120  
100  
80  
V
= 2.5V  
V
= 15V  
SY  
SY  
V
= 2.5V  
SY  
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
+PSRR  
PSRR  
60  
40  
20  
0
10  
100  
1k  
10k 100k  
1M  
10M  
10  
100  
1k  
10k 100k  
1M  
10M  
10  
100  
1k  
10k 100k  
1M  
10M  
FREQUENCY Hz  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 25. CMRR vs. Frequency  
Figure 26. CMRR vs. Frequency  
Figure 27. PSRR vs. Frequency  
REV. 0  
–7–  
OP777  
140  
120  
100  
80  
V
= 15V  
V
= 5V  
V
= 15V  
SY  
SY  
GAIN = 10M  
SY  
GAIN = 10M  
+PSRR  
PSRR  
60  
40  
20  
0
10  
100  
1k  
10k 100k  
1M  
10M  
TIME 1s/DIV  
TIME 1s/DIV  
FREQUENCY Hz  
Figure 28. PSRR vs. Frequency  
Figure 29. 0.1 Hz to 10 Hz Input  
Voltage Noise  
Figure 30. 0.1 Hz to 10 Hz Input  
Voltage Noise  
90  
90  
80  
70  
90  
V
= 2.5V  
V
= 15V  
SY  
V
= 15V  
SY  
SY  
80  
70  
80  
70  
60  
50  
40  
30  
20  
10  
60  
50  
40  
30  
20  
10  
60  
50  
40  
30  
20  
10  
0
100  
200  
300  
400  
500  
0
100  
200  
300  
400  
500  
0
50  
100  
150  
200  
250  
FREQUENCY Hz  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 31. Voltage Noise Density  
Figure 32. Voltage Noise Density  
Figure 33. Voltage Noise Density  
50  
50  
40  
V = 5V  
SY  
V
= 15V  
V
= 2.5V  
SY  
SY  
40  
40  
35  
30  
30  
20  
30  
20  
I
SCꢀ  
I
SCꢀ  
25  
20  
15  
10  
5
10  
0
10  
0
10  
10  
20  
30  
20  
30  
I
SC+  
I
SC+  
40  
50  
40  
50  
0
0
500  
1k  
1.5k  
2.0k  
2.5k  
6040 20  
0
20 40 60 80 100 120 140  
6040 20  
0
20 40 60 80 100 120 140  
FREQUENCY Hz  
TEMPERATURE C  
TEMPERATURE C  
Figure 35. Short Circuit Current vs.  
Temperature  
Figure 36. Short Circuit Current vs.  
Temperature  
Figure 34. Voltage Noise Density  
–8–  
REV. 0  
OP777  
160  
150  
140  
130  
120  
110  
100  
4.95  
4.94  
4.93  
4.92  
4.91  
4.90  
4.89  
14.964  
14.962  
14.960  
V
= 5V  
= 1mA  
V
= 5V  
SY  
SY  
I = 1mA  
L
V
= 15V  
SY  
I = 1mA  
L
I
L
14.958  
14.956  
14.954  
14.952  
14.950  
14.948  
90  
80  
70  
14.946  
14.944  
40 20  
40 20  
0
60  
0
20 40 60 80 100 120 140  
60  
20 40 60 80 100 120 140  
TEMPERATURE C  
40 20  
60  
0
20 40 60 80 100 120 140  
TEMPERATURE C  
TEMPERATURE C  
Figure 37. Output Voltage High vs.  
Temperature  
Figure 38. Output Voltage Low vs.  
Temperature  
Figure 39. Output Voltage High vs.  
Temperature  
1.5  
14.930  
V
= 15V  
SY  
= 1mA  
V
V
= 15V  
= 0V  
= 25C  
SY  
I
L
CM  
1.0  
0.5  
0
14.935  
14.940  
14.945  
T
A
0.5  
1.0  
1.5  
14.950  
14.955  
14.960  
40 20  
0
60  
20 40 60 80 100 120 140  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0  
TIME Minutes  
TEMPERATURE C  
Figure 41. Warm-Up Drift  
Figure 40. Output Voltage Low vs.  
Temperature  
REV. 0  
–9–  
OP777  
BASIC OPERATION  
100kꢇ  
The OP777 amplifier uses a precision Bipolar PNP input stage  
coupled with a high-voltage CMOS output stage. This enables  
this amplifier to feature an input voltage range which includes the  
negative supply voltage (often ground-in single-supply applications)  
and also swing to within 1 mV of the output rails. Additionally, the  
input voltage range extends to within 1 V of the positive supply rail.  
The epitaxial PNP input structure provides high breakdown voltage,  
high gain, and input bias current figure comparable to that obtained  
with “Darlington” input stage amplifier but without the drawbacks  
(i.e., severe penalties for input voltage range, offset, drift and noise).  
PNP input structure also greatly lowers the noise and reduces the dc  
input error terms.  
100kꢇ  
+3V  
0.27V  
100kꢇ  
OP777  
100kꢇ  
0.1V  
V
= 1kHz at 400mV p-p  
IN  
Figure 43. OP777 Configured as a Difference Amplifier  
Operating at VCM < 0 V  
Input Over Voltage Protection  
When the input of an amplifier is more than a diode drop below  
Supply Voltage  
The amplifiers are fully specified with a single 5 V supply and, due  
to design and process innovations, can also operate with a supply  
voltage from 2.7 V up to 30 V. This allows operation from most  
split supplies used in current industry practice, with the advantage  
of substantially increased input and output voltage ranges over  
conventional split-supply amplifiers. The OP777 series is specified  
with (VSY = 5 V, V– = 0 V and VCM = 2.5 V which is most suitable  
for single supply application. With PSRR of 130 dB (0.3 µV/V) and  
CMRR of 110 dB (3 µV/V) offset is minimally affected by power  
supply or common-mode voltages. Dual supply, 15 V operation  
is also fully specified.  
V
EE, large currents will flow from the substrate (V– pin) to the  
input pins which can destroy the device. In the case of OP777,  
differential voltage equal to the supply voltage will not cause any  
problem (see Figure 44). OP777 has built in 500 internal current  
limiting resistors, in series with the inputs, to minimize the chances  
of damage. It is a good practice to keep the current flowing into the  
inputs below 5 mA. In this context it should also be noted that the  
high breakdown of the input transistors removes the necessity for  
clamp diodes between the inputs of the amplifier; a feature that is  
mandatory on many precision op amps. Unfortunately, such  
clamp diodes greatly interfere with many application circuits such  
as precision rectifiers and comparators. The OP777 series is free  
from such limitations.  
Input Common-Mode Voltage Range  
The OP777 is rated with an input common-mode voltage which  
extends from minus supply to 1 V of the Positive supply. However,  
the amplifier can still operate with input voltages slightly below  
VEE. In Figure 43, OP777 is configured as a difference amplifier  
with a single supply of 2.7 V and negative dc common-mode volt-  
ages applied at the inputs terminals. A 400 mV p-p input is then  
applied to the noninverting input. It can be seen from the graph  
below that the output does not show any distortion. Micropower  
operation is maintained by using large input and feedback resistors.  
30V  
OP777  
V p-p = 32 V  
Figure 44a. Unity Gain Follower  
V
= 15V  
SY  
V
OUT  
V
IN  
0V  
V
OUT  
V
IN  
TIME 0.2ms/DIV  
Figure 42. Input and Output Signals with VCM < 0 V  
TIME 400s/DIV  
Figure 44b. Input Voltage Can Exceed the Supply Voltage  
Without Damage  
–10–  
REV. 0  
OP777  
Phase Reversal  
Output Short Circuit  
Many amplifiers misbehave when one or both of the inputs are  
forced beyond the input common-mode voltage range. Phase  
reversal is typified by the transfer function of the amplifier, effectively  
reversing its transfer polarity. In some cases this can cause lockup in  
servo systems and may cause permanent damage or nonrecoverable  
parameter shifts to the amplifier. Many amplifiers feature compensa-  
tion circuitry to combat these effects, but some are only effective for  
the inverting input. Additionally, many of these schemes only work  
for a few hundred millivolts or so beyond the supply rails. OP777  
has a protection circuit against phase reversal when one or both  
inputs are forced beyond their input common voltage range. It  
is not recommended that the parts be continuously driven more  
than 3 V beyond the rails.  
The output of the OP777 series amplifier is protected from damage  
against accidental shorts to either supply voltage, provided that the  
maximum die temperature is not exceeded on a long-term basis (see  
Absolute Maximum Rating section). Current of up to 30 mA does  
not cause any damage.  
A Low-Side Current Monitor  
In the design of power supply control circuits, a great deal of design  
effort is focused on ensuring a pass transistor’s long-term reliability  
over a wide range of load current conditions. As a result, monitoring  
and limiting device power dissipation is of prime importance in  
these designs. Figure 48 shows an example of 5 V, single supply  
current monitor that can be incorporated into the design of a voltage  
regulator with foldback current limiting or a high current power  
supply with crowbar protection. The design capitalizes on the  
OP777’s common-mode range that extends to ground. Current  
is monitored in the power supply return where a 0.1 shunt  
resistor, RSENSE, creates a very small voltage drop. The voltage at the  
inverting terminal becomes equal to the voltage at the noninverting  
terminal through the feedback of Q1, which is a 2N2222 or equiva-  
lent NPN transistor. This makes the voltage drop across R1 equal to  
the voltage drop across RSENSE. Therefore, the current through Q1  
becomes directly proportional to the current through RSENSE, and  
the output voltage is given by:  
V
= 15V  
SY  
V
IN  
V
OUT  
R2  
R1  
VOUT = 5V −  
× RSENSE × I  
L  
TIME 400s/DIV  
The voltage drop across R2 increases with IL increasing, so VOUT  
decreases with higher supply current being sensed. For the element  
values shown, the VOUT transfer characteristic is –2.5 V/A, decreas-  
,
Figure 45. No Phase Reversal  
Output Stage  
The CMOS output stage has excellent (and fairly symmetric) output  
drive and with light loads can actually swing to within 1 mV of both  
supply rails. This is considerably better than similar amplifiers  
featuring (so-called) rail-to-rail bipolar output stages. OP777 is  
stable in the voltage follower configuration and responds to signals  
as low as 1 mv above ground in single supply operation.  
ing from VEE  
.
5V  
2.49kꢇ  
V
OUT  
Q1  
5V  
2.7V TO 30V  
100ꢇ  
OP777  
V
= 1mV  
0.1ꢇ  
OUT  
RETURN TO  
GROUND  
V
= 1mV  
IN  
OP777  
R
SENSE  
Figure 48. A Low-Side Load Current Monitor  
Figure 46. Follower Circuit  
1.0mV  
TIME 10s/DIV  
Figure 47. Rail-to-Rail Operation  
REV. 0  
–11–  
OP777  
The OP777 can be very useful in many single supply bridge applica-  
tions. Figure 49 shows a single supply bridge circuit in which  
its output is linearly proportional to the fractional deviation ()  
of the bridge. Note that = R/R.  
A single supply current source is shown in Figure 51. Large resistors  
are used to maintain micropower operation. Output current can be  
adjusted by changing the R2B resistor. Compliance voltage is:  
VL VSAT VS  
= 300  
AR1V  
REF  
15V  
V
=
+ 2.5V  
O
2R2  
R1  
R1  
10pF  
2
=  
2.7V TO 30V  
OP777  
6
RG = 10kꢇ  
100kꢇ  
REF  
192  
2
100kꢇ  
10.1kꢇ  
1Mꢇ  
2.5V  
0.1F  
OP777  
4
3
1Mꢇ  
R1 = 100kꢇ  
REF  
192  
R2B  
15V  
2.7kꢇ  
15V  
10pF  
4
3
I
O
R1(1+)  
V1  
10.1kꢇ  
R1  
R2 = R2A + R2B  
R2  
R1 R2B  
= 1mA 11mA  
+
R2A  
97.3kꢇ  
V
O
OP777  
V
R
LOAD  
L
I
=
V
S
O
R1(1+)  
OP777  
R1  
R2  
V2  
Figure 51. Single Supply Current Source  
Figure 49. Linear Response Bridge, Single Supply  
A single supply instrumentation amplifier using two OP777 ampli-  
fiers is shown in Figure 52.  
In systems, where dual supplies are available, circuit of Figure 50  
could be used to detect bridge outputs that are linearly related to  
fractional deviation of the bridge.  
15V  
10.1kꢇ  
R2 = 1Mꢇ  
2.7V TO 30V  
2.7V TO 30V  
1kꢇ  
1Mꢇ  
REF  
192  
2N2222  
R1 = 10.1kꢇ  
OP777  
V
O
R2  
12kꢇ  
OP777  
V1  
V2  
OP777  
3
4
20kꢇ  
+15V  
R1  
R1  
R
V
= 100 (V2 V1)  
O
0.02mV V1 V2 290mV  
V
O
R(1+)  
2mV  
V
29V  
+15V  
OP777  
OUT  
USE MATCHED RESISTORS  
15V  
R2  
R1  
R  
R
V
=
V
O
REF  
Figure 52. Single Supply Micropower Instrumentation  
Amplifier  
OP777  
=  
15V  
Figure 50. Linear Response Bridge  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
8-Lead SOIC  
(RM Suffix)  
8-Lead SOIC  
(R Suffix)  
0.122 (3.10)  
0.114 (2.90)  
0.1968 (5.00)  
0.1890 (4.80)  
8
1
5
4
8
5
4
0.1574 (4.00)  
0.1497 (3.80)  
0.2440 (6.20)  
0.2284 (5.80)  
0.122 (3.10)  
0.114 (2.90)  
0.199 (5.05)  
0.187 (4.75)  
1
PIN 1  
0.0688 (1.75)  
0.0532 (1.35)  
0.0196 (0.50)  
0.0099 (0.25)  
x 45°  
0.0098 (0.25)  
0.0040 (0.10)  
PIN 1  
0.0256 (0.65) BSC  
0.120 (3.05)  
0.112 (2.84)  
0.120 (3.05)  
0.112 (2.84)  
8°  
0°  
0.0500  
(1.27)  
BSC  
0.0192 (0.49)  
0.0138 (0.35)  
0.043 (1.09)  
0.037 (0.94)  
SEATING  
PLANE  
0.0098 (0.25)  
0.0075 (0.19)  
0.0500 (1.27)  
0.0160 (0.41)  
0.006 (0.15)  
0.002 (0.05)  
33ꢄ  
0.018 (0.46)  
0.008 (0.20)  
27ꢄ  
0.028 (0.71)  
0.016 (0.41)  
0.011 (0.28)  
0.003 (0.08)  
SEATING  
PLANE  
–12–  
REV. 0  

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