SSM-2142S [ADI]
SPECIALTY ANALOG CIRCUIT, PDSO16, SOL-16;
| 型号： | SSM-2142S |
| 厂家： | 
ADI |
| 描述： | SPECIALTY ANALOG CIRCUIT, PDSO16, SOL-16 光电二极管 |
| 文件： | 总6页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
a
Balanced Line Driver
SSM2142
FUNCTIO NAL BLO CK D IAGRAM
FEATURES
Transform er-Like Balanced Output
Drives 10 V RMS Into a 600 ⍀ Load
Stable When Driving Large Capacitive Loads and Long
Cables
VIN
50Ω
Low Distortion
+OUT FORCE
0.006% typ 20 Hz–20 kHz, 10 V RMS into 600 ⍀
High Slew Rate
15 V/ s typ
+OUT SENSE
10kΩ
Low Gain Error
– OUT SENSE
(Differential or Single-Ended); 0.7% typ
Outputs Short-Circuit Protected
Available In Space-Saving 8-Pin Mini-DIP Package
Low Cost
50Ω
– OUT FORCE
APPLICATIONS
Audio Mix Consoles
ALL RESISTORS 30kΩ
Distribution Am plifiers
Graphic and Param etric Equalizers
Dynam ic Range Processors
Digital Effects Processors
Telecom m unications System s
Industrial Instrum entation
Hi-Fi Equipm ent
10kΩ
UNLESS OTHERWISE
INDICATED
GND
GENERAL D ESCRIP TIO N
Based on a cross-coupled, electronically balanced topology, the
SSM2142 mimics the performance of fully balanced
transformer-based solutions for line driving. However, the
SSM2142 maintains lower distortion and occupies much less
board space than transformers while achieving comparable
common-mode rejection performance with reduced parts count.
T he SSM2142 is an integrated differential-output buffer
amplifier that converts a single-ended input signal to a balanced
output signal pair with high output drive. By utilizing low noise
thermally matched thin film resistors and high slew rate
amplifiers, the SSM2142 helps maintain the sonic quality of
audio systems by eliminating power line hum, RF interference,
voltage drops, and other externally generated noise commonly
encountered with long audio cable runs. Excellent rejection of
common-mode noise and offset errors is achieved by laser
trimming of the onboard resistors, assuring high gain accuracy.
T he carefully designed output stage of the SSM2142 is capable
of driving difficult loads, yielding low distortion performance
despite extremely long cables or loads as low as 600 Ω, and is
stable over a wide range of operating conditions.
T he SSM2142 in tandem with the SSM2141 differential
receiver establishes a complete, reliable solution for driving and
receiving audio signals over long cables. T he SSM2141 features
an Input Common-Mode Rejection Ratio of 100 dB at 60 Hz.
Specifications demonstrating the performance of this typical
system are included in the data sheet.
REV. B
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
SSM2142–SPECIFICATIONS (V = ؎18 V, –40؇C ≤ T ≤ +85؇C, operating in differential mode unless otherwise
noted. Typical characteristics apply to operation at T = +25؇C.)
S
A
A
P aram eter
Sym bol
Conditions
Min
Typ
Max
Units
INPUT IMPEDANCE
ZIN
IIN
10
kΩ
µA
dB
dB
%
INPUT CURRENT
VIN = ±7.071 V
±750
5.98
5.94
0.7
±900
GAIN, DIFFERENT IAL
GAIN, SINGLE-ENDED
GAIN ERROR, DIFFERENT IAL
5.8
5.7
Single-Ended Mode
RL = 600 Ω
2
POWER SUPPLY REJECT ION
RAT IO ST AT IC
PSRR
OCMR
SBR
VS = ±13 V to ±18 V
60
80
dB
dB
dB
OUT PUT COMMON-MODE REJECT ION
OUT PUT SIGNAL BALANCE RAT IO
See T est Circuit; f = 1 kHz
See T est Circuit; f = 1 kHz
–38
–35
–45
–40
T OT AL HARMONIC DIST ORT ION
Plus Noise
T HD+N
20 Hz to 20 kHz,
0.006
%
VO = 10 V rms, RL = 600 Ω
SIGNAL-T O-NOISE RAT IO
HEADROOM
SNR
HR
SR
VIN = 0 V
–93.4
+93.4
15
dBu
dBu
V/µs
CLIP Level = 10.5 V rms
SLEW RAT E
OUT PUT COMMON-MODE
VOLT AGE OFFSET1
VOOS
VOOD
RL = 600 Ω
–250
–50
25
15
250
50
mV
mV
DIFFERENT IAL OUT PUT
VOLT AGE OFFSET
RL = 600 Ω
DIFFERENT IAL OUT PUT
VOLT AGE SWING
VIN = ±7.071 V
±13.8
±14.14
50
V
OUT PUT IMPEDANCE
ZO
ISY
ISC
45
55
Ω
SUPPLY CURRENT
Unloaded, VIN = 0 V
5.5
7.0
mA
mA
OUT PUT CURRENT , SHORT CIRCUIT
60
70
NOT ES
1Output common-mode offset voltage can be removed by inserting dc blocking capacitors in the sense lines. See Applications Information.
Specifications subject to change without notice.
ABSO LUTE MAXIMUM RATINGS*
P IN CO NNECTIO NS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Storage T emperature . . . . . . . . . . . . . . . . . . –60°C to +150°C
Lead T emperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
Junction T emperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Operating T emperature Range . . . . . . . . . . . . –40°C to +85°C
8-P in P lastic D IP
(P Suffix)
16-P in Wide Body SO L
(S Suffix)
16
1
NC
NC
NC
15
14
13
12
2
3
NC
Output Short Circuit Duration (Both Outputs) . . . . Indefinite
+ FORCE
+ SENSE
+V
– FORCE
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T hese are stress ratings only; the functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
4
5
– SENSE
GROUND
VIN
6
7
8
11
10
9
–V
NC
NC
NC
NC
O RD ERING GUID E
O perating
P ackage
P ackage
Model
Tem perature Range D escription O ption
SSM2142P –40°C to +85°C
SSM2142S* –40°C to +85°C
Plastic DIP
SOL
N-8
R-16
*For availability of SOIC package, contact your local sales office.
–2–
REV. B
SSM2142
300Ω
V
OUT
V
300
Ω
300Ω
300Ω
1
8
7
6
5
1
8
7
6
5
2
2
600Ω
3
4
+18V
600 Ω
3
4
+18V
–18V
V
OUT
V
–18V
= 10V p–p
V
S
= 0V
V
= 10V p–p
IN
V
CMR
∆V
OUT
SBR = 20 LOG
V
∆V
IN
OUT
OCMR = 20 LOG
V
CMR
Figure 1. Output CMR Test Circuit
Figure 2. Signal Balance Ratio (BBC Method) Test Circuit
Typical Performance Characteristics
12
140
= +25°C
= ±18V
= 600Ω
T
A
T
V
= +25°C
= ±18V
A
S
V
120
100
80
60
40
20
0
S
10
8
R
L
∆V = ±1V
S
DIFF. MODE
0.1% DISTORTION
–PSR
+PSR
0.01% DISTORTION
6
4
2
0
10
20
30
50
100
10
100
1k
10k
100k
FREQUENCY – Hz
FREQUENCY – kHz
Figure 3. Power Supply Rejection vs. Frequency
Figure 4. Maxim um Output Voltage Swing vs. Frequency
12
6.5
= +25°C
T
R
= +25°C
= 0V
IN
T
V
A
A
= 600Ω
L
10
8
6.0
5.5
5.0
4.5
4.0
3.5
DIFF. MODE
NO LOAD
FREQ. = 20kHz
0.1% DISTORTION
6
4
2
0
±2
±6
±10
±14
±18
±2
±6
±10
±14
±18
SUPPLY VOLTAGE – Volts
SUPPLY VOLTAGE – Volts
Figure 6. Supply Current vs. Supply Voltage
Figure 5. Output Voltage Swing vs. Supply Voltage
REV. B
–3–
SSM2142
TH D P ERFO RMANCE
T he following data, taken from the T HD test circuit on an
Audio Precision System One using the internal 80 kHz noise
filter, demonstrates the typical performance of a balanced pair
system based on the SSM2142/SSM2141 chip set. Both dif-
ferential and single-ended modes of operation are shown, under
a number of output load conditions which simulate various
application situations. Note also that there is no adverse effect
on system performance when using the optional series feedback
capacitors, which reject dc cable offsets in order to maintain
optimal ac noise rejection. T he large signal transient response of
the system to a 100 kHz square wave input is also shown,
demonstrating the stability of the SSM2142 under load.
+18V
A
10µF*
C
6
4
Figure 9. THD+N vs. Frequency at Point B
(Differential Mode)
V
7
IN
8
1
SSM
2142
SSM
2141
R
B
V
OUT
3
L
2
5
10µF*
R2
R1
–18V
*USED ONLY IN THD PLOTS AS NOTED.
ALL CABLE MEASUREMENTS USE BELDEN 8451 CABLE.
Figure 7. THD Test Circuit
Figure 10. THD+N vs. Frequency at Point A
(Single Ended)
Figure 8. THD+N vs. Frequency at Point B
(Differential Mode)
Figure 11. THD+N vs. Frequency at Point C
(SSM2141 Output)
–4–
REV. B
SSM2142
on-chip 50 Ω series damping resistors. T he impedances in the
output buffer pair are precisely balanced by laser trimming
during production. T his results in the high gain accuracy
needed to obtain good common-mode noise rejection, and
excellent separation between the offset error voltages common
to the cable pair and the desired differential input signal. As
shown in the test circuit, it is suggested that a suitable balanced,
high input-impedance differential amplifier such as the
SSM2141 be used at the receiving end for best system
performance. T he SSM2141 receiver output is configured for a
gain of one half following the 6 dB gain of the SSM2142, in
order to maintain an overall system gain of unity.
100
90
10
0%
In applications encountering a large dc offset on the cable or
those wishing to ensure optimal rejection performance by
avoiding differential offset error sources, dc blocking capacitors
may be employed at the sense outputs of the SSM2142. As
shown in the test circuit, these components should present as
little impedance as possible to minimize low-frequency errors,
such as 10 µF NP (or tantalum if the polarity of the offset is
known).
Figure 12. 100 kHz Square Wave Observed at Point B
(Differential Mode). VO = 10 V rm s, R1 = R2 = ∞, RL = 600 Ω
SYSTEM GRO UND ING CO NSID ERATIO NS
Due to ground currents, supply variations, and other factors,
the ground potentials of the circuits at each end of a signal cable
may not be exactly equal. T he primary purpose of a balanced
pair line is to reject this voltage difference, commonly called
“longitudinal error.” A measure of the ability of the system to
reject longitudinal error voltage is output common-mode
rejection. In order to obtain the optimal OCMR and noise
rejection performance available with the SSM2142, the user
should observe the following precautions:
100
90
10
0%
1. T he quality of the differential output is directly dependent
upon the accuracy of the input voltage presented to the
device. Input voltage errors developed across the impedance
of the source must be avoided in order to maintain system
performance. T he input of the SSM2142 should be driven
directly by an operational amplifier or buffer offering low
source impedance and low noise.
Figure 13. 100 kHz Square Wave at Point B (Differential
Mode). VO = 10 V rm s, R1 = R2 = ∞, RL = 600 Ω, with
Series Feedback Capacitors
+15V
2. T he ground input should be in close proximity to the single-
ended input’s source common. Ground offset errors encoun-
tered in the source circuitry also impair system performance.
+15V
7
6
4
3
3
2
3. Make sure that the SSM2142 is adequately decoupled with
7
2
5
V
V
IN
OUT
8
1
SSM
2141/
2143
6
SSM
2142
0.1 µF bypass capacitors located close to each supply pin.
1
4. Avoid the use of passive circuitry in series with the SSM2142
outputs. Any reactive difference in the line pair will cause
significant imbalances and affect the gain error of the device.
Snubber networks or series load resistors are not required to
maintain stability in SSM2142 based systems, even when
driving signals over extremely long cables.
SHIELDED
TWISTED-PAIR
CABLE
5
4
–15V
–15V
Figure 14. Typical Application of the SSM2142 and
SSM2141
5. Efforts should be made to maintain a physical balance in the
arrangement of the signal pair wiring. Capacitive differences
due to variations in routing or wire length may cause unequal
noise pickup between the pair, which will degrade the system
OCMR. Shielded twisted-pair cable is the preferred choice in
all applications. T he shield should not be utilized as a signal
conductor. Grounding the shield at one end, near the output
common, avoids ground loop currents flowing in the shield
which increase noise coupling and longitudinal errors.
AP P LICATIO NS INFO RMATIO N
T he SSM2142 is designed to provide excellent common-mode
rejection, high output drive, and low signal distortion and noise
in a balanced line-driving system. T he differential output stage
consists of twin cross-coupled unity gain buffer amplifiers with
REV. B
–5–
SSM2142
TH E CABLE P AIR
O UTLINE D IMENSIO NS
T he SSM2142 is capable of driving a 10 V rms signal into
600 Ω and will remain stable despite cable capacitances of up to
0.16 µF in either balanced or single-ended configurations. Low
impedance shielded audio cable such as the standard Belden
8451 or similar is recommended, especially in applications
traversing considerable distances. T he user is cautioned that the
so-called “audiophile” cables may incur four times the capac-
itance per unit length of the standard industrial-grade product.
In situations of extreme load and/or distance, adding a second
parallel cable allows the user to trade off half of the total line
resistance against a doubling in capacitive load.
D imensions shown in inches and (mm).
8-Lead P lastic D IP
8
5
0.280 (7.11)
0.240 (6.10)
1
4
0.070 (1.77)
0.045 (1.15)
0.325 (8.25)
0.300 (7.62)
0.430 (10.92)
0.348 (8.84)
0.015
(0.381) TYP
SINGLE-END ED O P ERATIO N
0.210
(5.33)
MAX
T he SSM2142 is designed to be compatible with existing
balanced-pair interface systems. Just as in transformer-based
circuits, identical but opposite currents are generated by the
output pair which can be ground-referenced if desired and
transmitted on a single wire. Single-ended operation requires
that the unused side of the output pair be grounded to a solid
return path in order to avoid voltage offset errors at the nearby
input common. T he signal quality obtained in these systems is
directly dependent on the quality of the ground at each end of
the wire. Also note that in single-ended operation the gain
through the device is still 6 dB, and that the SSM2142 incurs
no significant degradation in signal distortion or output drive
capability, although the noise rejection inherent in balanced-
pair systems is lost.
0.130
(3.30)
MIN
0.015 (0.381)
0.008 (0.203)
0.160 (4.06)
0.115 (2.92)
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0
- 15
8-Lead Cerdip
0.005 (0.13) MIN
8
0.055 (1.35) MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
P O WER SUP P LY SEQ UENCING
0.070 (1.78)
0.030 (0.76)
A problem occasionally encountered in the interface system en-
vironment involves irregular application of the supplies. T he
user is cautioned that applying power erratically can inadvert-
ently bias parts of the circuit into a latch-up condition. T he
small geometries of an integrated circuit are easily breached and
damaged by short-risetime spikes on a supply line, which usu-
ally demonstrate considerable overshoot. T he questionable
practice of exchanging components or boards while under
power can create such an undesirable sequence as well. Possible
options which offer improved board-level device protection
include: additional bypass capacitors, high-current reverse-
biased steering diodes between both supplies and ground, vari-
ous transient surge suppression devices, and safety grounding
connectors.
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200
(5.08)
MAX
0.150
(3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.100 (2.54)
BSC
0
- 15
SEATING PLANE
16-Lead Sm all O utline (SO IC)
16
1
9
8
Likewise, power should be applied to the device before the
output is connected to “live” systems which may carry voltages
of sufficient magnitude to turn on the output devices of the
SSM2142 and damage the device. In any case, of course, the
user must always observe the absolute maximum ratings shown
in the specifications.
0
- 8
0.2992 (7.60)
0.2914 (7.40)
0.4193 (10.65)
0.3937 (10.00)
0.0500 (1.27)
0.0157 (0.40)
0.0291 (0.74)
0.0098 (0.25)
x 45
0.4133 (10.50)
0.3977 (10.10)
0.0118 (0.30)
0.0040 (0.10)
0.1043 (2.65)
0.0926 (2.35)
SEE
DETAIL
ABOVE
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0125 (0.32)
0.0091 (0.23)
SEATING
PLANE
–6–
REV. B
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