SSM2017S [ADI]
Self-Contained Audio Preamplifier; 自包含的音频前置放大器
| 型号： | SSM2017S |
| 厂家： | 
ADI |
| 描述： | Self-Contained Audio Preamplifier |
| 文件： | 总8页 (文件大小：245K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Self-Contained
Audio Preamplifier
a
SSM2017
FEATURES
FUNCTIO NAL BLO CK D IAGRAM
Excellent Noise Perform ance: 950 pV/ √Hz or 1.5 dB
Noise Figure
V+
Ultralow THD: < 0.01% @ G = 100 Over the Full Audio
Band
Wide Bandw idth: 1 MHz @ G = 100
High Slew Rate: 17 V/ s typ
Unity Gain Stable
SSM2017
V–
X1
True Differential Inputs
+IN
X1
Subaudio 1/ f Noise Corner
8-Pin Mini-DIP w ith Only One External Com ponent
Required
Very Low Cost
Extended Tem perature Range: –40؇C to +85؇C
–IN
5kΩ
RG
1
5kΩ
5kΩ
5kΩ
5kΩ
RG
2
OUT
V–
5kΩ
APPLICATIONS
REFERENCE
Audio Mix Consoles
Intercom / Paging System s
Tw o-Way Radio
P IN CO NNECTIO NS
Epoxy Mini-D IP (P Suffix)
Sonar
Digital Audio System s
RG
V+
RG
1
2
3
4
8
7
6
5
2
1
–IN
SSM2017
TOP VIEW
OUT
+IN
V–
GENERAL D ESCRIP TIO N
(Not to Scale)
T he SSM2017 is a latest generation audio preamplifier, combin-
ing SSM preamplifier design expertise with advanced process-
ing. T he result is excellent audio performance from a self-
contained 8-pin mini-DIP device, requiring only one external
gain set resistor or potentiometer. T he SSM2017 is further en-
hanced by its unity gain stability.
REFERENCE
16-P in Wide Body SO L (S Suffix)
16
15
1
2
3
4
5
6
7
8
NC
RG
NC
RG
1
2
Key specifications include ultralow noise (1.5 dB noise figure)
and T HD (<0.01% at G = 100), complemented by wide band-
width and high slew rate.
14 NC
13 V+
12 NC
NC
SSM2017
–IN
+IN
NC
V–
TOP VIEW
Applications for this low cost device include microphone pream-
plifiers and bus summing amplifiers in professional and con-
sumer audio equipment, sonar, and other applications requiring
a low noise instrumentation amplifier with high gain capability.
(Not to Scale)
11 OUT
10 REFERENCE
9
NC
NC
NC = NO CONNECT
REV. C
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
World Wide Web Site: http:/ / w w w .analog.com
© Analog Devices, Inc., 1997
(V = ؎15 V and –40؇C ≤ T ≤ +85؇C, unless otherwise noted. Typical speci-
S
A
SSM2017–SPECIFICATIONS fications apply at T = +25؇C.)
A
P aram eter
Sym bol
Conditions
Min
Typ
Max
Units
DIST ORT ION PERFORMANCE
T
A = +25°C
VO = 7 V rms
RL = 5 kΩ
T otal Harmonic Distortion Plus Noise
T HD+N
G = 1000, f = 1 kHz
G = 100, f = 1 kHz
G = 10, f = 1 kHz
G = 1, f = 1 kHz
0.012
0.005
0.004
0.008
%
%
%
%
NOISE PERFORMANCE
Input Referred Voltage Noise Density
en
f = 1 kHz, G = 1000
f = 1 kHz; G = 100
f = 1 kHz; G = 10
f = 1 kHz; G = 1
0.95
1.95
11.83
107.14
2
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
Input Current Noise Density
in
f = 1 kHz, G = 1000
DYNAMIC RESPONSE
Slew Rate
SR
G = 10
10
17
V/µs
RL = 4.7 kΩ
CL = 50 pF
T
A = +25°C
Small Signal Bandwidth
BW–3 dB
G = 1000
G = 100
G = 10
G = 1
200
kHz
kHz
kHz
kHz
1000
2000
4000
INPUT
Input Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Rejection
VIOS
IB
Ios
0.1
6
1.2
25
mV
µA
µA
VCM = 0 V
VCM = 0 V
VCM = ±8 V
G = 1000
G = 100
±0.002 ±2.5
CMR
80
60
40
26
20
112
92
74
54
54
dB
dB
dB
dB
dB
G = 10
G = 1, TA = +25°C
G = 1, T A = – 40°C to +85°C
VS = ±6 V to ±18 V
G = 1000
G = 100
G = 10
Power Supply Rejection
PSR
80
60
40
26
±8
124
118
101
82
dB
dB
dB
dB
G = 1
Input Voltage Range
Input Resistance
IVR
RIN
V
Differential, G = 1000
G = 1
Common Mode, G = 1000
1
MΩ
MΩ
MΩ
MΩ
30
5.3
7.1
G = 1
OUT PUT
Output Voltage Swing
Output Offset Voltage
Minimum Resistive Load Drive
VO
VOOS
RL = 2 kΩ; T A = +25°C
±11.0
±12.3
–40
2
4.7
50
±50
V
500
10
mV
kΩ
kΩ
pF
mA
sec
T
T
A = +25°C
A = –40°C to +85°C
Maximum Capacitive Load Drive
Short Circuit Current Limit
Output Short Circuit Duration
ISC
Output-to-Ground Short
GAIN
Gain Accuracy
10 kΩ
G – 1
T A = +25°C
RG
G
=
RG = 10 Ω, G = 1000
RG = 101 Ω, G = 100
RG = 1.1 kΩ, G = 10
RG = ؕ, G = 1
0.25
0.20
0.20
0.05
70
1
1
1
0.5
dB
dB
dB
dB
dB
Maximum Gain
REFERENCE INPUT
Input Resistance
Voltage Range
10
±8
1
kΩ
V
V/V
Gain to Output
POWER SUPPLY
Supply Voltage Range
Supply Current
VS
ISY
±6
±22
±14.0
V
mA
VCM = 0 V, RL = ؕ
±10.6
Specifications subject to change without notice.
REV. C
–2–
SSM2017
Typical Performance Characteristics
Figure 2. Typical THD+ Noise * at G = 2, 10, 100, 1000;
Figure 1. Typical THD+Noise* at G = 1, 10, 100, 1000;
VO = 10 V rm s, VS = ±18 V, RL = 5 kΩ; TA = +25°C
VO = 7 V rm s, VS = ±15 V, RL = 5 kΩ; TA = +25°C
*80 kHz low-pass filter used for Figures 1-2.
ABSO LUTE MAXIMUM RATINGS
O RD ERING GUID E
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . 10 sec
Storage T emperature Range (P, Z Packages) –65°C to +150°C
Junction T emperature (TJ) . . . . . . . . . . . . . –65°C to +150°C
Lead T emperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Operating T emperature Range . . . . . . . . . . . . –40°C to +85°C
T hermal Resistance*
Tem perature
Range*
P ackage
D escription
P ackage
O ption
Model
SSM2017P
SSM2017S
–40°C to +85°C
–40°C to +85°C
SSM2017S-REEL –40°C to +85°C
8-Pin Plastic DIP
16-Lead SOL
16-Lead SOL
N-8
R-16
R-16
*XIND = –40°C to +85°C.
8-Pin Hermetic DIP (Z): θJA = 134; θJC = 12 . . . . . . °C/W
8-Pin Plastic DIP (P): θJA = 96; θJC = 37 . . . . . . . . . . °C/W
16-Pin SOIC (S): θJA = 92; θJC = 27 . . . . . . . . . . . . . °C/W
*θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for cerdip and plastic DIP; θJA is specified for device soldered to printed
circuit board for SOL package.
CAUTIO N
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2017 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C
–3–
SSM2017
Figure 4. RTI Voltage Noise Density
vs. Gain
Figure 3. Voltage Noise Density vs.
Frequency
Figure 5. Output Im pedance vs.
Frequency
Figure 7. Maxim um Output Voltage
vs. Load Resistance
Figure 6. Maxim um Output Swing
vs. Frequency
Figure 8. Input Voltage Range vs.
Supply Voltage
Figure 10. CMRR vs. Frequency
Figure 11. +PSRR vs. Frequency
Figure 9. Output Voltage Range vs.
Supply Voltage
REV. C
–4–
SSM2017
Figure 12. –PSRR vs. Frequency
Figure 14. VIOS vs. Supply Voltage
Figure 13. VIOS vs. Tem perature
Figure 15. VOOS vs. Tem perature
Figure 16. VOOS vs. Supply Voltage
Figure 17. IB vs. Tem perature
Figure 20. ISY vs. Supply Voltage
Figure 19. ISY vs. Tem perature
Figure 18. IB vs. Supply Voltage
REV. C
–5–
SSM2017
VOUT
10 k⍀
RG
G =
=
+1
(+In) – (In)
Figure 21. Bandwidth of the SSM2017 for Various Values
of Gain
Basic Circuit Connections
NO ISE P ERFO RMANCE
GAIN
T he SSM2017 is a very low noise audio preamplifier exhibiting
a typical voltage noise density of only 1 nV/√Hz at 1 kHz. T he
exceptionally low noise characteristics of the SSM2017 are in
part achieved by operating the input transistors at high collector
currents since the voltage noise is inversely proportional to the
square root of the collector current. Current noise, however, is
directly proportional to the square root of the collector current.
As a result, the outstanding voltage noise performance of the
SSM2017 is obtained at the expense of current noise perfor-
mance. At low preamplifier gains, the effect of the SSM2017’s
voltage and current noise is insignificant.
T he SSM2017 only requires a single external resistor to set the
voltage gain. T he voltage gain, G, is:
10 kΩ
RG
G =
+1
and
10 kΩ
G –1
RG
=
For convenience, T able I lists various values of RG for common
gain levels.
T he total noise of an audio preamplifier channel can be calcu-
late by:
Table I. Values of RG for Various Gain Levels
en 2 +(in RS )2 +e 2
En =
t
AV
dB
RG
where:
1
3.2
10
31.3
100
314
1000
0
NC
4.7k
1.1k
330
100
32
En = total input referred noise
en = amplifier voltage noise
in = amplifier current noise
RS = source resistance
10
20
30
40
50
60
10
et = source resistance thermal noise.
For a microphone preamplifier, using a typical microphone im-
T he voltage gain can range from 1 to 3500. A gain set resistor is
not required for unity gain applications. Metal-film or wire-
wound resistors are recommended for best results.
pedance of 150 Ω the total input referred noise is:
en = 1 nV/√Hz @ 1 kHz, SSM2017 en
in = 2 pA/√Hz @ 1 kHz, SSM2017 in
T he total gain accuracy of the SSM2017 is determined by the
tolerance of the external gain set resistor, RG, combined with the
gain equation accuracy of the SSM2017. T otal gain drift com-
bines the mismatch of the external gain set resistor drift with
that of the internal resistors (20 ppm/°C typ).
RS = 150 Ω, microphone source impedance
et = 1.6 nV/√Hz @ 1 kHz, microphone thermal noise
En =√
(1 nV√Hz)2 + 2 (pA/√Hz × 150 Ω)2 + (1.6 nV/√Hz)2
= 1.93 nV/√Hz @ 1 kHz.
Bandwidth of the SSM2017 is relatively independent of gain as
shown in Figure 21. For a voltage gain of 1000, the SSM2017
has a small-signal bandwidth of 200 kHz. At unity gain, the
bandwidth of the SSM2017 exceeds 4 MHz.
T his total noise is extremely low and makes the SSM2017
virtually transparent to the user.
REV. C
–6–
SSM2017
INP UTS
Although the SSM2017’s inputs are fully floating, care must be
exercised to ensure that both inputs have a dc bias connection
capable of maintaining them within the input common-mode
range. T he usual method of achieving this is to ground one side
of the transducer as in Figure 22a, but an alternative way is to
float the transducer and use two resistors to set the bias point as
in Figure 22b. T he value of these resistors can be up to 10 kΩ,
but they should be kept as small as possible to limit common-
mode pickup. Noise contribution by resistors themselves is neg-
ligible since it is attenuated by the transducer’s impedance. Bal-
anced transducers give the best noise immunity and interface
directly as in Figure 22c.
T he SSM2017 has protection diodes across the base emitter
junctions of the input transistors. T hese prevent accidental ava-
lanche breakdown, which could seriously degrade noise perfor-
mance. Additional clamp diodes are also provided to prevent the
inputs from being forced too far beyond the supplies.
REFERENCE TERMINAL
T he output signal is specified with respect to the reference ter-
minal, which is normally connected to analog ground. T he ref-
erence may also be used for offset correction or level shifting. A
reference source resistance will reduce the common-mode rejec-
tion by the ratio of 5 kΩ/RREF. If the reference source resis-
tance is 1 Ω, then the CMR will be reduced to 74 dB (5 kΩ/1 Ω
= 74 dB).
a. Single Ended
CO MMO N-MO D E REJECTIO N
Ideally, a microphone preamplifier responds only to the differ-
ence between the two input signals and rejects common-mode
voltages and noise. In practice, there is a small change in output
voltage when both inputs experience the same common-mode
voltage change; the ratio of these voltages is called the common-
mode gain. Common-mode rejection (CMR) is the logarithm of
the ratio of differential-mode gain to common-mode gain,
expressed in dB.
b. Pseudo Differential
P H ANTO M P O WERING
A typical phantom microphone powering circuit is shown in
Figure 23. Z1 through Z4 provide transient overvoltage protec-
tion for the SSM2017 whenever microphones are plugged in or
unplugged.
c. True Differential
Figure 22. Three Ways of Interfacing Transducers for High
Noise Im m unity
Figure 23. SSM2017 in Phantom Powered Microphone Circuit
REV. C
–7–
SSM2017
BUS SUMMING AMP LIFIER
In addition to is use as a microphone preamplifier, the SSM2017
can be used as a very low noise summing amplifier. Such a cir-
cuit is particularly useful when many medium impedance out-
puts are summed together to produce a high effective noise gain.
The principle of the summing amplifier is to ground the SSM2017
inputs. Under these conditions, Pins 1 and 8 are ac virtual
grounds sitting about 0.55 V below ground.
T o remove the 0.55 V offset, the circuit of F igure 24 is
recommended.
A2 forms a “servo” amplifier feeding the SSM2017’s inputs.
T his places Pins l and 8 at a true dc virtual ground. R4 in con-
junction with C2 remove the voltage noise of A2, and in fact just
about any operational amplifier will work well here since it is re-
moved from the signal path. If the dc offset at Pins l and 8 is not
too critical, then the servo loop can be replaced by the diode bi-
asing scheme of Figure 24. If ac coupling is used throughout,
then Pins 2 and 3 may be directly grounded.
Figure 24. Bus Sum m ing Am plifier
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
8-P in H er m etic D IP (Z) P ackage
8-P in P lastic D IP (P ) P ackage
16-P in SO IC (S) P ackage
REV. C
–8–
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