SSM2019BRNZRL [ADI]
Self-Contained Audio Preamplifier; 自包含的音频前置放大器型号: | SSM2019BRNZRL |
厂家: | ADI |
描述: | Self-Contained Audio Preamplifier |
文件: | 总10页 (文件大小:208K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Self-Contained
Audio Preamplifier
a
SSM2019
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Excellent Noise Performance: 1.0 nV/ Hz or
÷
1.5 dB Noise Figure
V+
Ultra-low THD: < 0.01% @ G = 100 Over the
Full Audio Band
Wide Bandwidth: 1 MHz @ G = 100
High Slew Rate: 16 V/ꢂs @ G = 10
10 V rms Full-Scale Input,
G = 1, VS = ꢃ18 V
V–
+IN
ꢁ1
–IN
Unity Gain Stable
5kꢀ
True Differential Inputs
RG
1
ꢁ1
5kꢀ
5kꢀ
Subaudio 1/f Noise Corner
8-Lead PDIP or 16-Lead SOIC
Only One External Component Required
Very Low Cost
RG
2
5kꢀ
5kꢀ
OUT
V–
5kꢀ
Extended Temperature Range: –40ꢄC to +85ꢄC
REFERENCE
APPLICATIONS
Audio Mix Consoles
Intercom/Paging Systems
2-Way Radio
Sonar
Digital Audio Systems
PIN CONNECTIONS
8-Lead PDIP (N Suffix)
8-Lead Narrow Body SOIC (RN Suffix)*
GENERAL DESCRIPTION
1
2
3
4
8
7
6
5
RG
V+
RG
2
1
The SSM2019 is a latest generation audio preamplifier, combin-
ing SSM preamplifier design expertise with advanced processing.
The result is excellent audio performance from a monolithic
device, requiring only one external gain set resistor or potentiom-
eter. The SSM2019 is further enhanced by its unity gain stability.
SSM2019
–IN
+IN
V–
TOP VIEW
OUT
(Not to Scale)
REFERENCE
16-Lead Wide Body SOIC (RW Suffix)
Key specifications include ultra-low noise (1.5 dB noise figure) and
THD (<0.01% at G = 100), complemented by wide bandwidth
and high slew rate.
1
2
3
4
5
6
7
8
NC
16 NC
RG
Applications for this low cost device include microphone pream-
plifiers and bus summing amplifiers in professional and consumer
audio equipment, sonar, and other applications requiring a low
noise instrumentation amplifier with high gain capability.
RG
15
1
2
NC
14 NC
SSM2019
13
12
11
10
9
–IN
+IN
NC
V–
V+
TOP VIEW
NC
(Not to Scale)
OUT
REFERENCE
NC
NC
NC = NO CONNECT
*Consult factory for availability.
A
REV.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
781/461-3113
www.analog.com
Analog Devices, Inc. All rights reserved.
2011
Fax:
©
(VS = ꢃ15 V and –40ꢄC £ TA £ +85ꢄC, unless otherwise noted. Typical specifications
SSM2019–SPECIFICATIONS apply at T = 25ꢄC.)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DISTORTION PERFORMANCE
V
O = 7 V rms
RL = 2 kW
Total Harmonic Distortion Plus Noise
THD + N
f = 1 kHz, G = 1000
f = 1 kHz, G = 100
f = 1 kHz, G = 10
f = 1 kHz, G = 1
BW = 80 kHz
0.017
%
%
%
%
0.0085
0.0035
0.005
NOISE PERFORMANCE
Input Referred Voltage Noise Density
en
f = 1 kHz, G = 1000
f = 1 kHz, G = 100
f = 1 kHz, G = 10
f = 1 kHz, G = 1
1.0
1.7
7
50
2
nV/÷Hz
nV/÷Hz
nV/÷Hz
nV/÷Hz
pA/÷Hz
Input Current Noise Density
in
f = 1 kHz, G = 1000
DYNAMIC RESPONSE
Slew Rate
SR
G = 10
16
V/ms
RL = 2 kW
CL = 100 pF
G = 1000
G = 100
G = 10
Small Signal Bandwidth
BW–3 dB
200
kHz
kHz
kHz
kHz
1000
1600
2000
G = 1
INPUT
Input Offset Voltage
Input Bias Current
Input Offset Current
Common-Mode Rejection
VIOS
IB
Ios
0.05
3
±0.001 ±1.0
0.25
10
mV
mA
mA
VCM = 0 V
V
V
CM = 0 V
CM = ±12 V
G = 1000
G = 100
G = 10
CMR
110
90
70
130
113
94
dB
dB
dB
dB
G = 1
50
74
Power Supply Rejection
PSR
VS = ±5 V to ±18 V
G = 1000
G = 100
G = 10
G = 1
110
110
90
124
118
101
82
dB
dB
dB
dB
70
Input Voltage Range
Input Resistance
IVR
RIN
±12
V
Differential, G = 1000
G = 1
Common Mode, G = 1000
G = 1
1
MW
MW
MW
MW
30
5.3
7.1
OUTPUT
Output Voltage Swing
Output Offset Voltage
Maximum Capacitive Load Drive
Short Circuit Current Limit
Output Short Circuit Duration
VO
VOOS
RL = 2 kW, TA = 25∞C
±13.5
±13.9
V
4
30
mV
pF
mA
sec
5000
±50
Continuous
ISC
Output-to-Ground Short
GAIN
Gain Accuracy
10 kW
G – 1
TA = 25∞C
RG
G
=
RG = 10 W, G = 1000
0.5
0.5
0.5
0.1
0.1
0.2
0.2
0.2
70
dB
dB
dB
dB
dB
R
R
R
G = 101 W, G = 100
G = 1.1 kW, G = 10
G = ꢅ, G = 1
Maximum Gain
REFERENCE INPUT
Input Resistance
Voltage Range
10
±12
1
kW
V
V/V
Gain to Output
POWER SUPPLY
Supply Voltage Range
Supply Current
VS
ISY
±5
±18
±7.5
±8.5
V
mA
mA
VCM = 0 V, RL = ꢅ
VCM = 0 V, VS = ±18 V, RL = ꢅ
±4.6
±4.7
Specifications subject to change without notice.
A
–2–
REV.
SSM2019
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±19 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . 10 sec
Storage Temperature Range . . . . . . . . . . . . –65∞C to +150∞C
Junction Temperature (TJ) . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300∞C
Operating Temperature Range . . . . . . . . . . . –40∞C to +85∞C
Thermal Resistance2
8-Lead PDIP (N) . . . . . . . . . . . . . . . . . . . . . . . JA = 96∞C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JC = 37∞C/W
16-Lead SOIC (RW) . . . . . . . . . . . . . . . . . . . . JA = 92∞C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JC = 27∞C/W
NOTES
1 Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2 qJA is specified for worst-case mounting conditions, i.e., qJA is specified for device
in socket for PDIP; qJA is specified for device soldered to printed circuit board for
SOIC package.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the SSM2019 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
Typical Performance Characteristics
100
10
0.1
T
V
= 25؇C
= ؎15V
A
S
G = 1000
G = 1000
G = 100
G = 1
0.01
G = 10
1
0.001
؎15V
7Vrms
V
V
؎18V
10Vrms
S
O
R
600⍀
L
BW = 80kHz
0.1
0.0001
10 20
100
1k
FREQUENCY – Hz
10k 20k
1
10
100
1k
10k
FREQUENCY – Hz
TPC 1. Typical THD + Noise vs. Gain
TPC 2. Voltage Noise Density vs. Frequency
A
REV.
–3–
SSM2019
100
100
90
80
70
60
50
40
30
20
10
0
30
25
20
T
V
= 25 C
= ꢃ15V
A
S
GAIN 10
GAIN = 1
10
1
f = 1kHz OR 10kHz
T
R
V
= 25 C
= 2kꢀ
= ꢃ15V
A
L
S
15
10
0.1
1
10
100
1k
100
1k
10k
100k
1M
100
1k
10k
100k
1M
GAIN
FREQUENCY – Hz
FREQUENCY – Hz
TPC 5. Maximum Output Swing
vs. Frequency
TPC 4. Output Impedance vs.
Frequency
TPC 3. RTI Voltage Noise Density
vs. Gain
16
20
40
30
T
V
= 25 C
= ꢃ15V
A
T = 25 C
A
T
= 25 C
f A= 100kHz
G
10
S
14
12
10
8
G = 1
15
10
5
20
10
0
6
4
2
0
10
0
100
1k
10k
100k
0
10
20
30
40
0
10
20
30
40
LOAD RESISTANCE – ꢀ
SUPPLY VOLTAGE (V – V ) – V
+
–
SUPPLY VOLTAGE (V – V ) – V
+
–
TPC 8. Output Voltage Range vs.
Supply Voltage
TPC 7. Input Voltage Range vs.
Supply Voltage
TPC 6. Output Voltage vs. Load
Resistance
150
200
150
ꢆV
= 100mV
= ꢃ15V
= 25ꢄC
G = 1000
CM
G = 1000
G = 100
V
180
160
140
120
100
80
S
T
A
125
125
G = 100
G = 10
G = 1
G = 10
100
75
50
25
0
100
75
50
25
0
G = 1000
G = 100
G = 10
G = 1
G = 1
60
ꢆV = 100mV
ꢆV
CM
= 100mV
S
40
T = 25 C
T
= 25 C
A
A
20
V = ꢃ15V
S
V
= ꢃ15V
S
0
10
100
1k
10k
100k
100
1k
10k
100k
10
100
1k
10k
100k
10
FREQUENCY – Hz
FREQUENCY – Hz
FREQUENCY– Hz
TPC 11. Negative PSRR vs. Frequency
TPC 10. Positive PSRR vs. Frequency
TPC 9. CMRR vs. Frequency
A
–4–
REV.
SSM2019
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0
0.02
0.01
0
–1
–2
–3
–4
–5
–6
–7
–8
V+/V– = 15V
V+/V– = ꢃ15V
T
= 25ꢄC
A
0
–0.01
–0.02
–0.03
–0.04
–0.05
–0.06
–50
–25
0
25
50
75
100
0
5
10 15 20 25 30 35 40
–50
–25
0
25
50
75
100
TEMPERATURE – ꢄC
SUPPLY VOLTAGE (V – V ) – V
TEMPERATURE – ꢄC
CC
EE
TPC 13. VIOS vs. Supply Voltage
TPC 14. VOOS vs. Temperature
TPC 12. VIOS vs. Temperature
5
6
30
T
= 25ꢄC
A
V+/V– = ꢃ15V
T
= 25ꢄC
A
5
4
3
2
1
0
20
10
4
3
I
OR I
B–
B+
0
2
1
–10
–20
–30
0
–50
0
10
20
30
40
–25
0
25
50
75
100
0
5
10
15
20
25
30
35
40
SUPPLY VOLTAGE (V – V ) – V
CC EE
TEMPERATURE – ꢄC
SUPPLY VOLTAGE (V – V ) – V
CC
EE
TPC 15. VOOS vs. Supply Voltage
TPC 16. IB vs. Temperature
TPC 17. IB vs. Supply Voltage
8
8
6
16
14
12
10
8
T
= 25ꢄC
T
= 25 C
A
A
6
I+
I+ @ V+/V– = ꢃ18V
4
4
I+ @ V+/V– = ꢃ15V
2
0
2
0
–2
–2
–4
–6
–8
6
I– @ V+/V– = ꢃ15V
–4
4
I–
I– @ V+/V– = ꢃ18V
–6
2
0
–8
–50
0
5
10 15 20 25 30 35 40
–25
0
25
50
75
100
0
ꢃ5
ꢃ10
ꢃ15
ꢃ20
SUPPLY VOLTAGE (V – V ) – V
TEMPERATURE – ꢄC
CC
EE
SUPPLY VOLTAGE – V
TPC 18. Supply Current vs.
Temperature
TPC 19. Supply Current vs. Supply
Voltage
TPC 20. ISY vs. Supply Voltage
A
–5–
REV.
SSM2019
V+
V
T
= ؎15V
= 25؇C
S
A
+IN
–IN
R
G1
R
OUT
REFERENCE
G
SSM2019
R
G2
60
40
V
OUT
10k⍀
R
G
V–
G =
=
+ 1
20
0
(+IN) – (–IN)
Figure 1. Basic Circuit Connections
GAIN
1k
10k
100k
1M
10M
The SSM2019 only requires a single external resistor to set the
voltage gain. The voltage gain, G, is:
Figure 2. Bandwidth for Various Values of Gain
10 kW
G =
+1
NOISE PERFORMANCE
RG
and the external gain resistor, RG , is:
The SSM2019 is a very low noise audio preamplifier exhibiting
a typical voltage noise density of only 1 nV/÷Hz at 1 kHz. The
exceptionally low noise characteristics of the SSM2019 are in
part achieved by operating the input transistors at high collector
currents since the voltage noise is inversely proportional to the
square root of the collector current. Current noise, however, is
directly proportional to the square root of the collector current.
As a result, the outstanding voltage noise performance of the
SSM2019 is obtained at the expense of current noise performance.
At low preamplifier gains, the effect of the SSM2019 voltage
and current noise is insignificant.
10 kW
G –1
RG
=
For convenience, Table I lists various values of RG for common
gain levels.
Table I. Values of RG for Various Gain Levels
RG (⍀) AV
dB
NC
4.7 k
1.1 k
330
100
32
1
3.2
10
31.3
100
314
0
The total noise of an audio preamplifier channel can be calculated by:
10
20
30
40
50
2
En
=
en 2 +(in RS )2 + et
where:
En = total input referred noise
en = amplifier voltage noise
in = amplifier current noise
RS = source resistance
10
1000 60
The voltage gain can range from 1 to 3500. A gain set resistor is
not required for unity gain applications. Metal film or wire-wound
resistors are recommended for best results.
et = source resistance thermal noise
The total gain accuracy of the SSM2019 is determined by the
tolerance of the external gain set resistor, RG, combined with the
gain equation accuracy of the SSM2019. Total gain drift combines
the mismatch of the external gain set resistor drift with that of
the internal resistors (20 ppm/∞C typ).
For a microphone preamplifier, using a typical microphone
impedance of 150 W, the total input referred noise is:
En
=
(1nV Hz)2 + 2(pA / Hz ¥150 W)2 + (1.6 nV/ Hz)2
=
1.93 nV/ Hz @ 1kHz
Bandwidth of the SSM2019 is relatively independent of gain,
as shown in Figure 2. For a voltage gain of 1000, the SSM2019
has a small-signal bandwidth of 200 kHz. At unity gain, the
bandwidth of the SSM2019 exceeds 4 MHz.
where:
en = 1 nV/÷Hz @ 1 kHz, SSM2019 en
in = 2 pA/÷Hz @ 1 kHz, SSM2019 in
RS = 150 W, microphone source impedance
et = 1.6 nV/÷Hz @ 1 kHz, microphone thermal noise
This total noise is extremely low and makes the SSM2019
virtually transparent to the user.
A
–6–
REV.
SSM2019
INPUTS
Although the SSM2019 inputs are fully floating, care must be
exercised to ensure that both inputs have a dc bias connection
capable of maintaining them within the input common-mode
range. The usual method of achieving this is to ground one side
of the transducer as in Figure 3a. An alternative way is to float
the transducer and use two resistors to set the bias point as in
Figure 3b. The value of these resistors can be up to 10 kW, but
they should be kept as small as possible to limit common-mode
pickup. Noise contribution by resistors is negligible since it is
attenuated by the transducer’s impedance. Balanced transducers
give the best noise immunity and interface directly as in Figure 3c.
The SSM2019 has protection diodes across the base emitter
junctions of the input transistors. These prevent accidental
avalanche breakdown, which could seriously degrade noise
performance. Additional clamp diodes are also provided to prevent
the inputs from being forced too far beyond the supplies.
(INVERTING)
SSM2019
TRANSDUCER
(NONINVERTING)
For stability, it is required to put an RF bypass capacitor directly
across the inputs, as shown in Figures 3 and 4. This capacitor
should be placed as close as possible to the input terminals. Good
RF practice should also be followed in layout and power supply
bypassing, since the SSM2019 uses very high bandwidth devices.
a. Single-Ended
R
REFERENCE TERMINAL
R
TRANSDUCER
SSM2019
The output signal is specified with respect to the reference terminal,
which is normally connected to analog ground. The reference
may also be used for offset correction or level shifting. A refer-
ence source resistance will reduce the common-mode rejection
by the ratio of 5 kW/RREF. If the reference source resistance is
1 W, then the CMR will be reduced to 74 dB (5 kW/1 W = 74 dB).
b. Pseudo-Differential
COMMON-MODE REJECTION
Ideally, a microphone preamplifier responds to only the difference
between the two input signals and rejects common-mode voltages
and noise. In practice, there is a small change in output voltage
when both inputs experience the same common-mode voltage
change; the ratio of these voltages is called the common-mode
gain. Common-mode rejection (CMR) is the logarithm of the ratio
of differential-mode gain to common-mode gain, expressed in dB.
TRANSDUCER
SSM2019
c. True Differential
Figure 3. Three Ways of Interfacing Transducers for
High Noise Immunity
PHANTOM POWERING
A typical phantom microphone powering circuit is shown in
Figure 4. Z1 to Z4 provide transient overvoltage protection for
the SSM2019 whenever microphones are plugged in or unplugged.
C1
+48V
+18V
+IN
Z1
Z2
R5
R3
6.8kꢀ
1%
R1
100ꢀ
10kꢀ
R
G1
C4
200pF
R
V
SSM2019
G
OUT
R
Z3
G2
C3
47ꢂF
R4
6.8kꢀ
1%
R2
10kꢀ
Z4
–IN
–18V
C2
C1, C2: 22ꢂF TO 47ꢂF, 63V, TANTALUM OR ELECTROLYTIC
Z1–Z4: 12V, 1/2W
Figure 4. SSM2019 in Phantom Powered Microphone Circuit
A
REV.
–7–
SSM2019
BUS SUMMING AMPLIFIER
critical, then the servo loop can be replaced by the diode biasing
scheme of Figure 5. If ac coupling is used throughout, then Pins 2
and 3 may be directly grounded.
In addition to its use as a microphone preamplifier, the SSM2019
can be used as a very low noise summing amplifier. Such a circuit
is particularly useful when many medium impedance outputs
are summed together to produce a high effective noise gain.
The principle of the summing amplifier is to ground the SSM2019
inputs. Under these conditions, Pins 1 and 8 are ac virtual grounds
sitting about 0.55 V below ground. To remove the 0.55 V offset,
the circuit of Figure 5 is recommended.
+ꢇ IN
V
SSM2019
OUT
–ꢇ IN
V
C1
0.33ꢂF
R2
R3
6.2kꢀ
33kꢀ
R5
10kꢀ
R4
5.1kꢀ
A2 forms a “servo” amplifier feeding the SSM2019 inputs. This
places Pins l and 8 at a true dc virtual ground. R4 in conjunction
with C2 removes the voltage noise of A2, and in fact just about
any operational amplifier will work well here since it is removed
from the signal path. If the dc offset at Pins l and 8 is not too
TO PINS
2 AND 3
A2
C2
IN4148
200ꢂF
Figure 5. Bus Summing Amplifier
A
–8–
REV.
SSM2019
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 6. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.25 (0
.0098)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 7. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
REV. A
–9–
SSM2019
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 8. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(RN-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
SSM2019BNZ
SSM2019BRNZ
SSM2019BRNZRL
SSM2019BRWZ
SSM2019BRWZRL
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N, REEL
16-Lead SOIC_W
16-Lead SOIC_W, REEL
Package Option
N-8
R-8
R-8
RW-16
RW-16
1 Z = RoHS Compliant Part
REVISION HISTORY
6/11—Rev. 0 to Rev. A
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide .......................................................... 10
2/03—Revision 0: Initial Version
©2003–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02718-0-6/11(A)
–10–
REV. A
相关型号:
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