SSM2143SZ [ADI]
â6 dB Differential Line Receiver; â ???? 6分贝差动线路接收器
| 型号： | SSM2143SZ |
| 厂家： | 
ADI |
| 描述： | â6 dB Differential Line Receiver |
| 文件： | 总10页 (文件大小：277K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
–6 dB Differential
Line Receiver
a
SSM2143
FEATURES
FUNCTIO NAL BLO CK D IAGRAM
High Com m on-Mode Rejection
DC: 90 dB typ
60 Hz: 90 dB typ
20 kHz: 85 dB typ
12kΩ
6k
Ω
SENSE
V+
–IN
Ultralow THD: 0.0006% typ @ 1 kHz
Fast Slew Rate: 10 V/ s typ
Wide Bandw idth: 7 MHz typ (G = 1/ 2)
Tw o Gain Levels Available: G = 1/ 2 or 2
Low Cost
V
OUT
V–
12k
6k
Ω
Ω
REFERENCE
+IN
SSM2143
P IN CO NNECTIO NS
Epoxy Mini-D IP (P Suffix)
and
GENERAL D ESCRIP TIO N
T he SSM2143 is an integrated differential amplifier intended to
receive balanced line inputs in audio applications requiring a
high level of immunity from common-mode noise. T he device
provides a typical 90 dB of common-mode rejection (CMR),
which is achieved by laser trimming of resistances to better than
0.005%.
SO IC (S Suffix)
REF
–IN
+IN
V–
1
2
3
4
NC
V+
8
7
6
5
SSM2143
TOP VIEW
(NOT TO SCALE)
VOUT
Additional features of the device include a slew rate of 10 V/µs
and wide bandwidth. T otal harmonic distortion (T HD) is less
than 0.004% over the full audio band, even while driving low
impedance loads. T he SSM2143 input stage is designed to
handle input signals as large as +28 dBu at G = 1/2. Although
primarily intended for G = 1/2 applications, a gain of 2 can be
realized by reversing the +IN/–IN and SENSE/REFERENCE
connections.
SENSE
NC = NO CONNECT
When configured for a gain of 1/2, the SSM2143 and SSM2142
Balanced Line Driver provide a fully integrated, unity gain
solution to driving audio signals over long cable runs. For
similar performance with G = 1, see SSM2141.
A
REV.
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
781/461-3113
Tel: 617/ 329-4700
Fax:
(V = ؎15 V, –40؇C ≤ T ≤ +85؇C, G = 1/2, unless otherwise noted.
S
A
SSM2143–SPECIFICATIONS
Typical specifications apply at T = +25؇C)
A
P aram eter
Sym bol
Conditions
Min
Typ
Max
Units
AUDIO PERFORMANCE
Total Harmonic Distortion Plus Noise T HD+N
VIN = 10 V rms, RL = 10 kΩ, f = 1 kHz
0 dBu = 0.775 V rms, 20 kHz BW, RT I
Clip Point = 1% T HD+N
0.0006
–107.3
+28.0
%
dBu
dBu
Signal-to-Noise Ratio
Headroom
SNR
HR
DYNAMIC RESPONSE
Slew Rate
Small Signal Bandwidth
SR
BW–3 dB
RL = 2 kΩ, CL = 200 pF
RL = 2 kΩ, CL = 200 pF
G = 1/2
6
10
V/µs
7
3.5
MHz
MHz
G = 2
INPUT
Input Offset Voltage
Common-Mode Rejection
VIOS
CMR
VCM = 0 V, RT I, G = 2
VCM = ±10 V, RT O
f = dc
f = 60 Hz
f = 20 kHz
–1.2
70
0.05
+1.2
mV
90
90
85
60
110
±15
±28
dB
dB
dB
dB
dB
V
f = 400 kHz
Power Supply Rejection
Input Voltage Range
PSR
IVR
VS = ±6 V to ±18 V
Common Mode
Differential
90
V
OUT PUT
Output Voltage Swing
VO
ISC
RL = 2 kΩ
±13
±14
2
300
+45, –20
V
Minimum Resistive Load Drive
Maximum Capacitive Load Drive
Short Circuit Current Limit
kΩ
pF
mA
GAIN
Gain Accuracy
–0.1
0.03
0.1
%
REFERENCE INPUT
Input Resistance
Voltage Range
18
±10
kΩ
V
POWER SUPPLY
Supply Voltage Range
Supply Current
VS
ISY
±6
±18
±4.0
V
mA
VCM = 0 V, RL = ∞
±2.7
Specifications subject to change without notice.
ABSO LUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . ±22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±44 V
Output Short Circuit Duration . . . . . . . . . . . . . . . Continuous
Operating T emperature Range . . . . . . . . . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C
Junction T emperature (TJ) . . . . . . . . . . . . . . . . . . . . +150°C
Lead T emperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
T hermal Resistance
8-Pin Plastic DIP (P): θJA = 103, θJC = 43 . . . . . . . . . °C/W
8-Pin SOIC (S): θJA = 150, θJC = 43. . . . . . . . . . . . . . °C/W
A
–2–
REV.
SSM2143
1µs
100
90
100
90
10
10
0%
0%
5V
5µs
50mV
Figure 1. Sm all-Signal Transient Response (V = ±200 m V,
Figure 2. Large Signal Transient Response (VIN = +24 dBu,
IN
G = 1/2, RL = 2 kΩ, VS = ±15 V, TA = +25°C)
G = 1/2, RL = 2 kΩ VS = ±15 V, TA = +25°C)
Figure 4. Headroom (VS = ±15 V, RL = 10 kΩ,
Figure 3. THD+N vs. Frequency (VS = ±15 V,
with 80 kHz Filter)
VIN = 10 V rm s, with 80 kHz Filter)
1.0
0.1
0.01
0.001
0.0001
100
10k
1k
LOAD RESISTANCE – Ω
100k
Figure 6. THD+N vs. Load (VS = ±15 V, VIN = 10 V rm s, with
Figure 5. Dynam ic Interm odulation Distortion, DIM-100
1 kHz Sine, 80 kHz Filter)
(VS = ±15 V, RL = 100 kΩ)
A
REV.
–3–
SSM2143
40
V
T
= ±15V
S
30
20
= +25°C
A
V
= ±15V
S
10
0
T
= +25°C
A
–10
–20
–30
100
1k
10k
100k
10M
1M
FREQUENCY – Hz
Figure 7. Closed-Loop Gain vs. Frequency, 20 Hz to 20 kHz
(Gain of 1/2 Norm alized to 0 dB)
Figure 8. Closed-Loop Gain vs. Frequency, 100 Hz to
10 MHz
180
120
T
= +25°C
= ±15V
A
V
T
= ±15V
S
V
S
135
90
= +25°C
A
100
80
60
40
20
0
R
= 2kΩ
L
45
0
–45
–90
–135
–180
10k
100k
1k
1M
10M
100
100
1k
10k
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 9. Closed-Loop Phase vs. Frequency
Figure 10. Com m on-Mode Rejection vs. Frequency
140
10
V
T
= ±15V
= +25°C
V
T
= ±15V
= +25°C
S
A
S
A
120
100
80
60
40
20
0
8
6
4
–PSRR
+PSRR
2
0
100
10k
1k
10
100
1k
10k
100k
1M
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 11. Power Supply Rejection vs. Frequency
Figure 12. Closed-Loop Output Im pedance vs. Frequency
A
REV.
–4–
SSM2143
6
5
4
3
2
1
0
12.5V
T
= +25°C
= ±15V
A
T
V
= +25°C
= ±15V
A
V
S
S
G = 1/2
10.0V
7.5V
R
= 2kΩ
L
5.0V
2.5V
0V
1k
10k
100k
1M
10M
10
1k
LOAD RESISTANCE – Ω
10k
100
FREQUENCY – Hz
Figure 13. Output Voltage Swing vs. Frequency
Figure 14. Output Voltage Swing vs. Load Resistance
40
120
T
= +25°C
A
V
= ±15V
S
100
80
T
= +25°C
A
30
20
60
40
10
0
20
0
0
±5
±10
±15
±20
10
100
1k
1
10k
SUPPLY VOLTAGE
FREQUENCY – Hz
Figure 15. Output Voltage Swing vs. Supply Voltage
Figure 16. Voltage Noise Density vs. Frequency
1s
10ms
100
90
100
90
0.5µV
0V
5µV
0V
–0.5µV
–5µV
10
10
0%
0%
5mV
5mV
Figure 17. Low Frequency Voltage Noise from 0.1 Hz
to 10 Hz*
Figure 18. Voltage Noise from 0 kHz to 1 kHz*
*T he photographs in Figure 17 through Figure 19 were taken at VS = ±15 V and T A = +25°C, using an external amplifier with a gain of 1000.
A
REV.
–5–
SSM2143
16
14
12
10
V
= ±15V
= 2kΩ
S
R
L
1ms
100
90
5µV
0V
8
6
–5µV
10
0%
5mV
4
–25
0
50
100
–50
25
75
TEMPERATURE – °C
Figure 19. Voltage Noise from 0 kHz to 10 kHz*
Figure 20. Slew Rate vs. Tem perature
0.10
400
V
= ±15V
V
= ±15V
= ±10V
= 0Ω
S
S
V
IN
0.08
0.06
0.04
0.02
0
R
S
300
200
100
0
100
25
TEMPERATURE – °C
–25
75
–50
–25
0
50
75
25
50
100
–50
0
TEMPERATURE – °C
Figure 21. Gain Error vs. Tem perature
Figure 22. Input Offset Voltage vs. Tem perature
5
4
3
2
1
0
4.0
V
= ±15V
S
T
= +25°C
A
3.5
3.0
2.5
2.0
1.5
1.0
0
50
TEMPERATURE – °C
–25
–50
25
75
100
0
±5
±10
±15
±20
SUPPLY VOLTAGE – V
Figure 23. Supply Current vs. Tem perature
Figure 24. Supply Current vs. Supply Voltage
*T he photographs in Figure 17 through Figure 19 were taken at VS = ±15 V and T A = +25°C, using an external amplifier with a gain of 1000.
A
REV.
–6–
SSM2143
Setting ∆R to 5 Ω results in the CMRR of 71 dB, as stated
above. T o achieve the SSM2143’s CMRR of 90 dB, the resistor
mismatch can be at most 0.57 Ω. In other words, to build this
circuit discretely, the resistors would have to be matched to
better than 0.005%!
AP P LICATIO NS INFO RMATIO N
T he SSM2143 is designed as a balanced differential line re-
ceiver. It uses a high speed, low noise audio amplifier with four
precision thin-film resistors to maintain excellent common-mode
rejection and ultralow T HD. Figure 25 shows the basic differen-
tial receiver application where the SSM2143 yields a gain of 1/2.
T he placement of the input and feedback resistors can be
switched to achieve a gain of +2, as shown in Figure 26. For
either circuit configuration, the SSM2143 can also be used un-
balanced by grounding one of the inputs. In applications requir-
ing a gain of +1, use the SSM2141.
T he following table shows typical resistor accuracies and the
resulting CMRR for a differential amplifier.
% Mism atch
CMRR
5%
1%
0.1%
0.005%
30 dB
44 dB
64 dB
90 dB
+15V
+15V
0.1µF
0.1µF
D C O UTP UT LEVEL AD JUST
7
1
=
2
7
A
= 2
A
V
12k
V
6k
12k
6k
T he reference node of the SSM2143 is normally connected to
ground. H owever, it can be used to null out any dc offsets in
the system or to introduce a dc reference level other than
ground. As shown in Figure 28, the reference node needs to be
5
1
2
6
3
–IN
+IN
2
3
5
6
–IN
+IN
SSM2143
12k
SSM2143
6k
+
V
V
OUT
OUT
6k
12k
1
+15V
4
4
0.1µF
+10V
0.1µF
0.1µF
OP27
7
–15V
–15V
12k
6k
6k
–IN
+IN
2
3
5
6
–10V
V
Figure 26. Reversing the
Resistors Results in a
Gain of 2
Figure 25. Standard Config-
uration for Gain of 1/2
OUT
SSM2143
12k
REFERENCE
1
CMRR
4
0.1µF
T he internal thin-film resistors are precisely trimmed to achieve
a CMRR of 90 dB. Any imbalances introduced by the external
circuitry will cause a significant reduction in the overall CMRR
performance. For example, a 5 Ω source imbalance will result in
a CMRR of 71 dB at dc. T his is also true for any reactive source
impedances that may affect the CMRR over the audio frequency
range. T hese error sources need to be minimized to maintain
the excellent CMRR.
–15V
Figure 28. A Low Im pedance Buffer Is Required to Adjust
the Reference Voltage.
buffered with an op amp to maintain very low impedance to
achieve high CMRR. T he same reasoning as above applies such
that the 6 kΩ resistor has to be matched to better than 0.005%
or 0.3 Ω. T he op amp maintains very low output impedance
over the entire audio frequency range, as long as its bandwidth
is well above 20 kHz. T he reference input can be adjusted over
a ±10 V range. T he gain from the reference to the output is
unity so the resulting dc output adjustment range is also ±10 V.
T o quantify the required accuracy of the thin film resistor
matching, the source of CMRR error can be analyzed. A resistor
mismatch can be modelled as shown in Figure 27. By assuming
a tolerance on one of the 12 kΩ resistors of ∆R, the equation for
the common-mode gain becomes:
VOUT
VIN
6k
6k
6k
12k + ∆R
INP UT ERRO RS
=
+1 –
6k +12k 12k + ∆R
T he main dc input offset error specified for the SSM2143 is the
Input Offset Voltage. T he Input Bias Current and Input Offset
Current are not specified as for a normal operational amplifier.
Because the SSM2143 has built-in resistors, any bias current
related errors are converted into offset voltage errors. T hus, the
offset voltage specification is a combination of the amplifier’s
offset voltage plus its offset current times the input impedance.
which reduces to:
VOUT
VIN
1/3 ∆R
12k + ∆R
=
T his gain error leads to a common-mode rejection ratio of:
+18V
| ADM
|
18k
∆R
+18V
ALL CABLE MEASUREMENTS USE
BELDEN CABLE (500').
CMRR =
0.1µF
| ACM
|
6
7
6k
V
4
3
2
3
2
IN
5
1
8
12k + ∆R
12k
V
SSM2143
SSM2142
6
OUT
–IN
+IN
4
0.1µF
V
7
OUT
1
5
18k
∆R
CMRR =
–18V
6k
–18V
Figure 27. A Sm all Mism atch in Resistance Results in a
Large Com m on-Mode Error
Figure 29. SSM2142/SSM2143 Balanced Line Driver/
Receiver System
A
REV.
–7–
SSM2143
LINE D RIVER/RECEIVER SYSTEM
of cable between the ICs as well as no cable. T he combination
of the two parts results in excellent THD+N and SNR and a noise
floor of typically –105 dB over a 20 Hz to 20 kHz bandwidth.
T he SSM2143 and SSM2142 provide a fully integrated line driver/
receiver system. T he SSM2142 is a high performance balanced
line driver IC that converts an unbalanced input into a balanced
output signal. It can drive large capacitive loads on long cables
making it ideal for transmitting balanced audio signals. When com-
bined with an SSM2143 on the receiving end of the cable, the sys-
tem maintains high common-mode rejection and ultralow THD.
The SSM2142 is designed with a gain of +2 and the SSM2143
with a gain of 1/2, providing an overall system gain of unity.
A comment on SSM2142/SSM2143 system headroom is neces-
sary. Figure 31 shows a maximum signal handling of approximately
±22 dBu, but it must be kept in mind that this is measured be-
tween the SSM2142’s input and SSM2143’s output, which has
been attenuated by one half. Normally, the system would be shown
as actually used in a piece of equipment, whereby the SSM2143 is
at the input and SSM2142 at the output. In this case, the system
could handle differential signals in excess of +24 dBu at the input
and output, which is consistent with headroom requirements of
most professional audio equipment.
T he following data demonstrates the typical performance of the
two parts together, measured on an Audio Precision at the
SSM2143’s output. T his configuration was tested with 500 feet
500' CABLE
NO CABLE
Figure 30. THD+N vs. Frequency of SSM2142/SSM2143
Figure 33. SSM2142/SSM2143 System Frequency
System (VS = ±18 V, VIN = 5 V rm s, with 80 kHz Filter)
Response (VS = ±18 V, VIN = 0 dBV, 500' Cable)
5V
100
90
10
0%
10µs
Figure 31. SSM2142/SSM2143 System Headroom –
See Text—(VS = ±18 V, RL = 10 kΩ, 500' Cable)
Figure 34. SSM2142/SSM2143 System Large Signal Pulse
Response (VS = ±18 V, RL = 10 kΩ, No Cable)
500' CABLE
NO CABLE
Figure 32. SSM2142/SSM2143 System
DIM-100 Dynam ic Interm odulation
Distortion (VS = ±18 V, RL = 10 kΩ)
A
REV.
–8–
SSM2143
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 35. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 36. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
REV. A
–9–
SSM2143
ORDERING GUIDE
Model1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
Package Option
SSM2143PZ
SSM2143SZ
SSM2143SZ-REEL
N-8
R-8
R-8
1 Z = RoHS Compliant Part
REVISION HISTORY
6/11—Rev. 0 to Rev. A
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide .......................................................... 10
11/91—Revision 0: Initial Version
©1991–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10010-0-6/11(A)
–10–
REV. A
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