SSM2211CP-R2 [ADI]

Low Distortion, 1.5 W Audio Power Amplifier; 低失真, 1.5瓦音频功率放大器
SSM2211CP-R2
型号: SSM2211CP-R2
厂家: ADI    ADI
描述:

Low Distortion, 1.5 W Audio Power Amplifier
低失真, 1.5瓦音频功率放大器

消费电路 商用集成电路 音频放大器 视频放大器 功率放大器 光电二极管
文件: 总24页 (文件大小:507K)
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Low Distortion, 1.5 W Audio  
Power Amplifier  
SSM2211  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
1.5 W output1  
Differential (BTL2) output  
IN–  
Single-supply operation: 2.7 V to 5.5 V  
Functions down to 1.75 V  
V
A
B
OUT  
IN+  
Wide bandwidth: 4 MHz  
Highly stable phase margin: >80 degrees  
Low distortion: 0.2% THD + N @ 1 W output  
Excellent power supply rejection  
V
OUT  
BYPASS  
APPLICATIONS  
SHUTDOWN  
BIAS  
Portable computers  
SSM2211  
Personal wireless communicators  
Hands-free telephones  
Speaker phones  
V– (GND)  
Figure 1.  
Intercoms  
Musical toys and talking games  
GENERAL DESCRIPTION  
The SSM22113 is a high performance audio amplifier that  
delivers 1 W rms of low distortion audio power into a bridge-  
connected 8 Ω speaker load (or 1.5 W rms into a 4 Ω load).  
It operates over a wide temperature range and is specified for  
single-supply voltages between 2.7 V and 5.5 V. When oper-  
ating from batteries, it continues to operate down to 1.75 V.  
This makes the SSM2211 the best choice for unregulated  
applications, such as toys and games. Featuring a 4 MHz  
bandwidth and distortion below 0.2% THD + N @ 1 W,  
superior performance is delivered at higher power or lower  
speaker load impedance than competitive units.  
shutdown mode, which typically reduces quiescent current  
drain to 100 nA.  
The SSM2211 is designed to operate over the –40°C to +85°C  
temperature range. The SSM2211 is available in 8-lead SOIC  
(narrow body) and LFCSP (lead frame chip scale) surface-  
mount packages. The advanced mechanical packaging of the  
LFCSP models ensures lower chip temperature and enhanced  
performance relative to standard packaging options.  
Applications include personal portable computers, hands-free  
telephones and transceivers, talking toys, intercom systems, and  
other low voltage audio systems requiring 1 W output power.  
The low differential dc output voltage results in negligible  
losses in the speaker winding and makes high value dc blocking  
capacitors unnecessary. Battery life is extended by using  
1 At RL = 4 Ω, TA = 25°C, THD + N < 1%, VS = 5 V, 4-layer PCB.  
2 Bridge-tied load.  
3 Protected by U.S. Patent No. 5,519,576.  
Rev. D  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 
 
SSM2211  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Power Dissipation....................................................................... 16  
Output Voltage Headroom........................................................ 17  
Automatic Shutdown-Sensing Circuit..................................... 17  
Shutdown-Circuit Design Example ......................................... 18  
Start-Up Popping Noise............................................................. 18  
SSM2211 Amplifier Design Example .................................. 18  
Single-Ended Applications........................................................ 19  
Driving Two Speakers Single Endedly..................................... 19  
Evaluation Board........................................................................ 20  
LFCSP Printed Circuit Board Layout Considerations .......... 20  
Outline Dimensions....................................................................... 21  
Ordering Guide .......................................................................... 21  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Electrical Characteristics................................................................. 3  
Absolute Maximum Ratings............................................................ 5  
Thermal Resistance ...................................................................... 5  
ESD Caution.................................................................................. 5  
Pin Configurations and Function Descriptions ........................... 6  
Typical Performance Characteristics ............................................. 7  
Product Overview........................................................................... 14  
Thermal Performance—LFCSP................................................ 14  
Typical Applications....................................................................... 15  
Bridged Output vs. Single-Ended Output Configurations ... 15  
Speaker Efficiency and Loudness............................................. 15  
REVISION HISTORY  
11/06—Rev. C to Rev. D  
10/02—Data Sheet Changed from Rev. A to Rev. B  
Updated Format..................................................................Universal  
Changes to General Description .................................................... 1  
Changes to Electrical Characteristics ............................................ 3  
Changes to Absolute Maximum Ratings....................................... 5  
Added Table 6.................................................................................... 6  
Changes to Figure 32...................................................................... 11  
Changes to the Product Overview Section ................................. 14  
Changes to the Output Voltage Headroom Section................... 17  
Changes to the Start-Up Popping Noise Section........................ 18  
Changes to the Evaluation Board Section ................................... 20  
Updated Outline Dimensions....................................................... 21  
Changes to Ordering Guide .......................................................... 21  
Deleted 8-Lead PDIP .........................................................Universal  
Updated Outline Dimensions....................................................... 15  
5/02—Data Sheet Changed from Rev. 0 to Rev. A  
Edits to General Description ...........................................................1  
Edits to Package Type .......................................................................3  
Edits to Ordering Guide ...................................................................3  
Edits to Product Overview...............................................................8  
Edits to Printed Circuit Board Layout Considerations ............. 13  
Added section Printed Circuit Board Layout  
Considerations—LFCSP................................................................ 14  
10/04—Data Sheet Changed from Rev. B to Rev. C  
Updated Format..................................................................Universal  
Changes to General Description .................................................... 1  
Changes to Table 5............................................................................ 4  
Deleted Thermal Performance—SOIC Section ........................... 8  
Changes to Figure 31...................................................................... 10  
Changes to Figure 40...................................................................... 12  
Changes to Thermal Performance—LFCSP Section ................. 13  
Deleted Figure 52, Renumbered Successive Figures.................. 14  
Deleted Printed Circuit Board Layout—SOIC Section ............. 14  
Changes to Output Voltage Headroom Section ......................... 16  
Changes to Start-Up Popping Noise Section .............................. 17  
Changes to Ordering Guide .......................................................... 20  
Rev. D | Page 2 of 24  
 
SSM2211  
ELECTRICAL CHARACTERISTICS  
VS = 5.0 V, TA = 25°C, RL = 8 Ω, CB = 0.1 μF, VCM = VD/2, unless otherwise noted.  
Table 1.  
Parameter  
Symbol Conditions  
Min Typ Max Unit  
GENERAL CHARACTERISTICS  
Differential Output Offset Voltage  
Output Impedance  
VOOS  
ZOUT  
AVD = 2, –40°C ≤ TA ≤ +85°C  
4
0.1  
50  
mV  
Ω
SHUTDOWN CONTROL  
Input Voltage High  
VIH  
VIL  
ISY = < 100 mA  
ISY = normal  
3.0  
V
V
Input Voltage Low  
1.3  
POWER SUPPLY  
Power Supply Rejection Ratio  
Supply Current  
Supply Current, Shutdown Mode  
DYNAMIC PERFORMANCE  
Gain Bandwidth  
PSRR  
ISY  
ISD  
VS = 4.75 V to 5.25 V  
VO1 = VO2 = 2.5 V, –40°C ≤ TA ≤ +85°C  
Pin 1 = VDD (see Figure 32), –40°C < TA < +85°C  
66  
9.5  
0.1  
dB  
mA  
μA  
20  
1
GBP  
ΦM  
4
86  
MHz  
Degrees  
Phase Margin  
AUDIO PERFORMANCE  
Total Harmonic Distortion  
Total Harmonic Distortion  
Voltage Noise Density  
THD + N  
THD + N  
en  
0.15  
0.2  
85  
%
P = 0.5 W into 8 Ω, f = 1 kHz  
P = 1.0 W into 8 Ω, f = 1 kHz  
f = 1 kHz  
%
nVHz  
VS = 3.3 V, TA = 25°C, RL = 8 Ω, CB = 0.1 μF, VCM = VD/2, unless otherwise noted.  
Table 2.  
Parameter  
Symbol Conditions  
Min Typ Max Unit  
GENERAL CHARACTERISTICS  
Differential Output Offset Voltage  
Output Impedance  
VOOS  
ZOUT  
AVD = 2, –40°C ≤ TA ≤ +85°C  
5
0.1  
50  
mV  
Ω
SHUTDOWN CONTROL  
Input Voltage High  
VIH  
VIL  
ISY = < 100 μA  
ISY = normal  
1.7  
V
V
Input Voltage Low  
1
POWER SUPPLY  
Supply Current  
ISY  
ISD  
VO1 = VO2 = 1.65 V, –40°C ≤ TA ≤ +85°C  
Pin 1 = VDD (see Figure 32), –40°C ≤ TA ≤ +85°C  
5.2  
0.1  
20  
1
mA  
μA  
Supply Current, Shutdown Mode  
AUDIO PERFORMANCE  
Total Harmonic Distortion  
THD + N  
0.1  
%
P = 0.35 W into 8 Ω, f = 1 kHz  
Rev. D | Page 3 of 24  
 
SSM2211  
VS = 2.7 V, TA = 25°C, RL = 8 Ω, CB = 0.1 μF, VCM = VS/2, unless otherwise noted.  
Table 3.  
Parameter  
Symbol Conditions  
Min Typ Max Unit  
GENERAL CHARACTERISTICS  
Differential Output Offset Voltage  
Output Impedance  
VOOS  
ZOUT  
AVD = 2  
5
0.1  
50  
mV  
Ω
SHUTDOWN CONTROL  
Input Voltage High  
VIH  
VIL  
ISY = < 100 mA  
ISY = normal  
1.5  
V
V
Input Voltage Low  
0.8  
POWER SUPPLY  
Supply Current  
ISY  
ISD  
VO1 = VO2 = 1.35 V, –40°C ≤ TA ≤ +85°C  
Pin 1 = VDD (see Figure 32), –40°C ≤ TA ≤ +85°C  
4.2  
0.1  
20  
1
mA  
μA  
Supply Current, Shutdown Mode  
AUDIO PERFORMANCE  
Total Harmonic Distortion  
THD + N P = 0.25 W into 8 Ω, f = 1 kHz  
0.1  
%
Rev. D | Page 4 of 24  
SSM2211  
ABSOLUTE MAXIMUM RATINGS  
Absolute maximum ratings apply at 25°C, unless otherwise noted.  
THERMAL RESISTANCE  
θJA is specified for the worst-case conditions, that is, a device  
soldered in a circuit board for surface-mount packages.  
Table 4.  
Parameter  
Rating  
Supply Voltage  
Input Voltage  
6 V  
VDD  
VDD  
2000 V  
−65°C to +150°C  
−40°C to +85°C  
−65°C to +165°C  
300°C  
Table 5. Thermal Resistance  
Package Type  
8-Lead LFCSP_VD (CP-Suffix)1  
8-Lead SOIC_N (S-Suffix)2  
θJA  
50  
121  
Unit  
°C/W  
°C/W  
Common-Mode Input Voltage  
ESD Susceptibility  
Storage Temperature Range  
Operating Temperature Range  
Junction Temperature Range  
Lead Temperature Range, Soldering (60 sec)  
1 For the LFCSP_VD, θJA is measured with exposed lead frame soldered to the  
printed circuit board.  
2 For the SOIC_N, θJA is measured with the device soldered to a 4-layer printed  
circuit board.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
ESD CAUTION  
Rev. D | Page 5 of 24  
 
 
 
SSM2211  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
PIN 1  
SHUTDOWN  
BYPASS  
IN+  
1
2
3
4
INDICATOR  
8
7
6
5
V
B
A
OUT  
SHUTDOWN  
BYPASS  
IN+  
1
2
3
4
8
7
6
5
V
B
OUT  
V–  
V+  
SSM2211  
V–  
V+  
SSM2211  
TOP VIEW  
(Not to Scale)  
TOP VIEW  
IN–  
V
OUT  
(Not to Scale)  
IN–  
V
OUT  
A
Figure 2. 8-Lead SOIC_N Pin Configuration (R-8)  
Figure 3. 8-Lead LFCSP_VD Pin Configuration (CP-8-2)  
Table 6. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
SHUTDOWN Shutdown Enable.  
BYPASS  
IN+  
IN–  
Bypass Capacitor.  
Noninverting Input.  
Inverting Input.  
Output A.  
VOUT  
V+  
A
B
Positive Supply.  
Negative Supply.  
Output B.  
V–  
VOUT  
Rev. D | Page 6 of 24  
 
SSM2211  
TYPICAL PERFORMANCE CHARACTERISTICS  
10  
10  
T
= 25°C  
T
= 25°C  
A
A
V
A
R
P
= 5V  
= 2 (BTL)  
= 8Ω  
= 500mW  
V
A
R
P
= 5V  
DD  
VD  
L
DD  
VD  
= 8Ω  
= 2 (BTL)  
L
L
= 1W  
L
C
= 0  
B
1
1
C = 0  
B
C
= 0.1μF  
C
= 0.1μF  
B
B
C
= 1μF  
B
0.1  
0.1  
C
= 1μF  
B
0.01  
10  
0.01  
10  
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
10k 20k  
10k 20k  
20  
20  
20  
100  
1k  
FREQUENCY (Hz)  
10k  
20k  
Figure 4. THD + N vs. Frequency  
Figure 7. THD + N vs. Frequency  
C
= 0  
B
C
C
= 0  
B
= 0.1μF  
C
= 0.1μF  
1
B
1
B
C
= 1μF  
B
C
= 1μF  
B
0.1  
0.1  
T
V
A
R
= 25°C  
T
V
= 25°C  
= 5V  
A
A
DD  
= 5V  
DD  
= 10 (BTL)  
A
R
P
= 10 (BTL)  
VD  
= 8Ω  
= 1W  
VD  
L
L
= 8Ω  
L
L
P
= 500mW  
100  
0.01  
10  
0.01  
10  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
20  
1k  
FREQUENCY (Hz)  
Figure 8. THD + N vs. Frequency  
Figure 5. THD + N vs. Frequency  
C
= 0.1μF  
B
C
= 0.1μF  
B
1
1
C
= 1μF  
B
C
= 1μF  
B
0.1  
0.1  
T
V
= 25°C  
T
= 25°C  
= 5V  
A
A
= 5V  
V
A
R
P
DD  
DD  
VD  
L
L
A
R
P
= 20 (BTL)  
= 20 (BTL)  
VD  
= 8Ω  
= 1W  
= 8Ω  
L
L
= 500mW  
0.01  
0.01  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
20  
100  
1k  
FREQUENCY (Hz)  
Figure 9. THD + N vs. Frequency  
Figure 6. THD + N vs. Frequency  
Rev. D | Page 7 of 24  
 
SSM2211  
10  
10  
T
V
A
R
= 25°C  
A
T
V
A
R
P
= 25°C  
A
= 5V  
DD  
VD  
= 3.3V  
DD  
VD  
= 8Ω  
= 2 (BTL)  
= 2 (BTL)  
= 8Ω  
L
L
L
FREQUENCY = 20Hz  
= 350mW  
C
= 0.1μF  
B
C
= 0  
B
1
1
C
= 0.1μF  
B
0.1  
0.1  
C
= 1μF  
B
0.01  
0.01  
10  
20n  
0.1  
1
1
1
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 10. THD + N vs. POUTPUT  
Figure 13. THD + N vs. Frequency  
10  
T
= 25°C  
A
C
= 0  
V
A
R
= 5V  
B
DD  
VD  
= 8Ω  
= 2 (BTL)  
L
FREQUENCY = 1kHz  
C
= 0.1μF  
B
C
= 0.1μF  
1
0.1  
0.01  
10  
1
B
C
= 1μF  
B
0.1  
T
V
= 25°C  
DD  
A
= 3.3V  
A
R
P
= 10 (BTL)  
= 8Ω  
= 350mW  
VD  
L
L
0.01  
20n  
0.1  
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 11. THD + N vs. POUTPUT  
Figure 14. THD + N vs. Frequency  
10  
T
V
A
R
= 25°C  
A
= 5V  
DD  
= 2 (BTL)  
= 8Ω  
VD  
L
FREQUENCY = 20kHz  
= 0.1μF  
C
B
C = 0.1μF  
B
1
1
C
= 1μF  
B
0.1  
0.1  
T
V
= 25°C  
DD  
A
= 3.3V  
A
R
P
= 20 (BTL)  
= 8Ω  
= 350mW  
100  
VD  
L
L
0.01  
0.01  
20n  
0.1  
2
20  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 12. THD + N vs. POUTPUT  
Figure 15. THD + N vs. Frequency  
Rev. D | Page 8 of 24  
SSM2211  
10  
10  
T
V
A
R
= 25°C  
A
T
V
A
R
P
= 25°C  
A
= 3.3V  
DD  
VD  
= 2.7V  
DD  
VD  
= 8Ω  
= 2 (BTL)  
= 2 (BTL)  
= 8Ω  
L
L
L
FREQUENCY = 20Hz  
= 0.1μF  
= 250mW  
C
B
C
= 0  
B
1
1
C
= 0.1μF  
B
0.1  
0.01  
0.1  
C
= 1μF  
B
0.01  
10  
20n  
0.1  
1
1
1
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 16. THD + N vs. POUTPUT  
Figure 19. THD + N vs. Frequency  
10  
T
V
A
R
= 25°C  
A
= 3.3V  
DD  
VD  
= 8Ω  
C
= 0  
= 2 (BTL)  
B
L
FREQUENCY = 1kHz  
= 0.1μF  
C
B
C
= 0.1μF  
B
1
1
0.1  
0.01  
10  
C
= 1μF  
B
0.1  
0.01  
T
V
A
R
P
= 25°C  
DD  
VD  
= 8Ω  
= 250mW  
A
= 2.7V  
= 10 (BTL)  
L
L
20n  
0.1  
2
20  
100  
1k  
10k 20k  
P
(W)  
OUTPUT  
FREQUENCY (Hz)  
Figure 17. THD + N vs. POUTPUT  
Figure 20. THD + N vs. Frequency  
10  
T
V
A
R
= 25°C  
A
= 3.3V  
= 2 (BTL)  
= 8Ω  
DD  
VD  
L
FREQUENCY = 20kHz  
= 0.1μF  
C
= 0.1μF  
B
C
B
1
1
C
= 1μF  
B
0.1  
0.1  
0.01  
T
V
A
R
P
= 25°C  
A
= 2.7V  
= 20 (BTL)  
= 8Ω  
DD  
VD  
L
L
= 250mW  
100  
0.01  
20n  
0.1  
2
20  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 18. THD + N vs. POUTPUT  
Figure 21. THD + N vs. Frequency  
Rev. D | Page 9 of 24  
SSM2211  
10  
10  
T
V
A
R
= 25°C  
T
= 25°C  
A
A
= 2.7V  
V
A
C
C
= 5V  
DD  
VD  
DD  
VD  
= 0.1μF  
= 2 (BTL)  
= 10 SINGLE ENDED  
= 8Ω  
L
B
C
FREQUENCY = 20Hz  
= 1000μF  
1
1
R
= 8Ω  
= 250mW  
L
P
O
0.1  
0.1  
0.01  
R
= 32Ω  
= 60mW  
L
P
O
0.01  
20n  
0.1  
1
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 22. THD + N vs. POUTPUT  
Figure 25. THD + N vs. Frequency  
10  
10  
T
V
A
R
= 25°C  
A
T
V
= 25°C  
DD  
A
= 2.7V  
DD  
VD  
= 3.3V  
= 2 (BTL)  
A
C
C
= 10 SINGLE ENDED  
= 0.1μF  
= 1000μF  
VD  
B
C
= 8Ω  
L
FREQUENCY = 1kHz  
1
1
R
= 8Ω  
= 85mW  
L
P
O
0.1  
0.01  
0.1  
R
= 32Ω  
L
P
= 20mW  
O
0.01  
10  
20n  
0.1  
1
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 23. THD + N vs. POUTPUT  
Figure 26. THD + N vs. Frequency  
10  
T
= 25°C  
T
= 25°C  
= 2.7V  
= 10 SINGLE ENDED  
= 0.1μF  
= 1000μF  
A
A
V
A
R
= 2.7V  
V
A
C
C
DD  
DD  
VD  
B
C
= 2 (BTL)  
VD  
= 8Ω  
L
FREQUENCY = 20kHz  
1
1
R
= 8Ω  
= 65mW  
L
P
O
0.1  
0.1  
R
= 32Ω  
= 15mW  
L
P
O
0.01  
0.01  
20n  
0.1  
1
2
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
P
(W)  
OUTPUT  
Figure 24. THD + N vs. POUTPUT  
Figure 27. THD + N vs. Frequency  
Rev. D | Page 10 of 24  
SSM2211  
10  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
T
A
R
= 25°C  
VD  
= 8Ω  
A
V
= 2.7V  
DD  
T
= 150°C  
= 2 (BTL)  
J,MAX  
FREE AIR, NO HEAT SINK  
L
FREQUENCY = 20Hz  
C = 0.1μF  
SOIC θ = 121°C/W  
JA  
LFCSP θ = 50°C/W  
B
JA  
1
8-LEAD LFCSP  
V
= 5V  
DD  
V
DD  
= 3.3V  
0.1  
8-LEAD SOIC  
0.01  
20n  
0.1  
1
2
–40 –30 –20 –10  
0
10 20 30 40 50 60 70 80 90 100 110 120  
P
(W)  
OUTPUT  
AMBIENT TEMPERATURE (°C)  
Figure 28. THD + N vs. POUTPUT  
Figure 31. Maximum Power Dissipation vs. Ambient Temperature  
10  
10k  
T
A
R
= 25°C  
VD  
= 8Ω  
A
V
= 2.7V  
T
V
= 25°C  
= 5V  
DD  
A
= 2 (BTL)  
DD  
L
FREQUENCY = 1kHz  
C
= 0.1μF  
8k  
6k  
4k  
2k  
0
B
1
0.1  
V
= 5V  
DD  
V
= 3.3V  
DD  
0.01  
20n  
0.1  
1
2
0
1
2
3
4
5
P
(W)  
OUTPUT  
SHUTDOWN VOLTAGE AT PIN 1 (V)  
Figure 29. THD + N vs. POUTPUT  
Figure 32. Supply Current vs. Shutdown Voltage at Pin 1  
10  
14  
12  
10  
8
T
A
R
= 25°C  
VD  
= 8Ω  
A
= 2 (BTL)  
V
= 3.3V  
DD  
T
R
= 25°C  
= OPEN  
A
L
L
FREQUENCY = 20kHz  
= 0.1μF  
C
B
1
V
= 2.7V  
DD  
6
0.1  
4
2
0
V
= 5V  
DD  
1
0.01  
20n  
0.1  
2
0
1
2
3
4
5
6
P
(W)  
OUTPUT  
SUPPLY VOLTAGE (V)  
Figure 30. THD + N vs. POUTPUT  
Figure 33. Supply Current vs. Supply Voltage  
Rev. D | Page 11 of 24  
 
 
SSM2211  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
25  
20  
V
= 2.7V  
DD  
SAMPLE SIZE = 300  
15  
10  
5
5V  
44  
3.3V  
2.7V  
24  
0
–20  
4
8
12  
16  
20  
28  
32  
36  
40  
48  
–15  
–10  
–5  
0
5
10  
15  
20  
25  
OUTPUT OFFSET VOLTAGE (mV)  
LOAD RESISTANCE (Ω)  
Figure 36. Output Offset Voltage Distribution  
Figure 34. POUTPUT vs. Load Resistance  
80  
60  
40  
20  
180  
135  
20  
16  
12  
8
V
= 3.3V  
DD  
SAMPLE SIZE = 300  
90  
45  
0
0
–20  
–40  
–45  
–90  
–135  
–180  
4
–60  
–80  
0
100  
1k  
10k  
100k  
1M  
10M  
100M  
–30  
–20  
–10  
0
10  
20  
30  
FREQUENCY (Hz)  
OUTPUT OFFSET VOLTAGE (mV)  
Figure 35. Gain and Phase Shift vs. Frequency (Single Amplifier)  
Figure 37. Output Offset Voltage Distribution  
Rev. D | Page 12 of 24  
SSM2211  
20  
16  
12  
8
–50  
–55  
= 5V  
T
V
C
A
= 25°C  
DD  
= 15μF  
V
DD  
A
= 5V ± 100mV  
SAMPLE SIZE = 300  
B
= 2  
VD  
–60  
–65  
–70  
4
0
–30  
–20  
–10  
0
10  
20  
30  
20  
100  
1k  
10k  
30k  
OUTPUT OFFSET VOLTAGE (mV)  
FREQUENCY (Hz)  
Figure 38. Output Offset Voltage Distribution  
Figure 40. PSRR vs. Frequency  
600  
500  
V
= 5V  
DD  
SAMPLE SIZE = 1,700  
400  
300  
200  
100  
0
6
7
8
9
10  
11  
12  
13  
14  
15  
SUPPLY CURRENT (mA)  
Figure 39. Supply Current Distribution  
Rev. D | Page 13 of 24  
SSM2211  
PRODUCT OVERVIEW  
The SSM2211 is a low distortion speaker amplifier that can run  
from a 2.7 V to 5.5 V supply. It consists of a rail-to-rail input  
and a differential output that can be driven within 400 mV of  
either supply rail while supplying a sustained output current of  
350 mA. The SSM2211 is unity-gain stable, requiring no  
external compensation capacitors, and can be configured for  
gains of up to 40 dB. Figure 41 shows the simplified schematic.  
Pin 4 and Pin 3 are the inverting and noninverting terminals  
to A1. An offset voltage is provided at Pin 2, which should be  
connected to Pin 3 for use in single-supply applications. The  
output of A1 appears at Pin 5. A second operational amplifier,  
A2, is configured with a fixed gain of AV = −1 and produces an  
inverted replica of Pin 5 at Pin 8. The SSM2211 outputs at Pin 5  
and Pin 8 produce a bridged configuration output to which a  
speaker can be connected. This bridge configuration offers the  
advantage of a more efficient power transfer from the input to  
the speaker. Because both outputs are symmetric, the dc bias at  
Pin 5 and Pin 8 are exactly equal, resulting in zero dc differ-  
ential voltage across the outputs. This eliminates the need for a  
coupling capacitor at the output.  
20kΩ  
V
DD  
6
SSM2211  
20kΩ  
4
3
V
IN  
5
8
V
V
A1  
O1  
THERMAL PERFORMANCE—LFCSP  
50kΩ  
50kΩ  
The addition of the LFCSP to the Analog Devices, Inc., package  
portfolio offers the SSM2211 user even greater choice when  
considering thermal performance criteria. For the 8-lead,  
3 mm × 3 mm LFCSP, the θJA is 50°C/W. This is a significant  
performance improvement over most other packaging options.  
50kΩ  
A2  
O2  
2
BIAS  
CONTROL  
50kΩ  
0.1μF  
7
1
SHUTDOWN  
Figure 41. Simplified Schematic  
Rev. D | Page 14 of 24  
 
 
SSM2211  
TYPICAL APPLICATIONS  
R
F
the power delivered to the load. In a typical application  
5V  
operating from a 5 V supply, the maximum power that can be  
delivered by the SSM2211 to an 8 Ω speaker in a single-ended  
configuration is 250 mW. By driving this speaker with a bridged  
output, 1 W of power can be delivered. This translates to a  
12 dB increase in sound pressure level from the speaker.  
C
S
6
C
C
R
I
4
3
AUDIO  
INPUT  
+
5
SPEAKER  
8V  
SSM2211  
8
Driving a speaker differentially from a bridged output offers  
another advantage in that it eliminates the need for an output  
coupling capacitor to the load. In a single-supply application,  
the quiescent voltage at the output is half of the supply voltage.  
If a speaker is connected in a single-ended configuration, a  
coupling capacitor is needed to prevent dc current from flowing  
through the speaker. This capacitor also needs to be large  
enough to prevent low frequency roll-off. The corner frequency  
is given by  
+
1
7
2
C
B
Figure 42. Typical Configuration  
Figure 42 shows how the SSM2211 is connected in a typical  
application. The SSM2211 can be configured for gain much like  
a standard operational amplifier. The gain from the audio input  
to the speaker is  
1
f3dB  
=
(4)  
RL × CC  
RF  
A = 2 ×  
(1)  
V
RI  
where RL is the speaker resistance and CC is the coupling  
capacitance.  
The 2× factor comes from the fact that Pin 8 has the opposite  
polarity of Pin 5, providing twice the voltage swing to the  
speaker from the bridged-output configuration.  
For an 8 Ω speaker and a corner frequency of 20 Hz, a 1000 μF  
capacitor would be needed, which is physically large and costly.  
By connecting a speaker in a bridged-output configuration, the  
quiescent differential voltage across the speaker becomes nearly  
zero, eliminating the need for the coupling capacitor.  
CS is a supply bypass capacitor used to provide power supply  
filtering. Pin 2 is connected to Pin 3 to provide an offset voltage  
for single-supply use, with CB providing a low ac impedance to  
ground to help power supply rejection. Because Pin 4 is a  
virtual ac ground, the input impedance is equal to RI. CC is the  
input coupling capacitor, which also creates a high-pass filter  
with a corner frequency of  
SPEAKER EFFICIENCY AND LOUDNESS  
The effective loudness of 1 W of power delivered into an 8 Ω  
speaker is a function of speaker efficiency. The efficiency is  
typically rated as the sound pressure level (SPL) at 1 meter in  
front of the speaker with 1 W of power applied to the speaker.  
Most speakers are between 85 dB and 95 dB SPL at 1 meter at  
1 W. Table 7 shows a comparison of the relative loudness of  
different sounds.  
1
fHP  
=
(2)  
2πRI × CC  
Because the SSM2211 has an excellent phase margin, a feedback  
capacitor in parallel with RF to band limit the amplifier is not  
required, as it is in some competitor products.  
Table 7. Typical Sound Pressure Levels  
Source of Sound  
dB SPL  
120  
95  
80  
65  
50  
30  
0
BRIDGED OUTPUT VS. SINGLE-ENDED OUTPUT  
CONFIGURATIONS  
Threshold of Pain  
Heavy Street Traffic  
Cabin of Jet Aircraft  
Average Conversation  
Average Home at Night  
Quiet Recording Studio  
Threshold of Hearing  
The power delivered to a load with a sinusoidal signal can be  
expressed in terms of the peak voltage of the signal and the  
resistance of the load as  
2
VPK  
PL =  
(3)  
2×RL  
It can easily be seen that 1 W of power into a speaker can  
produce quite a bit of acoustic energy.  
By driving a load from a bridged-output configuration, the  
voltage swing across the load doubles. Therefore, an advantage  
in using a bridged-output configuration becomes apparent from  
Equation 3, as doubling the peak voltage results in four times  
Rev. D | Page 15 of 24  
 
 
 
 
 
 
 
 
SSM2211  
The power dissipated by the amplifier internally is simply the  
difference between Equation 6 and Equation 3. The equation  
for internal power dissipated, PDISS, expressed in terms of power  
delivered to the load and load resistance, is  
POWER DISSIPATION  
Another important advantage in using a bridged-output config-  
uration is the fact that bridged-output amplifiers are more  
efficient than single-ended amplifiers in delivering power to a  
load. Efficiency is defined as the ratio of power from the power  
supply to power delivered to the load  
2 2VDD ×VPEAK  
PDISS  
=
(7)  
πRL  
P
L
η =  
The graph of this equation is shown in Figure 44.  
P
SY  
1.5  
V
= 5V  
DD  
An amplifier with a higher efficiency has less internal power  
dissipation, which results in a lower die-to-case junction tem-  
perature as compared to an amplifier that is less efficient. This is  
important when considering the amplifier maximum power  
dissipation rating vs. ambient temperature. An internal power  
dissipation vs. output power equation can be derived to fully  
understand this.  
R
= 4Ω  
L
1.0  
0.5  
0
R
= 8Ω  
L
The internal power dissipation of the amplifier is the internal  
voltage drop multiplied by the average value of the supply  
current. An easier way to find internal power dissipation is to  
measure the difference between the power delivered by the  
supply voltage source and the power delivered into the load.  
The waveform of the supply current for a bridged-output  
amplifier is shown in Figure 43.  
R
= 16Ω  
L
0
0.5  
1.0  
1.5  
OUTPUT POWER (W)  
Figure 44. Power Dissipation vs. Output Power with VDD = 5 V  
Because the efficiency of a bridged-output amplifier (Equation 3  
divided by Equation 6) increases with the square root of PL, the  
power dissipated internally by the device stays relatively flat and  
actually decreases with higher output power. The maximum  
power dissipation of the device can be found by differentiating  
Equation 7 with respect to load power and setting the derivative  
equal to zero. This yields  
V
OUT  
V
PEAK  
TIME  
T
I
SY  
2 ×VDD  
πRL  
PDISS  
PL  
1  
I
DD, PEAK  
2
=
× PL 1=0  
(8)  
I
DD, AVG  
and occurs when  
2VDD  
T
TIME  
2
PDISS,MAX  
=
(9)  
Figure 43. Bridged Amplifier Output Voltage and Supply Current vs. Time  
π2 RL  
By integrating the supply current over a period, T, then dividing  
the result by T, IDD,AVG can be found. Expressed in terms of peak  
output voltage and load resistance  
Using Equation 9 and the power derating curve in Figure 31,  
the maximum ambient temperature can be found easily. This  
ensures that the SSM2211 does not exceed its maximum  
junction temperature of 150°C. The power dissipation for a  
2VPEAK  
IDD,AVG  
=
(5)  
single-ended output application where the load is capacitively  
πRL  
coupled is given by  
Therefore, power delivered by the supply, neglecting the bias  
current for the device, is  
2 2 ×VDD  
PDISS  
=
×
P L PL  
(10)  
2 VDD ×VPEAK  
π RL  
The graph of Equation 10 is shown in Figure 45.  
PSY  
=
(6)  
πRL  
Rev. D | Page 16 of 24  
 
 
 
 
 
 
 
 
SSM2211  
0.35  
0.30  
1.6  
1.4  
V
= 5V  
DD  
R
= 4Ω  
L
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
0.25  
0.20  
0.15  
RL = 4Ω  
RL = 8Ω  
R
= 8Ω  
L
RL = 16Ω  
0.10  
0.05  
0
R
= 16Ω  
L
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
0
0.1  
0.2  
0.3  
0.4  
OUTPUT POWER (W)  
SUPPLY VOLTAGE (V)  
Figure 45. Power Dissipation vs. Single-Ended Output Power  
with VDD = 5 V  
Figure 46. Maximum Output Power vs. VSY  
Shutdown Feature  
The maximum power dissipation for a single-ended output is  
The SSM2211 can be put into a low power consumption shut-  
down mode by connecting Pin 1 to 5 V. In shutdown mode,  
the SSM2211 has an extremely low supply current of less than  
10 nA. This makes the SSM2211 ideal for battery-powered  
applications.  
2
VDD  
PDISS,MAX  
=
(11)  
2 π2RL  
OUTPUT VOLTAGE HEADROOM  
Connect Pin 1 to ground for normal operation. Connecting Pin 1  
to VDD mutes the outputs and puts the device into shutdown  
mode. A pull-up or pull-down resistor is not required. Pin 1  
should always be connected to a fixed potential, either VDD or  
ground, and never be left floating. Leaving Pin 1 unconnected  
can produce unpredictable results.  
The outputs of both amplifiers in the SSM2211 can come to  
within 400 mV of either supply rail while driving an 8 Ω load.  
As compared to equivalent competitor products, the SSM2211  
has a higher output voltage headroom. This means that the  
SSM2211 can deliver an equivalent maximum output power  
while running from a lower supply voltage. By running at a  
lower supply voltage, the internal power dissipation of the  
device is reduced, as can be seen in Equation 9. This extended  
output headroom, along with the LFCSP package, allows the  
SSM2211 to operate in higher ambient temperatures than  
competitor devices.  
AUTOMATIC SHUTDOWN-SENSING CIRCUIT  
Figure 47 shows a circuit that can be used to take the SSM2211  
in and out of shutdown mode automatically. This circuit can  
be set to turn the SSM2211 on when an input signal of a certain  
amplitude is detected. The circuit also puts the device into low  
power shutdown mode if an input signal is not sensed within  
a certain amount of time. This can be useful in a variety of  
portable radio applications, where power conservation is critical.  
The SSM2211 is also capable of providing amplification even at  
supply voltages as low as 2.7 V. The maximum power available at  
the output is a function of the supply voltage. Therefore, as the  
supply voltage decreases, so does the maximum power output  
from the device. The maximum output power vs. supply voltage  
at various bridge-tied load resistances is shown in Figure 46. The  
maximum output power is defined as the point at which the  
output has 1% total harmonic distortion (THD + N).  
R8  
V
DD  
R7  
R5  
4
1
5
8
C2  
DD  
V
DD  
V
SSM2211  
IN  
To find the minimum supply voltage needed to achieve a  
specified maximum undistorted output power use Figure 46.  
R6  
R4  
A1  
V
OP181  
For example, an application requires only 500 mW to be  
output for an 8 Ω speaker. With the speaker connected in a  
bridged-output configuration, the minimum supply voltage  
required is 3.3 V.  
A2  
+
D1  
C1  
R1  
R3  
R2  
NOTE  
ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 47. Automatic Shutdown Circuit  
Rev. D | Page 17 of 24  
 
 
 
 
SSM2211  
The input signal to the SSM2211 is also connected to the non-  
inverting terminal of A2. R1, R2, and R3 set the threshold  
voltage at which the SSM2211 is to be taken out of shutdown  
mode. D1 half-wave rectifies the output of A2, discharging C1  
to ground when an input signal greater than the set threshold  
voltage is detected. R4 controls the charge time of C1, which  
sets the time until the SSM2211 is put back into shutdown  
mode after the input signal is no longer detected.  
SHUTDOWN-CIRCUIT DESIGN EXAMPLE  
In this example, a portable radio application requires the  
SSM2211 to be turned on when an input signal greater than  
50 mV is detected. The device needs to return to shutdown mode  
within 500 ms after the input signal is no longer detected. The  
lowest frequency of interest is 200 Hz, and a 5 V supply is used.  
The minimum gain of the shutdown circuit, from Equation 12,  
is AV = 100. R1 is set to 100 kΩ. Using Equation 13 and  
Equation 14, R2 = 98 kΩ and R3 = 4.9 MΩ. C1 is set to 0.01 μF,  
and based on Equation 15, R4 is set to 10 MΩ . To minimize  
power supply current, R5 and R6 are set to 10 MΩ. The  
previous procedure provides an adequate starting point for the  
shutdown circuit. Some component values may need to be  
adjusted empirically to optimize performance.  
R5 and R6 are used to establish a voltage reference point equal  
to half of the supply voltage. R7 and R8 set the gain of the  
SSM2211. A 1N914 or equivalent diode is required for D1, and  
A2 must be a rail-to-rail output amplifier, such as OP181 or  
equivalent. This ensures that C1 discharges sufficiently to bring  
the SSM2211 out of shutdown mode.  
To find the appropriate component values, first, the gain of A2  
must be determined by  
START-UP POPPING NOISE  
During power-up or release from shutdown mode, the midrail  
bypass capacitor, CB, determines the rate at which the SSM2211  
starts up. By adjusting the charging time constant of CB, the  
start-up pop noise can be pushed into the subaudible range,  
greatly reducing start-up popping noise. On power-up, the  
midrail bypass capacitor is charged through an effective  
resistance of 25 kΩ. To minimize start-up popping, the charging  
time constant for CB needs to be greater than the charging time  
constant for the input coupling capacitor, CC.  
VSY  
VTHS  
AV,MIN  
=
(12)  
where:  
VSY is the single supply voltage.  
THS is the threshold voltage.  
V
AV must be set to a minimum of 2 for the circuit to work  
properly.  
Next, choose R1 and set R2 to  
CB × 25 kΩ > CC × R1  
(16)  
2
AV  
For an application where R1 = 10 kΩ and CC = 0.22 μF, CB must  
be at least 0.1 μF to minimize start-up popping noise.  
R2 = R1 1−  
(13)  
(14)  
SSM2211 Amplifier Design Example  
Find R3 as  
Maximum Output Power  
Input Impedance  
Load Impedance  
Input Level  
1 W  
20 kΩ  
8 Ω  
1 V rms  
R1×R2  
R2 + R2  
(
)
R3 =  
AV 1  
C1 can be arbitrarily set but should be small enough to prevent  
A2 from becoming capacitively overloaded. R4 and C1 control  
the shutdown rate. To prevent intermittent shutdown with low  
frequency input signals, the minimum time constant must be  
Bandwidth  
20 Hz − 20 kHz 0.25 dB  
The configuration shown in Figure 42 is used. The first thing to  
determine is the minimum supply rail necessary to obtain the  
specified maximum output power. From Figure 46, for 1 W of  
output power into an 8 Ω load, the supply voltage must be at  
least 4.6 V. A supply rail of 5 V can be easily obtained from a  
10  
R4×C1 ≥  
(15)  
fLOW  
where fLOW is the lowest input frequency expected.  
Rev. D | Page 18 of 24  
 
 
 
 
 
 
SSM2211  
voltage reference. The extra supply voltage also allows the  
SSM2211 to reproduce peaks in excess of 1 W without clipping  
the signal. With VDD = 5 V and RL = 8 Ω, Equation 9 shows that  
the maximum power dissipation for the SSM2211 is 633 mW.  
From the power derating curve in Figure 31, the ambient  
temperature must be less than 73°C for the SOIC and 118°C for  
the LFCSP.  
SINGLE-ENDED APPLICATIONS  
There are applications in which driving a speaker differentially is  
not practical, for example, a pair of stereo speakers where the  
minus terminal of both speakers is connected to ground. Figure 48  
shows how this can be accomplished.  
10kΩ  
5V  
The required gain of the amplifier can be determined from  
Equation 17 as  
6
10kΩ  
0.47μF  
AUDIO  
INPUT  
4
3
PL × RL  
5
8
(17)  
AV =  
= 2.8  
SSM2211  
VIN,rms  
+
1
From Equation 1  
7
470μF  
+
2
250mW  
SPEAKER  
(8Ω)  
RF AV  
=
0.1μF  
RI  
2
or RF = 1.4 × RI. Because the desired input impedance is 20 kΩ,  
RI = 20 kΩ and R2 = 28 kΩ.  
Figure 48. Single-Ended Output Application  
It is not necessary to connect a dummy load to the unused  
output to help stabilize the output. The 470 μF coupling  
capacitor creates a high-pass frequency cutoff of 42 Hz, as given  
in Equation 4, which is acceptable for most computer speaker  
applications. The overall gain for a single-ended output  
configuration is AV = RF/R1, which for this example is equal to 1.  
The final design step is to select the input capacitor. When  
adding an input capacitor, CC, to create a high-pass filter, the  
corner frequency needs to be far enough away for the design to  
meet the bandwidth criteria. For a first-order filter to achieve a  
pass-band response within 0.25 dB, the corner frequency must  
be at least 4.14× away from the pass-band frequency. So, (4.14 ×  
fHP) < 20 Hz. Using Equation 2, the minimum size of input  
capacitor can be found.  
DRIVING TWO SPEAKERS SINGLE ENDEDLY  
It is possible to drive two speakers single endedly with both  
outputs of the SSM2211.  
1
CC >  
(18)  
20kΩ  
20 Hz  
× 20 kꢀ ⎜  
5V  
4.14  
470μF  
LEFT  
Therefore, CC > 1.65 μF. Using a 2.2 μF is a practical choice for CC.  
SPEAKER  
6
(8Ω)  
+
20kΩ  
4
3
AUDIO  
INPUT  
The gain bandwidth product for each internal amplifier in the  
SSM2211 is 4 MHz. Because 4 MHz is much greater than  
4.14 × 20 kHz, the design meets the upper frequency bandwidth  
criteria. The SSM2211 can also be configured for higher  
differential gains without running into bandwidth limitations.  
Equation 16 shows an appropriate value for CB to reduce start-  
up popping noise.  
5
8
1μF  
SSM2211  
+
1
7
470μF  
+
2
RIGHT  
SPEAKER  
(8Ω)  
0.1μF  
Figure 49. SSM2211 Used as a Dual-Speaker Amplifier  
(
2.2F
)(
20 kꢀ  
)
CB >  
=1.76F  
(19)  
Each speaker is driven by a single-ended output. The trade-off  
is that only 250 mW of sustained power can be put into each  
speaker. Also, a coupling capacitor must be connected in series  
with each of the speakers to prevent large dc currents from  
flowing through the 8 Ω speakers. These coupling capacitors  
produce a high-pass filter with a corner frequency given by  
Equation 4. For a speaker load of 8 Ω and a coupling capacitor  
of 470 μF, this results in a −3 dB frequency of 42 Hz.  
25 kꢀ  
Selecting CB to be 2.2 μF for a practical value of capacitor  
minimizes start-up popping noise.  
To summarize the final design:  
VDD  
R1  
RF  
CC  
CB  
5 V  
20 kΩ  
28 kΩ  
2.2 μF  
2.2 μF  
Because the power of a single-ended output is one-quarter that  
of a bridged output, both speakers together are still half as loud  
(−6 dB SPL) as a single speaker driven with a bridged output.  
TA, MAX 85°C  
Rev. D | Page 19 of 24  
 
 
 
SSM2211  
The polarity of the speakers is important, as each output is 180  
degrees out of phase with the other. By connecting the minus  
terminal of Speaker 1 to Pin 5, and the plus terminal of  
Speaker 2 to Pin 8, proper speaker phase can be established.  
Therefore, for PO = 1 W and RL = 8 Ω, V = 2.8 V rms, or  
8 V p­p. If the available input signal is 1.4 V rms or more, use  
the board as is, with RF = RI = 20 kΩ. If more gain is needed,  
increase the value of RF.  
The maximum power dissipation of the device, assuming both  
loads are equal, can be found by doubling Equation 11. If the  
loads are different, use Equation 11 to find the power dissipa-  
tion caused by each load, then take the sum to find the total  
power dissipated by the SSM2211.  
When you have determined the closed-loop gain required by  
your source level, and can develop 1 W across the 8 Ω load  
resistor with the normal input signal level, replace the resistor  
with your speaker. Your speaker can be connected across the  
VO1 and VO2 posts for bridged-mode operation only after the  
8 Ω load resistor is removed. For no phase inversion, VO2 must  
be connected to the (+) terminal of the speaker.  
EVALUATION BOARD  
An evaluation board for the SSM2211 is available. For more  
information, call 1-800-ANALOGD.  
V
O2  
CH A  
5
V+  
R1  
51k  
GND  
2.5V  
COMMON  
MODE  
SSM2211  
8Ω  
1W  
+
PROBES  
C1  
0.1µF  
C2  
10µF  
SHUTDOWN  
ON  
8
CH B  
V
O2  
CH B DISPLAY  
6
J1  
INV. ON A+B  
V
O1  
8
1
2
3
4
OSCILLOSCOPE  
AUDIO  
INPUT  
R
SSM2211  
L
1W 8Ω  
Figure 51. Using an Oscilloscope to Display the Bridged-Output Voltage  
+
To use the SSM2211 in a single-ended-output configuration,  
replace J1 and J2 jumpers with electrolytic capacitors of a  
suitable value, with the negative terminals to the output  
terminals VO1 and VO2. The single-ended loads can then be  
returned to ground. Note that the maximum output power is  
reduced to 250 mW (one-quarter of the rated maximum), due  
to the maximum swing in the nonbridged mode being one-half  
and power being proportional to the square of the voltage. For  
frequency response down 3 dB at 100 Hz, a 200 μF capacitor is  
required with 8 Ω speakers.  
5
J2  
VOLUME  
20kPOT.  
R
20kΩ  
C
I
IN  
1µF  
7
V
O1  
CW  
R
F
20kΩ  
C1  
0.1µF  
Figure 50. Evaluation Board Schematic  
The voltage gain of the SSM2211 is given by Equation 20.  
RF  
AV =2×  
RI  
(20)  
The SSM2211 evaluation board also comes with a shutdown  
switch, which allows the user to switch between on (normal  
operation) and the power-conserving shutdown mode.  
If desired, the input signal may be attenuated by turning the  
10 kΩ potentiometer in the CW (clockwise) direction. CIN  
isolates the input common-mode voltage (VD/2) present at Pin 2  
and Pin 3. With V+ = 5 V, there is 2.5 V common-mode voltage  
present at both output terminals, VO1 and VO2, as well.  
LFCSP PRINTED CIRCUIT BOARD LAYOUT  
CONSIDERATIONS  
The LFCSP is a plastic encapsulated package with a copper lead  
frame substrate. This is a leadless package with solder lands on  
the bottom surface of the package, instead of conventional  
formed perimeter leads. A key feature that allows the user to  
reach the quoted θJA performance is the exposed die attach  
paddle (DAP) on the bottom surface of the package. When  
soldered to the PCB, the DAP can provide efficient conduction  
of heat from the die to the PCB. In order to achieve optimum  
package performance, consideration should be given to the PCB  
pad design for both the solder lands and the DAP. For further  
information the user is directed to the Amkor Technology  
document, Application Notes for Surface Mount Assembly of  
Amkor’s MicroLead Frame (MLF) Packages.” This can be  
downloaded from the Amkor Technology website,  
CAUTION: The ground lead of the oscilloscope probe, or any  
other instrument used to measure the output signal, must not  
be connected to either output, as this shorts out one of the  
amplifier outputs and can possibly damage the device.  
A safe method of displaying the differential output signal using a  
grounded scope is shown in Figure 51. Connect Channel A probe  
to the VO2 terminal post. Connect Channel B probe to the VO1  
post. Invert Channel B, and add the two channels together. Most  
multichannel oscilloscopes have this feature built in. If you must  
connect the ground lead of the test instrument to either output  
signal pins, a power-line isolation transformer must be used to  
isolate the instrument ground from the power supply ground.  
Recall that  
www.amkor.com, as a product application note.  
V = P × R  
Rev. D | Page 20 of 24  
 
 
 
SSM2211  
OUTLINE DIMENSIONS  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2440)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 52. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body, S-Suffix  
(R-8)  
Dimensions shown in millimeters and (inches)  
0.50  
0.40  
0.30  
3.00  
BSC SQ  
0.60 MAX  
8
PIN 1  
INDICATOR  
1
PIN 1  
INDICATOR  
1.89  
1.74  
1.59  
2.75  
BSC SQ  
TOP  
VIEW  
1.50  
REF  
0.50  
BSC  
4
5
1.60  
1.45  
1.30  
0.70 MAX  
0.65TYP  
12° MAX  
0.90 MAX  
0.85 NOM  
0.05 MAX  
0.01 NOM  
SEATING  
PLANE  
0.30  
0.23  
0.18  
0.20 REF  
Figure 53. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]  
3 mm × 3 mm Body, Very Thin, Dual Lead  
(CP-8-2)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model  
Temperature Range  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
Package Description  
8-Lead LFCSP_VD  
8-Lead LFCSP_VD  
8-Lead LFCSP_VD  
8-Lead LFCSP_VD  
8-Lead LFCSP_VD  
8-Lead LFCSP_VD  
8-Lead SOIC_N  
8-Lead SOIC_N  
8-Lead SOIC_N  
8-Lead SOIC_N  
8-Lead SOIC_N  
Package Option  
CP-8-2  
CP-8-2  
CP-8-2  
CP-8-2  
Branding  
B5A  
B5A  
SSM2211CP-R2  
SSM2211CP-REEL  
SSM2211CP-REEL7  
SSM2211CPZ-R21  
SSM2211CPZ-REEL1  
SSM2211CPZ-REEL71  
SSM2211S  
SSM2211S-REEL  
SSM2211S-REEL7  
SSM2211SZ1  
B5A  
B5A#  
B5A#  
B5A#  
CP-8-2  
CP-8-2  
R-8 (S-Suffix)  
R-8 (S-Suffix)  
R-8 (S-Suffix)  
R-8 (S-Suffix)  
R-8 (S-Suffix)  
R-8 (S-Suffix)  
SSM2211SZ-REEL1  
SSM2211SZ-REEL71  
SSM2211-EVAL  
8-Lead SOIC_N  
Evaluation Board  
1 Z = Pb-free part; # denotes lead-free product may be top or bottom marked.  
Rev. D | Page 21 of 24  
 
 
SSM2211  
NOTES  
Rev. D | Page 22 of 24  
SSM2211  
NOTES  
Rev. D | Page 23 of 24  
SSM2211  
NOTES  
©2006 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
C00358-0-11/06(D)  
Rev. D | Page 24 of 24  

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