AD1988AJCPZ-RL [ADI]
High Definition Audio SoundMAX㈢ Codec; 高清晰度音频编解码器SoundMAX㈢
| 型号： | AD1988AJCPZ-RL |
| 厂家： | 
ADI |
| 描述： | High Definition Audio SoundMAX㈢ Codec |
| 文件： | 总20页 (文件大小：699K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Definition Audio SoundMAX® Codec
AD1988A/AD1988B
ENHANCED FEATURES
FEATURES
Ten 192 kHz DACs
Three stereo headphone amps
Five independent stereo DAC pairs
AD1988A: Windows Vista™ Operating System Premium Logo
7.1 surround sound plus independent headphone
Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz,
44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz
sample rates
Selectable stereo mixer on outputs
16-, 20-, and 24-bit PCM resolution
Six 192 kHz ADCs
compliant
95 dB outputs
90 dB audio inputs
AD1988B: Windows Vista Premium Logo compliant and
Dolby Master Studio™ compliant
101 dB outputs
92 dB audio inputs
Three independent stereo ADC pairs
Simultaneous record of up to three stereo channels
Support for quad microphone arrays plus independent
capture channel
Internal 32-bit arithmetic for greater accuracy
Impedance and presence detection on all jacks
Analog PCBEEP and digital synthesis BEEP
C/LFE channel swap
Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz,
44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz
sample rates
16-, 20-, and 24-bit resolution
S/PDIF output
Two general-purpose digital I/O (GPIO) pins
3.3 V analog and digital supplies
Reduced support components
Advanced power management modes
48-pin LQFP and LFCSP_VQ package options, Pb-free
Supports Andrea Active Noise Reduction headphones
Hardware volume control
44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz
sample rates
16-, 20-, and 24-bit data widths
PCM, WMA/PRO, Dolby®, AC3, and DTS® formats
Digital PCM gain control
Built-in microphone gain amps
Adjustable microphone bias pins
Digital PCM ADC/stream mixer
S/PDIF input
44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz
sample rates
16-, 20-, and 24-bit data widths
PCM, WMA/PRO, Dolby, AC3, and DTS formats
Digital PCM gain control
Auto synchronizes to source
High quality stereo CD input with GND sense
MONO_OUT pin for internal speakers or telephony
Retasking jack support
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD1988A/AD1988B
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................8
Clarification of Output Configurations .................................. 11
HD Audio Widgets......................................................................... 12
Jack Presence Detection................................................................. 18
HD Audio Style Jack Presence Detection ............................... 18
Hardware Volume Control............................................................ 19
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 20
Enhanced Features............................................................................ 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
Test Conditions............................................................................. 4
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
REVISION HISTORY
10/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
AD1988A/AD1988B
FUNCTIONAL BLOCK DIAGRAM
NID: 07
AVSS
NID: 1C
24 bit
32-192 kHz
PCM Digital
S/PDIF RX
+3.3V +/-5% AVDD
Digital
GAM
S/PDIF In
/ GPIO_1
/
MIC Bias Regulator
NID: 35
MIC_BIAS_FILT
Stereo Paths
Input_En
Z
GPIO_1
-34 .5 to +12 dB
Po
w er
Co ntrol
NID: 02
NID: 1D
Mono Paths
NID: 1B
0
(01 )
24 bit
32-192 kHz
PCM
M
M
VREF
VREF_FILT
Digital
AM
Σ
Z
S/PDIF Out
NID: 23
101+ dB (AD1988B)
/ Digital
1
(0B)
Pow er
S/PDIF T X
Control
Output_En
-58 .5 to 0dB
DAC _4
NID: 0A
24 bit
0
(0A)
192 kHz
PCM
Σ∆ DAC
Digital
NID: 28
M
M
A
NID: 25
Σ
M
Z
PORT-H
-58 .5 to
0 dB
1
(21
)
Split-Z
Surround
Center
EN
NID: 16
DAC _3
NID: 06
PORT-F
MIC BIAS
24 bit
192 kHz
PCM
BIAS
Z
Z
0
1
(06
(21
)
)
Digital
NID: 2A
M
M
A
Σ∆ DAC
Σ
M
PORT-F
-58 .5 to
0 dB
Surround
Back
Boost
NID: 3B
EN
DAC _2
NID: 05
24 bit
0
1
(05
(21
)
)
192 kHz
PCM
Σ∆ DAC
Digital
NID:27
M
M
A
NID: 24
S WA P
Σ
M
Z
PORT-G
Center LFE
-58 .5 to
0 dB
/
EN
NID: 12
PORT-D
MIC BIAS
EAPD
BIAS
EAPD
/
DAC _1
NID: 04
Z
Z
/
24 bit
192 kHz
PCM
0
1
(04
(21
)
)
Digital
NID: 29
M
M
H
D
A
Σ∆ DAC
HP
AMP
Σ
M
PORT-D
-58 .5 to
0 dB
HP-Front L/R
Mixer
Power
Control
NID: 19
DAC _0
NID: 03
A
U
D
I
Boost
NID: 3D
24 bit
192 kHz
PCM
EN
Digital
A
NID: 21
Σ∆ DAC
NID: 11
AM
-46 .5 to
-58 .5 to
0 dB
PORT-A
MIC BIAS
BIAS
Z
Z
0
1
2
(03
(04
(06
)
)
)
0
dB
0
1
(37
(21
)
)
NID: 22
M
M
3:1
O
HP
AMP
GPIO_1
Σ
M
PORT-A
NID: 20
5
(3B – P ort-F)
NID: 37
GPIO
Headphone
GPIO_0
Volume
/
3
(3D – P ort-D)
I
SDI
SDO
-34.5 to +12dB
GAM
Boost
NID: 38
N
T
E
R
F
A
C
E
EN
M
HW
Volume
Control
NID: 1F
2
(38 – P ort-A)
0
1
(03
(04
)
)
GAM
GAM
SYNC
0
1
(36
(21
)
)
NID: 1E
NID: 13
3:1
M
M
NID: 2D
2
(06
)
NID: 33
RESET#
BITCLK
2
(24
(25
)
)
Σ
MONO_OUT
Σ
A
NID: 36
1
(33
–
P
ort-C/H/G)
1
0
S tereo
3
3:1
GAM
5
-46 .5 to 0 dB
Down-M ix
(3A)
2
NID: 14
1
4
Σ
NID: 34
PORT-B
MIC BIAS
2
1
0
(24
(25
)
)
NID: 30
BIAS
Z
Z
0
1
2
(03
(04
(06
)
)
)
0
4
(34 – P ort-E /H/G)
6
7
3:1
0
1
(30
(21
)
)
GAM
GAM
NID: 2B
3:1
M
M
(3C)
HP
AMP
Σ
M
PORT-B
Microphone
GAM
GAM
0
(39
–
P
ort-B)
Boost
NID: 39
EN
NID: 0B
Selector
3:1
NID: 17
PORT-E
MIC BIAS
BIAS
Z
Z
ADC _0
NID: 08
ADC SE L_0
NID: 0C
1
0
(21
(32
)
)
NID: 26
M
M
S WA
P
24 bit
192 kHz
PCM
Digital
/
Σ
M
PORT-E
Selector
10 :1
NID: 32
A na log
GM
0
1
(05
(04
)
)
MIC 1/2
2:1
Σ∆ ADC
-58 .5 to +22 .5dB
Boost
NID: 3C
EN
NID: 15
PORT-C
MIC BIAS
EAPD
+1.5V +/- 10
%
BIAS /
EAPD
Z
Z
/
(A D1988L15
)
1
0
(21
(31
)
)
ADC _1
NID: 09
ADC SE L_1
NID: 0D
NID: 2C
M
M
DVIO
+3.3V +/- 10
(A D1988L33
%
%
)
24 bit
192 kHz
PCM
Σ
M
PORT-C
Digital
/
NID: 31
0
1
(04
)
Selector
10 :1
A na log
GM
Line In
DVDD
+3.3V +/- 10
2:1
(0A)
Σ∆ ADC
-58 .5 to +22 .5dB
Boost
NID: 3A
EN
+5%
-20
DVFILT
+1.8V
%
PCBeep
NID: 1A
9
7
6
(20
(25
(24
-
M ixe r)
–
–
P ort-H)
P ort-G)
ADC _2
NID: 0F
ADC SE L_2
NID: 0E
3
(3B
–
P
P
ort-F)
ort-D)
NID: 10
DVSS
24 bit
192 kHz
PCM
Σ∆ ADC
8
0
1
4
(3D
(38
(39
(3C
–
Digital
/
Digital Beep
AM
-45 .0 t o
Selector
10 :1
A na log
GM
–
P ort-A)
0
dB
3
dB S tep s
– P ort-B)
-58 .5 to +22 .5dB
–
P
P
ort-E )
ort-C)
2
5
(3A
(18
–
NID: 18
CD_L
CD
-
CD )
Diff
CD_GND
CD_R
A
m p
Figure 1. Block Diagram
Rev. 0 | Page 3 of 20
AD1988A/AD1988B
SPECIFICATIONS
TEST CONDITIONS
Test Conditions for the AD1988A and AD1988B are as follows, unless otherwise noted.
Analog Input/Output Conditions
Temperature at 25°C
DAC Conditions
Calibrated
Digital supply (DVDD) at 3.3 V 10ꢀ
Analog supply (AVDD) at 3.3 V 5ꢀ
MIC_BIAS_FILT at 5.0 V 5ꢀ
Sample rate (FS) at 48 kHz
Input signal at 1008 Hz
Analog output pass band at 20 Hz to 20 kHz
Output −3 dB relative to full scale
10 kΩ output load: line out tests
32 Ω output load: headphone tests
ADC Conditions
Calibrated
0 db PGA gain
Input −3.0 dB relative to full scale
Table 1.
Typ
AD1988A/
Min AD1988B Max
Parameter
Conditions/Comments
fS 8 kHz ~ 192 kHz
Unit
DIGITAL DECIMATION AND INTERPOLATION FILTERS1
Pass Band
Pass-Band Ripple
0
0.40 fS Hz
0.00ꢀ dB
Stop Band
Stop Band Rejection
Group Delay
Group Delay Variation over Pass Band
ANALOG-TO-DIGITAL CONVERTERS
Resolution1
0.60 fS
Hz
−100 dB
1/fS
20
0
μs
24
Bits
Gain Error
Full-scale span relative to nominal input
voltage
10
%
Interchannel Gain Mismatch
ADC Offset Error
ADC Crosstalk1
Difference of gain errors
0.2
0.ꢀ
ꢀ
dB
mV
Line Inputs
Input L, Ground R, Read R;
Input R, Ground L, Read L
−8ꢀ
dB
dB
LINE_IN to Other
DIGITAL-TO-ANALOG CONVERTERS
Resolution1
−100
−80
24
Bits
%
Gain Error
Full-scale span relative to nominal input
voltage
10
Interchannel Gain Mismatch
Total Out-of-Band Energy 1
DAC Crosstalk1
Difference of gain errors
To 100 kHz
Input L, Zero R, Read R;
Input R, Zero L, Read L
0.2
−8ꢀ
−9ꢀ
0.ꢀ
dB
dB
dB
DAC VOLUMES—PROGRAMMABLE GAIN ATTENUATOR
Step Size
Output Gain/Attenuation Range
DAC_0, DAC_1, DAC_2, DAC_3, DAC_4
+1.ꢀ
+1.ꢀ
dB
dB
−ꢀ8.ꢀ
−ꢀ8.ꢀ
0
ADC VOLUMES—PROGRAMMABLE GAIN
AMPLIFIER/ATTENUATOR
Step Size
ADCSEL_0, ADCSEL_1, ADCSEL_2
dB
PGA Gain/Attenuation Range
+22.ꢀ dB
ANALOG MIXER—PROGRAMMABLE GAIN
AMPLIFIER/ATTENUATOR
Signal-to-Noise Ratio (SNR)1, 2
Step Size
Input to output (including CD in)
All mixer inputs
9ꢀ/96
+1.ꢀ
dB
Input Gain/Attenuation Range
All mixer inputs
−34.ꢀ
+12.0 dB
Rev. 0 | Page 4 of 20
AD1988A/AD1988B
Typ
AD1988A/
Min AD1988B Max
Parameter
Conditions/Comments
Unit
ANALOG LINE LEVEL OUTPUTS
Full-Scale Output Voltage
PORT-C, PORT-E, PORT-F, PORT-G, PORT-H, and
MONO_OUT
Output Impedance1
Line out drive enabled
When ports are used as line level outputs
1.0
2.83
V rms3
V p-p
300
Ω
External Total Load Impedance
Output Capacitance1
10
1ꢀ
kΩ
pF
External Load Capacitance1
Total Harmonic Distortion (THD+N)1
Dynamic Range1
1000 pF
−8ꢀ/−8ꢀ
+9ꢀ/+101
dB
dB
−60 dB reference to fS A-weighted
ANALOG HP DRIVE OUTPUTS
Full-Scale Output Voltage
PORT-A, PORT-B, and PORT-D
Output Impedance1
Output drive enabled
When ports are used as outputs
1.0
2.83
V rms3
V p-p
Ω
0.ꢀ
External Load Impedance1
Output Capacitance1
32
Ω
pF
1ꢀ
External Load Capacitance1
Total Harmonic Distortion (THD+N)1
1000 pF
10 kΩ load
32 Ω load
−83/−84
−83/−84
+9ꢀ/+101
dB
dB
dB
Dynamic Range1
−60 dB reference to fS A-weighted, 10 kΩ or
32 Ω loads
ANALOG INPUTS
PORT-G, PORT-H, or CD
When ports are used as inputs
1
V rms3
2.83
V p-p
Microphone Boost Amplifiers
PORT-A, PORT-B, PORT-C, PORT-D, PORT-E, or PORT-F 0 dB boost
1
V rms3
V p-p
V rms3
V p-p
V rms3
V p-p
V rms3
V p-p
2.83
0.316
0.894
0.1
0.283
0.032
0.089
+10 dB boost
+20 dB boost
+30 dB boost
Input Impedance1
PCBEEP
PORT-G, PORT-H
All others (with 0 dB boost)
Input Capacitance1
23
60
1ꢀ0
ꢀ
kΩ
kΩ
kΩ
pF
7.ꢀ
ANALOG INPUT PERFORMANCE
Total Harmonic Distortion Plus Noise (THD+N)1
Dynamic Range
Signal-to-Noise Ratio (SNR)2
−81/−82
+90/+92
+90/+92
dB
dB
dB
−60 dB in reference to fS A-weighted
STATIC DIGITAL SPECIFICATIONS
Digital I/O (DVIO)
VIH
VIL
VOH
VOL
DVIO @ 3.3 V 10%
2.97 3.3
2.0
3.63
V
V
V
V
V
0.8
2.4
0.6
Rev. 0 | Page ꢀ of 20
AD1988A/AD1988B
Typ
AD1988A/
Min AD1988B Max
Parameter
Conditions/Comments
Unit
POWER SUPPLY
Analog (AVDD
)
3.3 V ꢀ%
Power Supply Range
Power Dissipation
Supply Current
3.13 3.30
1ꢀꢀ/172
47/ꢀ2
3.46
3.63
3.63
V
mW
mA
Digital (DVDD
)
3.3 V 10%
Power Supply Range
Power Dissipation
Supply Current
2.97 3.30
V
mW
mA
247.ꢀ/238
7ꢀ/7ꢀ
Digital I/O (DVIO)
3.3 V 10%
Power Supply Range
Power Dissipation
Supply Current
2.97 3.30
V
3.96
1.20
80
mW
mA
dBV
Power Supply Rejection1 (AVDD
)
100 mV p-p signal @ 1 kHz
1 Guaranteed, not tested.
2 SNR measurement defined as “the difference in level between a reference output signal and the device output with no signal applied.” This definition is taken from B.
Metzler, Audio Measurement Handbook, 1st edition, Audio Precision, Inc., 1993, p. 16ꢀ.
3 RMS values assume sine wave input.
Table 2. Power-Down States
AD1988A/AD1988B
Parameter
Comments
D-State
DIDD Typ
AIDD Typ
Unit
POWER-DOWN STATES
FUNCTION Node
DAC Pair
ADC Pair
Mixer Power Control (and Associated Amps)
MIC_BIAS
RESET
D3
D3
D3
D3
D3
21/20
6/6
ꢀ.3/ꢀ.4
0/0
0/0
2.9/2.7
1.2/1.7
ꢀ/ꢀ.6
3.2/3.1
2.0/2.4
0.ꢀ/0.ꢀ
3.1/3.4
mA
mA
mA
mA
mA
mA
Powered down saves (each)
Powered down saves (each)
Saves
Powered down saves
Low (active) state
Rev. 0 | Page 6 of 20
AD1988A/AD1988B
ABSOLUTE MAXIMUM RATINGS
Table 3.
THERMAL RESISTANCE
Ambient temperature ratings are as follows:
AMB = TCASE − (PD × θCA)
Parameter
Rating
Digital (DVDD
Digital I/O (DVIO)
Analog (AVDD
Input Current (Except Supply Pins)
Analog Input Voltage (Signal Pins)
Digital Input Voltage (Signal Pins)
Ambient Temperature (Operating)
Storage Temperature Range
)
−0.30 V to +3.6ꢀ V
−0.30 V to +3.6ꢀ V
−0.30 V to +3.6ꢀ V
10.0 mA
−0.30 V to AVDD + 0.3 V
−0.30 V to DVIO + 0.3 V
0°C to +70°C
T
where:
)
TCASE = case temperature in °C.
PD = power dissipation in W.
θCA = thermal resistance (case-to-ambient).
−6ꢀ°C to +1ꢀ0°C
Table 4. Thermal Resistance
1
2
3
Package Type
LQFP
θJA
θJC
17
1ꢀ
θCA
31
Unit
ºC/W
ºC/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
48
LFCSP_VQ4
47
32
1 θJA = thermal resistance: junction-to-ambient.
2 θJC = thermal resistance: junction-to-case.
3 θCA = thermal resistance: case-to-ambient.
4 VQ = very thin quad.
ESD CAUTION
Rev. 0 | Page 7 of 20
AD1988A/AD1988B
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48 47 46 45 44 43 42 41 40 39 38 37
1
2
36
35
34
33
32
31
30
29
28
27
26
25
DV
PORT-D_R
CORE
PIN 1
DV
1
2
3
4
5
6
7
8
9
36 PORT-D_R
GPIO_0/VOLUME
PORT-D_L
CORE
GPIO_0/VOLUME
PIN 1
INDICATOR
35 PORT-D_L
3
DV
DV
SENSE_B/SRC_A
MIC_BIAS_FILT
MIC_BIAS/EAPD-D
MIC_BIAS-E
I/O
SS
34 SENSE_B/SRC_A
33 MIC_BIAS_FILT
32 MIC_BIAS/EAPD-D
31 MIC_BIAS-E
DV
DV
I/O
SS
4
5
SDATA_OUT
BIT_CLK
AD1988A/AD1988B
SDATA_OUT
BIT_CLK
6
AD1988A/AD1988B
TOP VIEW
(Not to Scale)
7
DV
SS
30 MIC_BIAS-F
DV
SS
MIC_BIAS-F
TOP VIEW
(Not to Scale)
29 MIC_BIAS/EAPD-C
28 MIC_BIAS-B
SDATA_IN
8
SDATA_IN
MIC_BIAS/EAPD-C
MIC_BIAS-B
DV
DD
9
DV
DD
SYNC 10
RESET 11
27 VREF_FILT
10
11
12
SYNC
RESET
VREF_FILT
26 AV
25 AV
SS
DD
AV
AV
SS
DD
PCBEEP 12
PCBEEP
13 14 15 16 17 18 19 20 21 22 23 24
Figure 2. LFCSP_VQ Pin Configuration
Figure 3. LFQP Pin Configuration
Table 5. Pin Function Descriptions
Pin
Mnemonic
Number I/O Description
DVCORE
1
O
Filter Connection for Internal Core Voltage Regulator. This pin must be connected to filter
capacitors: 10 ꢁF, 1.0 ꢁF, and 0.1 ꢁF connected in parallel between Pin 1 and DVSS (Pin 4 and Pin 7).
GPIO_0/VOLUME
2
I/O General-Purpose Input/Output Pin (Digital I/O). Digital signal used to control external circuitry.
Volume Control. When enabled, it can be used as an external volume control
DVIO
DVSS
SDATA_OUT
3
4, 7
ꢀ
I
I
I
Link Digital I/O Voltage Reference. 3.3 V ( 10%).
Digital Supply Return (Ground).
Link Serial Data Output (Digital Interface). AD1988 input stream. Clocked on both edges of the
BIT_CLK.
BIT_CLK
SDATA_IN
6
8
O
Link Bit Clock (Digital Interface). 24.000 MHz serial data clock.
I/O Link Serial Data Input (Digital Interface). AD1988 output stream. Clocked only on one edge of
BIT_CLK.
DVDD
9
I
Digital Supply Voltage 3.3 V 10%. This is regulated down to 1.9 V on Pin 1 to supply the internal
digital core internal to the AD1988.
SYNC
RESET
10
11
I
I
I
Link Frame Sync (Digital Interface). 48 kHz frame sync plus SDI stream IDs.
Link Reset (Digital Interface). AD1988 master hardware reset.
Monaural Input from System for PCBEEP. Line level input.
PCBEEP
12
SENSE_A/SRC_B
PORT-E_L, PORT-E_R
13
14, 1ꢀ
I/O Jack Sense A to Jack Sense D Input/Sense B Drive.
I/O Left and Right Rear Panel Stereo Mic In/C/LFE (Analog Input/Output).
Input: line level input, supports microphones with MIC_BIAS and boost amplifiers.
Output: line level output.
PORT-F_L, PORT-F_R
16, 17
I/O Left and Right Rear Panel Stereo Mic In/Surround Rear (Analog Input/Output).
Input: line level input, supports microphones with MIC_BIAS and boost amplifiers.
Output: line level output only.
CD_L, CD_R
CD_GND
18, 20
19
I
I
CD Audio Left Channel, CD Audio Right Channel.
CD Audio Analog Ground Reference (for Analog CD Input). Line level input only.
PORT-B_L, PORT-B_R
21, 22
I/O Front Panel Stereo Mic In/Front Panel Headphones. Analog input/output.
Input: line level input, supports microphones with MIC Bias and boost amplifiers.
Output: line level output, capable of driving headphone load and power.
Rev. 0 | Page 8 of 20
AD1988A/AD1988B
Pin
Mnemonic
Number I/O Description
PORT-C_L, PORT-C_R 23, 24
I/O Rear Panel Line-In/Surround Back Output. Analog input/output.
Input: line level input, supports microphones with MIC Bias and boost amplifiers.
Output: line level output only.
AVDD
2ꢀ, 38
26, 42
27
I
I
Analog Supply Voltage. 3.3 V only. Caution: Do not apply ꢀ.0 V to this pin. AVDD supplies should be
well regulated and filtered because supply noise degrades audio performance.
Analog Supply Return (Ground). AVSS should be connected to DVSS using a conductive trace
under, or close to, the AD1988A/AD1988B.
Voltage Reference Filter. This pin must be connected to filter capacitors: 1.0 ꢁF and 0.1 ꢁF
connected in parallel between Pin 27 and AVSS (Pin 26).
Switchable Microphone Bias for PORT-B. Capable of:
AVSS
VREF_FILT
MIC_BIAS-B
O
O
28
High-Z, 0 V, 1.6ꢀ V, 3.78 V, and 3.9ꢀ V (with ꢀ.0 V on Pin 33).
High-Z, 0 V, 1.6ꢀ V, 2.86 V, and 3.10 V (with 3.3 V on Pin 33).
MIC_BIAS-C
MIC_BIAS-F
MIC_BIAS-E
MIC_BIAS-D
MIC_BIAS_FILT
29
30
31
32
33
O
O
O
O
I
Switchable Microphone Bias for PORT-C. This pin has the same function as MIC_BIAS-B.
Switchable Microphone Bias for PORT-F. This pin has the same function as MIC_BIAS-B.
Switchable Microphone Bias for PORT-E. This pin has the same function as MIC_BIAS-B.
Switchable Microphone Bias for PORT-D. This pin has the same function as MIC_BIAS-B.
Filter for Microphone Bias Boost Circuitry. Connect this pin to ꢀ.0 V via a low-pass filter. When
connected in this way, the AD1988A/AD1988B are each capable of providing 3.9ꢀ V as a
microphone bias to all of the MIC_BIAS pins. If ꢀ V is not available, connect this pin to 3.3 V (AVDD
via a low-pass filter. The AD1988A/AD1988B produce a MIC_BIAS voltage relative to the AVDD
supply (typically 3.1 V @ AVDD = 3.3 V).
)
SENSE_B/SRC_A
34
I/O Jack Sense E to Jack Sense H Input/Sense A Drive.
PORT-D_L, PORT-D_R 3ꢀ, 36
I/O Left and Right Rear Panel Headphone (Front Line Out)/Stereo MIC In. Analog input/output.
Input: line level input, supports microphones with MIC_BIAS and boost amplifiers.
Output: line level output, capable of driving headphone load and power.
MIC_BIAS-A
37
O
Switchable Microphone Bias for PORT-A. This pin has the same function as MIC_BIAS-B.
PORT-A_L, PORT-A_R 39, 41
I/O Left and Right Front Panel Headphone Output/Stereo MIC In. Analog input/output.
Input: line level input, supports microphones with MIC_BIAS and boost amplifiers.
Output: line level output, capable of driving headphone load and power.
MONO_OUT
PORT-G_L, PORT-G_R 43, 44
40
O
Monaural Output to Internal Speaker or Telephony Subsystem. Line level output only.
Left and Right Rear Panel C/LFE Output/Line Input.
Input: line level input.
Output: line level output.
PORT-H_L, PORT-H_R 4ꢀ, 46
Left and Right Rear Panel Surround Center/Side Output/Line Input. Analog input/output.
Input: line level input.
Output: line level output.
S/PDIF_IN/GPIO_1
S/PDIF_OUT
47
48
I/O S/PDIF_IN/GPIO Pin. S/PDIF_IN supports S/PDIF input. When enabled, GPIO_1 can be used as a
GPIO pin.
O
S/PDIF_OUT. Supports S/PDIF output.
Rev. 0 | Page 9 of 20
AD1988A/AD1988B
Table 6. Pins Grouped by Function
Function
Digital Interface
Pin No.
Mnemonic
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
ꢀ
6
8
10
11
RESET
Digital Input/Output
48
47
2
S/PDIF_OUT
S/PDIF_IN/GPIO_1
GPIO_0/VOLUME
SENSE_A/SRC_B
SENSE_B/SRC_A
DVCORE
Jack Sense
13
34
1
Filter/Reference
27
33
28
29
30
31
32
37
9
VREF_FILT
MIC_BIAS_FILT
MIC_BIAS-B
MIC_BIAS-C
MIC_BIAS-F
MIC_BIAS-E
MIC_BIAS-D
MIC_BIAS-A
DVDD
Microphone Bias
Power and Ground
3
DVIO
4, 7
2ꢀ, 38
26, 42
12
14
1ꢀ
16
17
18
20
21
22
23
24
3ꢀ
36
39
40
41
43
44
4ꢀ
46
DVSS
AVDD
AVSS
Analog Input/Output
PCBEEP
PORT-E_L
PORT-E_R
PORT-F_L
PORT-F_R
CD_L
CD_R
PORT-B_L
PORT-B_R
PORT-C_L
PORT-C_R
PORT-D_L
PORT-D_R
PORT-A_L
MONO_OUT
PORT-A_R
PORT-G_L
PORT-G_R
PORT-H_L
PORT-H_R
Rev. 0 | Page 10 of 20
AD1988A/AD1988B
In desktop applications with shared input/5.1 jacks, assign the
ports as listed in Table 8.
CLARIFICATION OF OUTPUT CONFIGURATIONS
DAC, ADC, and port assignments are arbitrary; however, ports
are optimized for certain configurations. Use the guidelines in
Table 7, Table 8, and Table 9 when selecting ports for particular
functions. Note the following for each of these tables:
Table 8. Shared Input/5.1 Jacks
Port
Function
HP MIC LO LI
PORT-A
PORT-B
PORT-C
Front Panel Headphone
Front Panel Microphone
Rear Panel Line-
x
x
x
x
x
x
x
x
x
x
x
•
•
HP is the output capable of driving headphone load and
power
MIC is input that supports microphones with MIC Bias
and boost amplifiers
In/Surround-Rear (ꢀ.1)
PORT-D
PORT-E
Rear Panel
Front/Headphone
Rear Panel
Microphone/C/LFE
x
x
x
x
x
x
x
x
•
•
LO is the line level output
LI is the line level input
MONO_OUT Internal Mono Speaker
(use GPIO as EAPD)
In desktop applications with discreet jacks (the default
configuration), assign the ports as listed in Table 7.
In notebook applications, to support fully retasking jacks, assign
the ports as listed in Table 9.
Table 7. Discreet Jacks (Default Configuration)
Port
Function
HP MIC LO LI
Table 9.
Port
PORT-A
PORT-B
PORT-C
PORT-D
Front Panel Headphone
Front Panel Microphone
Rear Panel Line-In
Rear Panel
Front/Headphone
Rear Panel Microphone
Rear Panel Surround-Rear
(ꢀ.1)
Rear Panel C/LFE
Rear Panel Surround-
Center/Side (7.1)
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Function
HP MIC LO LI
PORT-A
PORT-B
PORT-D
PORT-C
Headphone Jack
Microphone Jack
Line-In Jack
Internal Stereo
Speakers (use GPIO as
EAPD)
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
PORT-E
PORT-F
x
x
x
x
x
x
PORT-E/PORT-F Internal Quad
Microphone Array
x
x
x
PORT-G
PORT-H
x
x
x
x
(Optional)
MONO_OUT Internal Mono Speaker
(use GPIO as EAPD)
x
Rev. 0 | Page 11 of 20
AD1988A/AD1988B
HD AUDIO WIDGETS
Table 10.
Node
Name
ROOT
FUNCTION
S/PDIF DAC
DAC_0
DAC_1
DAC_2
DAC_3
S/PDIF ADC
ADC_0
ID
00
01
02
03
04
0ꢀ
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
1ꢀ
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
2ꢀ
26
27
28
29
2A
2B
2C
2D
2F
30
31
32
33
Type
Root
Function
Description
Device identification
Designates this device as an audio codec
S/PDIF digital stream output interface
Audio output
Audio output
Audio output
Audio output
Audio output
Audio input
Audio input
Audio input
Audio output
Audio selector
Audio selector
Audio selector
Audio selector
Audio input
Beep generator
Pin complex
Pin complex
Pin complex
Pin complex
Pin complex
Pin complex
Pin complex
Pin complex
Power widget
Pin complex
Pin complex
Pin complex
Audio mixer
Audio mixer
Vendor defined
Audio mixer
Audio selector
Audio mixer
Vendor defined
Pin complex
Pin complex
Audio mixer
Audio mixer
Audio mixer
Audio mixer
Audio mixer
Audio mixer
Audio mixer
Audio mixer
Vendor defined
Audio selector
Audio selector
Audio selector
Audio selector
Stereo headphone channel digital/audio converters
Stereo front channel digital/audio converters
Stereo C/LFE channel digital/audio converters
Stereo surround-back (ꢀ.1) channel digital/audio converters
S/PDIF digital stream input interface
Stereo record Channel 0 audio/digital converters
Stereo record Channel 1 audio/digital converters
Stereo surround-side (7.1) channel digital/audio converters
Selects the ADC to drive the S/PDIF mixer
Selects and amplifies/attenuates the input to ADC_0
Selects and amplifies/attenuates the input to ADC_1
Selects and amplifies/attenuates the input to ADC_2
Stereo record Channel 2 audio/digital converters
Internal digital PCBEEP signal
Front panel headphone jack
Rear panel front speaker jack
Monaural output pin (internal speakers or telephony system)
Front panel microphone jack
Rear panel line-in jack
Rear panel surround-back (ꢀ.1) jack
Rear panel microphone jack
Analog CD input
Powers down the analog mixer and associated amps
External analog PCBEEP signal input
ADC_1
DAC_4
S/PDIF Mix Selector
ADC Selector 0
ADC Selector 1
ADC Selector 2
ADC_2
Digital Beep
PORT-A
PORT-D
MONO_OUT
PORT-B
PORT-C
PORT-F
PORT-E
CD IN
Mixer Power-Down
Analog PCBEEP
S/PDIF Out
S/PDIF output pin
S/PDIF input pin
Mixes the selected ADC with the digital stream to drive S/PDIF out
Selects the source that drives the MONO_OUT signal
Hardware volume knob
S/PDIF In
S/PDIF Mixer
MONO_OUT Mixer
Volume Knob
Analog Mixer
Mixer Output Attenuator
PORT-A Mixer
VREF Power-Down
PORT-G
Mixes individual gain analog inputs
Attenuates the mixer output to drive the port mixers
Mixes the DAC_0 and mixer output amps to drive PORT-A
Powers down the internal and external VREF circuitry
Rear panel C/LFE jack
PORT-H
Rear panel surround-side (7.1) jack
PORT-E Mixer
PORT-G Mixer
PORT-H Mixer
PORT-D Mixer
PORT-F Mixer
PORT-B Mixer
PORT-C Mixer
Stereo Mix-Down
BIAS Power-Down
PORT-B Out Selector
PORT-C Out Selector
PORT-E Out Selector
PORT-C In Selector
Mixes the PORT-E selected DAC and mixer output amps to drive PORT-E
Mixes the DAC_3 and mixer output amps to drive PORT-G
Mixes the DAC_4 and mixer output amps to drive PORT-H
Mixes the DAC_1 and mixer output amps to drive PORT-D
Mixes the DAC_2 and mixer output amps to drive PORT-F
Mixes the PORT-B selected DAC and mixer output amps to drive PORT-B
Mixes the PORT-C selected DAC and mixer output amps to drive PORT-C
Mixes the stereo L/R channels to drive MONO_OUT
Powers down the internal MIC_BIAS_FILT and all MIC_BIAS pins
Selects DAC_0, DAC_1, and DAC_3 for PORT-B
Selects DAC_2 and DAC_4 for PORT-C
Selects DAC_2 and DAC_4 for PORT-E
Selects from the PORT-C, PORT-G, and PORT-H inputs to the mixer input
Rev. 0 | Page 12 of 20
AD1988A/AD1988B
Node
ID
Name
Type
Description
PORT-E In Selector
MONO_OUT Selector
PORT-A Out Selector
PORT-A Boost
PORT-B Boost
PORT-C Boost
PORT-F Boost
PORT-E Boost
PORT-D Boost
34
36
37
38
39
3A
3B
3C
3D
Audio selector
Audio selector
Audio selector
Audio selector
Audio selector
Audio selector
Audio selector
Audio selector
Audio selector
Selects from the PORT-E, PORT-G, and PORT-H inputs to the mixer input
Selects DAC_0, DAC_1, and DAC_3 for MONO_OUT
Selects DAC_0, DAC_1, and DAC_3 for PORT-A
Microphone boost amp for PORT-A
Microphone boost amp for PORT-B
Microphone boost amp for PORT-C
Microphone boost amp for PORT-F
Microphone boost amp for PORT-E
Microphone boost amp for PORT-D
Table 11. AD1988A Device Root and Function Node Parameters
Audio
Function Group GPIO
Sub Node
Function
Node
ID
Vendor ID
0x00
Revision ID1
0x02
Count
0x04
Group Type
0x05
Capabilities
0x08
Capabilities
0x11
Name
00
ROOT
11D41988
00100400
00010001
0002003C
01
FUNCTION
00000001
00010C0C
40000002
1 Silicon revision number may change without prior notice. Number shown is current at the publication date of this document.
Table 12. AD1988B Device Root and Function Node Parameters
Audio
Function Group GPIO
Sub Node
Count
0x04
Function
Group Type
0x05
Node
ID
Vendor ID
0x00
Revision ID1
0x02
Capabilities
Capabilities
Name
0x08
0x11
00
ROOT
11D4198B
00100300
00010001
0002003C
01
FUNCTION
00000001
00010C0C
40000002
1 Silicon revision number may change without prior notice. Number shown is current at the publication date of this document.
Rev. 0 | Page 13 of 20
AD1988A/AD1988B
Table 13. Widget Parameters
Output
Amp
Capabilities Capabilities
Volume
Knob
Widget
Capabilities Rate
PCM Size, Stream
Pin
Capabilities Capabilities Length
Input Amp
Con. List
Power
States
Formats
Node
ID
01
02
03
04
0ꢀ
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
1ꢀ
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
2ꢀ
26
27
28
29
2A
2B
2C
2D
2F
30
31
09
0A
0B
0C
0D
80000000
0E
0F
12
13
X
0
0
0
0
0
1
1
1
0
3
3
3
3
1
7
4
4
4
4
4
4
4
4
ꢀ
4
4
4
2
2
6
2
3
2
F
4
4
2
2
2
2
2
2
2
2
F
3
3
000004C0
00030311
0000040ꢀ
0000040ꢀ
0000040ꢀ
0000040ꢀ
00130391
00100ꢀ01
00100ꢀ01
0000040ꢀ
00300301
0030010D
0030010D
0030010D
00100ꢀ01
0070000C
0040018D
0040018D
0040010C
0040018D
0040018D
0040018D
0040098D
00400001
00ꢀ00ꢀ00
00400000
0040030D
0040020B
00200303
00200103
00600080
0020010B
0030010D
00200103
00F00100
0040098D
0040018D
00200103
00200103
00200103
00200103
00200103
00200103
00200103
00200100
00F00100
00300101
00300101
000E07FF 00000001
000E07E0 0000000ꢀ
000E07FF 00000001
000E07FF 00000001
000E07FF 00000001
000E07FF 00000001
000E07E0 0000000ꢀ
000E07FF 00000001
000E07FF 00000001
000E07FF 00000001
00000009 000ꢀ2727
00000001
00000000 00000009 000ꢀ2727
00000000 00000009 000ꢀ2727
00000000 00000009 000ꢀ2727
00000000 00000009 000ꢀ2727
00000001
00000001 00000009
00000001 00000009
00000000 00000009 000ꢀ2727
00000003
00000007
00000007
00000007
00000001 00000009
00000000
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000000
00000002 00000009
00000000
00000001
00000000
00000002
00000002
00000000
00000008
00000001
00000002
00000008
00000001
00000001
00000002
00000002
00000002
00000002
00000002
00000002
00000002
00000001
00000006
00000003
00000002
800ꢀ3627
800ꢀ3627
800ꢀ3627
000E07FF 00000001
800B0F0F
80000000
80000000
800ꢀ1F1F
80000000
80000000
80000000
80000000
0000373F
0000373F
00000010
0000373F
00003737
00003737
00003737
00000020
00000020
00000010
00000020
800ꢀ2727
800ꢀ1F17
80000000
80000000
000000BF
800ꢀ1F17
80000000
800ꢀ1F1F
00000037
00000037
80000000
80000000
80000000
80000000
80000000
80000000
80000000
80000000
80000000
Rev. 0 | Page 14 of 20
AD1988A/AD1988B
Output
Amp
Capabilities Capabilities
Volume
Knob
Widget
Capabilities Rate
PCM Size, Stream
Pin
Capabilities Capabilities Length
Input Amp
Con. List
Power
States
Formats
Node
ID
09
0A
0B
0C
0D
0E
0F
12
13
32
33
34
36
37
38
39
3A
3B
3C
3D
3
3
3
3
3
3
3
3
3
3
3
00300101
00300101
00300101
00300101
00300101
0030010D
0030010D
0030010D
0030010D
0030010D
0030010D
00000002
00000003
00000003
00000003
00000003
00000001
00000001
00000001
00000001
00000001
00000001
00270300
00270300
00270300
00270300
00270300
00270300
Rev. 0 | Page 1ꢀ of 20
AD1988A/AD1988B
Table 14. Connection List
Node
ID
02
03
04
0ꢀ
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
1ꢀ
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
2ꢀ
26
27
28
29
2A
2B
2C
2D
2F
30
31
32
33
34
Connections
0
1
2
3
4
5
6
7
0 to 3
4 to 7
Length
1
NID
I
NID
I
NID
I
NID
I
NID
I
NID
I
NID
I
NID
0000001D
1D
0
0
0
0
0000001C
0000000C
0000000D
1
1C
0C
0D
1
1
0
000F0908
2418BC38
2418BC38
2418BC38
0000000E
3
08
38
38
38
0E
09
3C
3C
3C
0F
18
18
18
00203D2ꢀ
00203D2ꢀ
00203D2ꢀ
7
1
1
1
24
24
24
2ꢀ
2ꢀ
2ꢀ
3D
3D
3D
20
20
20
7
7
1
0
00000022
00000029
0000002D
0000002B
0000002C
0000002A
00000026
1
22
29
2D
2B
2C
2A
26
1
1
1
1
1
1
0
00002120
00000002
2
20
02
21
0
1
0
00000B01
00002136
2
01
36
0B
21
2
0
3D383339
00000020
00002137
2ꢀ249811
00000027
00000028
00002132
0000210ꢀ
0000210A
00002104
00002106
00002130
00002131
0000001E
1ꢀ141211
00060403
00000A04
0000040ꢀ
00242ꢀ3A
00242ꢀ3C
1A183B34
2120BD38
8
39
20
37
11
27
28
32
0ꢀ
0A
04
06
30
31
1E
11
03
04
0ꢀ
3A
3C
33
38
24
3D
2ꢀ
34
38
3B
18
20
1A
21
1
2
21
18
8
1
1
3D
1
1
2
21
21
21
21
21
21
21
2
2
2
2
2
2
1
00001716
6
3
12
04
0A
04
2ꢀ
2ꢀ
14
06
1ꢀ
16
17
2
2
3
24
24
3
Rev. 0 | Page 16 of 20
AD1988A/AD1988B
Node
ID
Connections
4 to 7
0
1
2
3
4
5
6
7
0 to 3
Length
NID
I
NID
I
NID
I
NID
I
NID
I
NID
I
NID
I
NID
36
00060403
00060403
00000011
00000014
00000015
00000016
00000017
00000012
3
3
1
1
1
1
1
1
03
03
11
14
15
16
17
12
04
04
06
06
37
38
39
3A
3B
3C
3D
Table 15. Default Configuration Bytes1
MSB
31
29
28
27
23
20
19
15
12
8
8
7
3
0
LSB
30
24
16
4
Node
ID
Location
Default
Device
HP out
Line out
Speaker
Mic in
Conn
Type
Misc
Def
Value
Connectivity Chassis
Position
Front
Color
Green
Green
JD Ovrrd Assn Seq
11
12
13
14
15
16
17
18
1A
1B
1C
24
25
02214030
01014010
9913011F
02A19040
01813021
01011012
01A19020
9933012E
99F301F0
014511F0
01C511F0
01016011
01012014
Jack
Jack
Fixed
Jack
Jack
Jack
Jack
Fixed
Fixed
Jack
Jack
Jack
Jack
External
External
Internal
External
External
External
External
Internal
Internal
External
External
External
External
0
0
1
0
0
0
0
1
1
1
1
0
0
3
1
1
4
2
1
2
2
F
F
F
1
1
0
0
F
0
1
2
0
E
0
0
0
1
4
⅛” jack
⅛” jack
ATAPI
⅛” jack
⅛” jack
⅛” jack
⅛” jack
ATAPI
ATAPI
Optical
Optical
⅛” jack
⅛” jack
Rear
Special 3
Front
Unknown
Pink
Rear
Line in
Line out
Mic in
Blue
Rear
Black
Rear
Pink
Special 3
Special 3
Rear
CD
Other
S/PDIF out
S/PDIF in
Line out
Line out
Unknown
Unknown
Black
Black
Orange
Gray
Rear
Rear
Rear
1 Default configuration values are set on codec power-up only. To preserve modifications by BIOS control, default configuration values do not change by reset
operations.
Rev. 0 | Page 17 of 20
AD1988A/AD1988B
JACK PRESENCE DETECTION
Detect jack presence by using a resistor tree arrangement
detailed by the HD audio specification, allowing up to four
jacks per sense line. Jacks must have normally open, isolated
switches to use this method of jack presence detection.
HD AUDIO STYLE JACK PRESENCE DETECTION
The AD1988 uses two jack sense pins for presence detection on
up to eight audio jacks. This, combined with the device identifi-
cation engine, enables software to determine if there is a device
plugged into the circuit, and the type of device it is. Allowing
software to configure jacks and amplifiers, as necessary, ensures
proper audio operation.
For proper operation, there must be a 2.67 kꢁ 1ꢀ resistor
connected between SENSE_A and AVDD, and another 2.67 kꢁ
1ꢀ resistor between SENSE_B and AVDD
.
The specific resistor values for each jack are listed in Table 16.
Use 1ꢀ tolerance resistors to ensure accurate detection.
Table 16. Jack Sense Mapping
Resistor Value
(1% Tolerance)
2.67 kΩ
ꢀ.10 kΩ
10.0 kΩ
SENSE_A
Port
SENSE_B
Name
Node ID
Name
Port
Node ID
Pull-up to AVDD
FRONT
LINE IN
FRONT_MIC
HP_OUT
Pull-up to AVDD
SURR_SIDE (7.1)
C/LFE
SURR_BACK (ꢀ.1)
REAR_MIC
D
C
B
0x12
0x1ꢀ
0x14
0x11
H
G
F
0x2ꢀ
0x24
0x16
0x17
20.0 kΩ
39.2 kΩ
A
E
Rev. 0 | Page 18 of 20
AD1988A/AD1988B
HARDWARE VOLUME CONTROL
VDD
To use the GPIO_0/VOLUME pin (Pin 2) as a GPIO pin, it is
recommended to pull it down using a 10 kꢁ resistor (Pin 2 to
DVSS). In the GPIO configuration, the volume control widget
has no effect.
R1
3.3kΩ
GPIO_0/VOLUME
R2
10kΩ
R3
5.1kΩ
R4
3.3kΩ
When the GPIO_0/VOLUME pin (Pin 2) is used as a volume con-
trol, pull-up Pin 2 to AVDD. The volume control widget operates
the codec volumes only under software control. If one of the
buttons is pressed, the control volume setting is incremented
(up), decremented (down), or set Bit 7 (mute). The volume
control supports 40 steps (other than mute) and uses a range of
0 (0x00, minimum volume) to 63 (0x3F, maximum volume).
Pressing the mute switch (or both up and down simultaneously)
toggles Bit 7 which indicates mute on/off.
OPTIONAL
SW1
UP
SW2
SW3
DOWN
MUTE
Figure 4 . Volume Control Circuitry
The AD1988A/AD1988B support external volume control on
Pin 2 (GPIO_0/VOLUME). The circuit diagram in Figure 4
allows up/down/mute control using only three switches and
four resistors external to the codec. The up/down switches can
also be replaced by a center-position-off SPDT toggle switch.
The mute switch is optional, but desirable, for a satisfactory user
interface.
Rev. 0 | Page 19 of 20
AD1988A/AD1988B
OUTLINE DIMENSIONS
0.75
0.60
0.45
9.00
BSC SQ
1.60
MAX
37
48
36
1
PIN 1
7.00
BSC SQ
TOP VIEW
(PINS DOWN)
1.45
1.40
1.35
0.20
0.09
7°
3.5°
0°
25
12
0.15
0.05
13
24
SEATING
PLANE
0.08 MAX
COPLANARITY
0.27
0.22
0.17
VIEW A
0.50
BSC
LEAD PITCH
VIEW A
ROTATED 90° CCW
COMPLIANT TO JEDEC STANDARDS MS-026-BBC
Figure 5. 48-Lead Low Profile Quad Flat Package [LQFP]
(ST-48)
Dimension shown in millimeters
0.30
0.23
0.18
7.00
BSC SQ
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
37
36
48
1
PIN 1
INDICATOR
EXPOSED
PAD
(BOTTOM VIEW)
5.25
5.10 SQ
4.95
TOP
VIEW
6.75
BSC SQ
0.50
0.40
0.30
25
24
12
13
0.25 MIN
5.50
REF
0.80 MAX
0.65 TYP
1.00
0.85
0.80
12° MAX
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.50 BSC
0.20 REF
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
Figure 6. 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
7 mm × 7 mm Body, Very Thin Quad
(CP-48-1)
Dimension shown in millimeters
ORDERING GUIDE
Model
Audio Output Performance
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package Description
48-Lead LQFP, Tray
Package Option
ST-48
AD1988AJSTZ1
AD1988AJSTZ-RL1
AD1988AJCPZ1
AD1988AJCPZ-RL1
AD1988BJSTZ1
AD1988BJSTZ-RL1
AD1988BJCPZ1
AD1988BJCPZ-RL1
95 dB
95 dB
95 dB
95 dB
48-Lead LQFP, Reel
ST-48
48-Lead LFCSP_VQ, Tray
48-Lead LFCSP_VQ, Reel
48-Lead LQFP, Tray
48-Lead LQFP, Reel
48-Lead LFCSP_VQ, Tray
48-Lead LFCSP_VQ, Reel
CP-48-1
CP-48-1
ST-48
ST-48
CP-48-1
CP-48-1
101 dB
101 dB
101 dB
101 dB
1 Z = Pb-free part.
Dolby and Dolby Master Studio are trademarks of Dolby Laboratories. DTS is a trademark of DTS, Inc. Windows Vista is either a registered trademark or trademark of
Microsoft Corporation in the United States and/or other countries.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05843-0-10/06(0)
Rev. 0 | Page 20 of 20
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