AD8468 [ADI]
Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator; 轨到轨，快速，低功耗2.5 V至5.5 V ，单电源TTL / CMOS比较器
| 型号： | AD8468 |
| 厂家： | 
ADI |
| 描述： | Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| 文件： | 总12页 (文件大小：233K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V,
Single-Supply TTL/CMOS Comparator
AD8468
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Fully specified rail to rail at VCC = 2.5 V to 5.5 V
Input common-mode voltage from −0.2 V to VCC + 0.2 V
Low glitch CMOS-/TTL-compatible output stage
40 ns propagation delay
Low power: 2 mW at 2.5 V
Shutdown pin
NONINVERTING
INPUT
+
–
Q OUTPUT
AD8468
INVERTING
INPUT
Power supply rejection > 60 dB
−40°C to +125°C operation
Qualified for automotive applications
S
DN
Figure 1.
APPLICATIONS
Automotive applications
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
GENERAL DESCRIPTION
The AD8468 is a fast comparator fabricated on XFCB2.0, an
Analog Devices, Inc., proprietary process. This comparator is
exceptionally versatile and easy to use. Features include an input
range from −0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS-
compatible output drivers, and shutdown inputs. The device
offers 40 ns propagation delays driving a 15 pF load with 10 mV
overdrive on 500 µA typical supply current.
The TTL-/CMOS-compatible output stage is designed to drive
up to 15 pF with full rated timing specifications and to degrade
in a graceful and linear fashion as additional capacitance is
added. The input stage of the comparator offers robust protec-
tion against large input overdrive, and the outputs do not phase
reverse when the valid input signal range is exceeded.
The AD8468 is available in a tiny 6-lead SC70 package with a
single-ended output and a shutdown pin.
A flexible power supply scheme allows the device to operate
with a single 2.5 V positive supply with a −0.2 V to + 2.7 V
input signal range and up to a 5.5 V positive supply with a
−0.2 V to +5.7 V input signal range.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
AD8468
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications Information .................................................................7
Power/Ground Layout and Bypassing........................................7
TTL-/CMOS-Compatible Output Stage ....................................7
Optimizing Performance..............................................................7
Comparator Propagation Delay Dispersion ..............................7
Crossover Bias Point .....................................................................8
Minimum Input Slew Rate Requirement...................................8
Typical Application Circuits ............................................................9
Outline Dimensions....................................................................... 10
Ordering Guide .......................................................................... 10
Automotive Products................................................................. 10
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
AD8468
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VCC = 2.5 V, TA = −40°C to +125°C. Typical values are TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DC INPUT CHARACTERISTICS
Voltage Range
Common-Mode Range
Differential Voltage
Offset Voltage
Bias Current
Offset Current
Capacitance
VP, VN
VCC = 2.5 V to 5.5 V
VCC = 2.5 V to 5.5 V
VCC = 2.5 V to 5.5 V
−0.2
−0.2
VCC + 0.2
VCC + 0.2
VCC
+10.0
+0.4
V
V
V
VOS
IP, IN
−10.0
−0.4
−1.0
3
1
mV
µA
µA
pF
kΩ
kΩ
dB
dB
dB
+1.0
CP, CN
Resistance, Differential Mode
Resistance, Common Mode
Active Gain
−0.5 V to VCC + 0.5 V
−0.5 V to VCC + 0.5 V
200
100
7000
4000
AV
CMRR
80
Common-Mode Rejection
VCC = 2.5 V, VCM = −0.2 V to+2.7 V
VCC = 5.5 V
45
45
SHUTDOWN PIN CHARACTERISTICS1
VIH
VIL
IIH
Comparator is operating
Shutdown guaranteed
VIH = VCC
lCC < 100 µA
VPP = 10 mV, output valid
2.0
−0.2
−6
VCC
+0.4
+6
V
V
µA
ns
ns
+0.4
Sleep Time
tSD
tH
300
150
Wake-Up Time
DC OUTPUT CHARACTERISTICS
Output Voltage High Level
Output Voltage Low Level
AC PERFORMANCE2
Rise Time/Fall Time
VOH
VOL
IOH = 0.8 mA
IOL = 0.8 mA
VCC − 0.4
V
V
0.4
tR, tF
tPD
10% to 90%, VCC = 2.5 V
10% to 90%, VCC = 5.5 V
VOD = 10 mV, VCC = 2.5 V
VOD = 50 mV, VCC = 5.5 V
VCC = 2.5 V
25 to 50
45 to 75
30 to 50
35 to 60
4.5
ns
ns
ns
ns
ns
Propagation Delay
Propagation Delay Skew—Rising to Falling
Transition
VCC = 5.5 V
10 mV < VOD < 125 mV
−0.2 V < VCM < VCC + 0.2 V
8
12
1.5
ns
ns
ns
Overdrive Dispersion
Common-Mode Dispersion
POWER SUPPLY
Supply Voltage Range
Positive Supply Current
VCC
IVCC
2.5
5.5
V
VCC = 2.5 V
VCC = 5.5 V
VCC = 2.5 V
VCC = 5.5 V
VCC = 2.5 V to 5.5 V
VCC = 2.5 V to 5.5 V
550
800
1.375
4.95
800
1300
2.0
μA
μA
mW
mW
dB
Power Dissipation
PD
7.15
Power Supply Rejection Ratio
Shutdown Current
PSRR
ISD
−50
250
350
μA
1 The output is in a high impedance mode when the device is in shutdown mode. Note that this feature should be used with care because the enable/disable time is
much longer than with a true tristate output.
2 VIN = 100 mV square input at 1 MHz, VCM = 0 V, CL = 15 pF, VCCI = 2.5 V, unless otherwise noted.
Rev. 0 | Page 3 of 12
AD8468
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltages
Supply Voltage (VCC to GND)
Input Voltages
−0.5 V to +6.0 V
Input Voltage
−0.5 V to VCC + 0.5 V
(VCC + 0.5 V)
50 mA
Differential Input Voltage
Maximum Input/Output Current
Shutdown Control Pin
Applied Voltage (SDN to GND)
Maximum Input/Output Current
Output Current
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
−0.5 V to VCC + 0.5 V
50 mA
50 mA
Table 3. Thermal Resistance
Package Type
Temperature
1
θJA
Unit
Operating Temperature, Ambient
Operating Temperature, Junction
−40°C to +125°C
150°C
6-Lead SC70
1 Measurement in still air.
426
°C/W
ESD CAUTION
Rev. 0 | Page 4 of 12
AD8468
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Q
1
2
3
6
5
4
V
S
V
CC
DN
N
AD8468
GND
TOP VIEW
(Not to Scale)
V
P
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VN.
2
3
4
5
6
GND
VP
VN
SDN
VCC
Ground.
Noninverting Analog Input.
Inverting Analog Input.
Shutdown. Drive this pin low to shut down the device.
VCC Supply.
Rev. 0 | Page 5 of 12
AD8468
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 2.5 V, TA = 25°C, unless otherwise noted.
38.0
37.8
37.6
37.4
37.2
37.0
36.8
36.6
36.4
36.2
36.0
5
4
PROPAGATION DELAY FALL
PROPAGATION DELAY RISE
3
2
1
0
–1
–2
+125°C
–3
+25°C
–4
–40°C
–5
–1.0 –0.5
0
0.5
1.0
1.5
CC
2.0
2.5
3.0
3.5
0.5
1.0
1.5
CM
2.0
2.5
3.0
V
AT V (2.5V)
V
AT V (2.5V)
CC
CM
Figure 3. Input Bias Current vs. Input Common-Mode Voltage
Figure 6. Propagation Delay vs. Input Common-Mode Voltage
60
55
50
45
Q
V
= 5.5V
CC
RISE DELAY
40
35
30
25
20
V
= 5.5V
CC
FALL DELAY
V
= 2.5V
CC
FALL DELAY
V
= 2.5V
RISE DELAY
CC
0.5V/DIV
10ns/DIV
0
50
100
150
OD (mV)
Figure 7. 1 MHz Output Voltage Waveform, VCC = 2.5 V
Figure 4. Propagation Delay vs. Input Overdrive at VCC = 2.5 V and 5.5 V
1.5
SOURCE
Q
1.0
SINK
0.5
0
–0.5
–1.0
1V/DIV
10ns/DIV
–1.0 –0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
(V)
OUT
Figure 8. 1 MHz Output Voltage Waveform, VCC = 5.5 V
Figure 5. Load Current vs. VOH/VOL
Rev. 0 | Page 6 of 12
AD8468
APPLICATIONS INFORMATION
POWER/GROUND LAYOUT AND BYPASSING
V
LOGIC
The AD8468 comparator is a high speed device. Despite
the low noise output stage, it is essential to use proper high
speed design techniques to achieve the specified performance.
Because comparators are uncompensated amplifiers, feedback
in any phase relationship is likely to cause oscillations or
undesired hysteresis. Of critical importance is the use of low
impedance supply planes, particularly the output supply plane
(VCC) and the ground plane (GND). Individual supply planes
are recommended as part of a multilayer board. Providing the
lowest inductance return path for switching currents ensures
the best possible performance in the target application.
A1
Q1
+IN
–IN
OUTPUT
A
V
A2
Q2
GAIN STAGE
OUTPUT STAGE
It is also important to adequately bypass the input and output
supplies. A 0.1 µF bypass capacitor should be placed as close as
possible to the VCC supply pin. The capacitor should be connected
to the GND plane with redundant vias placed to provide a
physically short return path for output currents flowing back
from ground to the VCC pin. High frequency bypass capacitors
should be carefully selected for minimum inductance and ESR.
Parasitic layout inductance should also be strictly controlled to
maximize the effectiveness of the bypass at high frequencies.
Figure 9. Simplified Schematic Diagram of the
TTL-/CMOS-Compatible Output Stage
OPTIMIZING PERFORMANCE
As with any high speed comparator, proper design and layout
techniques are essential for obtaining the specified performance.
Stray capacitance, inductance, common power and ground
impedances, or other layout issues can severely limit performance
and can often cause oscillation. The source impedance should
be minimized as much as is practicable. High source impedance,
in combination with the parasitic input capacitance of the
comparator, causes an undesirable degradation in bandwidth at
the input, thus degrading the overall response. Higher impedances
encourage undesired coupling.
TTL-/CMOS-COMPATIBLE OUTPUT STAGE
Specified propagation delay performance can be achieved only
by keeping the capacitive load at or below the specified minimums.
The output of the AD8468 is designed to directly drive one
Schottky TTL, three low power Schottky TTL loads, or the
equivalent. For large fanouts, buses, or transmission lines, use
an appropriate buffer to maintain the excellent speed and
stability of the comparator.
COMPARATOR PROPAGATION
DELAY DISPERSION
The AD8468 comparator is designed to reduce propagation
delay dispersion over a wide input overdrive range of 10 mV to
With the rated 15 pF load capacitance applied, more than half
of the total device propagation delay is output stage slew time.
Because of this, the total propagation delay decreases as VCC
decreases, and instability in the power supply may appear as
excess delay dispersion.
V
CC – 1 V. Propagation delay dispersion is the variation in
propagation delay that results from a change in the degree of
overdrive or slew rate (how far or how fast the input signal
exceeds the switching threshold). See Figure 10 and Figure 11.
Propagation delay dispersion is a specification that becomes
important in high speed, time-critical applications, such as data
communication, automatic test and measurement, and instru-
mentation. It is also important in event-driven applications, such
as pulse spectroscopy, nuclear instrumentation, and medical
imaging.
Delay is measured to the 50% point for whatever supply is in
use; thus, the fastest times are observed with the VCC supply at
2.5 V, and larger values are observed when driving loads that
switch at other levels.
Overdrive and input slew rate dispersions are not significantly
affected by output loading and VCC variations.
AD8468 overdrive dispersion is typically <12 ns as the
overdrive varies from 10 mV to 125 mV. This specification
applies to both positive and negative signals because the device
has very closely matched delays for both positive-going and
negative-going inputs and very low output skews. Remember to
add the actual device offset to the overdrive for repeatable
dispersion measurements.
The TTL-/CMOS-compatible output stage is shown in the
simplified schematic diagram (see Figure 9). Because of its
inherent symmetry and generally good behavior, this output
stage is readily adaptable for driving various filters and other
unusual loads.
Rev. 0 | Page 7 of 12
AD8468
500mV OVERDRIVE
10mV OVERDRIVE
CROSSOVER BIAS POINT
Rail-to-rail inputs of this type, in both op amps and comparators,
have a dual front-end design. Certain devices are active near the
INPUT VOLTAGE
VCC rail and others are active near the VEE rail or ground. At some
V
± V
OS
predetermined point in the common-mode range, a crossover
occurs. At this point, normally VCC/2, the direction of the bias
current reverses, and there are changes in measured offset
voltages and currents.
N
DISPERSION
Q OUTPUT
The AD8468 slightly elaborates on this scheme. Crossover
points can be found at approximately 0.8 V and 1.6 V.
Figure 10. Propagation Delay—Overdrive Dispersion
MINIMUM INPUT SLEW RATE REQUIREMENT
INPUT VOLTAGE
1V/ns
With the rated load capacitance and normal good PC board
design practice, as discussed in the Optimizing Performance
section, these comparators should be stable at any input slew
rate with no hysteresis. Broadband noise from the input stage is
observed in place of the violent chattering seen with most other
high speed comparators. With additional capacitive loading or
poor bypassing, oscillation may be encountered. These oscilla-
tions are due to the high gain bandwidth of the comparator in
combination with feedback through parasitics in the package
and PC board. In many applications, chattering is not harmful.
V
± V
OS
N
10V/ns
DISPERSION
Q OUTPUT
Figure 11. Propagation Delay—Slew Rate Dispersion
Rev. 0 | Page 8 of 12
AD8468
TYPICAL APPLICATION CIRCUITS
2.5V TO 5V
0.1µF
INPUT
2kΩ
OUTPUT
2kΩ
AD8468
0.1µF
Figure 12. Self-Biased, 50% Slicer
CMOS
V
CC
2.5V TO 5V
LVDS
100Ω
OUTPUT
AD8468
Figure 13. LVDS-to-CMOS Receiver
Rev. 0 | Page 9 of 12
AD8468
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
2.10
1.80
6
1
5
2
4
3
1.35
1.25
1.15
0.65 BSC
1.30 BSC
1.00
0.90
0.70
0.40
0.10
1.10
0.80
0.46
0.36
0.26
0.22
0.08
SEATING
PLANE
0.10 MAX
0.30
0.15
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 14. 6-Lead Thin Shrink Small Outline Transistor Package (SC70)
(KS-6)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Model1
Package Description
Package Option
Branding
Y3F
Y3F
AD8468WBKSZ-R7
AD8468WBKSZ-RL
−40°C to +125°C
−40°C to +125°C
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
KS-6
KS-6
1 Z = RoHS Compliant Part.
AUTOMOTIVE PRODUCTS
The AD8468WBKSZ models are available with controlled manufacturing to support the quality and reliability requirements of
automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore,
designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for
use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and
to obtain the specific Automotive Reliability reports for these models.
Rev. 0 | Page 10 of 12
AD8468
NOTES
Rev. 0 | Page 11 of 12
AD8468
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08853-0- /10(0)
Rev. 0 | Page 12 of 12
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