AD8508ARUZ [ADI]
20 レA Maximum, Rail-to-Rail I/O, Zero Input Crossover Distortion Amplifiers; 20レA最大，轨至轨I / O，零输入交越失真放大器
| 型号： | AD8508ARUZ |
| 厂家： | 
ADI |
| 描述： | 20 レA Maximum, Rail-to-Rail I/O, Zero Input Crossover Distortion Amplifiers |
| 文件： | 总20页 (文件大小：529K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
20 μA Maximum, Rail-to-Rail I/O,
Zero Input Crossover Distortion Amplifiers
AD8506/AD8508
PIN CONFIGURATIONS
FEATURES
PSRR: 100 dB minimum
CMRR: 105 dB typical
Very low supply current: 20 μA per amp maximum
1.8 V to 5 V single-supply or 0.9 V to 2.5 V dual-supply
operation
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
AD8506
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Figure 1. 8-Lead MSOP (RM-8)
Rail-to-rail input and output
Low noise: 45 nV/√Hz @ 1 kHz
2.5 mV offset voltage maximum
Very low input bias current: 1 pA typical
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
AD8508
TOP VIEW
APPLICATIONS
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
Pressure and position sensors
Remote security
9
8
–IN C
OUT C
Bio sensors
IR thermometers
Figure 2. 14-Lead TSSOP (RU-14)
Battery-powered consumer equipment
Hazard detectors
GENERAL DESCRIPTION
The AD8506/AD8508 are dual and quad micropower amplifiers
featuring rail-to-rail input and output swings while operating from
a 1.8 V to 5 V single or from ±0.9 V to ±±.5 V dual power supply.
Remote battery-powered sensors, handheld instrumentation
and consumer equipment, hazard detection (for example, smoke,
fire, and gas), and patient monitors can benefit from the features
of the AD8506/AD8508 amplifiers.
Using a novel circuit technology, these low cost amplifiers offer
zero crossover distortion (excellent PSRR and CMRR perform-
ance) and very low bias current, while operating with a supply
current of less than ±0 μA per amplifier. This amplifier family
offers the lowest noise in its power class.
The AD8506/AD8508 are specified for both the industrial
temperature range of −40°C to +85°C and the extended industrial
temperature range of −40°C to +1±5°C. The AD8506 dual amplifi-
ers are available in an 8-lead MSOP package. The AD8508 quad
amplifiers are available in the 14-lead TSSOP package.
This combination of features makes the AD8506/AD8508
amplifiers ideal choices for battery-powered applications
because they minimize errors due to power supply voltage
variations over the lifetime of the battery and maintain high
CMRR even for a rail-to-rail input op amp.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
AD8506/AD8508
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Theory of Operation ...................................................................... 13
Applications Information.............................................................. 15
Pulse Oximeter Current Source ............................................... 15
Applications....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... ±
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—1.8 V Operation ............................ 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
Four-Pole Low-Pass Butterworth Filter for
Glucose Monitor......................................................................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
7/08—Rev. 0 to Rev. A
Changes to Figure 17 Through Figure ±0.......................................8
Changes to Figure ±1 Through Figure ±6.......................................9
Changes to Figure ±7, Figure ±8, Figure 30, and Figure 31....... 10
Changes to Figure 34, Figure 37, and Figure 38......................... 11
Added Figure 39 and Figure 40 .................................................... 1±
Added Theory of Operation Section, Figure 41, and
Figure 4± .......................................................................................... 13
Added Figure 43 and Figure 44 .................................................... 14
Added Applications Information Section and Figure 45 .......... 15
Added Figure 46 ............................................................................. 16
Updated Outline Dimensions....................................................... 17
Added Figure 48 ............................................................................. 17
Changes to Ordering Guide.......................................................... 17
Added AD8508 ...................................................................Universal
Added TSSOP Package ......................................................Universal
Changes to Features Section and General Description Section. 1
Added Figure ±; Renumbered Sequentially .................................. 1
Changed Electrical Characteristics Heading to Electrical
Characteristics—5 V Operation ..................................................... 3
Changes to Table 1............................................................................ 3
Added Electrical Characteristics—1.8 V Operation Heading.... 4
Changes to Table ±............................................................................ 4
Changes to Table 3, Thermal Resistance Section, and Table 4... 5
Added TA = ±5°C Condition to Typical Performance
Characteristics Section..................................................................... 6
Changes to Figure 3, Figure 4, Figure 6, and Figure 7 ................. 6
Added Figure 11 and Figure 14....................................................... 7
11/07—Revision 0: Initial Version
Rev. A | Page 2 of 20
AD8506/AD8508
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
VSY = 5 V, VCM = VSY/±, TA = ±5°C, RL = 100 kΩ to GND, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
0.5
1
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
0 V ≤ VCM ≤ 5 V
−40°C ≤ TA ≤ +125°C
2.5
3.5
10
100
600
5
50
130
5
mV
mV
pA
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
dB
μV/°C
pF
Input Bias Current
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.5
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
0 V ≤ VCM ≤ 5 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
0.05 V ≤ VOUT ≤ 4.95 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
0
CMRR
AVO
90
90
85
105
100
105
120
Large Signal Voltage Gain
Offset Voltage Drift
2
ΔVOS/ΔT
CDIFF
Input Capacitance Differential Mode
Input Capacitance Common Mode
3
4.2
pF
CCM
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RL = 100 kΩ to GND
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to GND
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VSY
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VSY
4.98
4.98
4.9
4.99
4.95
2
V
V
V
V
mV
mV
mV
mV
mA
4.9
Output Voltage Low
VOL
5
5
25
30
10
−40°C ≤ TA ≤ +125°C
VOUT = VSY or GND
Short-Circuit Limit
POWER SUPPLY
ISC
45
Power Supply Rejection Ratio
PSRR
VSY = 1.8 V to 5 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
VOUT = VSY/2
100
100
95
110
dB
dB
dB
μA
μA
Supply Current per Amplifier
ISY
15
20
25
−40°C ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ΦM
RL = 100 kΩ, CL = 10 pF, G = 1
RL = 1 MΩ, CL = 20 pF, G = 1
RL = 1 MΩ, CL = 20 pF, G = 1
13
95
60
mV/μs
kHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
en p-p
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
2.8
45
15
μV p-p
nV/√Hz
fA/√Hz
Rev. A | Page 3 of 20
AD8506/AD8508
ELECTRICAL CHARACTERISTICS—1.8 V OPERATION
VSY = 1.8 V, VCM = VSY/±, TA = ±5°C, RL = 100 kΩ to GND, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
0.5
1
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
0 V ≤ VCM ≤ 1.8 V
−40°C ≤ TA ≤ +125°C
2.5
3.5
10
100
600
5
50
100
1.8
mV
mV
pA
pA
pA
pA
pA
pA
V
dB
dB
dB
dB
dB
μV/°C
pF
Input Bias Current
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.5
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
0 V ≤ VCM ≤ 1.8 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
0.05 V ≤ VOUT ≤ 1.75 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
0
CMRR
AVO
85
85
80
95
95
100
115
Large Signal Voltage Gain
Offset Voltage Drift
2.5
3
ΔVOS/ΔT
CDIFF
Input Capacitance Differential Mode
Input Capacitance Common Mode
4.2
pF
CCM
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RL = 100 kΩ to GND
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to GND
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VSY
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VSY
1.78
1.78
1.65
1.65
1.79
1.75
2
V
V
V
V
mV
mV
mV
mV
mA
Output Voltage Low
VOL
5
5
25
25
12
−40°C ≤ TA ≤ +125°C
VOUT = VSY or GND
Short-Circuit Limit
POWER SUPPLY
Power Supply Rejection Ratio
ISC
4.5
110
PSRR
VSY = 1.8 V to 5 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
VOUT = VSY/2
100
100
95
dB
dB
dB
μA
μA
Supply Current per Amplifier
ISY
16.5
20
25
−40°C ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ΦM
RL = 100 kΩ, CL = 10 pF, G = 1
RL = 1 MΩ, CL = 20 pF, G = 1
RL = 1 MΩ, CL = 20 pF, G = 1
13
95
60
mV/μs
kHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
en p-p
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
2.8
45
15
μV p-p
nV/√Hz
fA/√Hz
Rev. A | Page 4 of 20
AD8506/AD8508
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
was measured using a standard two-layer board.
Parameter
Rating
5.5 V
VSY 0.1 V
10 mA
VSY
Supply Voltage
Input Voltage
Input Current1
Differential Input Voltage2
Output Short-Circuit Duration to GND Indefinite
Table 4. Thermal Resistance
Package Type
θJA
θJC
44
35
Unit
°C/W
°C/W
8-Lead MSOP (RM-8)
14-Lead TSSOP (RU-14)
190
180
Storage Temperature Range
−65°C to +150°C
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
−40°C to +125°C
−65°C to +150°C
300°C
ESD CAUTION
1 Input pins have clamp diodes to the supply pins. Input current should be
limited to 10 mA or less whenever the input signal exceeds the power
supply rail by 0.5 V.
2 Differential input voltage is limited to 5 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 5 of 20
AD8506/AD8508
TYPICAL PERFORMANCE CHARACTERISTICS
TA = ±5°C, unless otherwise noted.
250
200
150
100
50
250
V
V
= 1.8V
V
V
= 5V
SY
SY
= V /2
= V /2
CM
SY
CM
SY
200
150
100
50
0
–4
0
–4
–3
–2
–1
0
1
2
3
4
–3
–2
–1
0
1
2
3
4
V
(mV)
V
(mV)
OS
OS
Figure 3. Input Offset Voltage Distribution
Figure 6. Input Offset Voltage Distribution
16
14
12
10
8
12
10
8
V
= 5V
V
= 1.8V
SY
–40°C ≤ T ≤ +125°C
SY
–40°C ≤ T ≤ +125°C
A
A
6
6
4
4
2
2
0
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13
0
1
2
3
4
5
6
7
8
9
10 11 12 13
TCV (µV/°C)
OS
TCV (µV/°C)
OS
Figure 4. Input Offset Voltage Drift Distribution
Figure 7. Input Offset Voltage Drift Distribution
2000
1500
1000
500
2000
1500
1000
500
V
= 1.8V
V
= 5V
SY
SY
0
0
–500
–1000
–1500
–2000
–500
–1000
–1500
–2000
0
0.2
0.4
0.6
0.8
1.0
(V)
1.2
1.4
1.6
1.8
0
1
2
3
4
5
V
V
(V)
CM
CM
Figure 5. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 8. Input Offset Voltage vs. Input Common-Mode Voltage
Rev. A | Page 6 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
–115
–120
–125
–130
–135
–140
–145
–150
V
= 1.8V
V
= 5V
SY
SY
–120
–125
–130
–135
–140
0
0.2
0.4
0.6
0.8
1.0
(V)
1.2
1.4
1.6
1.8
0
1
2
3
4
5
V
V
(V)
CM
CM
Figure 9. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 12. Input Offset Voltage vs. Input Common-Mode Voltage
600
600
V
= 1.8V
V
= 5V
SY
SY
550
500
450
400
350
300
250
200
550
500
450
400
350
300
250
200
0
0.2
0.4
0.6
0.8
1.0
(V)
1.2
1.4
1.6
1.8
0
0.5
1.0
1.5
2.0
2.5
(V)
3.0
3.5
4.0
4.5
5.0
V
V
CM
CM
Figure 10. Input Bias Current vs. Common-Mode Voltage at 125°C
Figure 13. Input Bias Current vs. Common-Mode Voltage at 125°C
1000
1000
V
V
= 1.8V
= V /2
SY
SY
V
V
= 5V
= V /2
SY
SY
CM
CM
100
10
1
100
10
1
0.1
0.1
0.01
0.01
25
35
45
55
65
75
85
95
105 115 125
25
35
45
55
65
75
85
95
105 115 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Input Bias Current vs. Temperature
Figure 14. Input Bias Current vs. Temperature
Rev. A | Page 7 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
10k
10k
1k
V
= 1.8V
V
= 5V
SY
SY
1k
100
10
V
– V
OH
DD
100
10
V
OL
V
OL
V
– V
OH
DD
1
1
0.1
0.01
0.1
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 15. Output Voltage to Supply Rail vs. Load Current
Figure 18. Output Voltage to Supply Rail vs. Load Current
14
12
10
8
14
12
10
8
V
= 1.8V
V
= 5V
SY
SY
V
– V @ R = 10kΩ
OH L
V
– V @ R = 10kΩ
OH L
DD
DD
V
@ R = 10kΩ
V
@ R = 10kΩ
L
OL
L
OL
6
6
4
4
V
– V @ R = 100kΩ
OH L
DD
V
– V @ R = 100kΩ
OH L
DD
2
2
V
@ R = 100kΩ
L
V
@ R = 100kΩ
L
OL
20
OL
0
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
–40 –25 –10
5
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 16. Output Voltage to Supply Rail vs. Temperature
Figure 19. Output Voltage to Supply Rail vs. Temperature
90
90
80
70
60
50
40
30
20
10
0
AD8506
AD8508
V
V
= 1.8V AND 5V
= V /2
SY
V
= V /2
SY
SY
CM
80
70
60
50
40
30
20
10
0
CM
AD8508, 1.8V
AD8508, 5V
AD8506, 1.8V
AD8506, 5V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–40 –25 –10
5
20
35
50
65
80
95 110 125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Figure 20. Total Supply Current vs. Temperature
Figure 17. Total Supply Current vs. Supply Voltage
Rev. A | Page 8 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
120
120
100
80
120
100
80
120
V
= 1.8V
V
= 5V
SY
SY
100
80
PHASE
100
80
PHASE
GAIN
60
60
60
40
60
40
40
40
GAIN
20
20
20
20
0
0
0
0
–20
–40
–60
–80
–100
–120
–20
–40
–60
–80
–100
–120
–20
–20
GAIN, C = 0pF
GAIN, C = 0pF
L
PHASE, C = 0pF
L
GAIN, C = 50pF
L
PHASE, C = 50pF
L
GAIN, C = 100pF
L
PHASE, C = 100pF
L
L
PHASE, C = 0pF
L
–40
–60
–40
–60
–80
–100
GAIN, C = 50pF
L
PHASE, C = 50pF
L
GAIN, C = 100pF
L
–80
PHASE, C = 100pF
L
–100
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Open-Loop Gain and Phase vs. Frequency
Figure 24. Open-Loop Gain and Phase vs. Frequency
50
40
50
V
= 5V
V
= 1.8V
SY
SY
G = –100
G = –10
G = –100
G = –10
40
30
30
20
20
10
10
G = –1
G = –1
0
0
–10
–20
–30
–40
–50
–10
–20
–30
–40
–50
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25. Closed-Loop Gain vs. Frequency
Figure 22. Closed-Loop Gain vs. Frequency
10k
1k
10k
V
= 5V
SY
V
= 1.8V
SY
1k
100
10
G = 100
G = 10
G = 1
G = 100
100
10
G = 10
G = 1
1
1
0.1
0.1
10
0.01
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26. ZOUT vs. Frequency
Figure 23. ZOUT vs. Frequency
Rev. A | Page 9 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
100
100
90
V
= 1.8V
V
= 5V
SY
SY
90
80
70
60
80
70
60
50
40
50
40
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 27. CMRR vs. Frequency
Figure 30. CMRR vs. Frequency
100
90
80
70
60
50
40
30
20
10
0
100
V
SY
= 5V
V
= 1.8V
SY
90
80
70
60
50
40
30
20
10
0
PSRR+
100k
PSRR+
100k
PSRR–
PSRR–
10
100
1k
10k
1M
10
100
1k
10k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 31. PSRR vs. Frequency
Figure 28. PSRR vs. Frequency
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
V
R
= 1.8V
= 100kΩ
V
R
= 5V
= 100kΩ
SY
SY
L
L
–OVERSHOOT
–OVERSHOOT
+OVERSHOOT
+OVERSHOOT
10
100
LOAD CAPACITANCE (pF)
600
10
100
LOAD CAPACITANCE (pF)
600
Figure 32. Small Signal Overshoot vs. Load Capacitance
Figure 29. Small Signal Overshoot vs. Load Capacitance
Rev. A | Page 10 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
V
R
C
= 1.8V
= 100kΩ
= 200pF
V
R
C
= 5V
= 100kΩ
= 200pF
SY
SY
L
L
L
L
G = 1
G = 1
TIME (100µs/DIV)
TIME (100µs/DIV)
Figure 33. Large Signal Transient Response
Figure 36. Large Signal Transient Response
V
R
C
= 1.8V
= 100kΩ
= 200pF
V
R
C
= 5V
= 100kΩ
= 200pF
SY
SY
L
L
L
L
G = 1
G = 1
TIME (100µs/DIV)
TIME (100µs/DIV)
Figure 34. Small Signal Transient Response
Figure 37. Small Signal Transient Response
1k
V
= 1.8V AND 5V
SY
2.78µV p-p
V
= 1.8V AND 5V
SY
100
10
1
TIME (4s/DIV)
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 35. Voltage Noise 0.1 Hz to 10 Hz
Figure 38. Voltage Noise Density vs. Frequency
Rev. A | Page 11 of 20
AD8506/AD8508
TA = ±5°C, unless otherwise noted.
–40
–40
V
V
= 1.8V
= 1.5V p-p
V
V
= 5V
= 4V p-p
SY
IN
100kΩ
SY
IN
100kΩ
–50
–60
–70
–80
–50
–60
–70
–80
10kΩ
10kΩ
–90
–100
–110
–120
–90
–100
–110
–120
100
1k
10k
100k
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 39. Channel Separation vs. Frequency
Figure 40. Channel Separation vs. Frequency
Rev. A | Page 12 of 20
AD8506/AD8508
THEORY OF OPERATION
V
DD
The AD8506/AD8508 are unity-gain stable CMOS rail-to-rail
input/output operational amplifiers designed to optimize
performance in current consumption, PSRR, CMRR, and zero
crossover distortion, all embedded in a small package. The
typical offset voltage is 500 μV, with a low peak-to-peak voltage
noise of ±.8 μV p-p from 0.1 Hz to 10 Hz and a voltage noise
density of 45 nV/√Hz at 1 kHz.
V
BIAS
V
V
IN+
IN–
I
Q2
Q4
Q3
Q1
The AD8506/AD8508 are designed to solve two key problems
in low voltage battery-powered applications: battery voltage
decrease over time and rail-to-rail input stage distortion.
I
B
B
In battery-powered applications, the supply voltage available to
the IC is the voltage of the battery. Unfortunately, the voltage of
a battery decreases as it discharges itself through the load. This
voltage drop over the lifetime of the battery causes an error in
the output of the op amps. Some applications requiring precision
measurements during the entire lifetime of the battery use voltage
regulators to power up the op amps as a solution. If a design
uses standard battery cells, the op amps experience a supply
voltage change from roughly 3.± V to 1.8 V during the lifetime
of the battery. This means that for a PSRR of 70 dB minimum in
a typical op amp, the input-referred offset error is approximately
440 μV. If the same application uses the AD8506/AD8508 with
a 100 dB minimum PSRR, the error is only 14 μV. It is possible
to calibrate out this error or to use an external voltage regulator
to power the op amp, but these solutions can increase system
cost and complexity. The AD8506/AD8508 solve the impasse
with no additional cost or error-nullifying circuitry.
V
SS
Figure 41. A Typical Dual Differential Pair Input Stage Op Amp
(Dual PMOS Q1 and Q2 Transistors Form the Lower End of the Input Voltage
Range Whereas Dual NMOS Q3 and Q4 Compose the Upper End)
300
V
T
= 5V
SY
= 25°C
250
200
150
100
50
A
0
–50
–100
–150
–200
–250
–300
0
0.5
1.0
1.5
2.0
2.5
(V)
3.0
3.5
4.0
4.5
5.0
The second problem with battery-powered applications is the
distortion caused by the standard rail-to-rail input stage. Using
a CMOS non-rail-to-rail input stage (that is, a single differential
pair) limits the input voltage to approximately one VGS (gate-
source voltage) away from one of the supply lines. Because VGS
for normal operation is commonly over 1 V, a single differential
pair input stage op amp greatly restricts the allowable input
voltage range when using a low supply voltage. This limitation
restricts the number of applications where the non-rail-to-rail
input op amp was originally intended to be used. To solve this
problem, a dual differential pair input stage is usually implemented
(see Figure 41); however, this technique has its own drawbacks.
V
CM
Figure 42. Typical Input Offset Voltage vs. Common-Mode Voltage
Response in a Dual Differential Pair Input Stage Op Amp (Powered by 5 V
Supply; Results of Approximately 100 Units per Graph Are Displayed)
This distortion forces the designer to come up with impractical
ways to avoid the crossover distortion areas, therefore narrowing
the common-mode dynamic range of the operational amplifier.
The AD8506/AD8508 solve this crossover distortion problem
by using an on-chip charge pump to power the input differential
pair. The charge pump creates a supply voltage higher than the
voltage of the battery, allowing the input stage to handle a wide
range of input signal voltages without using a second differential
pair. With this solution, the input voltage can vary from one
supply extreme to the other with no distortion, thereby restoring
the op amp full common-mode dynamic range.
One differential pair amplifies the input signal when the common-
mode voltage is on the high end, whereas the other pair amplifies
the input signal when the common-mode voltage is on the low
end. This method also requires a control circuitry to operate the
two differential pairs appropriately. Unfortunately, this topology
leads to a very noticeable and undesirable problem: if the signal
level moves through the range where one input stage turns off
and the other one turns on, noticeable distortion occurs (see
Figure 4±).
Rev. A | Page 13 of 20
AD8506/AD8508
The charge pump has been carefully designed so that switching
noise components at any frequency, both within and beyond the
amplifier bandwidth, are much lower than the thermal noise floor.
Therefore, the spurious-free dynamic range (SFDR) is limited
only by the input signal and the thermal or flicker noise. There
is no intermodulation between input signal and switching noise.
Figure 44, input offset voltage vs. input common-mode voltage
response, shows the typical response of 1± devices from Figure 8.
Figure 44 has been expanded so that it is easier to compare with
Figure 4±, typical input offset voltage vs. common-mode voltage
response in a dual differential pair input stage op amp.
300
250
Figure 43 displays a typical front-end section of an operational
amplifier with an on-chip charge pump.
V
= 5V, T = 25°C
A
SY
200
150
100
50
V
= POSITIVE PUMPED VOLTAGE = V + 1.8V
PP
DD
V
PP
V
DD
V
B
0
–50
CASCODE
STAGE
AND
–100
–150
Q2
Q1
–IN
+IN
RAIL-TO-RAIL
OUTPUT
OUT
–200
–250
–300
STAGE
0
0.5
1.0
1.5
2.0
2.5
(V)
3.0
3.5
4.0
4.5
5.0
V
CM
V
SS
Figure 44. Input Offset Voltage vs. Input Common-Mode Voltage Response
(Powered by a 5 V Supply; Results of 12 Units Are Displayed)
Figure 43. Typical Front-End Section of an Op Amp
with Embedded Charge Pump
This solution improves the CMRR performance tremendously.
For instance, if the input varies from rail-to-rail on a ±.5 V
supply rail, using a part with a CMRR of 70 dB minimum, an
input-referred error of 790 μV is introduced. Another part with
a CMRR of 5± dB minimum generates a 6.3 mV error. The
AD8506/AD8508 CMRR of 90 dB minimum causes only a 79 μV
error. As with the PSRR error, there are complex ways to minimize
this error, but the AD8506/AD8508 solve this problem without
incurring unnecessary circuitry complexity or increased cost.
Rev. A | Page 14 of 20
AD8506/AD8508
APPLICATIONS INFORMATION
design need to be improved, then a more accurate and low
temperature coefficient drift voltage reference and current
source resistor should be utilized. C3 and C4 are used to
improve stabilization of U1; R3 and R7 are used to provide
some current limit into the U1 inverting pin; and R± and R6 are
used to slow down the rise time of the N-MOSFET when it
turns on. These elements may not be needed, or some bench
adjustments may be required.
PULSE OXIMETER CURRENT SOURCE
A pulse oximeter is a noninvasive medical device used for measur-
ing continuously the percentage of hemoglobin (Hb) saturated
with oxygen and the pulse rate of a patient. Hemoglobin that is
carrying oxygen (oxyhemoglobin) absorbs light in the infrared
(IR) region of the spectrum; hemoglobin that is not carrying
oxygen (deoxyhemoglobin) absorbs visible red (R) light. In pulse
oximetry, a clip containing two LEDs (sometimes more, depending
on the complexity of the measurement algorithm) and the light
sensor (photodiode) is placed on the finger or earlobe of the
patient. One LED emits red light (600 nm to 700 nm) and the
other emits light in the near IR (800 nm to 900 nm) region. The
clip is connected by a cable to a processor unit. The LEDs are
rapidly and sequentially excited by two current sources (one for
each LED), whose dc levels depend on the LED being driven,
based on manufacturer requirements, and the detector is synchro-
nized to capture the light from each LED as it is transmitted
through the tissue.
+5V
C2
0.1µF
CONNECT TO RED LED
+5V
U2
ADG733
C1
0.1µF
U1
1/2
16
+5V
62.5mA
R2
AD8506
V
DD
S1A 12
R4
53.6kΩ
8
14 D1
5
6
V
OUT1
S1B 13
22Ω
V+
7
V
= 1.25V
REF
V–
4
S2A
S2B
S3A
S3B
2
1
5
3
U3
Q1
IRLMS2002
D2
D3
15
4
ADR1581
C3
22pF
R3
1kΩ
An example design of a dc current source driving the red and
infrared LEDs is shown in Figure 45. These dc current sources
allow 6±.5 mA and 101 mA to flow through the red and infrared
LEDs, respectively. First, to prolong battery life, the LEDs are
driven only when needed. One-third of the ADG733 SPDT
analog switch is used to disconnect/connect the 1.±5 V voltage
reference from/to each current circuit. When driving the LEDs,
the ADR1581 1.±5 V voltage reference is buffered by ½ of the
AD8506; the presence of this voltage on the noninverting input
forces the output of the op amp (due to the negative feedback)
to maintain a level that makes its inverting input-to-track the
noninverting pin. Therefore, the 1.±5 V appears in parallel with
the ±0 ꢀ R1 or 1±.4 Ω R5 current source resistor, creating the
flow of the 6±.5 mA or 101 mA current through the red or
infrared LED as the output of the op amp turns on the Q1 or Q±
N-MOSFET IRLMS±00±.
R1
20Ω
0.1%
1/8W MIN
9
RED CURRENT
SOURCE
A2
A1
A0
EN
10
11
6
8
GND
V
SS
CONNECT TO INFRARED LED
7
+5V
U1
101mA
1/2
AD8506
8
R6
22Ω
I_BIT2
I_BIT1
I_BIT0
I_ENA
3
2
V
OUT2
V+
1
V–
4
Q2
IRLMS2002
C4
22pF
R7
1kΩ
R5
12.4Ω
0.1%
INFRARED CURRENT
SOURCE
1/4W MIN
The maximum total quiescent currents for the ½ AD8506,
ADR1581, and ADG733 are ±5 μA, 70 μA, and 1 μA, respectively,
making a total of 96 μA current consumption (480 μW power
consumption) per circuit, which is good for a system powered
by a battery. If the accuracy and temperature drift of the total
Figure 45. Pulse Oximeter Red and Infrared Current Sources Using the
AD8506 as a Buffer to the Voltage Reference Device
Rev. A | Page 15 of 20
AD8506/AD8508
converter requires low input bias current. The AD8506 is an
excellent choice because it provides 1 pA typical and 10 pA
maximum of input bias current at ambient temperature.
FOUR-POLE LOW-PASS BUTTERWORTH FILTER
FOR GLUCOSE MONITOR
There are several methods of glucose monitoring: spectroscopic
absorption of infrared light in the ± μm to ±.5 μm range, reflec-
tance spectrophotometry, and the amperometric type using
electrochemical strips with glucose oxidase enzymes. The
amperometric type generally uses three electrodes: a reference
electrode, a control electrode, and a working electrode. Although
this is a very old technique and widely used, signal-to-noise
ratio and repeatability can be improved using the AD8506 with
its low peak-to-peak voltage noise of ±.8 μV p-p from 0.1 Hz to
10 Hz and voltage noise density of 45 nV/√Hz at 1 kHz.
A low-pass filter with a cutoff frequency of 80 Hz to 100 Hz is
desirable in a glucose meter device to remove extraneous noise;
this can be a simple two- or four-pole Butterworth. Low power
op amps with bandwidths of 50 kHz to 500 kHz should be
adequate. The AD8506 with its 95 kHz GBP and 15 μA typical
of current consumption meets these requirements. A circuit
design of a four-pole Butterworth filter (preceded by a one-pole
low-pass filter) is shown in Figure 46. With a 3.3 V battery, the
total power consumption of this design is ±97 μW typical at
ambient temperature.
Another consideration is operation from a 3.3 V battery. Glucose
signal currents are usually less than 3 μA full scale, so the I-to-V
C1
1000pF
R1
5MΩ
+3.3V
WORKING
+3.3V
U1
1/2
AD8506
8
3
2
CONTROL
R2
R3
U2
1/2
AD8506
+3.3V
V+
22.6kΩ 22.6kΩ
8
1
5
6
R4
R5
V–
4
C3
V+
22.6kΩ 22.6kΩ
REFERENCE
8
U1
0.047µF
3
2
7
1/2
AD8506
V–
4
C5
V+
0.047µF
1
V
OUT
V–
4
C2
0.1µF
C4
0.1µF
DUPLICATE OF CIRCUIT ABOVE
Figure 46. A Four-Pole Butterworth Filter That Can Be Used in a Glucose Meter
Rev. A | Page 16 of 20
AD8506/AD8508
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 47. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.10
5.00
4.90
14
8
7
4.50
4.40
4.30
6.40
BSC
1
PIN 1
0.65
BSC
1.05
1.00
0.80
0.20
0.09
1.20
MAX
0.75
0.60
0.45
8°
0°
0.15
0.05
0.30
0.19
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 48. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD8506ARMZ-R21
AD8506ARMZ-REEL1
AD8508ARUZ1
AD8508ARUZ-REEL1
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package Description
Package Option
Branding
A1X
A1X
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
RM-8
RM-8
RU-14
RU-14
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
1 Z = RoHS Compliant Part.
Rev. A | Page 17 of 20
AD8506/AD8508
NOTES
Rev. A | Page 18 of 20
AD8506/AD8508
NOTES
Rev. A | Page 19 of 20
AD8506/AD8508
NOTES
©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06900-0-7/08(A)
Rev. A | Page 20 of 20
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