ADM811-3TART
更新时间:2024-09-18 12:40:47
品牌:ADI
描述:Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP
ADM811-3TART 概述
Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP 微处理器监控电路采用4引脚SOT -143与DSP
ADM811-3TART 数据手册
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PDF下载Microprocessor Supervisory
Circuit in 4-Lead SOT-143 with DSP
ADM811/ADM812
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Superior upgrade for MAX811/MAX812
Specified over temperature
Low power consumption: 5 µA typical
Precision voltage monitor: 2.5 V, 3 V, 3.3 V, 5 V options
Reset assertion down to 1 VCC
ADM811/ADM812
V
CC
RESET
GENERATOR
RESET/RESET
GND
V
REF
MR
DEBOUNCE
Power-on reset: 140 ms minimum
RESET
Logic low
output (ADM811)
Figure 1.
Logic high RESET output (ADM812)
Built-in manual reset
APPLICATIONS
Microprocessor systems
Controllers
Intelligent instruments
Automotive systems
Safety systems
Portable instruments
GENERAL DESCRIPTION
The ADM811/ADM812 are reliable voltage monitoring devices
suitable for use in most voltage monitoring applications. The
ADM811/ADM812 are designed to monitor six different
voltages, each allowing a 5% or 10% degradation of standard
PSU voltages before a reset occurs. These voltages have been
selected for the effective monitoring of 2.5 V, 3 V, 3.3 V, and 5 V
supply voltage levels.
V
V
CC
CC
ADM811
MICROPROCESSOR
SYSTEM
MR
RESET
GND
RESET
100kΩ
GND
Included in this circuit is a debounced manual reset input.
Reset can be activated using an electrical switch (or an input
from another digital device) or by a degradation of the supply
voltage. The manual reset function is very useful, especially if
the circuit in which the ADM811/ADM812 are operating enters
into a state that can only be detected by the user. Allowing the
user to reset a system manually can reduce the damage or
danger that could otherwise be caused by an out-of-control
or locked system.
Figure 2. Typical ADM811 Operating Circuit
Rev. G
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rightsof third parties that may result fromits use. Specifications subject to change without notice. No
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Tel: 781.329.4700
Technical Support
©2013 Analog Devices, Inc. All rights reserved.
www.analog.com
ADM811/ADM812
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Reset Thresholds ...........................................................................7
Reset Output ..................................................................................7
Manual Reset..................................................................................7
Glitch Immunity............................................................................7
Interfacing to Other Devices............................................................8
Output.............................................................................................8
Benefits of a Very Accurate Reset Threshold ............................8
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Circuit Information.......................................................................... 7
RESET
Ensuring a Valid
/Reset Output Down to VCC = 0 V....8
Outline Dimensions..........................................................................9
Ordering Guide .......................................................................... 10
REVISION HISTORY
3/13—Rev. F to Rev. G
1/03—Rev. A to Rev. B
Changes to Pin 4 Description; Table 3........................................... 5
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide .......................................................... 10
Added ADM812 .................................................................Universal
Changes to Specifications.................................................................2
Changes to Ordering Guide.............................................................3
Changes to Pin Configuration.........................................................4
Changes to Pin Function Description ............................................4
Additions to Table I...........................................................................6
Changes to Manual Reset section....................................................6
8/09—Rev. E to Rev. F
Changes to Ordering Guide .......................................................... 10
5/08—Rev. D to Rev. E
Changes to Table 2 ............................................................................ 4
Changes to Outline Dimensions..................................................... 9
Changes to Ordering Guide .......................................................... 10
5/02—Rev. 0 to Rev. A
Deletion of ADM812..........................................................Universal
5/06—Rev. C to Rev. D
Changes to Ordering Guide ............................................................ 9
2/03—Rev. B to Rev. C
Changes Features .............................................................................. 1
Changes to General Description .................................................... 1
Changes to Specifications................................................................ 2
Removed Note 2 from Ordering Guide......................................... 3
Changes to Pin Function Descriptions.......................................... 4
Removed Note from Table I ........................................................... 6
Rev. G | Page 2 of 12
Data Sheet
ADM811/ADM812
SPECIFICATIONS
VCC = full operating range; TA = TMIN to TMAX; VCC typical = 5 V for L/M models, 3.3 V for T/S models, 3 V for R model, 2.5 V for Z
models, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY
Voltage
1.0
1.2
5.5
V
V
TA = 0°C to 70°C
TA = −40°C to +85°C
Current
8
5
15
10
µA
µA
VCC < 5.5 V, ADM81xL/M, IOUT = 0 mA
VCC < 3.6 V, ADM81xR/S/T/Z, IOUT = 0 mA
RESET VOLTAGE THRESHOLD
ADM81xL
ADM81xL
ADM81xM
ADM81xM
ADM81xT
ADM81xT
ADM81xS
ADM81xS
ADM81xR
ADM81xR
ADM81xZ
ADM81xZ
4.54
4.50
4.30
4.25
3.03
3.00
2.88
2.85
2.58
2.55
2.28
2.25
4.63
4.38
3.08
2.93
2.63
2.32
4.72
4.75
4.46
4.50
3.14
3.15
2.98
3.00
2.68
2.70
2.35
2.38
V
V
V
V
V
V
V
V
V
V
V
V
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
RESET THRESHOLD TEMPERATURE COEFFICIENT
VCC TO RESET/RESET DELAY
30
40
20
ppm/°C
µs
VOD = 125 mV, ADM81xL/M
VOD = 125 mV, ADM81xR/S/T/Z
VCC = VTH(MAX)
µs
RESET ACTIVE TIMEOUT PERIOD
140
300
560
700
ms
ms
ADM811-3T only
MANUAL RESET
Minimum Pulse Width
Glitch Immunity
RESET/RESET Propagation Delay
Pull-Up Resistance
10
µs
ns
µs
kΩ
100
0.5
20
10
30
The Manual Reset Circuit Acts On
An Input Rising Above
An Input Falling Below
An Input Rising Above
An Input Falling Below
RESET/RESET Output Voltage
Low (ADM812R/S/T/Z)
Low (ADM812L/M)
High (ADM812R/S/T/Z/L/M)
Low (ADM811R/S/T/Z)
Low (ADM811L/M)
Low (ADM811R/S/T/Z/L/M)
High (ADM811R/S/T/Z)
High (ADM811L/M)
2.3
V
V
V
V
VCC > VTH(MAX), ADM81xL/M
VCC > VTH(MAX), ADM81xL/M
VCC > VTH(MAX), ADM81xR/S/T/Z
VCC > VTH(MAX), ADM81xR/S/T/Z
0.8
0.7 × VCC
0.25 × VCC
0.3
0.4
V
V
V
V
V
V
V
V
VCC = VTH(MAX), ISINK = 1.2 mA
VCC = VTH(MAX), ISINK = 3.2 mA
1.8 V < VCC < VTH(MIN), ISOURCE = 150 µA
VCC = VTH(MIN), ISINK = 1.2 mA
VCC = VTH(MIN), ISINK = 3.2 mA
VCC > 1.0 V, ISINK = 50 µA
0.8 × VCC
0.3
0.4
0.3
0.8 × VCC
VCC × 1.5
VCC > VTH(MAX), ISOURCE = 500 µA
VCC > VTH(MAX), ISOURCE = 800 µA
Rev. G | Page 3 of 12
ADM811/ADM812
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Typical values are at TA = 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 2.
Parameter
Rating
Terminal Voltage (With Respect to Ground)
VCC
−0.3 V to +6 V
All Other Inputs
−0.3 V to VCC + 0.3 V
Input Current
VCC
MR
20 mA
20 mA
ESD CAUTION
Output Current
RESET
20 mA
Power Dissipation (TA = 70°C)
RA-4 (SOT-143)
200 mW
Derate by 4 mW/°C Above 70°C
θJA Thermal Impedance
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
330°C/W
−40°C to +85°C
−65°C to +160°C
300°C
215°C
220°C
ESD Rating
3 kV
Rev. G | Page 4 of 12
Data Sheet
ADM811/ADM812
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
1
4
V
CC
ADM811/
ADM812
TOP VIEW
(Not to Scale)
RESET/RESET
2
3
MR
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
GND
RESET
Ground Reference For All Signals, 0 V.
Active Low Logic Output. RESET remains low while VCC is below the reset threshold or when MR is low;
RESET then remains low for at least 140 ms (at least 300 ms for the ADM811-3T) after VCC rises above the
reset threshold.
(ADM811)
RESET (ADM812)
Active High Logic Output. RESET remains high while VCC is below the reset threshold or when MR is low;
RESET then remains high for 240 ms (typical) after VCC rises above the reset threshold.
3
4
MR
VCC
Manual Reset. This active low debounced input ignores input pulses of 100 ns or less (typical) and is
guaranteed to accept input pulses of greater than 10 µs. Leave floating when not used.
Monitored Supply Voltage of 2.5 V, 3 V, 3.3 V, or 5 V. A 0.1 µF decoupling capacitor between VCC and the
GND pin is recommended.
Rev. G | Page 5 of 12
ADM811/ADM812
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
12
10
9
8
7
6
5
4
3
2
1
0
I
@ V = 5.5V
CC
DD
I
@ V = 5.5V
CC
10
DD
8
I
@ V = 3V
CC
DD
I
@ V = 3V
CC
DD
6
4
I
@ V = 1V
CC
DD
2
I
@ V = 1V
CC
DD
0
–40
–20
0
20
30
50
70
85
100
120
–40
–20
0
20
30
50
70
85
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 4. Supply Current vs. Temperature (ADM81xR/S/T/Z)
Figure 7. Supply Current vs. Temperature (ADM81xL/M)
1000
900
900
800
700
600
500
400
300
200
100
0
800
700
600
500
400
300
200
100
0
V
= 20mV
OD
V
= 20mV
OD
V
= 125mV
OD
V
= 200mV
20
OD
V
= 125mV
OD
V
= 200mV
OD
–40
–20
0
30
50
70
85
100
120
–40
–20
0
20
30
50
70
85
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
RESET
RESET
Delay vs. Temperature (ADM81xL/M)
Figure 5. Power-Down
Delay vs. Temperature (ADM81xR/S/T/Z)
Figure 8. Power-Down
299
294
279
274
269
264
259
254
249
244
1.007
1.006
1.005
1.004
1.003
1.002
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
ADM81xL/M
ADM81xR/S/T/Z
–40
–20
0
20
30
50
70
85
100
120
–40
–20
0
20
30
50
70
85
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. RESET Threshold Deviation vs. Temperature
Figure 6. Power-Up RESET Timeout vs. Temperature
Rev. G | Page 6 of 12
Data Sheet
ADM811/ADM812
CIRCUIT INFORMATION
This allows time for the power supply and microprocessor to
stabilize.
RESET THRESHOLDS
A reset output is provided to the microprocessor whenever the
RESET
The ADM811 provides an active low reset output (
while the ADM812 provides an active high output (RESET).
RESET
)
V
CC input is below the reset threshold. The actual reset threshold
depends on whether an L, M, T, S, R, or Z suffix is used (see
Table 4).
During power-down of the ADM811, the
output
remains valid (low) with VCC as low as 1 V. This ensures that
the microprocessor is held in a stable shutdown condition as
the supply falls and also ensures that no spurious activity can
occur via the microprocessor as it powers up.
Table 4. Reset Threshold Options
Model
Reset Threshold (V)
ADM811LART
ADM811MART
ADM811TART
ADM811-3TART
ADM811SART
ADM811RART
ADM811ZART
ADM812LART
ADM812MART
ADM812TART
ADM812SART
ADM812RART
ADM812ZART
4.63
4.38
3.08
3.08
2.93
2.63
2.32
4.63
4.38
3.08
2.93
2.63
2.32
MANUAL RESET
The ADM811/ADM812 are equipped with a manual reset
input. This input is designed to operate in a noisy environment
where unwanted glitches could be induced. These glitches could
be produced by the bouncing action of a switch contact, or where a
manual reset switch may be located some distance away from
the circuit (the cabling of which can pick up noise).
The manual reset input is guaranteed to ignore logically valid
inputs that are faster than 100 ns and to accept inputs longer in
duration than 10 µs.
GLITCH IMMUNITY
The ADM811/ADM812 contain internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
RESET OUTPUT
On power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240 ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor
to stabilize after power-up. If a power supply brownout or
interruption occurs, the reset output is similarly activated and
remains active for 240 ms (typical) after the supply recovers.
V
V
V
V
REF
V
REF
REF
REF
CC
t1
t1
RESET
t1 = RESET TIME = 250ms TYPICAL
= RESET VOLTAGE THRESHOLD
V
REF
RESET
Figure 10. Power Fall
Timing
Rev. G | Page 7 of 12
ADM811/ADM812
Data Sheet
INTERFACING TO OTHER DEVICES
V
V
CC
CC
OUTPUT
The ADM811/ADM812 are designed to integrate with as many
devices as possible. One feature of the ADM811/ADM812 is the
reset output, which is directly proportional to VCC (this is guar-
anteed only while VCC is greater than 1 V). This enables the part
to be used with both 3 V and 5 V, or any nominal voltage within
ADM811
RESET
GND
the minimum and maximum specifications for VCC
.
RESET
Figure 11. Ensuring a Valid
Output Down to VCC = 0 V
BENEFITS OF A VERY ACCURATE RESET
THRESHOLD
Because the ADM811/ADM812 can operate effectively even
when there are large degradations of the supply voltages, the
possibility of a malfunction during a power failure is greatly
reduced. Another advantage of the ADM811/ADM812 is its
very accurate internal voltage reference circuit. Combined,
these benefits produce an exceptionally reliable microprocessor
supervisory circuit.
ENSURING A VALID RESET/RESET
OUTPUT DOWN TO VCC = 0 V
RESET
When VCC falls below 0.8 V, the
/RESET of the ADM811/
ADM812 no longer sinks current. Therefore, a high impedance
RESET
CMOS logic input connected to
undetermined logic levels. To eliminate this problem, a 100 kΩ
RESET
/RESET can drift to
resistor should be connected from
/RESET to ground.
Rev. G | Page 8 of 12
Data Sheet
ADM811/ADM812
OUTLINE DIMENSIONS
3.04
2.90
2.80
1.92 BSC
0.20
BSC
2.64
2.10
4
3
2
1.40
1.30
1.20
1
1.72 REF
1.07
0.90
0.75
1.22
0.80
0.20
0.08
0.100
0.013
8°
0°
0.60
0.50
0.40
0.89
0.76
0.50
0.30
SEATING
PLANE
0.54 REF
COMPLIANT TO JEDEC STANDARDS TO-253-AA
Figure 12. 4-Lead Small Outline Transistor Package [SOT-143]
(RA-4)
Dimensions shown in millimeters
Rev. G | Page 9 of 12
ADM811/ADM812
Data Sheet
ORDERING GUIDE
Reset
Threshold (V)
Temperature
Range
Ordering
Quantity
Package
Description
Package
Model1, 2
Option
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
Branding
MBV
MBV
M4J
M4J
MBT
MBT #
MBT #
MBG
MBG #
MBG #
MB3
M4E
ADM811LART-REEL
ADM811LART-REEL7
ADM811LARTZ-REEL
ADM811LARTZ-REEL7
ADM811MART-REEL7
ADM811MARTZ-REEL
ADM811MARTZ-REEL7
ADM811TART-REEL7
ADM811TARTZ-REEL
ADM811TARTZ-REEL7
ADM811-3TART-REEL7
ADM811-3TARTZ-RL
ADM811-3TARTZ-RL7
ADM811SART-REEL
ADM811SART-REEL7
ADM811SARTZ-REEL
ADM811SARTZ-REEL7
ADM811RART-REEL7
ADM811RARTZ-REEL
ADM811RARTZ-REEL7
ADM811ZART-REEL
ADM811ZART-REEL7
ADM811ZARTZ-REEL
ADM811ZARTZ-REEL7
ADM812LART-REEL7
ADM812LARTZ-REEL
ADM812LARTZ-REEL7
ADM812MART-REEL
ADM812MART-REEL7
ADM812MARTZ-REEL
ADM812MARTZ-REEL7
ADM812TART-REEL7
ADM812TARTZ-REEL
ADM812TARTZ-REEL7
ADM812SART-REEL
ADM812SART-REEL7
ADM812SARTZ-REEL
ADM812SARTZ-REEL7
ADM812RART-REEL7
ADM812RARTZ-REEL
ADM812RARTZ-REEL7
ADM812ZART-REEL
ADM812ZART-REEL7
ADM812ZARTZ-REEL
ADM812ZARTZ-REEL7
4.63
4.63
4.63
4.63
4.38
4.38
4.38
3.08
3.08
3.08
3.08
3.08
3.08
2.93
2.93
2.93
2.93
2.63
2.63
2.63
2.32
2.32
2.32
2.32
4.63
4.63
4.63
4.38
4.38
4.38
4.38
3.08
3.08
3.08
2.93
2.93
2.93
2.93
2.63
2.63
2.63
2.32
2.32
2.32
2.32
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
10,000
3,000
10,000
3,000
3,000
10,000
3,000
3,000
10,000
3,000
3,000
10,000
3,000
10,000
3,000
10,000
3,000
3,000
10,000
3,000
10,000
3,000
10,000
3,000
3,000
10,000
3,000
10,000
3,000
10,000
3,000
3,000
10,000
3,000
10,000
3,000
10,000
3,000
3,000
10,000
3,000
10,000
3,000
10,000
3,000
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
M4E
MBE
MBE
MBE #
MBE #
MBB
M4N
M4N
MBZ
MBZ
M6G
M6G
MCV
M5D
M5D
MCT
MCT
M6D
M6D
MCG
M68
M68
MCE
MCE
M67
M67
MCB
M6F
M6F
MCZ
MCZ
M69
M69
1 Available only in reels.
2 Z = RoHS Compliant Part. RoHS-compliant parts may have # branded on either the top or bottom of the device.
Rev. G | Page 10 of 12
Data Sheet
NOTES
ADM811/ADM812
Rev. G | Page 11 of 12
ADM811/ADM812
NOTES
Data Sheet
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00092-0-3/13(G)
Rev. G | Page 12 of 12
ADM811-3TART 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
ADM811-3TART-REEL | ADI | Microprocessors Supervisory Circuit in 4-Lead SOT-143 | 获取价格 | |
ADM811-3TART-REEL7 | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 | |
ADM811-3TART-RL7 | ADI | Microprocessors Supervisory Circuit in 4-Lead SOT-143 | 获取价格 | |
ADM811-3TARTZ-RL | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 | |
ADM811-3TARTZ-RL7 | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 | |
ADM811LART | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 | |
ADM811LART-REEL | ADI | Microprocessors Supervisory Circuit in 4-Lead SOT-143 | 获取价格 | |
ADM811LART-REEL-7 | ADI | Microprocessors Supervisory Circuit in 4-Lead SOT-143 | 获取价格 | |
ADM811LART-REEL7 | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 | |
ADM811LARTZ-REEL | ADI | Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP | 获取价格 |
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