OP97BIFZ [ADI]
IC OP-AMP, 200 uV OFFSET-MAX, 0.9 MHz BAND WIDTH, CDIP8, HERMETIC SEALED, CERDIP-8, Operational Amplifier;
| 型号： | OP97BIFZ |
| 厂家： | 
ADI |
| 描述： | IC OP-AMP, 200 uV OFFSET-MAX, 0.9 MHz BAND WIDTH, CDIP8, HERMETIC SEALED, CERDIP-8, Operational Amplifier 放大器 CD |
| 文件： | 总16页 (文件大小：522K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power, High Precision
Operational Amplifier
OP97
FEATURES
PIN CONNECTIONS
1
Low supply current: 600 μA maximum
OP07 type performance
Offset voltage: 20 μV maximum
Offset voltage drift: 0.6 μV/°C maximum
Very low bias current
25°C: 100 pA maximum
NULL
8
7
6
5
NULL
OP97
2
3
4
V+
–IN
+IN
OUT
OVER
COMP
V–
Figure 1. 8-Lead PDIP (P Suffix)
8-Lead SOIC (S Suffix)
−55°C to +125°C: 250 pA maximum
High common-mode rejection: 114 dB minimum
Extended industrial temperature range: −40°C to +85°C
GENERAL DESCRIPTION
The OP97 is a low power alternative to the industry-standard
OP07 precision amplifier. The OP97 maintains the standards of
performance set by the OP07 while utilizing only 600 μA supply
current, less than 1/6 that of an OP07. Offset voltage is an ultralow
25 μV, and drift over temperature is below 0.6 μV/°C. External
offset trimming is not required in the majority of circuits.
Common-mode rejection and power supply rejection are also
improved with the OP97, at 114 dB minimum over wider
ranges of common-mode or supply voltage. Outstanding PSR, a
supply range specified from 2.25 V to 20 V, and the minimal
power requirements of the OP97 combine to make the OP97 a
preferred device for portable and battery-powered instruments.
Improvements have been made over OP07 specifications in
several areas. Notable is bias current, which remains below
250 pA over the full military temperature range. The OP97 is
ideal for use in precision long-term integrators or sample-and-
hold circuits that must operate at elevated temperatures.
The OP97 conforms to the OP07 pinout, with the null potenti-
ometer connected between Pin 1 and Pin 8 with the wiper to
V+. The OP97 upgrades circuit designs using AD725, OP05,
OP07, OP12, and PM1012 type amplifiers. It may replace 741-
type amplifiers in circuits without nulling or where the nulling
circuitry has been removed.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1997–2009 Analog Devices, Inc. All rights reserved.
OP97
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Application Information................................................................ 11
AC Performance ............................................................................. 12
Guarding and Shielding................................................................. 13
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 16
Pin Connections ............................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
REVISION HISTORY
01/02—Rev. C to Rev. D
3/09—Rev. F to Rev. G
Changes to Figure 20 and Figure 23............................................... 9
Changes to Figure 26 and Figure 27............................................. 10
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
Edits to Absolute Maximum Ratings..............................................3
Edits to Ordering Guide ...................................................................3
Deleted DICE Characteristics..........................................................3
Deleted Wafer Test Limits ................................................................3
Edits to Applications Information...................................................7
11/07—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Ordering Guide .......................................................... 16
07/03—Rev. D to Rev. E
Deleted H-08A....................................................................Universal
Deleted Q-8 .........................................................................Universal
Deleted E-20A.....................................................................Universal
Deleted Die Characteristics............................................................. 4
Deleted Wafer Test Limits ............................................................... 4
Updated TPC 14 ............................................................................... 5
Updated Outline Dimensions....................................................... 10
Rev. G | Page 2 of 16
OP97
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
OP97E
Typ
OP97F
Typ
Parameter
Symbol
Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
Input Offset Voltage
VOS
10
25
30
75
μV
Long-Term Offset
Voltage Stability
Input Offset Current
Input Bias Current
ΔVOS/Time
IOS
IB
0.3
30
30
0.3
30
30
μV/month
pA
150 pA
100
100
150
Input Noise Voltage
Input Noise Voltage Density
en p-p
en
0.1 Hz to 10 Hz
fO = 10 Hz1
0.5
17
14
0.5
17
14
μV p-p
nV/√Hz
nV/√Hz
fA/√Hz
V/mV
dB
30
22
30
22
fO = 1000 Hz2
Input Noise Current Density
Large Signal Voltage Gain
Common-Mode Rejection
Input Voltage Range3
OUTPUT CHARACTERISTICS
Output Voltage Swing
Differential Input Resistance4
POWER SUPPLY
in
fO = 10 Hz
VO = 10 V; RL = 2 kΩ
20
20
AVO
CMR
IVR
300
114
13.5
2000
132
14.0
200
110
13.5
2000
132
14.0
VCM
= 13.5 V
V
VO
RIN
RL = 10 kΩ
13
30
14
13
30
14
V
MΩ
Power Supply Rejection
Supply Current
PSR
ISY
VS = 2 V to 20 V
Operating range
114
2
132
380
15
110
2
132
380
15
dB
μA
V
600
20
600
20
Supply Voltage
VS
DYNAMIC PERFORMANCE
Slew Rate
SR
0.1
0.4
0.2
0.9
0.1
0.4
0.2
0.9
V/μs
MHz
Closed-Loop Bandwidth
BW
AVCL = 1
1 10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request.
2 Sample tested.
3 Guaranteed by CMR test.
4 Guaranteed by design.
Rev. G | Page 3 of 16
OP97
VS = 15 V, VCM = 0 V, −40°C ≤ TA ≤ +85°C for the OP97E/OP97F, unless otherwise noted.
Table 2.
OP97E
Typ
25
OP97F
Typ
60
Parameter
Symbol
VOS
TCVOS
Conditions
Min
Max
60
Min
Max
200
2.0
Unit
μV
μV/°C
Input Offset Voltage
Average Temperature
Coefficient of VOS
S suffix
0.2
0.6
0.3
0.3
Input Offset Current
Average Temperature
Coefficient of IOS
IOS
TCIOS
60
0.4
250
2.5
80
0.6
750
7.5
pA
pA/°C
Input Bias Current
Average Temperature
Coefficient of IB
Large Signal Voltage Gain
Common-Mode Rejection
Power Supply Rejection
Input Voltage Range1
Output Voltage Swing
Slew Rate
IB
60
250
2.5
80
750
7.5
pA
TCIB
AVO
CMR
PSR
IVR
VO
SR
ISY
VS
0.4
0.6
pA/°C
V/mV
dB
dB
V
V
V/μs
μA
VO = 10 V; RL = 2 kΩ
200
108
108
13.5
13
1000
128
126
14.0
14
0.15
400
15
150
108
108
13.5
13
1000
128
128
14.0
14
0.15
400
15
VCM
= 13.5 V
VS = 2.5 V to 20 V
RL = 10 kΩ
0.05
0.05
Supply Current
Supply Voltage
800
20
800
20
Operating range
2.5
2.5
V
1 Guaranteed by CMR test.
Rev. G | Page 4 of 16
OP97
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Absolute maximum ratings apply to both DICE and packaged
parts, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Table 4.
Package Type
Parameter
Rating
20 V
20 V
1 V
10 mA
1
Supply Voltage
Input Voltage1
θJA
θJC
43
43
Unit
°C/W
°C/W
8-Lead PDIP (P Suffix)
8-Lead SOIC (S Suffix)
1 θJA is specified for worst-case mounting conditions, that is, θJA is specified for
device in socket for PDIP package; θJA is specified for device soldered to
printed circuit board for SOIC package.
103
158
Differential Input Voltage2
Differential Input Current2
Output Short-Circuit Duration
Operating Temperature Range
OP97E, OP97F (P, S)
Storage Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Indefinite
−40°C to +85°C
ESD CAUTION
−65°C to +150°C
−65°C to +150°C
300°C
1 For supply voltages less than 20 V, the absolute maximum input voltage is
equal to the supply voltage.
2 The inputs of the OP97 are protected by back-to-back diodes. Current-
limiting resistors are not used in order to achieve low noise. Differential
input voltages greater than 1 V cause excessive current to flow through the
input protection diodes unless limiting resistance is used.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. G | Page 5 of 16
OP97
TYPICAL PERFORMANCE CHARACTERISTICS
400
60
40
T
V
= 25°C
A
V
T
= ±15V
= 25°C
1894 UNITS
S
A
= 0V
CM
V
= 0V
CM
I
–
B
300
200
100
0
20
0
I
+
B
–20
–40
–60
I
OS
–75
–50
–25
0
25
50
75
100
125
–40
–20
0
20
40
100
60
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (µV)
Figure 5. Input Bias, Offset Current vs. Temperature
Figure 2. Typical Distribution of Input Offset Voltage
60
40
400
300
200
100
0
T
V
= 25°C
= ±15V
1920 UNITS
V
T
V
= ±15V
= 25°C
= 0V
A
S
S
A
CM
I
I
–
+
B
20
B
0
I
OS
–20
–40
–60
–15
–10
–5
0
5
10
15
–100
–50
0
50
COMMON-MODE VOLTAGE (V)
INPUT BIAS CURRENT (pA)
Figure 6. Input Bias, Offset Current vs. Common-Mode Voltage
Figure 3. Typical Distribution of Input Bias Current
±5
500
400
T
= 25°C
= ±15V
= 0V
A
1894 UNITS
V
T
= ±15V
= 25°C
= 0V
S
A
V
V
S
CM
V
CM
±4
±3
±2
±1
0
300
200
100
J PACKAGES
Z, P PACKAGES
0
–60
–40
–20
0
20
40
0
1
2
3
4
5
INPUT OFFSET CURRENT (pA)
TIME AFTER POWER APPLIED (Minutes)
Figure 4. Typical Distribution of Input Offset Current
Figure 7. Input Offset Voltage Warmup Drift
Rev. G | Page 6 of 16
OP97
1000
100
10
450
425
400
BALANCED OR UNBALANCED
NO LOAD
V
V
= ±15V
S
= 0V
CM
T
T
= +125°C
= +25°C
A
–55°C ≤ T ≤ +125°C
A
375
350
325
300
A
T
= 25°C
A
T
= –55°C
A
1
1k
3k
10k
30k
100k 300k
1M
3M
10M
100M
3
0
5
10
SUPPLY VOLTAGE (±V)
15
20
SOURCE RESISTANCE (Ω)
Figure 8. Effective Offset Voltage vs. Source Resistance
Figure 11. Supply Current vs. Supply Voltage
140
120
100
100
10
1
BALANCED OR UNBALANCED
T
V
V
= 25°C
= ±15V
A
V
V
= ±15V
S
S
= 0V
= ±10V
CM
CM
80
60
40
20
0.1
0
1
10
100
1k
10k
100k
1M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
SOURCE RESISTANCE (Ω)
Figure 12. Common-Mode Rejection vs. Frequency
Figure 9. Effective TCVOS vs. Source Resistance
140
120
100
20
T
V
= 25°C
= ±15V
A
T
T
= –55°C
= +25°C
A
S
15
ΔV = 10V p-p
S
A
10
5
T
= +125°C
A
–PSR
V
= ±15V
S
80
60
40
20
0
OUTPUT SHORTED TO GROUND
+PSR
–5
T
A
= +125°C
= +25°C
= –55°C
–10
–15
–20
T
A
A
T
0.1
1
10
100
1k
10k
100k
1M
0
1
2
FREQUENCY (Hz)
TIME FROM OUTPUT SHORT (Minutes)
Figure 10. Short-Circuit Current vs. Time, Temperature
Figure 13. Power Supply Rejection vs. Frequency
Rev. G | Page 7 of 16
OP97
10k
R
= 10kΩ
L
= ±15V
= 0V
V
V
= ±15V
= ±10V
S
V
S
O
T
= +125°C
A
V
CM
T
T
T
= –55°C
= +25°C
= +125°C
A
A
A
T
= +25°C
= –55°C
A
1k
T
A
100
–15
–10
–5
0
5
10
15
1
2
5
10
20
OUTPUT VOLTAGE (V)
LOAD RESISTANCE (kΩ)
Figure 17. Open-Loop Gain Linearity
Figure 14. Open-Loop Gain vs. Load Resistance
35
1k
1k
100
10
1
T
V
= 25°C
= ±2V TO ±20V
T
= 25°C
A
A
V
= ±15V
S
S
30
25
A
= +1
VCL
1% THD
fO = 1kHz
100
10
1
20
CURRENT NOISE
15
10
VOLTAGE NOISE
1/1 CORNER
2.5Hz
5
1/1 CORNER
120Hz
0
10
100
1k
10k
1
10
100
FREQUENCY (Hz)
1k
LOAD RESISTANCE (Ω)
Figure 18. Maximum Output Swing vs. Load Resistance
Figure 15. Noise Density vs. Frequency
35
10
T
V
A
= 25°C
= ±15V
= +1
A
T
V
= 25°C
= ±2V TO ±20V
A
S
30
25
S
VCL
1% THD
= 10kΩ
R
L
1
R
20
R
15
10
R
= 2R
S
0.1
0.01
10Hz
1kHz
5
0
RESISTOR NOISE
100k 1M
100
1k
10k
FREQUENCY (Hz)
100k
100
1k
10k
10M
100M
SOURCE RESISTANCE (Ω)
Figure 19. Maximum Output Swing vs. Frequency
Figure 16. Total Noise Density vs. Source Resistance
Rev. G | Page 8 of 16
OP97
80
60
40
80
60
40
PHASE
GAIN
T
= –55°C
A
T
= –55°C
A
T
= +125°C
A
90
90
T
= +125°C
PHASE
GAIN
A
20
0
135
180
225
20
0
135
180
225
T
= +125°C
A
T
= +125°C
A
T
= –55°C
A
T
= –55°C
A
–20
–40
–20
–40
V
C
R
= ±15V
= 20pF
= 1MΩ
S
V
C
R
= ±15V
= 20pF
= 1MΩ
S
L
L
L
L
–60
100
–60
100
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Open-Loop Gain, Phase vs. Frequency (COC = 0 pF)
Figure 23. Open-Loop Gain, Phase vs. Frequency (COC = 100 pF)
10
1
R
V
= 10kΩ
= ±15V
= 100pF
T
V
R
= 25°C
= ±15V
= 10kΩ
L
A
S
S
T
= +125°C
= –55°C
C
A
L
L
1
0.1
1% THD
= 3V rms
V
OUT
0.1
0.01
T
A
A
VCL
= 100
0.01
A
= 10
VCL
0.001
A
= 1
VCL
0.0001
0.001
10
100
1k
10k
1
10
100
1k
10k
FREQUENCY (Ω)
OVERCOMPENSATION CAPACITOR (pF)
Figure 21. Total Harmonic Distortion Plus Noise vs. Frequency
Figure 24. Slew Rate vs. Overcompensation
70
1000
100
10
T
V
A
V
C
= 25°C
= ±15V
A
S
60
50
T
= +125°C
A
= +1
VCL
= 100mV p-p
OUT
+EDGE
–EDGE
T
= –55°C
A
= 0pF
OC
40
30
20
V
= ±15V
= 20pF
= 1MΩ
= 100
S
C
R
A
L
L
V
10
0
1
10
100
1k
10k
1
10
100
1k
10k
LOAD CAPACITANCE (pF)
OVERCOMPENSATION CAPACITOR (pF)
Figure 22. Small Signal Overshoot vs. Capacitive Load
Figure 25. Gain Bandwidth Product vs. Overcompensation
Rev. G | Page 9 of 16
OP97
1k
100
10
80
60
40
T
V
= 25°C
= ±15V
A
T
= –55°C
A
S
T
= +25°C
A
90
PHASE
= +125°C
T
A
= 1000
A
VCL
20
0
135
180
225
T
= –55°C
A
1
GAIN
T
= +125°C
0.1
A
–20
–40
A
= 1
1k
VCL
V
C
R
= ±15V
= 20pF
= 1MΩ
S
0.01
0.001
L
L
–60
100
1
10
100
10k
100k
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 28. Closed-Loop Output Resistance vs. Frequency
Figure 26. Open-Loop Gain, Phase vs. Frequency (COC = 1000 pF)
80
`
T
= –55°C
A
60
40
T = +25°C
A
PHASE
90
T
= +125°C
= –55°C
A
20
135
180
225
GAIN
0
T
A
–20
–40
–60
T
= +125°C
A
V
C
R
= ±15V
= 20pF
= 1MΩ
S
L
L
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 27. Open-Loop Gain, Phase vs. Frequency (COC = 10,000 pF)
Rev. G | Page 10 of 16
OP97
APPLICATION INFORMATION
The OP97 is a low power alternative to the industry-standard
precision op amp, the OP07. The OP97 can be substituted
directly into OP07, OP77, AD725, and PM1012 sockets with
improved performance and/or less power dissipation and can be
inserted into sockets conforming to the 741 pinout if nulling
circuitry is not used. Generally, nulling circuitry used with earlier
generation amplifiers is rendered superfluous by the extremely
low offset voltage of the OP97 and can be removed without
compromising circuit performance.
The input pins of the OP97 are protected against large
differential voltage by back-to-back diodes. Current-limiting
resistors are not used to maintain low noise performance. If
differential voltages above 1 V are expected at the inputs,
series resistors must be used to limit the current flow to a
maximum of 10 mA. Common-mode voltages at the inputs are
not restricted and may vary over the full range of the supply
voltages used.
The OP97 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 kΩ load.
Extremely low bias current over the full military temperature
range makes the OP97 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
not necessary with the OP97. Offset voltage and TCVOS are
degraded only minimally by high source resistance, even when
unbalanced.
Offset nulling is achieved utilizing the same circuitry as an
OP07. A potentiometer between 5 kΩ and 100 kΩ is connected
between Pin 1 and Pin 8 with the wiper connected to the
positive supply. The trim range is between 300 μV and 850 μV,
depending upon the internal trimming of the device.
+V
1
R
= 5kΩ TO 100kΩ
POT
8
2
3
7
6
OP97
5
4
C
OC
–V
Figure 29. Optional Input Offset Voltage Nulling
and Overcompensation Circuit
Rev. G | Page 11 of 16
OP97
AC PERFORMANCE
The ac characteristics of the OP97 are highly stable over its full
operating temperature range. Unity-gain small-signal response
is shown in Figure 30. Extremely tolerant of capacitive loading
on the output, the OP97 displays excellent response even with
1000 pF loads (see Figure 31). In large signal applications, the
input protection diodes effectively short the input to the output
during the transients if the amplifier is connected in the usual
unity-gain configuration. The output enters short-circuit current
limit, with the flow going through the protection diodes.
Improved large signal transient response is obtained by using a
feedback resistor between the output and the inverting input.
Figure 32 shows the large-signal response of the OP97 in unity-
gain with a 10 kΩ feedback resistor. The unity-gain follower
circuit is shown in Figure 33.
100
90
10
0%
2V
20µs
Figure 32. Large Signal Transient Response (AVCL = 1)
The overcompensation pin (Pin 5) can be used to increase the
phase margin of the OP97 or to decrease gain bandwidth
product at gains greater than 10.
10kΩ
2
6
V
OUT
OP97
3
V
IN
Figure 33. Unity-Gain Follower
100
90
100
90
10
0%
20mV
5µs
10
Figure 30. Small Signal Transient Response
(CLOAD = 100 pF, AVCL = 1)
0%
20mV
5µs
Figure 34. Small Signal Transient Response with Overcompensation
(CLOAD = 1000 pF, AVCL = 1, COC = 220 pF)
100
90
10
0%
20mV
5µs
Figure 31. Small-Signal Transient Response
(CLOAD = 1000 pF, AVCL = 1)
Rev. G | Page 12 of 16
OP97
GUARDING AND SHIELDING
The OP97 is an excellent choice as an output amplifier for
To maintain the extremely high input impedances of the OP97,
care must be taken in circuit board layout and manufacturing.
Board surfaces must be kept scrupulously clean and free of
moisture. Conformal coating is recommended to provide a
humidity barrier. Even a clean PCB can have 100 pA of leakage
currents between adjacent traces; therefore, use guard rings
around the inputs. Guard traces are operated at a voltage close
to that on the inputs, so that leakage currents are minimal. In
noninverting applications, connect the guard ring to the common-
mode voltage at the inverting input (Pin 2). In inverting appli-
cations, both inputs remain at ground, so that the guard trace
should be grounded. Make guard traces on both sides of the
circuit board.
higher resolution CMOS DACs. Its tightly trimmed offset
voltage and minimal bias current result in virtually no
degradation of linearity, even over wide temperature ranges.
Figure 36 shows a versatile monitor circuit that can typically
sense current at any point between the 15 V supplies. This
makes it ideal for sensing current in applications such as full
bridge drivers where bidirectional current is associated with
large common-mode voltage changes. The 114 dB CMRR of the
OP97 makes the contribution of the amplifier to common-
mode error negligible, leaving only the error due to the resistor
ratio inequality. Ideally, R2/R4 = R3/R5.
High impedance circuitry is extremely susceptible to RF pickup,
line frequency hum, and radiated noise from switching power
supplies. Enclosing sensitive analog sections within grounded
shields is generally necessary to prevent excessive noise pickup.
Twisted-pair cable aid in rejection of line frequency hum.
R1
10kΩ
I
L
V1
R5
10kΩ
R
L
R2
10kΩ
R3
10kΩ
+15V
2
3
7
4
6
V
OUT
OP97
R4
10kΩ
30pF
R
FB
–15V
I
I
O
2
3
6
Figure 36. Current Monitor
V
OUT
AD7548
OP97
O
DIGITAL
INPUTS
Figure 35. DAC Output Amplifier
UNITY-GAIN FOLLOWER
2
NONINVERTING AMPLIFIER
2
6
6
OP97
OP97
3
3
PDIP
INVERTING AMPLIFIER
2
BOTTOM VIEW
8
1
6
OP97
3
Figure 37. Guard Ring Layout and Connections
Rev. G | Page 13 of 16
OP97
+15V
The digitally programmable gain amplifier shown in Figure 38
has 12-bit gain resolution with 10-bit gain linearity over the
range of −1 to −1024. The low bias current of the OP97 main-
tains this linearity, while C1 limits the noise voltage bandwidth,
allowing accurate measurement down to microvolt levels.
V
IN
18
16
±2.5mV TO ±10V
RANGE DEPENDING
ON GAIN SETTING
0.1µF
R
FB
V
I
REF
17
OUT1
1
2
I
OUT2
3
AD7541A
+15V
Table 5.
C1
220pF
DIGITAL IN
GAIN (Av)
−1.00024
−2
−4
−8
−16
−32
−64
4095
2048
1024
512
256
128
64
0.1µF
2
3
6
V
OUT
OP97
0.1µF
–15V
Figure 38. Precision Programmable Gain Amplifier
32
16
8
4
2
1
0
−128
−256
−512
−1024
−2048
−4096
Open Loop
R2
20kΩ
5pF
R1
2kΩ
1µF
2
3
V
IN
6
V
OUT
10kΩ
AD8610
10kΩ
Many high speed amplifiers suffer from less-than-perfect low
frequency performance. A combination amplifier consisting of
a high precision, slow device like the OP97 and a faster device such
as the AD8610 results in uniformly accurate performance from
dc to the high frequency limit of the AD8610, which has a gain-
bandwidth product of 25 MHz. The circuit shown in Figure 39
accomplishes this, with the AD8610 providing high frequency
amplification and the OP97 operating on low frequency signals
and providing offset correction. Offset voltage and drift of the
circuit are controlled by the OP97.
2
6
R2
R1
A
= –
OP97
V
3
5
0.1µF
0.1µF
Figure 39. Combination High Speed, Precision Amplifier
5V
100
90
10
0%
1V
2µs
Figure 40. Combination Amplifier Transient Response
Rev. G | Page 14 of 16
OP97
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 41. 8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 42. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
Rev. G | Page 15 of 16
OP97
ORDERING GUIDE
Model
Temperature Range
–40°C to +85°C
–40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
Package Option
OP97EP
OP97EPZ1
N-8
N-8
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
8-Lead PDIP
OP97FP
OP97FPZ1
OP97FS
OP97FS-REEL
OP97FS-REEL7
OP97FSZ1
OP97FSZ-REEL1
OP97FSZ-REEL71
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
1 Z = RoHS Compliant Part.
©1997–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00299-0-3/09(G)
Rev. G | Page 16 of 16
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