ACT-S1M32B-100F14M [AEROFLEX]
ACT-F1M32 High Speed 32 Megabit Boot Block FLASH Multichip Module; ACT- F1M32高速32兆引导块闪存多芯片模块
| 型号： | ACT-S1M32B-100F14M |
| 厂家： | 
AEROFLEX CIRCUIT TECHNOLOGY |
| 描述： | ACT-F1M32 High Speed 32 Megabit Boot Block FLASH Multichip Module |
| 文件： | 总9页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACT–F1M32 High Speed 32 Megabit
Boot Block
FLASH Multichip Module
CIRCUIT TECHNOLOGY
www.aeroflex.com/act1.htm
Features
■ 4 Low Voltage/Power Intel 1M x 8 FLASH Die in One
MCM Package
■ Single Block Erase (All bits set to 1)
■ Hardware Data Protection Feature
■ Independent Boot Block Locking
■ MIL-PRF-38534 Compliant MCMs Available
■ Packaging – Hermetic Ceramic
■ Overall Configuration is 1M x 32
■ +5V Operation (Standard) or +3.3V (Consult Factory)
■ Access Times of 80, 100 and 120 nS ( 5V VCC)
■ +5V or +12V Programing
● 68 Lead, .94" x .94" x .180" Dual-Cavity Small
Outline Gull Wing, Aeroflex code# "F14" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
■ Erase/Program Cycles
● 100,000 Commercial
● 10,000 Military and Industrial
■ Sector Architecture (Each Die)
■ Internal Decoupling Capacitors for Low Noise
Operation
■ Commercial, Industrial and Military Temperature
Ranges
● One 16K Protected Boot Block (Bottom Boot Block
Standard, Top Boot Block Special Order)
● Two 8K Parameter Blocks
● One 96K Main Block
● Seven 128K Main Blocks
Block Diagram – CQFP(F14)
General Description
Pin Description
Standard Configuration
I/O0-31
Data I/O
Utilizing Intel’s SmartVoltage
CE1
CE2
CE3
CE4
Boot Block Flash Memory
A0–19 Address Inputs
SmartDie™, the ACT–F1M32 is
a high speed, 32 megabit CMOS
flash multichip module (MCM)
designed for full temperature
range military, space, or high
reliability applications.
WP
WE
OE
WE
CE1-4
OE
Write Enables
Chip Enables
Output Enable
Write Protect
A0 – A19
RP
WP
1Mx8
1Mx8
1Mx8
1Mx8
RP Reset/Powerdown
The ACT-F1M32 consists of
four high-performance Intel
X28F800BV 8 Mbit (8,388,608
bit) memory die. Each die
contains separately erasable
blocks, including a hardware
lockable boot block (16,384
bytes), two parameter blocks
(8,192 bytes each), and 8 main
blocks (one block of 98,304
bytes and seven blocks of
131,072 bytes) This defines the
VCC
GND
NC
Power Supply
Ground
8
8
8
8
Not Connected
I/O0-7
I/O8-15
I/O16-23
I/O24-31
Block Diagram – CQFP(F14)
Pin Description
Optional Configuration
I/O0-31
Data I/O
WE1 CE1 WE2 CE2 WE3 CE3 WE4 CE4
A0–19 Address Inputs
RP
OE
A0 – A19
WE1-4
CE1-4
OE
Write Enable
Chip Enables
Output Enable
boot
block
flash
family
architecture.
1Mx8
1Mx8
1Mx8
1Mx8
RP Reset/Powerdown
The command register is
written by bringing WE to a logic
low level (VIL), while CE is low
and OE is high (VIH). Reading is
VCC
GND
NC
Power Supply
Ground
8
8
8
8
Not Connected
I/O0-7
I/O8-15
I/O16-23
I/O24-31
eroflex Circuit Technology - Advanced Multichip Modules © SCD1661B REV A 1/16/97
General Description, Cont’d,
accomplished by chip Enable (CE) and erased and programmed 100,000 times at
Output Enable (OE) being logically active.
Access time grades of 80nS, 100nS and
120nS maximum are standard.
commercial temperature or 10,000 times at
extended temperature.
The boot block is located at either the
bottom (Standard) or the top (Special
Order) of the address map in order to
accommodate different microprocessor
protocols for boot code location. Locking
and unlocking of the boot block is controlled
by WP and/or RP.
The ACT–F1M32 is packaged in a
hermetically sealed co-fired ceramic 68
lead, .94" SQ Ceramic Gull Wing CQFP
package. This allows operation in a military
environment temperature range of -55°C to
+125°C.
The ACT–F1M32 provides program and
erase capability at 5V or 12V and allows
reads with Vcc at 5V or 3.3V(Not tested).
Since many designs read from flash
memory a large percentage of the time,
read operation using 3.3V can provide
great power savings. Consult the factory for
3.3V tested parts. In applications where
read performance is critical, faster access
times are obtainable with the 5V VCC part
detailed herein.
Intel's boot block architecture provides a
flexible solution for the different design
needs of various applications. The
asymmetrically-blocked
memory
map
allows the integration of several memory
components into a single flash device. The
boot block provides a secure boot PROM;
the parameter blocks can emulate
EEPROM functionality for parameter store
with proper software techniques; and the
main blocks provide code and data storage
with access times fast enough to execute
For program and erase operations, 5V
Vpp operation eliminates the need for in
system voltage converters. The 12V Vpp
operation provides reduced (approx 60%)
program and erase times where 12V is
available in the system. For design
simplicity, however, connect Vcc and Vpp
to the same 5V ±10% source.
code
in
place,
decreasing
RAM
requirements.
For Detail Information regarding the
operation of the 28F800BV Memory die,
see the Intel datasheet (order number
290539-002).
Each block can be independently
SmartDie™ is a Trademark of Intel Corporation
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
Absolute Maximum Ratings
Parameter
Range
Units
-55 to +125
°C
Case Operating Temperature Range
Storage Temperature Range
-65 to +150
-2.0 to +7.0
-2.0 to +13.5
-2.0 to +14.0
-2.0 to +7.0
100
°C
V
Voltage on Any Pin with Respect to GND (except VCC, VPP, A9 and RP) (1)
Voltage on Pins A9 or RP with Respect to GND (except VCC, VPP, A9 and RP) (1,2)
VPP Program Voltage with Respect to GND during Block Erase/ and Word/Byte Write (1,2)
Vcc Supply Voltage with Respect to Ground (1)
V
V
V
Output Short Circuit Current (3)
mA
Notes:
1. Minimum DC voltage is -0.5V on input/output pins. During Transitions, inputs may undershoot to -2.0V for periods < 20nS. Maximum DC voltage on input/output
pins is Vcc + 0.5V, which may overshoot to Vcc + 2.0V for periods < 20nS.
2. Maximum DC voltage on Vpp may overshoot to +14.0V for periods < 20nS. Maximum DC voltage on RP or A9 may overshoot to VCC + 0.5V for periods <20nS
3. Output shorted for no more than 1 second. No more than one output shorted at one time.
NOTICE: Stresses above those listed under "Absolute Maximums Rating" may cause permanent damage. These are stress rating only. Operation beyond the "Oper-
ation Conditions" is not recommended and extended exposure beyond the "Operation Conditions" may effect device reliability.
Recommended Operating Conditions
Symbol
Parameter
Minimum
+4.5
Maximum
+5.5
Units
VCC
V
V
5V Power Supply Voltage (10%)
3.3V Power Supply Voltage (±0.3V) (Consult Factory)
Input High Voltage (3.3V & 5V VCC)
Input Low Voltage (3.3V & 5V VCC)
Operating Temperature (Military)
+3.0
+3.6
VIH
VIL
TA
+2.0
-0.5
-55
V
+ 0.5
V
V
cc
+0.8
+125
°C
Capacitance
(f = 1MHz, TA = 25°C)
Symbol Parameter
Maximum
Units
CAD
50
pF
A0 – A19 Capacitance
OE Capacitance
COE
CCE
CRP
50
20
50
60
50
20
pF
pF
pF
pF
pF
pF
CE Capacitance
RP Capacitance
CWE
CWP
CI/O
WE Capacitance
WP Capacitance
I/O0 – I/O31 Capacitance
Capacitance Guaranteed by design, but not tested.
DC Characteristics – CMOS Compatible
(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)
(1)
+3.3V VCC
Typical
+5.0V VCC
Standard
Min Max
Parameter
Sym
Conditions
Units
Min
Max
IIL
-1
+1
+10
440
32
-1
+1
+10
600
32
µA
µA
µA
µA
Input Load Current
VCC = VCCMax., VIN = VCC or GND
ILO
-10
-10
Output Leakage Current
Vcc Standby Current
VCC = VCCMax., VIN = VCC or GND
ICCS
ICCD
VCC = VCCMax., CE = RP = WP = VCC ± 0.2V
VCC = VCCMax., VIN = VCC or GND, RP = GND ± 0.2V
Vcc Deep Power-Down Current
VCC = VCCMax., CE = GND, f = 10MHz (5V), 5MHz (3.3V),
IOUT = 0 mA, Inputs = GND ± 0.2V or VCC ± 0.2V
ICCR
120
260
mA
Vcc Read Current
Vcc Write Current
ICCW1
ICCW2
ICCE1
ICCE2
ICCES
IPPS
120
100
120
100
32
200
180
180
160
48
mA
mA
mA
mA
mA
µA
VPP = VPPH1 (at 5V), Word Write in Progress (x32)
VPP = VPPH2 (at 12V), Word Write in Progress (x32)
VPP = VPPH1 (at 5V),Block Erase in Progress
VPP = VPPH2 (at 12V),Block Erase in Progress
CE = VIH, Block Erase Suspend
Vcc Erase Current
Vcc Erase Suspend Current
VPP Standby Current
60
60
VPP < VPPH2
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
DC Characteristics – CMOS Compatible
(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)
(1)
+3.3V VCC
Typical
+5.0V VCC
Standard
Min Max
Parameter
Sym
Conditions
Units
Min
Max
IPPD
IPPR
40
800
120
100
120
100
800
2
40
800
120
100
100
80
µA
µA
mA
mA
mA
mA
µA
mA
V
VPP Deep Power Down Current
VPP Read Current
RP = GND ± 0.2V
VPP > VPPH2
IPPW1
IPPW2
IPPE1
IPPE2
IPPES
IRP
VPP Write Current
VPP = VPPH1 (at 5V), Word Write in Progress (x32)
VPP = VPPH2 (at 12V), Word Write in Progress (x32)
VPP = VPPH1 (at 5V), Block Erase in Progress
VPP = VPPH2 (at 12V), Block Erase in Progress
VPP = VPPH, Block Erase Suspend in Progress
RP = VHH, VPP = 12V
VPP Erase Current
800
2
VPP Erase Suspend Current
RP Boot Block Unlock Current
Output Low Voltage
VOL
0.45
0.45
VCC = VCCMin., IOL = 5.8 mA (5V), 2 mA (3.3V)
0.85 x
VCC
0.85 x
VCC
Output High Voltage
VOH1
VOH2
V
V
VCC = VCCMin., IOH = -2.5 mA
VCC = VCCMin., IOH = -100 µA
VCC -
0.4V
VCC -
0.4V
VPPLK
VPPH1
VPPH2
VLKO
VHH
0.0
4.5
11.4
0
1.5
5.5
0.0
4.5
11.4
0
1.5
5.5
V
V
V
V
V
VPP Lock-Out Voltage
Complete Write Protection
VPP = at 5V
VPP (Program/Erase Operations)
VPP (Program/Erase Operations)
VCC Erase/Write Lock Voltage
12.6
2.0
12.6
2.0
VPP = at 12V
Locked Condition
11.4
12.6
11.4
12.6
RP Unlock Voltage
Notes:
Boot Block Write/Erase, VPP = 12V
1. Performance at VCC = +4.5V to +5.5V is guaranteed. Performance at VCC = +3.3V is typical (Not tested).
AC Characteristics – Write/Erase/Program Operations – WE Controlled
(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)
(2)
+3.3V VCC
+4.5V to +5.5V VCC
100nS
Symbol
Typical
120nS
Parameter
Units
JEDEC
Standard
80nS
120nS
Min Max
120
Min Max
Min Max
80
Min Max
100
tAVAV
tPHWL
120
nS
µS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
Sec
Sec
Sec
nS
nS
nS
Write Cycle Time
1.5
0
.45
.45
.45
0
RP High Recovery to WE Going Low
CE Setup to WE Going Low
tELWL
0
100
100
60
60
60
0
0
100
100
60
60
60
0
Boot Block Unlock Setup to WE Going High(1)
VPP Setup to WE Going High (1)
Address Setup to WE Going High
Data Setup to WE Going High
WE Pulse Width
tPHHWH
tVPWH
tAVWH
tDVWH
tWLWH
tWHDX
tWHAX
tWHEH
tWHWL
tWHQV1
tWHQV2
tWHQV3
tWHQV4
200
200
90
70
90
0
100
100
60
60
60
0
Data Hold Time from WE High
Address Hold Time from WE High
CE Hold Time from WE High
0
0
0
0
0
0
0
0
30
6
20
6
20
6
20
6
WE Pulse Width High
Duration of Word Write Operation (1) (x32)
Duration of Erase Operation (Boot) (1)
Duration of Erase Operation (Parameter) (1)
Duration of Erase Operation (Main) (1)
VPP Hold from Valid SRD (1)
0.3
0.3
0.6
0
0.3
0.3
0.6
0
0.3
0.3
0.6
0
0.3
0.3
0.6
0
tQVVL
RP VHH Hold from Valid SRD (1)
Boot Block Lock Delay (1)
t
t
QVPH
PHBR
0
0
0
0
200
100
100
100
Notes:
1. Guaranteed by design, not tested.
2. Performance at VCC = +4.5V to +5.5V is guaranteed. Performance at VCC = +3.3V is typical (Not tested).
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
AC Characteristics – Write/Erase/Program Operations, CE Controlled
(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)
+3.3V
(2)
VCC
+4.5V to +5.5V VCC
100nS
Symbol
Typical
120nS
Min Max
120
Parameter
Units
JEDEC
Standard
80nS
120nS
Min Max
120
Min Max
Min Max
tAVAV
80
.45
0
100
.45
0
nS
µS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
Sec
Sec
Sec
nS
nS
nS
Write Cycle Time
tPHEL
1.5
0
.45
0
RP High Recovery to CE Low
WE Setup to CE Going Low
Boot Block Unlock Setup to CE Going High
VPP Setup to CE Going High (1)
Address Setup to CE Going High
Data Setup to CE Going High
CE Pulse Width
tWLEL
tPHHEH
tVPEH
tAVEH
tDVEH
tELEH
(1)
200
200
90
70
90
0
100
100
60
60
60
0
100
100
60
60
60
0
100
100
60
60
60
0
tEHDX
tEHAX
tEHWH
tEHEL
Data Hold Time from CE High
Address Hold Time from CE High
WE Hold Time from CE High
0
0
0
0
0
0
0
0
20
6
20
6
20
6
20
6
CE Pulse Width High
(1)
tEHQV1
tEHQV2
tEHQV3
tEHQV4
tQVVL
tQVPH
tPHBR
Duration of Word Write Operation
Duration of Erase Operation (Boot)
(x32)
(1)
0.3
0.3
0.6
0
0.3
0.3
0.6
0
0.3
0.3
0.6
0
0.3
0.3
0.6
0
(1)
Duration of Erase Operation (Parameter)
(1)
Duration of Erase Operation (Main)
VPP Hold from Valid SRD (1)
RP VHH Hold from Valid SRD (1)
Boot Block Lock Delay (1)
0
0
0
0
200
100
100
100
NOTES:
1. Sampled, but not 100% tested.
2. Performance at VCC = +4.5V to +5.5V is guaranteed. Performance at VCC = +3.3V is typical (Not Tested).
AC Characteristics – Read Only Operations
(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)
+3.3V
(2)
VCC
+4.5V to +5.5V VCC
Symbol
Typical
120nS
Min Max
120
Parameter
Units
JEDEC
Standard
80nS
Min Max
80
100nS
Min Max
100
120nS
Min Max
120
tAVAV
tAVQV
tELQV
tPHQV
tGLQV
tELQX
tEHQZ
tGLQX
tGHQZ
nS
nS
nS
µS
nS
nS
nS
nS
nS
Read Cycle Time
120
80
100
120
Address to Output Delay
CE to Output Delay
120
80
100
120
1.5
.45
.45
.45
RP to Output Delay
65
40
40
40
OE to Output Delay
CE to Output in Low Z (1)
CE to Output in High Z (1)
OE to Output in Low Z (1)
OE to Output in High Z (1)
Output Hold from Address, CE, or OE Change,
0
0
0
0
55
30
30
30
0
0
0
0
45
30
30
30
tOH
0
0
0
0
nS
(1)
Whichever Occurs First
Notes:
1. Guaranteed by design, but not tested.
2. Performance at VCC = +4.5V to +5.5V is guaranteed. Performance at VCC = +3.3V is typical (Not Tested).
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
AC Test Circuit
Test Configuration Component Values
CL
R1
R2
Test Configuration
(pF)
(Ω)
(Ω)
VCC
3.3V Standard Test
5V Standard Test
50
50
990
580
770
390
R1
R2
NOTES:
CL includes jig capacitance.
Device
Under
Test
OUT
CL
Parameter
Typical
Units
Input Pulse Level
Input Rise and Fall
0 – 3.0
5
V
nS
V
Input and Output Timing Reference Level
1.5
AC Waveforms for Write and Erase Operations, WE Controlled
VCC
Power-up
Standby
Write
Write Program or
Erase Setup Command
Valid Address & Data (Program)
or Erase Confirm Command
Automated Program
or Erase Delay
Read Status
Register Data
Write Read Array
Command
VIH
VIL
AIN
AIN
Addresses
CE
tAVAV
tAVWH
tWHAX
VIH
VIL
tELWL
tWHEH
VIH
OE
VIL
VIH
tWHWL
tWHQV1,2,3,4
WE
VIL
tWLWH
tWHDX
tDVWH
VIH
VIL
High Z
Valid
SRD
DIN
DIN
DIN
Data
tPHWL
tQVPH
tPHHWH
VHH
VIH
6.5V
RP
VIL
VIH
VIL
WP
tVPWH
tQVVL
VPPH2
VPPH1
VPPLK
VPP
VIL
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
AC Waveforms for Write and Erase Operations, CE Controlled
Write
VCC
Power-up
Standby
Write Program or
Erase Setup Command
Valid Address & Data (Program)
or Erase Confirm Command
Automated Program
or Erase Delay
Read Status
Register Data
Write Read Array
Command
VIH
VIL
AIN
AIN
Addresses
WE
tAVAV
tAVEH
tEHAX
VIH
VIL
tWLEL
tEHWH
VIH
OE
CE
VIL
VIH
tEHEL
tEHDX
tEHQV1,2,3,4
VIL
tELEH
tDVEH
VIH
VIL
High Z
Valid
SRD
DIN
DIN
DIN
Data
tPHEL
tQVPH
tPHHEH
VHH
VIH
VIL
6.5V
RP
VIH
VIL
WP
tVPEH
tQVVL
VPPH2
VPPH1
VPPLK
VPP
VIL
AC Waveform For Read Operations
Device and
Address Selection
Standby
Outputs Enabled
Addresses Stable
Data Valid
Standby
VIH
VIL
Addresses
CE
tAVAV
VIH
VIL
tEHQZ
tGHQZ
VIH
OE
VIL
VIH
tGLQV
WE
VIL
tELQV
tGLQX
tELQX
tOH
VOH
VOL
High Z
High Z
Valid Output
Data
tAVQV
VIH
VIL
tPHQV
RP
Aeroflex Circuit Technology
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SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
Pin Numbers & Functions
68 Pins — Dual-Cavity CQFP (Standard Configuration)
Pin #
1
Function
GND
CE3
A5
Pin #
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Function
GND
I/O8
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Function
Pin #
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Function
GND
I/O23
I/O22
I/O21
I/O20
I/O19
I/O18
I/O17
I/O16
VCC
OE
2
CE2
A17
3
I/O9
4
A4
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
VCC
WP
5
A3
NC
6
A2
NC
7
A1
A18
8
A0
A19
9
RP
VPP
10
11
12
13
14
15
16
17
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O31
I/O30
I/O29
I/O28
I/O27
I/O26
I/O25
I/O24
A11
A10
A12
A9
A13
A8
A14
A7
A15
A6
A16
WE
CE1
CE4
Consult Factory for Special order (Optional Configuration): Pin 38 - WE2, Pin 39 - WE3, Pin 40 - WE4 and
Pin 67 - WE1
"F14" — CQFP Dual-Cavity Flat Package
0.180
MAX
0.990 SQ
±.010
0.940 SQ
±.010
0.01R
Pin 60
Pin 9
Pin 61
Pin 10
0.015
±.002
.010
.008
+.002
-.001
±.008
.040
0.750
Detail “A”
Pin 26
Pin 27
Pin 44
Pin 43
0.800 REF
See Detail “A”
All dimensions in inches
Aeroflex Circuit Technology
8
SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
C IRC UIT TEC HNO LO G Y
Ordering Information
Model Number
Screening
Speed
Package
CQFP
CQFP
CQFP
CQFP
CQFP
CQFP
CQFP
CQFP
CQFP
CQFP
ACT–F1M32B–080F14C
ACT–F1M32B–100F14C
ACT–F1M32B–120F14C
ACT–F1M32B–080F14I
ACT–F1M32B–100F14I
ACT–F1M32B–120F14I
ACT–F1M32B–080F14M
ACT–F1M32B–100F14M
ACT–F1M32B–120F14M
ACT–F1M32B–080F14Q
Commercial (0°C to +70°C)
Commercial (0°C to +70°C)
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
Industrial (-40°C to +85°C)
Industrial (-40°C to +85°C)
Military (-55°C to +125°C)
Military (-55°C to +125°C)
Military (-55°C to +125°C)
80 nS
100 nS
120 nS
80 nS
100 nS
120 nS
80 nS
100 nS
120 nS
80 nS
DESC Drawing Pending
MIL-PRF-38534 Compliant
ACT–F1M32B–100F14Q
ACT–F1M32B–120F14Q
DESC Drawing Pending
CQFP
CQFP
100 nS
120 nS
MIL-PRF-38534 Compliant
DESC Drawing Pending
MIL-PRF-38534 Compliant
Part Number Breakdown
ACT– F 1M 32 B– 080 F14 M
Aeroflex Circuit
Technology
Screening
Memory Type
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
S = SRAM
F = FLASH EEPROM
E = EEPROM
M = Military Temp, -55°C to +125°C, Screened *
D = Dynamic RAM
Q = MIL-PRF-38534 Compliant/SMD if applicable
Memory Depth, Locations
Package Type & Size
Surface Mount Packages
F14 = .94" SQ 68 Lead\Dual-Cavity CQFP
Memory Width, Bits
Pinout Options
B = Bottom Boot Block (Standard),
T= Top Boot Block (Special Order)
*
Screened to the individual test methods of MIL-STD-883
Memory Speed, ns (+5V VCC)
Specifications subject to change without notice
Aeroflex Circuit Technology
35 South Service Road
Telephone: (516) 694-6700
FAX: (516) 694-6715
Plainview New York 11830
www.aeroflex.com/act1.htm
Toll Free Inquiries: (800) 843-1553
E-Mail: sales-act@aeroflex.com
Aeroflex Circuit Technology
9
SCD1661B REV A 1/16/97 Plainview NY (516) 694-6700
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