ACT-SF2816N-37P3T [AEROFLEX]

ACT-SF2816 High Speed 128Kx16 SRAM / 512Kx16 FLASH Multichip Module; ACT- SF2816高速128Kx16 SRAM / FLASH 512Kx16多芯片模块
ACT-SF2816N-37P3T
型号: ACT-SF2816N-37P3T
厂家: AEROFLEX CIRCUIT TECHNOLOGY    AEROFLEX CIRCUIT TECHNOLOGY
描述:

ACT-SF2816 High Speed 128Kx16 SRAM / 512Kx16 FLASH Multichip Module
ACT- SF2816高速128Kx16 SRAM / FLASH 512Kx16多芯片模块

静态存储器
文件: 总11页 (文件大小:185K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ACT–SF2816 High Speed  
128Kx16 SRAM / 512Kx16 FLASH  
Multichip Module  
CIRCUIT TECHNOLOGY  
www.aeroflex.com  
FEATURES  
I 2 – 128K x 8 SRAMs & 2 – 512K x 8 Flash Die in I Packaging – Hermetic Ceramic  
G 66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,  
One MCM  
Aeroflex code# "P3"  
I Access Times of 25ns (SRAM) and 60ns (Flash)  
or 35ns (SRAM) and 70 or 90ns (Flash)  
I Organized as 128K x 16 of SRAM and 512K x 16  
of Flash Memory with Separate Data Buses  
I Both Blocks of Memory are User Configurable as  
512KX8 AND 1MX8 Respectively  
G 66 Pin, 1.08" x 1.08" x .185" PGA Type, With  
Shoulder, Aeroflex code# "P7"  
G 68 Lead, .94" x .94" x .140" Single-Cavity Small  
Outline Gull Wing, Aeroflex code# "F18" (Drops into  
the 68 Lead JEDEC .99"SQ CQFJ footprint)  
I DESC SMD – TBD  
I Low Power CMOS  
I Input and Output TTL Compatible Design  
I MIL-PRF-38534 Compliant MCMs Available  
I Decoupling Capacitors and Multiple Grounds for  
Low Noise  
I Industrial and Military Temperature Ranges  
I Industry Standard Pinouts  
FLASH MEMORY FEATURES  
I Sector Architecture (Each Die)  
G 8 Equal Sectors of 64K bytes each  
G Any combination of sectors can be erased with one  
command sequence  
I +5V Programing, +5V Supply  
I Embedded Erase and Program Algorithms  
I Hardware and Software Write Protection  
I Internal Program Control Time.  
Note: Programming information available upon request  
I 10,000 Erase / Program Cycles  
Block Diagram – PGA Type Packages (P3 & P7) & CQFP (F18)  
Pin Description  
SWE1 SCE1 SWE2 SCE2 FWE1 FCE1 FWE2 FCE2  
FI/O0-15  
Flash Data I/O  
SRAM Data I/O  
Address Inputs  
OE  
A0 A18  
SI/O0-15  
A0–18  
128Kx8  
SRAM  
128Kx8  
SRAM  
512Kx8  
Flash  
512Kx8  
Flash  
FWE1-2 Flash Write Enables  
SWE1-2 SRAM Write Enables  
FCE1-2 Flash Chip Enables  
SCE1-2 SRAM Chip Enables  
8
8
8
8
SI/O0-7  
SI/O8-15  
FI/O0-7  
FI/O8-15  
OE  
NC  
Output Enable  
Not Connected  
Power Supply  
Ground  
VCC  
GND  
eroflex Circuit Technology - Advanced Multichip Modules © SCD3853 REV B 5/18/99  
Absolute Maximum Ratings  
Symbol  
TC  
Rating  
Range  
-55 to +125  
-65 to +150  
-0.5 to +7  
300  
Units  
°C  
Operating Temperature  
Storage Temperature  
TSTG  
VG  
°C  
V
Maximum Signal Voltage to Ground  
TL  
°C  
Maximum Lead Temperature (10 seconds)  
Parameter  
Flash Data Retention  
10 Years  
10,000  
Flash Endurance (Write/Erase Cycles)  
Normal Operating Conditions  
Symbol  
VCC  
Parameter  
Minimum  
Maximum  
Units  
+4.5  
+2.2  
-0.5  
+5.5  
VCC + 0.3  
+0.8  
V
V
V
Power Supply Voltage  
Input High Voltage  
Input Low Voltage  
VIH  
VIL  
Capacitance  
(VIN = 0V, f = 1MHz, T = 25°C)  
C
Symbol  
CAD  
Parameter  
Maximum  
Units  
50  
50  
20  
20  
20  
pF  
pF  
pF  
pF  
pF  
A0 A18 Capacitance  
COE  
OE Capacitance  
CWE1,2  
CCE1,2  
CI/O  
F/S Write Enable Capacitance  
F/S Chip Enable Capacitance  
I/O0 – I/O15 Capacitance  
These parameters are guaranteed by design but not tested  
DC Characteristics  
(VCC = 5.0V, VSS = 0V, Tc = -55°C to +125°C, unless otherwise indicated)  
Parameter  
Sym  
Conditions  
Min  
Max Units  
ILI  
10  
µA  
Input Leakage Current  
VCC = Max, VIN = 0 to VCC  
FCE = SCE = VIH, OE = VIH,  
VOUT = 0 to VCC  
ILO  
ICCx16  
ISB  
10  
µA  
Output Leakage Current  
SRAM Operating Supply Current x 16  
Mode  
SCE = VIL, OE = VIH, f = 5MHz, VCC  
Max, FCE = VIH  
=
325 mA  
FCE = SCE = VIH, OE = VIH, f = 5MHz,  
VCC = Max  
40  
mA  
Standby Current  
VOL  
VOH  
ICC1  
0.4  
V
V
SRAM Output Low Voltage  
IOL = 8 mA, VCC = Min, FCE = VIH  
IOH = -4.0 mA, , VCC = Min, FCE = VIH  
FCE = VIL, OE = VIH, SCE = VIH  
2.4  
SRAM Output High Voltage  
130 mA  
Flash Vcc Active Current for Read (1)  
Flash Vcc Active Current for Program  
or Erase (2)  
ICC2  
150 mA  
FCE = VIL, OE = VIH, SCE = VIH  
VOL  
VOH  
VLKO  
0.45  
V
V
V
Flash Output Low Voltage  
Flash Output High Voltage  
Flash Low Vcc Lock Out Voltage  
IOL = 8 mA, VCC = Min, SCE = VIH  
0.85 x VCC  
3.2  
IOH = -2.5 mA, , VCC = Min, SCE = VIH  
Notes: 1) The ICC current listed includes both the DC operating current and the frequency dependent component (at 5MHz). The  
frequency component typically is less than 2mA/MHz, with OE at VIH 2) ICC active while Embedded Algorithim (program or  
erase) is in progress 3) DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V  
2
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
SRAM AC Characteristics  
(VCC = 5.0V, VSS= 0V, Tc= -55°C to +125°C)  
Read Cycle  
Parameter  
–025  
Min Max  
25  
–035  
Min Max  
Symbol  
Units  
tRC  
tAA  
tACE  
tOH  
35  
35  
35  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Read Cycle Time  
25  
25  
Address Access Time  
Chip Select Access Time  
0
Output Hold from Address Change  
Output Enable to Output Valid  
Chip Select to Output in Low Z *  
Output Enable to Output in Low Z *  
Chip Deselect to Output in High Z *  
Output Disable to Output in High Z *  
* Parameters guaranteed by design but not tested  
tOE  
15  
20  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
3
0
3
0
12  
12  
20  
20  
Write Cycle  
Parameter  
–025  
Min Max  
–035  
Min Max  
Symbol  
Units  
tWC  
tCW  
tAW  
tDW  
tWP  
tAS  
25  
20  
20  
15  
20  
0
35  
25  
25  
20  
25  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Write Cycle Time  
Chip Select to End of Write  
Address Valid to End of Write  
Data Valid to End of Write  
Write Pulse Width  
Address Setup Time  
tOW  
tWHZ  
tDH  
0
0
Output Active from End of Write *  
Write to Output in High Z *  
Data Hold from Write Time  
Address Hold Time  
10  
20  
0
0
tAH  
0
0
* Parameters guaranteed by design but not tested  
Truth Table  
Mode  
Standby  
Read  
SCE  
OE  
X
SWE  
Data I/O  
Power  
H
L
L
L
X
H
H
L
High Z  
Data Out  
High Z  
Standby  
Active  
Active  
Active  
L
Output Disable  
Write  
H
X
Data In  
3
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
Timing Diagrams — SRAM  
Read Cycle Timing Diagrams  
Write Cycle Timing Diagrams  
Write Cycle (SWE Controlled, OE = VIH)  
Read Cycle 1 (SCE = OE = VIL, SWE = VIH)  
tWC  
tRC  
A0-18  
A0-18  
tAA  
tAW  
tCW  
tAH  
tOH  
DI/O  
SCE  
Previous Data Valid  
Data Valid  
tAS  
tWP  
SWE  
tOW  
tDH  
tWHZ  
tDW  
SEE NOTE  
DI/O  
Data Valid  
Read Cycle 2 (SWE = VIH)  
tRC  
Write Cycle (SCE Controlled, OE = VIH )  
A0-18  
tWC  
tAA  
A0-18  
tAH  
tAW  
SCE  
tAS  
tACE  
tCW  
tWP  
tCHZ  
SEE NOTE  
SCE  
tCLZ  
SEE NOTE  
OE  
tOHZ  
tOE  
SWE  
SEE NOTE  
tOLZ  
SEE NOTE  
tDW  
tDH  
DI/O  
Data Valid  
High Z  
DI/O  
Data Valid  
Note: Guaranteed by design, but not tested.  
DON’T CARE  
UNDEFINED  
AC Test Circuit  
Current Source  
IOL  
AC Test Conditions  
Parameter  
Typical  
0 – 3.0  
5
Units  
Input Pulse Level  
Input Rise and Fall  
V
ns  
V
VZ ~ 1.5 V (Bipolar Supply)  
To Device Under Test  
CL = 50 pF  
Input and Output Timing Reference Level  
1.5  
IOH  
Current Source  
Notes:  
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance  
ZO = 75W. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance  
load circuit. 6) ATE Tester includes jig capacitance.  
4
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
Flash AC Characteristics – Read Only Operations  
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)  
Symbol  
–60  
–70  
–90  
Parameter  
Units  
JEDEC Stand’d Min Max Min Max Min Max  
tAVAV  
tAVQV  
tELQV  
tGLQV  
tEHQZ  
tGHQZ  
tAXQX  
tRC  
tACC  
tCE  
tOE  
tDF  
60  
70  
90  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Read Cycle Time  
60  
60  
30  
20  
20  
70  
70  
35  
20  
20  
90  
90  
35  
20  
20  
Address Access Time  
Chip Enable Access Time  
Output Enable to Output Valid  
Chip Enable to Output High Z (1)  
Output Enable High to Output High Z(1)  
Output Hold from Address, CE or OE Change, Whichever is First  
Note 1. Guaranteed by design, but not tested  
tDF  
tOH  
0
0
0
Flash AC Characteristics – Write / Erase / Program Operations, FWE Controlled  
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)  
Symbol  
JEDEC Stand’d  
–60  
–70  
–90  
Parameter  
Units  
Min Max Min Max Min Max  
tAVAC  
tWC  
60  
0
70  
0
90  
0
ns  
ns  
Write Cycle Time  
tELWL  
tCE  
Chip Enable Setup Time  
Write Enable Pulse Width  
Address Setup Time  
tWLWH  
tAVWL  
tDVWH  
tWHDX  
tWLAX  
tWHWL  
tWHWH1  
tWHWH2  
tWP  
tAS  
40  
0
45  
0
45  
0
ns  
ns  
tDS  
40  
0
45  
0
45  
0
ns  
Data Setup Time  
tDH  
tAH  
tWPH  
ns  
Data Hold Time  
45  
20  
45  
20  
45  
20  
ns  
Address Hold Time  
ns  
Write Enable Pulse Width High  
Duration of Byte Programming Operation  
Sector Erase Time  
14 TYP 14 TYP 14 TYP  
µs  
30  
30  
30  
Sec  
µs  
t
GHWL  
0
0
0
Read Recovery Time before Write  
Vcc Setup Time  
tVCE  
50  
50  
50  
µs  
50  
10  
50  
10  
50  
10  
Sec  
ns  
Chip Programming Time  
Chip Enable Hold Time  
Chip Erase Time  
1
tOEH  
tWHWH3  
120  
120  
120  
Sec  
1. Toggle and Data Polling only.  
Flash AC Characteristics – Write / Erase / Program Operations, FCE Controlled  
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)  
Symbol  
–60  
–70  
–90  
Parameter  
Units  
JEDEC Stand’d Min Max Min Max Min Max  
tAVAC  
tWLEL  
tELEH  
tWC  
tWS  
tCP  
60  
0
70  
0
90  
0
ns  
ns  
Write Cycle Time  
Write Enable Setup Time  
Chip Enable Pulse Width  
Address Setup Time  
Data Setup Time  
40  
0
45  
0
45  
0
ns  
tAVEL  
tAS  
ns  
tDVEH  
tEHDX  
tELAX  
tDS  
40  
0
45  
0
45  
0
ns  
tDH  
tAH  
tCPH  
ns  
Data Hold Time  
45  
20  
45  
20  
45  
20  
ns  
Address Hold Time  
tEHEL  
ns  
Chip Enable Pulse Width High  
Duration of Byte Programming  
Sector Erase Time  
tWHWH1  
tWHWH2  
14 TYP 14 TYP 14 TYP  
µs  
30  
30  
30  
Sec  
ns  
t
GHEL  
0
0
0
Read Recovery Time  
Chip Programming Time  
Chip Erase Time  
50  
50  
50  
Sec  
Sec  
tWHWH3  
120  
120  
120  
5
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
AC Waveforms for Flash Memory Read Operations  
tRC  
Addresses  
FCE  
Addresses Stable  
tACC  
tDF  
OE  
tOE  
FWE  
tCE  
tOH  
High Z  
High Z  
Outputs  
Output Valid  
Write/Erase/Program  
Operation for Flash Memory, FWE Controlled  
Data Polling  
Addresses  
5555H  
PA  
PA  
tRC  
tWC  
tAH  
tAS  
FCE  
OE  
tGHWL  
tWP  
tWHWH1  
tWPH  
FWE  
tCE  
tDF  
tOE  
tDH  
AOH  
PD  
D7  
DOUT  
Data  
5.0V  
tDS  
tOH  
tCE  
Notes:  
1. PA is the address of the memory location to be programmed.  
2. PD is the data to be programmed at byte address.  
3. D7 is the 0utput of the complement of the data written to the deviced.  
4. Dout is the output of the data written to the device.  
5. Figure indicates last two bus cycles of four bus cycle sequence.  
6
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
AC Waveforms Chip/Sector  
Erase Operations for Flash Memory  
Data Polling  
5555H  
tAH  
5555H  
2AAAH  
5555H  
2AAAH  
SA  
Addresses  
tAS  
FCE  
OE  
tGHWL  
tWP  
FWE  
tWPH  
tDH  
tCE  
AAH  
55H  
80H  
AAH  
55H  
10H/30H  
Data  
VCC  
tDS  
tVCE  
Notes:  
1. SA is the sector address for sector erase.  
AC Waveforms for Data Polling  
During Embedded Algorithm Operations for Flash Memory  
tCH  
FCE  
tDF  
tOE  
OE  
tOEH  
FWE  
tCE  
tOH  
*
High Z  
DQ7=  
Valid Data  
DQ7  
DQ7  
tWHWH1 or 2  
DQ0–DQ6  
Valid Data  
DQ0-DQ6  
DQ0–DQ6=Invalid  
tOE  
* DQ7=Valid Data (The device has completed the Embedded operation).  
7
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
Write/Erase/Program Operation for Flash Memory, FCE Controlled  
Data Polling  
5555H  
PA  
PA  
Addresses  
tWC  
tAS  
tAH  
FCE  
OE  
tGHWL  
tCP  
tWHWH1  
FWE  
tCPH  
tDH  
tWS  
AOH  
PD  
D7  
DOUT  
Data  
5.0V  
tDS  
Notes:  
1. PA is the address of the memory location to be programmed.  
2. PD is the data to be programmed at byte address.  
3. D7 is the 0utput of the complement of the data written to the device.  
4. DOUT is the output of the data written to the device.  
5. Figure indicates last two bus cycles of four bus cycle sequence.  
8
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
Pin Numbers & Functions  
66 Pins — PGA-Type  
Pin #  
1
Function  
SI/O8  
SI/O9  
SI/O10  
A13  
Pin #  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
Function  
Pin #  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
Function  
FI/O9  
FI/O10  
A6  
Pin #  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
Function  
FWE1  
FCE1  
GND  
FI/O3  
FI/O15  
FI/O14  
FI/O13  
FI/O12  
A0  
A12  
2
Vcc  
3
SCE1  
NC  
4
A7  
5
A14  
SI/O3  
SI/O15  
SI/O14  
SI/O13  
SI/O12  
OE  
NC  
6
A15  
A8  
7
A16  
A9  
8
A17  
FI/O0  
FI/O1  
FI/O2  
VCC  
9
SI/O0  
SI/O1  
SI/O2  
SWE2  
SCE2  
GND  
SI/O11  
A10  
10  
11  
12  
13  
14  
15  
16  
17  
A1  
A18  
A2  
SWE1  
SI/O7  
SI/O6  
SI/O5  
SI/O4  
FI/O8  
FCE2  
FWE2  
FI/O11  
A3  
FI/O7  
FI/O6  
FI/O5  
FI/O4  
A4  
A11  
A5  
"P3" — 1.08" SQ PGA Type Package Standard (without shoulders)  
"P7" — 1.08" SQ PGA Type Package (with shoulders on Pins 1, 11, 56 & 66)  
Bottom View (P7 & P3)  
Side View  
(P7)  
Side View  
(P3)  
1.085 SQ  
MAX  
1.000  
.185  
TYP  
MAX  
.600  
TYP  
Pin 1  
.025  
.035  
Pin 56  
.050 DIA  
TYP  
1.000  
TYP  
.100  
TYP  
.100 TYP  
.020  
.016  
.020  
.016  
Pin 66  
Pin 11  
.100 TYP  
.145  
.165  
MIN  
MIN  
.160  
MAX  
All dimensions in inches  
9
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
Pin Numbers & Functions  
68 Pins — Dual-Cavity CQFP  
Pin #  
1
Function  
GND  
FCE1  
A5  
Pin #  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
Function  
GND  
SI/O8  
SI/O9  
SI/O10  
SI/O11  
SI/O12  
SI/O13  
SI/O14  
SI/O15  
Vcc  
Pin #  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
Function  
Pin #  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
Function  
GND  
FI/O7  
FI/O6  
FI/O5  
FI/O4  
FI/O3  
FI/O2  
FI/O1  
FI/O0  
VCC  
OE  
2
SCE2  
A17  
3
4
A4  
SWE2  
FWE1  
FWE2  
A18  
5
A3  
6
A2  
7
A1  
8
A0  
NC  
9
NC  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
SI/O0  
SI/O1  
SI/O2  
SI/O3  
SI/O4  
SI/O5  
SI/O6  
SI/O7  
FI/O15  
FI/O14  
FI/O13  
FI/O12  
FI/O11  
FI/O10  
FI/O9  
FI/O8  
A11  
A10  
A12  
A9  
A13  
A8  
A14  
A7  
A15  
A6  
A16  
SWE1  
FCE2  
SCE1  
"F18" — CQFP Package  
.140  
MAX  
.990 SQ  
.010  
.015  
.002  
.950 SQ  
MAX  
Pin 9  
Pin 61  
Pin 10  
Pin 60  
.008  
.002  
.010  
.008  
.050  
REF  
.015  
.002  
Detail “A”  
.890 SQ  
REF  
.640 SQ  
REF  
.050  
TYP  
Metal spacer  
Pin 26  
Pin 27  
Pin 44  
Pin 43  
.800 REF  
See Detail “A”  
All dimensions in inches  
10  
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  
C I R C U I T T E C H N O L O G Y  
Ordering Information  
Model Number  
DESC SMD Number  
Speed  
Package  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
25(S) / 60(F) ns  
35(S) / 70(F) ns  
35(S) / 90(F) ns  
25(S) / 60(F) ns  
35(S) / 70(F) ns  
35(S) / 90(F) ns  
25(S) / 60(F) ns  
35(S) / 70(F) ns  
35(S) / 90(F) ns  
1.08"sq PGA-Type  
1.08"sq PGA-Type  
1.08"sq PGA-Type  
1.08"sq PGA-Type  
1.08"sq PGA-Type  
1.08"sq PGA-Type  
.94"sq CQFP  
ACT–SF2816N–26P3Q  
ACT–SF2816N–37P3Q  
ACT–SF2816N–39P3Q  
ACT–SF2816N–26P7Q  
ACT–SF2816N–37P7Q  
ACT–SF2816N–39P7Q  
ACT–SF2816N–26F18Q  
ACT–SF2816N–37F18Q  
ACT–SF2816N–39F18Q  
.94"sq CQFP  
.94"sq CQFP  
Note: (S) = Speed for SRAM, (F) = Speed for FLASH  
Part Number Breakdown  
ACT– S F 28 16 N– 26 P7 Q  
Aeroflex Circuit  
Technology  
Screening  
C = Commercial Temp, 0°C to +70°C  
I = Industrial Temp, -40°C to +85°C  
T = Military Temp, -55°C to +125°C  
Memory Type  
SF = SRAM Flash Combo Module  
M = Military Temp, -55°C to +125°C, Screening *  
Q = MIL-PRF-38534 Compliant / SMD  
Memory Depth  
2 = 2M SRAM, 8 = Locations  
Package Type & Size  
Memory Width, Bits  
Options, N = none  
Memory Speed Code  
Surface Mount Packages  
Thru-Hole Packages  
F18 = .94"SQ 68 Lead Dual-Cavity  
CQFP  
P3 = 1.085"SQ PGA 66 Pins  
with out shoulder  
P7 = 1.085"SQ PGA 66 Pins  
with shoulder  
26 = 25ns SRAM & 60ns FLASH  
37 = 35ns SRAM & 70ns FLASH  
39 = 35ns SRAM & 90ns FLASH  
*
Screened to the individual test methods of MIL-STD-883  
Specifications subject to change without notice.  
Aeroflex Circuit Technology  
35 South Service Road  
Telephone: (516) 694-6700  
FAX:  
(516) 694-6715  
Plainview New York 11830  
Toll Free Inquiries: 1-(800) 843-1553  
11  
SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700  
Aeroflex Circuit Technology  

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