HCNW4562-500E [AGILENT]
Transistor Output Optocoupler, 1-Element, 5000V Isolation,;型号: | HCNW4562-500E |
厂家: | AGILENT TECHNOLOGIES, LTD. |
描述: | Transistor Output Optocoupler, 1-Element, 5000V Isolation, |
文件: | 总16页 (文件大小:500K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
High Bandwidth, Analog/Video
Optocouplers
Technical Data
HCPL-4562
HCNW4562
Applications
Description
Features
• Wide Bandwidth[1]:
17 MHz (HCPL-4562)
9 MHz (HCNW4562)
• Video Isolation for the
Following Standards/
Formats: NTSC, PAL,
SECAM, S-VHS, ANALOG
RGB
The HCPL-4562 and HCNW4562
optocouplers provide wide band-
width isolation for analog signals.
They are ideal for video isolation
when combined with their
• High Voltage Gain[1]:
2.0 (HCPL-4562)
application circuit (Figure 4).
High linearity and low phase shift
are achieved through an AlGaAs
LED combined with a high speed
detector. These single channel
optocouplers are available in
8-Pin DIP and Widebody package
configurations.
• Low Drive Current Feedback
Element in Switching Power
Supplies, e.g., for ISDN
Networks
• A/D Converter Signal
Isolation
• Analog Signal Ground
Isolation
• High Voltage Insulation
3.0 (HCNW4562)
• Low GV Temperature
Coefficient: -0.3%/°C
• Highly Linear at Low Drive
Currents
• High-Speed AlGaAs Emitter
• Safety Approval
UL Recognized - 3750 V rms
for 1 minute (5000 V rms for
1 minute for HCPL-
4562#020 and HCNW4562)
per UL 1577
Functional Diagram
CSA Approved
IEC/EN/DIN EN 60747-5-2
Approved
-VIORM = 1414 V peak for
HCNW4562
• Available in 8-Pin DIP and
Widebody Packages
8
7
6
5
NC
ANODE
CATHODE
NC
1
2
3
4
V
V
V
CC
B
O
GND
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
2
Selection Guide
Single Channel Packages
8-Pin DIP
(300 Mil)
Widebody
(400 Mil)
HCPL-4562
HCNW4562
Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-4562#XXXX
020 = UL 5000 V rms/1 Minute Option*
300 = Gull Wing Surface Mount Option†
500 = Tape and Reel Packaging Option
XXXE = Lead Free Option
Option data sheets are available. Contact your Agilent sales representative or authorized distributor for
information.
*For HCPL-4562 only.
†Gull wing surface mount option applies to through hole parts only.
Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July
2001 and lead free option will use “-”
Schematic
I
CC
8
V
CC
I
F
2
+
ANODE
V
F
I
O
6
5
–
3
V
O
CATHODE
GND
I
B
7
V
B
3
Package Outline Drawings
8-Pin DIP Package (HCPL-4562)
7.63 0.35
(0.ꢀ00 0.010ꢁ
9.65 0.35
(0.ꢀ80 0.010ꢁ
8
1
7
6
5
6.ꢀ5 0.35
(0.350 0.010ꢁ
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
U R
UL
3
ꢀ
4
RECOGNITION
1.78 (0.070ꢁ MAX.
1.19 (0.047ꢁ MAX.
+ 0.076
- 0.051
0.354
5° TYP.
+ 0.00ꢀꢁ
- 0.003ꢁ
ꢀ.56 0.1ꢀ
(0.140 0.005ꢁ
(0.010
4.70 (0.185ꢁ MAX.
0.51 (0.030ꢁ MIN.
3.93 (0.115ꢁ MIN.
DIMENSIONS IN MILLIMETERS AND (INCHESꢁ.
1.080 0.ꢀ30
(0.04ꢀ 0.01ꢀꢁ
0.65 (0.035ꢁ MAX.
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 030
OPTION NUMBERS ꢀ00 AND 500 NOT MARKED.
3.54 0.35
(0.100 0.010ꢁ
NOTE: FLOATING LEAD PROTRUSION IS 0.35 mm (10 milsꢁ MAX.
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-4562)
LAND PATTERN RECOMMENDATION
9.65 0.35
1.016 (0.040ꢁ
(0.ꢀ80 0.010ꢁ
6
5
8
1
7
6.ꢀ50 0.35
(0.350 0.010ꢁ
10.9 (0.4ꢀ0ꢁ
3.0 (0.080ꢁ
3
ꢀ
4
1.37 (0.050ꢁ
9.65 0.35
1.780
(0.070ꢁ
MAX.
(0.ꢀ80 0.010ꢁ
1.19
(0.047ꢁ
MAX.
7.63 0.35
(0.ꢀ00 0.010ꢁ
+ 0.076
0.354
- 0.051
ꢀ.56 0.1ꢀ
(0.140 0.005ꢁ
+ 0.00ꢀꢁ
- 0.003ꢁ
(0.010
1.080 0.ꢀ30
(0.04ꢀ 0.01ꢀꢁ
0.6ꢀ5 0.35
(0.035 0.010ꢁ
13° NOM.
0.6ꢀ5 0.1ꢀ0
(0.035 0.005ꢁ
3.54
(0.100ꢁ
BSC
DIMENSIONS IN MILLIMETERS (INCHESꢁ.
LEAD COPLANARITY = 0.10 mm (0.004 INCHESꢁ.
NOTE: FLOATING LEAD PROTRUSION IS 0.35 mm (10 milsꢁ MAX.
4
8-Pin Widebody DIP Package (HCNW4562)
11.00
(0.4ꢀꢀꢁ
11.15 0.15
(0.443 0.006ꢁ
MAX.
9.00 0.15
(0.ꢀ54 0.006ꢁ
7
6
5
8
TYPE NUMBER
DATE CODE
A
HCNWXXXX
YYWW
1
ꢀ
3
4
10.16 (0.400ꢁ
TYP.
1.55
(0.061ꢁ
MAX.
7° TYP.
+ 0.076
- 0.0051
0.354
+ 0.00ꢀꢁ
- 0.003ꢁ
(0.010
5.10
(0.301ꢁ
MAX.
ꢀ.10 (0.133ꢁ
ꢀ.90 (0.154ꢁ
0.51 (0.031ꢁ MIN.
3.54 (0.100ꢁ
TYP.
1.78 0.15
(0.070 0.006ꢁ
0.40 (0.016ꢁ
0.56 (0.033ꢁ
DIMENSIONS IN MILLIMETERS (INCHESꢁ.
NOTE: FLOATING LEAD PROTRUSION IS 0.35 mm (10 milsꢁ MAX.
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW4562)
11.15 0.15
(0.443 0.006ꢁ
LAND PATTERN RECOMMENDATION
7
6
5
8
9.00 0.15
(0.ꢀ54 0.006ꢁ
1ꢀ.56
(0.5ꢀ4ꢁ
1
ꢀ
3
4
3.39
1.ꢀ
(0.09ꢁ
(0.051ꢁ
13.ꢀ0 0.ꢀ0
1.55
(0.061ꢁ
MAX.
(0.484 0.013ꢁ
11.00
MAX.
(0.4ꢀꢀꢁ
4.00
MAX.
(0.158ꢁ
1.78 0.15
(0.070 0.006ꢁ
1.00 0.15
(0.0ꢀ9 0.006ꢁ
0.75 0.35
(0.0ꢀ0 0.010ꢁ
+ 0.076
- 0.0051
3.54
(0.100ꢁ
BSC
0.354
+ 0.00ꢀꢁ
- 0.003ꢁ
(0.010
DIMENSIONS IN MILLIMETERS (INCHESꢁ.
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHESꢁ.
NOTE: FLOATING LEAD PROTRUSION IS 0.35 mm (10 milsꢁ MAX.
5
Solder Reflow Temperature Profile
ꢀ00
PREHEATING RATE ꢀ°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 3.5°C 0.5°C/SEC.
PEAK
TEMP.
345°C
PEAK
TEMP.
340°C
PEAK
TEMP.
3ꢀ0°C
300
3.5°C 0.5°C/SEC.
SOLDERING
TIME
ꢀ0
160°C
150°C
140°C
300°C
SEC.
ꢀ0
SEC.
ꢀ°C + 1°C/–0.5°C
100
PREHEATING TIME
150°C, 90 + ꢀ0 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
300
350
TIME (SECONDSꢁ
Recommended Pb-Free IR Profile
TIME WITHIN 5 °C of ACTUAL
PEAKTEMPERATURE
t
p
30-40 SEC.
360 +0/-5 °C
T
T
p
317 °C
L
RAMP-UP
ꢀ °C/SEC. MAX.
150 - 300 °C
RAMP-DOWN
6 °C/SEC. MAX.
T
smax
T
smin
t
s
t
L
60 to 150 SEC.
PREHEAT
60 to 180 SEC.
35
t 35 °C to PEAK
TIME
NOTES:
THE TIME FROM 35 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
= 300 °C, T = 150 °C
T
smax
smin
Regulatory Information
UL
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884
Teil 2):2003-01
The devices contained in this data
sheet have been approved by the
following organizations:
Recognized under UL 1577,
Component Recognition
Program, File E55361.
CSA
(HCNW4562 only)
Approved under CSA Component
Acceptance Notice #5, File CA
88324.
6
Insulation and Safety Related Specifications
8-Pin DIP Widebody
(300 Mil)
Value
(400 Mil)
Value
Parameter
Symbol
Units
Conditions
Minimum External
Air Gap (External
Clearance)
Minimum External
Tracking (External
Creepage)
Minimum Internal
Plastic Gap
(Internal Clearance)
L(101)
7.1
9.6
10.0
1.0
mm
Measured from input terminals to
output terminals, shortest distance
through air.
Measured from input terminals to
output terminals, shortest distance
path along body.
Through insulation distance,
conductor to conductor, usually the
direct distance between the photo-
emitter and photodetector inside the
optocoupler cavity.
L(102)
7.4
mm
mm
0.08
Minimum Internal
Tracking (Internal
Creepage)
Tracking Resistance
(Comparative
Tracking Index)
Isolation Group
NA
200
IIIa
4.0
200
IIIa
mm
Measured from input terminals to
output terminals, along internal cavity.
CTI
Volts
DIN IEC 112/VDE 0303 Part 1
Material Group
(DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCNW4562 ONLY)
Description
Symbol Characteristic Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 600 V rms
for rated mains voltage ≤ 1000 V rms
Climatic Classification
I-IV
I-III
55/85/21
2
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
V
IORM
1414
V peak
V peak
V
IORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
VPR
VPR
2652
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test,
2121
8000
V peak
V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
V
IOTM
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 17, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
150
400
700
°C
mA
mW
Insulation Resistance at TS, V = 500 V
RS
≥ 109
Ω
IO
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section IEC/EN/DIN EN
60747-5-2, for a detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in
application.
7
Absolute Maximum Ratings
Parameter
Storage Temperature
Symbol
TS
Device
Min.
-55
Max. Units Note
125
85
°C
°C
Operating Temperature
TA
-40
Average Forward Input Current
IF(avg)
HCPL-4562
HCNW4562
HCPL-4562
HCNW4562
HCPL-4562
HCPL-4562
HCNW4562
HCNW4562
12
mA
25
Peak Forward Input Current
IF(PEAK)
18.6
40
mA
Effective Input Current
IF(EFF)
VR
12.9 mA rms
Reverse LED Input Voltage (Pin 3-2)
1.8
3
V
Input Power Dissipation
PIN
40
8
mW
mA
mA
V
Average Output Current (Pin 6)
Peak Output Current (Pin 6)
Emitter-Base Reverse Voltage (Pin 5-7)
Supply Voltage (Pin 8-5)
IO(AVG)
IO(PEAK)
16
5
V
EBR
VCC
VO
-0.3
-0.3
30
20
5
V
Output Voltage (Pin 6-5)
V
Base Current (Pin 7)
IB
mA
mW
°C
Output Power Dissipation
PO
TLS
100
260
2
Lead Solder Temperature
1.6 mm Below Seating Plane, 10 Seconds
up to Seating Plane, 10 Seconds
HCPL-4562
HCNW4562
260
°C
Reflow Temperature Profile
TRP
Option
300
See Package Outline
Drawings Section
Recommended Operating Conditions
Parameter
Symbol
TA
Device
Min.
Max.
70
Units
°C
Note
Operating Temperature
Quiescent Input Current
HCPL-4562
HCPL-4562
HCNW4562
HCPL-4562
HCNW4562
-10
IFQ
6
mA
10
10
Peak Input Current
IF(PEAK)
mA
17
8
Electrical Specifications (DC)
TA = 25°C, IF = 6 mA for HCPL-4562 and IF = 10 mA for HCNW4562 (i.e., Recommended IFQ) unless
otherwise specified.
Parameter
Symbol
Device
Min. Typ.* Max. Units
Test Conditions
Fig. Note
Base Photo
Current
IPB
13
31
19.2
65
µA IF = 10 mA VPB ≥ 5 V 2, 6
HCPL-4562
IF = 6 mA
IPB
∆IPB/
∆T
-0.3
%/°C 2 mA < IF < 10 mA,
VPB ≥ 5 V
2
Temperature
Coefficient
IPB
HCPL-4562
HCNW4562
0.25
0.15
%
V
V
2 mA < IF < 10 mA
6 mA < IF < 14 mA
2, 6
5
3
Nonlinearity
Input Forward
Voltage
VF
HCPL-4562
HCNW4562 1.2
1.1
1.3
1.6
1.6
1.8
IF = 5 mA
IF = 10 mA
Input Reverse
Breakdown
Voltage
BVR
HCPL-4562
HCNW4562
1.8
3
5
IR = 10 µA
IR = 100 µA
Transistor
CurrentGain
hFE
CTR
VOUT
60
160
IC = 1 mA,
VCE = 1.25 V
Current
Transfer Ratio
HCPL-4562
HCNW4562
45
52
%
V
VCE = 1.25 V,
VPB ≥ 5 V
GV = 2, VCC = 9 V
8, 9
4
DC Output
Voltage
HCPL-4562
HCNW4562
4.25
5.0
4,
15
9
Small Signal Characteristics (AC)
TA = 25°C, IF = 6 mA for HCPL-4562 and IF = 10 mA for HCNW4562 (i.e., Recommended IFO) unless
otherwise specified.
Parameter
Symbol
Device
Min. Typ.* Max. Units
Test Conditions
VIN = 1 VP-P
Fig. Note
Voltage Gain
GV
HCPL-4562 0.8
2.0
3.0
4.2
1
6
(0.1 MHz) HCNW4562
GV Temperature
Coefficient
∆GV/∆T
-0.3
%/°C VIN = 1 VP-P
fREF = 0.1 MHz
-dB VIN = 1 VP-P
fREF = 0.1 MHz
,
1, 11
Base Photo
Current
∆iPB
HCPL-4562
1.1
0.36
3.0
,
3, 10,
12
(6 MHz) HCNW4562
Variation
-3 dB Frequency
(iPB)
iPB
(-3 dB) HCNW4562
GV HCPL-4562
(-3 dB) HCNW4562
∆GV HCPL-4562
HCPL-4562
6
6
15
13
MHz VIN = 1 VP-P
fREF = 0.1 MHz
MHz VIN = 1 VP-P
,
3, 10,
12
7
7
-3 dB Frequency
(GV)
17
9
,
1, 11
fREF = 0.1 MHz
Gain Variation
1.1
0.54
0.8
3.0
-dB TA = 25°C V = 1 VP-P
,
1, 11
IN
(6 MHz) HCNW4562
HCPL-4562
fREF = 0.1 MHz
TA = -10°C
TA = 70°C
1.5
∆GV
HCPL-4562
1.15
2.27
-dB VIN = 1 VP-P,
(10 MHz) HCNW4562
fREF = 0.1 MHz
Differential
Gain at
f = 3.58 MHz
HCPL-4562
1.0
%
IFac = 0.7 mA p-p,
IFdc = 3 to 9 mA
IFac = 1 mA p-p,
IFdc = 7 to 13 mA
3, 7
3, 7
8
9
HCNW4562
0.9
Differential
Phase at
f = 3.58 MHz
HCPL-4562
HCNW4562
1
deg. IFac = 0.7 mA p-p,
IFdc = 3 to 9 mA
0.6
IFac = 1 mA p-p,
IFdc = 7 to 13 mA
Total Harmonic
Distortion
THD
VO(noise)
IMRR
HCPL-4562
HCNW4562
2.5
0.75
%
VIN = 1 VP-P
f = 3.58 MHz, GV = 2
,
4
1
10
Output Noise
Voltage
950
µVrms 10 Hz to 10 MHz
Isolation Mode
Rejection Ratio
HCPL-4562
HCNW4562
122
119
dB f = 120 Hz, GV = 2
14
11
10
Package Characteristics
All Typicals at T = 25°C
A
Parameter
Sym.
Device
Min. Typ.
Max. Units Test Conditions
Fig. Note
Input-Output
Momentary
Withstand
Voltage*
V
ISO
HCPL-4562 3750
HCNW4562 5000
HCPL-4562 5000
(Option 020)
V rms RH ≤ 50%,
5, 12
5, 13
5, 13
t = 1 min.,
T = 25°C
A
Input-Output
Resistance
RI-O
HCPL-4562
HCNW4562
1012
1013
Ω
VI-O = 500 Vdc
5
5
1012
1011
T = 25°C
A
T = 100°C
A
Input-Output
Capacitance
CI-O
HCPL-4562
HCNW4562
0.6
0.5
pF
f = 1 MHz
0.6
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if
applicable), your equipment level safety specification or Agilent Application Note 1074 entitled “Optocoupler Input-Output Endurance
Voltage,” publication number 5963-2203E.
Notes:
8. Differential gain is the change in the
small-signal gain of the optocoupler
at 3.58 MHz as the bias level is varied
over a given range.
where V is the isolation mode
voltage signal.
IM
1. When used in the circuit of Figure 1
or Figure 4; GV = VOUT/VIN; IFQ
6 mA (HCPL-4562), IFQ = 10 mA
(HCNW4562).
=
12. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥ 4500 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA).
This test is performed before the
100% Production test shown in the
IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table, if
applicable.
13. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥ 6000 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA).
This test is performed before the
100% Production test shown in the
IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table, if
applicable.
9. Differential phase is the change in the
small-signal phase response of the
optocoupler at 3.58 MHz as the bias
level is varied over a given range.
10. TOTAL HARMONIC DISTORTION
(THD) is defined as the square root
of the sum of the square of each
harmonic distortion component. The
THD of the isolated video circuit is
measured using a 2.6 kΩ load in
series with the 50 Ω input impedance
of the spectrum analyzer.
11. ISOLATION MODE REJECTION
RATIO (IMRR), a measure of the
optocoupler’s ability to reject signals
or noise that may exist between input
and output terminals, is defined by
20 log10 [(VOUT/VIN)/(VOUT/VIM)],
2. Derate linearly above 70°C free-air
temperature at a rate of 2.0 mW/°C
(HCPL-4562).
3. Maximum variation from the best fit
line of IPB vs. IF expressed as a
percentage of the peak-to-peak full
scale output.
4. CURRENT TRANSFER RATIO (CTR)
is defined as the ratio of output
collector current, IO, to the forward
LED input current, IF, times 100%.
5. Device considered a two-terminal
device: Pins 1, 2, 3, and 4 shorted
together and Pins 5, 6, 7, and 8
shorted together.
6. Flat-band, small-signal voltage gain.
7. The frequency at which the gain is
3 dB below the flat-band gain.
11
163 Ω (HCPL-4563ꢁ
90.9 Ω (HCNW4563ꢁ
Figure 1. Gain and Bandwidth Test Circuit.
163 Ω (HCPL-4563ꢁ
90.9 Ω (HCNW4563ꢁ
Figure 2. Base Photo Current Test
Circuit.
Figure 3. Base Photo Current Frequency Response Test Circuit.
Figure 4. Recommended Isolated Video Interface Circuit.
12
HCNW4563
HCPL-4563
100
10
I
F
+
V
F
–
T
= 70 °C
A
1.0
T
T
= 35 °C
= -10 °C
A
A
0.1
0.01
1.0
1.1
1.3
1.ꢀ
1.4
1.5
V
– FORWARD VOLTAGE – V
F
Figure 5. Input Current vs. Forward Voltage.
HCNW4563
HCPL-4563
80
70
60
50
40
T
V
= 35 °C
A
ꢀ0
> 5 V
PB
30
10
0
0
3
4
6
8
10 13 14 16 18 30
I
– INPUT CURRENT – mA
F
Figure 6. Base Photo Current vs. Input Current.
HCPL-4563
HCNW4563
3
1
0
1.03
1
PHASE
0.98
-1
-3
-ꢀ
0.96
0.94
0.93
NORMALIZED
= 6 mA
GAIN
I
F
f = ꢀ.58 MHz
= 35 °C
T
A
SEE FIG. ꢀ
0
3
4
6
8
10 13 14 16 18 30
I
– INPUT CURRENT – mA
F
Figure 7. Small-Signal Response vs. Input Current.
13
HCNW4563
HCPL-4563
1.04
1.03
1.00
0.98
0.96
0.94
0.93
0.90
0.88
0.86
NORMALIZED
= 35 °C
T
A
I
= 6.0 mA
F
V
V
= 1.35 V
> 5 V
CE
PB
-10
0
10 30 ꢀ0 40 50 60 70
T – TEMPERATURE – °C
Figure 8. Current Transfer Ratio vs. Temperature.
HCNW4563
HCPL-4563
1.10
1.00
0.90
0.80
0.70
0.60
0.50
V
= 5.0 V
CE
V
V
= 1.35 V
= 0.4 V
CE
CE
NORMALIZED
= 35 °C
T
A
I
V
V
= 6 mA
F
= 1.35 V
> 5 V
CE
PB
0
3
4
6
8
10 13 14 16 18 30
I
– INPUT CURRENT – mA
F
Figure 9. Current Transfer Ratio vs. Input Current.
HCNW4563
HCPL-4563
-0.9
-1.1
FREQUENCY = 6 MHz
-1.ꢀ
-1.5
-1.7
FREQUENCY = 10 MHz
-1.9
-3.1
T
F
= 35 °C
A
-3.ꢀ
-3.5
-3.7
= 0.1 MHz
REF
1
3
ꢀ
4
5
6
7
8
9 10 11 13
I
– QUIESCENT INPUT CURRENT – mA
FQ
Figure 10. Base Photo Current Variation vs. Bias Conditions.
14
HCNW4563
HCPL-4563
ꢀ
3
T
= -10 °C
A
1
0
T
T
= 35 °C
= 70 °C
A
A
-1
-3
-ꢀ
-4
NORMALIZED
= 35 °C
f = 0.1 MHz
T
A
-5
-6
-7
0.01 0.1 1.0 10 100 1000 10,000 100,000
f – FREQUENCY – KHz
Figure 11. Normalized Voltage Gain vs. Frequency.
HCNW4563
HCPL-4563
0.5
0
-0.5
-1.0
NORMALIZED
-1.5
-3.0
-3.5
-ꢀ.0
-ꢀ.5
T
= 35 °C
A
f = 0.1 MHz
-4.0
-4.5
0.01 0.1 1.0 10 100 1000 10,000 100,000
f – FREQUENCY – KHz
Figure 12. Normalized Base Photo Current vs. Frequency.
HCNW4563
HCPL-4563
0
I
PHASE
PB
SEE FIGURE ꢀ
-35
-50
-75
T
= 35 °C
A
-100
-135
-150
-175
VIDEO INTERFACE
CIRCUIT PHASE
SEE FIGURE 4
-300
-335
-350
0
3
4
6
8
10 13 14 16 18 30
f – FREQUENCY – MHz
Figure 13. Phase vs. Frequency.
15
HCNW4563
HCPL-4563
150
130
90
T
= 35 °C
A
-30 dB/DECADE SLOPE
60
G
v
ꢀ0 IMRR = 30 LOG
10
v
v
IM
OUT
/
0
0.01 0.1
1.0
10
100 1000 10,000
f – FREQUENCY – KHz
Figure 14. Isolation Mode Rejection Ratio vs. Frequency.
HCNW4563
HCPL-4563
6.0
5.5
5.0
4.5
4.0
ꢀ.5
ꢀ.0
50 100 150 300 350 ꢀ00 ꢀ50 400 450
h
– TRANSISTOR CURRENT GAIN
FE
Figure 15. DC Output Voltage vs. Transistor Current Gain.
HCNW4563
1000
V
CC
P
I
(mWꢁ
S
900
800
700
600
500
400
ꢀ00
300
I
= 3 mA
(mAꢁ
C
S
Q4
R
9
ADDITIONAL
BUFFER
STAGE
Q
4
Q
Q
ꢀ
5
R
11
V
OUT
LOW
IMPEDANCE
LOAD
100
0
R
R
10
13
0
35
50 75 100 135 150 175
T
– CASE TEMPERATURE – °C
S
Figure 16. Output Buffer Stage for
Low Impedance Loads.
Figure 17. Thermal Derating Curve,
Dependence of Safety Limiting Value
with Case Temperature per IEC/EN/
DIN EN 60747-5-2.
Conversion from HCPL-4562 to
HCNW4562
Figure 15 shows the dependency of the DC output
voltage on hFEX
.
In order to obtain similar circuit performance when
converting from the HCPL-4562 to the HCNW4562,
it is recommended to increase the Quiescent Input
Current, IFQ, from 6 mA to 10 mA. If the application
circuit in Figure 4 is used, then potentiometer R4
should be adjusted appropriately.
For 9 V < VCC < 12 V, select the value of R11 such
that
VO
R11
4.25 V
470 Ω
IC≅ ––– ≤ –––––– ≤ 9.0 mA
(8)
(9)
Q4
The voltage gain of the second stage (Q3) is
approximately equal to:
Design Considerations of the
Application Circuit
R
R10
1
––9– –––––––––––––––––––––––––
*
The application circuit in Figure 4 incorporates
several features that help maximize the bandwidth
performance of the HCPL-4562/HCNW4562. Most
important of these features is peaked response of
the detector circuit that helps extend the frequency
range over which the voltage gain is relatively
constant. The number of gain stages, the overall
circuit topology, and the choice of DC bias points
are all consequences of the desire to maximize
bandwidth performance.
1
1 + s R9 CCQ + –––––––––
3
2π R′ fT
11
4
Increasing R′ (R′ includes the parallel
11
11
combination of R11 and the load impedance) or
reducing R9 (keeping R9/R10 ratio constant) will
improve the bandwidth.
If it is necessary to drive a low impedance load,
bandwidth may also be preserved by adding an
additional emitter following the buffer stage (Q5 in
Figure 16), in which case R11 can be increased to
set ICQ4 ≅ 2 mA.
To use the circuit, first select R1 to set VE for the
desired LED quiescent current by:
VE GV V R10
IFQ = –– ≅ –––––––E––––––
R4 (∂IPB/∂IF) R7R9
Finally, adjust R4 to achieve the desired voltage
gain.
(1)
VOUT ∂IPB R7R9
For a constant value VINp-p, the circuit topology
GV ≅ –––– ≅ –––– ––––––
(10)
(adjusting the gain with R4) preserves linearity by
keeping the modulation factor (MF) dependent only
on VE.
V
IN
∂IF R4R10
∂IPB
where typically –––– = 0.0032
∂IF
iFp-p ≅ V /R4
(2)
IN
p-p
Definition:
GV = Voltage Gain
iF
iPB
V
IN
p-p
––p–-–p ≅ –––p–-–p = –––––
(3)
(4)
IFQ = Quiescent LED forward current
iFp-p = Peak-to-peak small signal LED forward
current
INp-p = Peak-to-peak small signal input voltage
iPBp-p = Peak-to-peak small signal
base photo current
IPBQ = Quiescent base photo current
VBEX = Base-Emitter voltage of HCPL-4562/
HCNW4562 transistor
IBXQ = Quiescent base current of HCPL-4562/
HCNW4562 transistor
IFQ
IPBQ
VE
Modulation
Factor (MF): ––––– = –––––
iF
2 IFQ 2 VE
V
IN
p-p
(p-p)
V
For a given GV, VE, and VCC, DC output voltage will
vary only with hFEX
.
R
R10
VO = VCC – VBE – ––9– [VBEX – (IPBQ – IBXQ) R7]
(5)
4
Where:
hFEX = Current Gain (IC/IB) of HCPL-4562/
HCNW4562 transistor
VE = Voltage across emitter degeneration
resistor R4
G VER
IPBQ ≅ ––V–––––1–0
R7R9
(6)
(7)
and,
f
= Unity gain frequency of Q5
T4
CCQ = Effective capacitance from collector of Q3
VCC – 2 VBE
IBXQ ≅ ––––––––––
R6 hFEX
3
to ground
www.agilent.com/semiconductors
E-mail: SemiconductorSupport@agilent.com
Data subject to change.
Copyright © 2005 Agilent Technologies, Inc.
Obsoletes 5989-0287EN
March 1, 2005
5989-2158EN
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