AK8130A [AKM]
Low Power Multiclock Generator with VCXO; 低功耗Multiclock发生器, VCXO型号: | AK8130A |
厂家: | ASAHI KASEI MICROSYSTEMS |
描述: | Low Power Multiclock Generator with VCXO |
文件: | 总8页 (文件大小:114K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ASAHI KASEI EMD CORPORATION
Low Power
Multiclock Generator with VCXO
AK8130A
Features
Description
The AK8130A is a member of AKEMD’s low power
multi clock generator family designed for a feature
27MHz Crystal Input
Four Frequency-Selectable Clock Outputs
One 27MHz-Reference Output
Selectable Clock out Frequencies:
- 54.000,74.1758, 74.250MHz
- 25.000MHz
- 4.9152, 12.000, 48.000MHz
- 24.576, 33.333MHz
rich DTV or STB, requiring a range of system
clocks with high performance. The AK8130A
generates different frequency clocks from a 27MHz
crystal oscillator and provides them to up to four
outputs configured by pin-setting. The on-chip
VCXO accepts a voltage control input to allow the
output clocks to vary by ±110 ppm for
synchronizing to the external clock system. Both
circuitries of VCXO and PLL in AK8130A are
derived from AKEMD’s long-term-experienced
clock device technology, and enable clock output
to perform low jitter and to operate with very low
current consumption. The AK8130A is available
in a 16-pin SSOP package.
Built-in VCXO
- Pull Range: ±110ppm (Min.)
Low Jitter Performance
- Period Jitter:
150 psec (Typ.) at CLK1-4
- Long Term Jitter :
160 psec (Typ.) at REFOUT
Low Current Consumption:
16.5mA (Typ.) at 3.3V
Supply Voltage:
3.0 – 3.6V
Operating Temperature Range:
-20 to +85℃
Applications
Digital TV Sets
Personal Video Recorders
Set-Top-Boxes
Multi Media Receivers
Package:
16-pin TSSOP (Lead free)
Block Diagram
VDD
X1
Voltage
Controlled
Crystal
PLL1
CLK1
Divide
Oscillator
X2
Logic
and
Output
Control
CLK2
PLL2
VIN
CLK3
PLL3
CLK4
S0
S1
S2
REFOUT
GND
AK8130A Multi Clock Generator
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AK8130A
Pin Descriptions
Package: 16-Pin TSSOP(Top View)
X1
S0
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
X2
VDD3
S2
S1
VIN
VDD2
GND2
CLK4
CLK3
REFOUT
VDD1
GND1
CLK1
CLK2
Pin
No.
Pin
Name
Pin
Type
Description
1
2
X1
XO
IN
Crystal connection, Connect to 27.000MHz crystal
(1)
(1)
S0
Clock Out Frequency Select 0, See Table 1 for the selection
3
S1
IN
Clock Out Frequency select 1, See Table 1 for the selection
4
5
6
VIN
IN
--
VCXO Control Voltage Input
Power Supply 1
VDD1
GND1
--
Ground 1
7
8
CLK1
CLK2
OUT
OUT
Clock output 1, See Table 1 for its selectable frequency
Clock output 2, See Table 1 for its selectable frequency
(2)
REF
OUT
9
OUT
OUT
Reference Clock Output of VCXO based on 27.000MHz Crystal
Clock output 3, See Table 1 for its selectable frequency
(2)
(2)
10
CLK3
11
12
13
14
15
16
CLK4
GND2
VDD2
S2
OUT
--
Clock output 4, See Table 1 for its selectable frequency
Ground 2
--
Power Supply 2
(1)
IN
--
Clock Out Frequency select 1, See Table 1 for the selection
Power Supply 3
VDD3
X2
XI
Crystal connection, Connect to 27.000MHz crystal
(1) Internal pull up 360kW
(2) Internal pull down 510kW
Ordering Information
Shipping
Packaging
Temperature
Part Number
Marking
8130A
Package
Range
AK8130A
Tape and Reel
16-pin TSSOP
-20 to 85 ℃
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AK8130A
Absolute Maximum Rating
Over operating free-air temperature range unless otherwise noted (1)
Items
Symbol
VDD
Vin
Ratings
-0.3 to 4.6
Unit
V
Supply voltage
Input voltage
VSS-0.3 to VDD+0.3
±10
V
Input current (any pins except supplies)
IIN
mA
°C
Storage temperature
Note
Tstg
-55 to 130
(1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only. Functional operation of the device at these or any other conditions beyond those
indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating
conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
ESD Sensitive Device
This device is manufactured on a CMOS process, therefore, generically susceptible to
damage by excessive static voltage. Failure to observe proper handling and
installation procedures can cause damage. AKEMD recommends that this device is handled with
appropriate precautions.
Recommended Operation Conditions
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operating temperature
Supply voltage (1)
Ta
-20
3.0
85
3.6
15
25
°C
V
VDD
Cp1
Cp2
3.3
Pin: CLK1-4
Pin: REFOUT
pF
pF
Output Load Capacitance
Note:
(1) Power to VDD1, VDD2 and VDD3 requires to be supplied from a single source. A decoupling capacitor of
0.1mF for power supply line should be installed close to each VDD pin.
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AK8130A
DC Characteristics
All specifications at VDD: over 3.0 to 3.6V, Ta: -20 to +85℃, 27MHz Crystal, unless otherwise noted
Parameter
High Level Input Voltage
Low Level Input Voltage
Input Current 1
Symbol
VIH
Conditions
Pin: S0,S1,S2
MIN
TYP
MAX
Unit
V
0.7VDD
Pin: S0,S1,S2
VIL
0.3VDD
+10
V
Pin: S0,S1,S2
PIN: VIN
IL1
-20
-3
μA
μA
Input Current 2
IL2
+3
Pin: CLK1-4, REFOUT
IOH=-4mA
High Level Output
Voltage
VOH
VOL
0.8VDD
V
V
Pin: CLK1-4, REFOUT
IOL=+4mA
Low level Output
Voltage
0.2VDD
Clock out selection by note (1)
No load,Ta=25℃
Current Consumption
IDD
16.5
mA
(1) Pin setting for output clock selection: [S2:S0] = HLH
AC Characteristics
All specifications at VDD: over 3.0 to 3.6V, Ta: over -20 to +85℃, 27MHz Crystal, unless otherwise noted
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
Crystal Clock Frequency
VCXO Pullable Range (3)
27.0000
MHz
ppm
VIN at over 0 to VDD V
VIN range at 1.5V±1.0V
CLK1-4
±110
ppm/
V
VCXO Gain
GVCXO
150
150
0.5
Period Jitter (4)
ps
CLK1 at 54.000MHz
1000 cycle delay
CLK1 at 74.250MHz
1000 cycle delay
REFOUT at 27.000MHz
1000 cycle delay
ns
Long Term Jitter (5)
0.85
160
ns
ps
Pin: CLK1-4 (1)
Pin: REFOUT (2)
Pin: CLK1-4 (1)
Pin: REFOUT (2 )
Pin: CLK1-4 (1)
Pin: REFOUT (2 )
Pin: CLK1-4 (1)
45
40
50
50
1.5
2.5
1.5
2.5
1
55
60
%
%
Output Clock Duty
Cycle
ns
ns
ns
ns
ms
Output Clock Rise Time
Output Clock Fall Time
trise
tfall
Power-up Time
Pin: CLK1 at
74.25 or 74.175MHz
Output Transition Time (6)
60
ms
(1) Measured with load capacitance of 15pF
(2) Measured with load capacitance of 25pF
(3) Pullable range depends on crystal characteristics, on-chip load capacitance, and stray capacity of PCB.
Min. ±110ppm is applied to AKEMD’s authorized test condition.
(4) ±3s in 1000 sampling or more
(5) ±3s in 5000 sampling or more
(6) Time to settle output into ±20ppm of specified frequency
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AK8130A
Output clock frequency selection
The AK8130A generates a range of low-jitter and hi-accuracy clock frequencies with three built-in PLLs and
provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by
pin-setting of S0 (Pin2), S1 (Pin3), and S2 (Pin14).
The selectable frequency is shown in Table 1..
Table 1: Clock output Frequency
Selection Pin
Clock Output Frequency (MHz)
S2
(Pin 14)
S1
(Pin 3)
S0
(Pin 2)
CLK1
(Pin 7)
CLK2
(Pin 8)
25.000
25.000
25.000
25.000
25.000
25.000
25.000
OFF
CLK3
(Pin 10)
48.000
12.000
48.000
12.000
OFF
4.9152
4.9152
4.9152
CLK4
(Pin 11)
33.333
OFF
33.333
OFF
33.333
OFF
24.576
24.576
L
L
L
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
74.250
74.250
74.1758
74.1758
74.1758
74.1758
74.1758
54.000
L
H
H
H
H
Voltage Control Crystal Oscillator (VCXO)
The AK8130A has a voltage control crystal oscillator (VCXO), featuring fine frequency tuning for 27MHz of
primary clock frequency by external DC voltage control. This tuning enables output clock frequency to
synchronize the external clock system. VIN (Pin 4) accepts DC voltage control from a processor or a
system controller, and pulls the primary frequency of crystal to higher or lower. This pulling range is
determined by crystal characteristic, on-chip load capacitor, and stray capacitance of PCB. The AK8130A
is designed to range ±110ppm of primary frequency in AKEMD’s authorized condition, and the typical
pulling profile is shown in Figure 1. For details about the condition and other specific crystal application
case, refer the AK8130 Family application note.
27.0MHz VCXO Characteristics NDK NX5032GA
(Cext1=12.0pF, Cext2=1.0pF)
( )
CL=8.0pF
150.0
100.0
50.0
0.0
0
0.5
1
1.5
2
2.5
3
3.5
-50.0
-100.0
-150.0
VIN(V)
Figure 1: Typical VCXO Pulling Profile
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AK8130A
Typical Connection Diagram
+3.3V typ.
27.0MHz AT Cut Crystal
MPEG-TS
DECODER
Cext2
Cext1
AK8130A
CTL OUT2
CTL OUT0
CTL OUT1
1:X1
X2:16
VDD3:15
S2:14
C3
2:S0
3:S1
C2
IEEE1394
4:VIN
VDD2:13
GND2:12
CLK4:11
CLK3:10
REFOUT:9
DC Voltage
R11
24.576MHz
CTL OUT
5:VDD1
6:GND1
7:CLK1
8:CLK2
C11
(PWM)
USB I/F
C1
12.0/48.0MHz
Ethernet I/F
25.0MHz
REF CLK IN
HDMI LVDS I/F
74.25/74.1758MHz
GND
Figure 2: Typical Connection Diagram
C1, C2, C3: 0.1mF
Cext1, Cext2: Depends on crystal characteristics. Refer the specification of the crystal.
R11, C11: In case of interface by PWM. For right configuration, refer the specification of the
applied processor.
PCB Layout Consideration
The AK8130A is a high-accuracy and low-jitter multi clock generator. For proper performances specified
in this datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the
typical connection diagram shown in Figure 2
Power supply line – AK8130A has three power supply pins (VDD1-3) which deliver power to internal
circuitry segments. A 0.1mF decoupling capacitor should be placed as close to each VDD pin as possible.
Ground pin connection – AK8130A has two ground pins (GND1-2). These pin require connecting to
plane ground which will eliminate any common impedance with other critical switching signal return.
0.1mF decoupling capacitors placed at VDD1, VDD2, and VDD3 should be grounded at close to the
GND1pin, the GND2 pin, and the GND2, respectively.
Crystal connection – Proper oscillation performance and pullable range are susceptible to stray or
parasitic capacitors around crystal. The wiring traces to a crystal form X1 (Pin 1) and X2 (Pin 14) have
equal lengths with no via and as short in length as possible. These traces should be also located away
from any traces with switching signal.
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AK8130A
Package Information
· Mechanical data
16pin TSSOP (Unit: mm)
1.10 MAX
5.00TYP
16
9
A
1
8
0.22±0.1
0.65
0.15±0. 1
0.1±0.1
Detail A
Seating Plane
| 0.10
0-10°
· Marking
16
9
a:
#1 Pin Index
b:
c:
d
Product Family Logo (1)
Part number
c
b
AKM
8130A
Date code (5 digits)
XXXXX
d
a
1
8
(1) AKM is the brand name of AKEMD’s IC’s.
AKM and the logo -
- are the brand of AKEMD’s IC’s and identify that AKEMD
continues to offer the best choice for high performance mixed-signal solution under
this brand.
· RoHS Compliance
All integrated circuits form Asahi Kasei EMD Corporation (AKEMD) assembled in
“lead-free” packages* are fully compliant with RoHS.
(*) RoHS compliant products from AKEMD are identified with “Pb free” letter indication on
product label posted on the anti-shield bag and boxes.
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AK8130A
IMPORTANT NOTICE
l These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi
Kasei EMD Corporation (AKEMD) or authorized distributors as to current status of the products.
l AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the
application or use of any information contained herein.
l Any export of these products, or devices or systems containing them, may require an export license or
other official approval under the law and regulations of the country of export pertaining to customs and
tariffs, currency exchange, or strategic materials.
l AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life
support, or other hazard related device or systemNote2), and AKEMD assumes no responsibility for such use,
except for the use approved with the express written consent by Representative Director of AKEMD. As
used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for
applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may
reasonably be expected to result in loss of life or in significant injury or damage to person or property.
l It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or
otherwise places the product with a third party, to notify such third party in advance of the above content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and
hold AKEMD harmless from any and all claims arising from the use of said product in the absence of such
notification.
Feb-08
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