ALD4701ASBL [ALD]

QUAD MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER; 四路微功耗轨到轨CMOS运算放大器
ALD4701ASBL
型号: ALD4701ASBL
厂家: ADVANCED LINEAR DEVICES    ADVANCED LINEAR DEVICES
描述:

QUAD MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
四路微功耗轨到轨CMOS运算放大器

运算放大器 光电二极管
文件: 总9页 (文件大小:86K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
A
L
D
DVANCED  
INEAR  
EVICES, INC.  
ALD4701A/ALD4701B  
ALD4701  
QUAD MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER  
FEATURES  
GENERAL DESCRIPTION  
• All parameters specified for +5V single  
supply or ±2.5V dual supply systems  
• Rail-to-rail input and output voltage ranges  
• Unity gain stable  
• Extremely low input bias currents -- 1.0pA  
• High source impedance applications  
• Dual power supply ±1.0V to ±5.0V  
• Single power supply +2V to +10V  
• High voltage gain  
The ALD4701A/ALD4701B/ALD4701 is a quad monolithic CMOS  
micropower high slew rate operational amplifier intended for a broad range  
ofanalogapplicationsusing±1Vto±5Vdualpowersupplysystems, aswell  
as +2V to +10V battery operated systems. All device characteristics are  
specified for +5V single supply or ±2.5V dual supply systems. Total supply  
current for all four operational amplifiers is 1mA maximum at 5V supply  
voltage. It is manufactured with Advanced Linear Devices' enhanced  
ACMOS silicon gate CMOS process.  
• Output short circuit protected  
• Unity gain bandwidth of 0.7MHz  
• Slew rate of 0.7V/µs  
• Low power dissipation  
• Symmetrical output drive  
The ALD4701A/ALD4701B/ALD4701 is designed to offer a trade-off of  
performance parameters providing a wide range of desired specifications.  
It has been developed specifically for the +5V single supply or ±1V to ±5V  
dual supply user and offers the popular industry standard pin configuration  
of LM324 types and ICL7641 types.  
• Suitable for rugged, temperature-extreme  
environments  
Several important characteristics of the device make application easier to  
implement at these voltages. First, each operational amplifier can operate  
with rail to rail input and output voltages. This means the signal input  
voltage and output voltage can be equal to or near to the positive and  
negative supply voltages. This feature allows numerous analog serial  
stages and flexibility in input signal bias levels. Second, each device was  
designed to accommodate mixed applications where digital and analog  
circuitsmayoperateoffthesamepowersupplyorbattery. Third, theoutput  
stage can typically drive up to 50pF capacitive and 10Kresistive loads.  
APPLICATIONS  
• Voltage follower/buffer/amplifier  
• Charge integrator  
• Photodiode amplifier  
• Data acquisition systems  
• High performance portable instruments  
• Signal conditioning circuits  
• Sensor and transducer amplifiers  
• Low leakage amplifiers  
• Active filters  
These features, combined with extremely low input currents, high open  
loop voltage gain of 100V/mV, useful bandwidth of 700KHz, a slew rate of  
0.7V/µs, lowpowerdissipationof5mW, lowoffsetvoltageandtemperature  
drift, make the ALD4701A/ALD4701B/ALD4701 a versatile, micropower  
quad operational amplifier.  
• Sample/Hold amplifier  
• Picoammeter  
TheALD4701A/ALD4701B/ALD4701,designedandfabricatedwithsilicon  
gate CMOS technology, offers 1pA typical input bias current. Due to low  
voltage and low power operation, reliability and operating characteristics,  
such as input bias currents and warm up time, are greatly improved.  
Additionally, robust design and rigorous screening make this device  
especiallysuitableforoperationintemperature-extremeenvironmentsand  
rugged conditions.  
• Current to voltage converter  
PIN CONFIGURATION  
1
2
3
OUT  
-IN  
14 OUT  
A
A
A
D
13 -IN  
D
+IN  
12  
+IN  
D
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))  
Operating Temperature Range  
+
B
B
B
V
V-  
4
5
11  
10  
0°C to +70°C  
0°C to +70°C  
-55°C to 125°C  
+IN  
+IN  
-IN  
C
14-Pin  
14-Pin  
14-Pin  
CERDIP  
Package  
6
7
9
8
-IN  
C
Small Outline  
Package (SOIC)  
Plastic Dip  
Package  
OUT  
OUT  
C
ALD4701ASBL  
ALD4701BSBL  
ALD4701SBL  
ALD4701APBL  
ALD4701BPBL  
ALD4701PBL  
ALD4701ADB  
ALD4701BDB  
ALD4701DB  
TOP VIEW  
SBL, PBL, DB PACKAGES  
* Contact factory for leaded (non-RoHS) or high temperature versions.  
Rev 2.0 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286  
www.aldinc.com  
ABSOLUTE MAXIMUM RATINGS  
Supply voltage, V+  
Differential input voltage range  
Power dissipation  
10.6V  
-0.3V to V+ +0.3V  
600 mW  
Operating temperature range SBL, PBL packages  
0°C to +70°C  
-55°C to +125°C  
-65°C to +150°C  
+260°C  
DB package  
Storage temperature range  
Lead temperature, 10 seconds  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
T
A
= 25°C V = ±2.5V unless otherwise specified  
S
4701A  
4701B  
4701  
Test  
Parameter  
Symbol  
Min Typ  
Max Min Typ Max  
Min Typ Max  
Unit  
Conditions  
Supply  
Voltage  
V
V
±1.0  
2.0  
±5.0 ±1.0  
±5.0 ±1.0  
10.0 2.0  
±5.0  
10.0  
V
V
Dual Supply  
Single Supply  
S
+
10.0  
2.0  
Input Offset  
Voltage  
V
2.0  
2.8  
5.0  
5.8  
10.0  
11.0  
mV  
mV  
R 100KΩ  
S
OS  
0°C T +70°C  
A
Input Offset  
Current  
I
I
1.0  
1.0  
25  
240  
1.0  
1.0  
25  
240  
1.0  
1.0  
25  
240  
pA  
pA  
T = 25°C  
A
OS  
0°C T +70°C  
A
Input Bias  
Current  
30  
300  
30  
300  
30  
300  
pA  
pA  
T = 25°C  
A
B
0°C T +70°C  
A
+
Input Voltage  
Range  
V
-0.3  
-2.8  
5.3 -0.3  
2.8 -2.8  
5.3 -0.3  
2.8 -2.8  
5.3  
2.8  
V
V
V
V
= +5  
= ±2.5V  
IR  
S
Input  
R
IN  
1012  
1012  
1012  
Resistance  
Input Offset  
Voltage Drift  
TCV  
OS  
5
5
7
µV/°C  
R
R
100KΩ  
100KΩ  
S
S
Power Supply  
Rejection Ratio  
PSRR  
CMRR  
65  
65  
80  
80  
65  
65  
80  
80  
60  
60  
80  
80  
dB  
dB  
0°C T +70°C  
A
Common Mode  
Rejection Ratio  
65  
65  
83  
83  
65  
65  
83  
83  
60  
60  
83  
83  
dB  
dB  
R 100KΩ  
S
0°C T +70°C  
A
Large Signal  
Voltage Gain  
A
V
15  
10  
100  
300  
15  
10  
100  
300  
10  
7
80  
300  
V/mV  
V/mV  
V/mV R = 100KΩ  
R
R
= 100KΩ  
1MΩ  
L
L
L
0°C T +70°C  
A
+
Output  
Voltage  
Range  
V
V
low  
high  
0.001  
4.99 4.999  
0.01  
0.001 0.01  
4.99 4.999  
0.001 0.01  
4.99 4.999  
V
V
R = 1MV = +5V  
L
O
O
0°C T +70°C  
A
V
V
low  
high  
-2.48 -2.40  
2.48  
-2.48 -2.40  
2.40 2.48  
-2.48 -2.40  
2.40 2.48  
V
V
R = 100KΩ  
L
O
O
2.40  
0°C T +70°C  
A
Output Short  
I
1
1
1
mA  
SC  
Circuit Current  
Supply  
Current  
I
490 1000  
5.0  
490 1000  
5.0  
490 1000  
5.0  
µA  
V
= 0V  
IN  
S
No Load  
Power  
P
mW  
Both amplifiers  
D
Dissipation  
V = ±2.5V  
S
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
2 of 9  
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)  
= 25°C V = ±2.5V unless otherwise specified  
T
A
S
4701A  
4701B  
4701  
Test  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max Unit  
Conditions  
Input  
C
1
1
1
pF  
IN  
Capacitance  
Bandwidth  
Slew Rate  
B
S
700  
0.7  
700  
0.7  
700  
0.7  
KHz  
W
R
V/µs  
A
= +1  
V
R
= 100KΩ  
L
Rise time  
t
r
0.2  
20  
0.2  
20  
0.2  
20  
µs  
R
= 100KΩ  
L
Overshoot  
Factor  
%
R
C
= 100KΩ  
= 50pF  
L
L
Settling  
Time  
t
10.0  
120  
10.0  
120  
10.0  
120  
µs  
0.1%  
= -1  
s
A
V
C
= 50pF R = 100KΩ  
L
L
Channel  
C
dB  
A
= 100  
S
V
Separation  
T
= 25°C V = ±5.0V unless otherwise specified  
S
A
4701A  
4701B  
4701  
Test  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max Unit  
Conditions  
Power Supply  
Rejection Ratio  
PSRR  
83  
83  
83  
83  
dB  
R
R
100KΩ  
100KΩ  
S
Common Mode  
Rejection Ratio  
CMRR  
83  
83  
dB  
S
Large Signal  
Voltage Gain  
A
250  
250  
250  
V/mV  
R
R
= 100KΩ  
= 100KΩ  
V
L
Output Voltage  
Range  
V
V
low  
high 4.90  
-4.98 -4.90  
4.98  
-4.98 -4.90  
4.90 4.98  
-4.98  
4.90 4.98  
-4.90  
V
V
O
O
L
Bandwidth  
Slew Rate  
B
S
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
MHz  
W
R
V/µs  
A
= +1  
V
C
L
= 50pF  
V = ± 2.5V -55°C T +125°C unless otherwise specified  
S
A
4701ADA  
4701BDA  
4701DA  
Test  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max Unit  
Conditions  
Input Offset  
Voltage  
V
3.0  
6.0  
15.0 mV  
R
100KΩ  
OS  
S
Input Offset  
Current  
I
I
8.0  
8.0  
8.0 nA  
OS  
Input Bias  
Current  
10.0  
10.0  
10.0 nA  
B
Power Supply  
Rejection Ratio  
PSRR  
CMRR  
60  
60  
75  
83  
60  
60  
75  
83  
60  
60  
75  
83  
dB  
dB  
R
R
100KΩ  
100KΩ  
S
S
Common Mode  
Rejection Ratio  
Large Signal  
Voltage Gain  
A
10  
50  
10  
50  
7
50  
V/mV  
R
R
100KΩ  
100KΩ  
V
L
L
Output Voltage  
Range  
V
V
low  
-2.47 -2.40  
2.45  
-2.47 -2.40  
2.35 2.45  
-2.47 -2.40  
V
V
O
O
high 2.35  
2.35 2.45  
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
3 of 9  
Design & Operating Notes:  
1. TheALD4701A/ALD4701B/ALD4701CMOSoperationalamplifieruses  
a 3 gain stage architecture and an improved frequency compensation  
scheme to achieve large voltage gain, high output driving capability,  
and better frequency stability. In a conventional CMOS operational  
amplifierdesign, compensationisachievedwithapolesplittingcapaci-  
tor together with a nulling resistor. This method is, however, very bias  
dependent and thus cannot accommodate the large range of supply  
voltage operation as is required from a stand alone CMOS operational  
amplifier. The ALD4701A/ALD4701B/ALD4701 is internally compen-  
sated for unity gain stability using a novel scheme that does not use a  
nulling resistor. This scheme produces a clean single pole roll off in the  
gain characteristics while providing for more than 70 degrees of phase  
margin at the unity gain frequency.  
temperature. This low input bias current assures that the analog signal  
from the source will not be distorted by input bias currents. Normally,  
this extremely high input impedance of greater than 1012would not be  
a problem as the source impedance would limit the node impedance.  
However, for applications where source impedance is very high, it may  
be necessary to limit noise and hum pickup through proper shielding.  
4. The output stage consists of class AB complementary output drivers,  
capable of driving a low resistance load. The output voltage swing is  
limited by the drain to source on-resistance of the output transistors as  
determined by the bias circuitry, and the value of the load resistor.  
When connected in the voltage follower configuration, the oscillation  
resistant feature, combined with the rail to rail input and output feature,  
makes an effective analog signal buffer for medium to high source  
impedance sensors, transducers, and other circuit networks.  
2. The ALD4701A/ALD4701B/ALD4701 has complementary p-channel  
and n-channel input differential stages connected in parallel to accom-  
plish rail-to-rail input common mode voltage range. This means that  
with the ranges of common mode input voltage close to the power  
supplies, one of the two differential stages is switched off internally. To  
maintain compatibility with other operational amplifiers, this switching  
point has been selected to be about 1.5V below the positive supply  
voltage. Since offset voltage trimming on the ALD4701A/ALD4701B/  
ALD4701 is made when the input voltage is symmetrical to the supply  
voltages, this internal switching does not affect a large variety of  
applications such as an inverting amplifier or non-inverting amplifier  
with a gain larger than 2.5 (5V operation), where the common mode  
voltagedoesnotmakeexcursionsabovethisswitchingpoint. Theuser  
should however, be aware that this switching does take place if the  
operational amplifier is connected as a unity gain buffer and should  
make provision in his design to allow for input offset voltage variations.  
5. The ALD4701A/ALD4701B/ALD4701 operational amplifier has been  
designed to provide full static discharge protection. Internally, the  
designhasbeencarefullyimplementedtominimizelatchup. However,  
care must be exercised when handling the device to avoid strong static  
fields that may degrade a diode junction, causing increased input  
leakagecurrents. Inusingtheoperationalamplifier, theuserisadvised  
to power up the circuit before, or simultaneously with, any input  
voltages applied and to limit input voltages not to exceed 0.3V of the  
power supply voltage levels.  
6. The ALD4701A/ALD4701B/ALD4701, with its micropower operation,  
offers numerous benefits in reduced power supply requirements, less  
noise coupling and current spikes, less thermally induced drift, better  
overall reliability due to lower self heating, and lower input bias current.  
It requires practically no warm up time as the chip junction heats up to  
only 0.4°C above ambient temperature under most operating condi-  
tions.  
3. Theinputbiasandoffsetcurrentsareessentiallyinputprotectiondiode  
reverse bias leakage currents, and are typically less than 1pA at room  
TYPICAL PERFORMANCE CHARACTERISTICS  
SUPPLY CURRENT AS A FUNCTION  
OF SUPPLY VOLTAGE  
COMMON MODE INPUT VOLTAGE RANGE  
AS A FUNCTION OF SUPPLY VOLTAGE  
±7  
±6  
INPUTS GROUNDED  
+25°C  
OUTPUT UNLOADED  
1600  
1200  
800  
400  
0
T
A
= 25°C  
±5  
±4  
-25°C  
T
A
= -55°C  
±3  
±2  
±1  
0
+125°C  
±5  
+70°C  
0
±1  
±2  
±3  
±4  
±5  
±6  
±7  
0
±1  
±2  
±3  
±4  
±6  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
INPUT BIAS CURRENT AS A FUNCTION  
OF AMBIENT TEMPERATURE  
OPEN LOOP VOLTAGE GAIN AS A  
FUNCTION OF LOAD RESISTANCE  
1000  
10000  
1000  
V
= ±2.5V  
S
100  
10  
100  
10  
1.0  
0.1  
V
T
= ±2.5V  
= 25°C  
S
A
1
10K  
100K  
1M  
10M  
-50 -25  
0
25  
50  
75  
100  
125  
LOAD RESISTANCE ()  
AMBIENT TEMPERATURE (°C)  
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
4 of 9  
TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)  
OPEN LOOP VOLTAGE GAIN AS A FUNCTION  
OF SUPPLY VOLTAGE AND TEMPERATURE  
OUTPUT VOLTAGE SWING AS A FUNCTION  
OF SUPPLY VOLTAGE  
1000  
±6  
-55°C T +125°C  
A
±5  
±4  
R
= 100KΩ  
L
100  
±3  
10  
1
±2  
±1  
-55°C T +125°C  
A
R
= 100KΩ  
L
0
0
±2  
±4  
±6  
±8  
±1  
±2  
±3  
±4  
±5  
±6  
±7  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
INPUT OFFSET VOLTAGE AS A FUNCTION  
OF AMBIENT TEMPERATURE  
OPEN LOOP VOLTAGE GAIN AS A FUNCTION  
OF FREQUENCY  
REPRESENTATIVE UNITS  
120  
100  
80  
+5  
+4  
V
T
= ±2.5V  
= 25°C  
S
A
V
= ±2.5V  
S
+3  
+2  
0
60  
40  
+1  
0
45  
-1  
-2  
90  
135  
180  
20  
0
-3  
-4  
-20  
1
10  
100  
1K  
10K 100K  
1M  
10M  
-5  
-50  
-25  
0
+25  
+50  
+75  
+100 +125  
FREQUENCY (Hz)  
AMBIENT TEMPERATURE (°C)  
INPUT OFFSET VOLTAGE AS A FUNCTION  
OF COMMON MODE INPUT VOLTAGE  
LARGE - SIGNAL TRANSIENT  
RESPONSE  
15  
V
T
= ±2.5V  
= 25°C  
S
A
2V/div  
V
T
= ±1.0V  
= 25°C  
S
A
10  
R
C
= 100K  
= 50pF  
L
L
5
0
-5  
-10  
-15  
500mV/div  
5µs/div  
-2  
-1  
0
+1  
+2  
+3  
COMMON MODE INPUT VOLTAGE (V)  
LARGE - SIGNAL TRANSIENT  
RESPONSE  
SMALL - SIGNAL TRANSIENT  
RESPONSE  
5V/div  
V
T
R
= ±2.5V  
= 25°C  
= 100K  
= 50pF  
100mV/div  
V
= ±2.5V  
S
= 25°C  
S
A
L
L
T
A
R
C
= 100K  
= 50pF  
L
L
C
2V/div  
5µs/div  
20mV/div  
2µs/div  
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
5 of 9  
TYPICAL APPLICATIONS  
RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER  
TRANSCONDUCTANCE AMPLIFIER  
+5V  
+
-
V
IN  
5V  
~
12  
Z
= 10  
V
IN  
OUT  
12  
0.1µF  
R
10  
IN =  
-
R
L
I
OUT  
V
OUT  
V
+
IN  
1/4 ALD4701  
R
= R  
V
V
OUT  
L
2
IN  
1/4 ALD4701  
Min Max Min Max  
0.0 2.00 0.0 4.00  
0.0 2.45 0.0 4.90  
R
2
I
= V  
IN  
0V 5V  
IN  
OUT  
1K  
10K  
R
2
HIGH INPUT IMPEDANCE RAIL-TO-RAIL PRECISION  
DC SUMMING AMPLIFIER  
PHOTO DETECTOR CURRENT TO  
VOLTAGE CONVERTER  
V+ = +2.5V  
R
F
= 5M  
10M  
V
1
+
-
I
1/4 ALD4701  
0.1µF  
V
1 X R  
F
V
+2.5V  
OUT  
=
2
10M  
10M  
-
V
OUT  
10M  
PHOTODIODE  
0.1µF  
R
L
= 100K  
V
V- V V+  
IN  
+
3
4
-2.5V  
1/4 ALD4701  
V
V- V  
OUT  
V+  
V- = - 2.5V  
10M  
10M  
V
= V + V - V - V  
1 2 3 4  
OUT  
R
= 10MAccuracy limited by resistor tolerances and input offset voltage  
IN  
RAIL-TO-RAIL WINDOW COMPARATOR  
WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL)  
SINE WAVE GENERATOR  
+5V  
1/4 ALD4701  
8
V
3
2
REF (HIGH)  
+
-
+5V  
-
100K  
1/4 74 C00  
1
7
V
OUT  
1/4 ALD4701  
+
10K  
V
OUT  
-5V  
10K  
V
IN  
5
6
+
-
.01µF  
R = 10K  
C = .01µF  
V
REF (LOW)  
10K  
4
100K  
1/4 ALD4701  
~
~
= 1.6KHZ  
f =  
1
2πRC  
V
for V  
REF (LOW)  
< V < V  
IN  
OUT (LOW)  
REF (HIGH)  
FUNCTION GENERATOR  
0.1µF  
100K  
220K  
100K  
+2.5V  
4
54K  
2
3
-
0.002µF  
0.002µF  
10K  
.01µF  
1
6
5
-
100K  
-
7
+
9
11  
27K  
8
13  
-
+
-2.5V  
14  
+
10  
100K  
VOUT  
+
12  
10K  
27K  
100K  
Square  
Square Wave  
TrianTgrlieanWglaeve  
Sine Wave  
Wave  
1/4 ALD4701  
Wave  
27K  
-2X GAIN  
1/4 ALD4701  
1/4 ALD4701  
1/4 ALD4701  
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
6 of 9  
SOIC-14 PACKAGE DRAWING  
14 Pin Plastic SOIC Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
E
1.75  
0.25  
0.45  
0.25  
8.75  
4.05  
0.053  
0.069  
1.35  
A
1
0.004  
0.014  
0.007  
0.336  
0.140  
0.010  
0.018  
0.010  
0.345  
0.160  
0.10  
0.35  
0.18  
8.55  
3.50  
b
C
S (45°)  
D-14  
E
e
1.27 BSC  
0.050 BSC  
0.224  
H
6.30  
0.937  
8°  
0.248  
0.037  
8°  
5.70  
0.60  
0°  
D
L
0.024  
0°  
ø
S
0.50  
0.010  
0.020  
0.25  
A
A
1
e
b
S (45°)  
C
H
L
ø
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
7 of 9  
PDIP-14 PACKAGE DRAWING  
14 Pin Plastic DIP Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
5.08  
0.105  
0.200  
3.81  
0.38  
1.27  
0.89  
0.38  
0.20  
17.27  
5.59  
7.62  
2.29  
7.37  
2.79  
1.02  
0°  
E
E
1
A
A
1
1.27  
2.03  
1.65  
0.51  
0.30  
19.30  
7.11  
8.26  
2.79  
7.87  
3.81  
2.03  
15°  
0.015  
0.050  
0.035  
0.015  
0.008  
0.680  
0.220  
0.300  
0.090  
0.290  
0.110  
0.040  
0°  
0.050  
0.080  
0.065  
0.020  
0.012  
0.760  
0.280  
0.325  
0.110  
0.310  
0.150  
0.080  
15°  
2
b
b
1
c
D-14  
E
E
1
D
e
S
e
1
L
A
2
A
S-14  
ø
L
A
1
e
b
b
1
c
ø
e
1
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
8 of 9  
CERDIP-14 PACKAGE DRAWING  
14 Pin CERDIP Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
5.08  
2.16  
1.65  
0.58  
0.38  
19.94  
7.87  
8.26  
0.140  
0.200  
3.55  
E
E
1
A
1
0.050  
0.038  
0.014  
0.008  
--  
0.085  
0.065  
0.023  
0.015  
0.785  
0.310  
0.325  
1.27  
0.97  
0.36  
0.20  
--  
b
b
1
C
D-14  
E
D
0.220  
0.290  
5.59  
7.73  
E
1
e
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
A
1
s
e
1
A
L
5.08  
--  
0.150  
0.200  
--  
3.81  
L
1
0.125  
0.015  
--  
3.18  
0.38  
--  
L
1
L
L
2
L
2
1.78  
2.49  
15°  
0.070  
0.098  
15°  
b
b
1
S
Ø
0°  
0°  
e
C
ø
e
1
ALD4701A/ALD4701B  
ALD4701  
Advanced Linear Devices  
9 of 9  

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