ALD4702_10 [ALD]

QUAD 5V RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER; QUAD 5V轨到轨精密运算放大器
ALD4702_10
型号: ALD4702_10
厂家: ADVANCED LINEAR DEVICES    ADVANCED LINEAR DEVICES
描述:

QUAD 5V RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER
QUAD 5V轨到轨精密运算放大器

运算放大器
文件: 总9页 (文件大小:82K)
中文:  中文翻译
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A
L
D
DVANCED  
INEAR  
EVICES, INC.  
ALD4702A/ALD4702B  
ALD4702  
QUAD 5V RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER  
GENERAL DESCRIPTION  
FEATURES  
The ALD4702A/ALD4702B/ALD4702 is a quad monolithic precision  
CMOS rail-to-rail operational amplifier intended for a broad range of  
analogapplicationsusing±2.5Vto±5Vdualpowersupplysystems, as  
wellas+4Vto+10Vbatteryoperatedsystems. Alldevicecharacteristics  
arespecifiedfor+5Vsinglesupplyor±2.5Vdualsupplysystems. Total  
supply current for four operational amplifiers is 6mA maximum at 5V  
supply voltage. It is manufactured with Advanced Linear Devices'  
enhanced ACMOS silicon gate CMOS process.  
• Rail-to-rail input and output voltage ranges  
• Symmetrical push-pull class AB output drivers  
• All parameters specified for +5V single supply  
or ±2.5V dual supply systems  
• Inputscanextendbeyondsupplyrailsby300mV  
• Outputs settle to 2mV of supply rails  
• High load capacitance capability up to 4000pF  
• No frequency compensation required --  
unity gain stable  
TheALD4702A/ALD4702B/ALD4702isdesignedtoofferatrade-offof  
performance parameters providing a wide range of desired  
specifications. It has been developed specifically with the +5V single  
supply or ±2.5V dual supply user andoffers the popular industry pin  
configuration of LM324 and ICL7641 types.  
• Extremely low input bias currents --  
1.0pA typical  
• Ideal for high source impedance applications  
• Dual power supply ±2.5V to ±5.0V operation  
• Single power supply +5V to +10V operation  
• High voltage gain-typically 85V/mV @ ±2.5V  
and 250V/mV @ ±5.0V  
• Drive as low as 2Kload with 5mA drive current  
• Output short circuit protected  
• Unity gain bandwidth of 1.5MHz  
• Slew rate of 1.9V/µs  
• Low power dissipation  
Severalimportantcharacteristicsofthedevicemakemanyapplications  
easy to implement for these supply voltages. First, the operational  
amplifier can operate with rail to rail input and output voltages. This  
feature allows numerous analog serial stages to be implemented  
without losing operating voltage margin. Second, the device was  
designed to accommodate mixed applications where digital and  
analog circuits may work off the same 5V power supply. Third, the  
output stage can drive up to 400pF capacitive and 5Kresistive loads  
in non-inverting unity gain connection and double the capacitance in  
the inverting unity gain mode.  
• Suitable for rugged, temperature-extreme  
environments  
APPLICATIONS  
• Voltage amplifier  
• Voltage follower/buffer  
• Charge integrator  
• Photodiode amplifier  
• Data acquisition systems  
• High performance portable instruments  
• Signal conditioning circuits  
• Sensor and transducer amplifiers  
• Low leakage amplifiers  
• Active filters  
• Sample/Hold amplifier  
• Picoammeter  
• Current to voltage convert  
• Coaxial cable driver  
These features, coupled with extremely low input currents, high  
voltage gain, useful bandwidth of 1.5MHz, a slew rate of 2.1V/µs, low  
power dissipation, low offset voltage and temperature drift, make the  
ALD4702A/ALD4702B/ALD4702 a truly versatile, user friendly,  
operational amplifier.  
The ALD4702A/ALD4702B/ALD4702 is designed and fabricated with  
silicon gate CMOS technology, and offers 1pA typical input bias  
current. On-chip offset voltage trimming allows the device to be used  
without nulling in most applications. The device offers typical offset  
drift of less than 7µV/°C which eliminates many trim or temperature  
compensation circuits. For precision applications, the ALD4702A/  
ALD4702B/ALD4702isdesignedtosettleto0.01%in8µs. Additionally,  
robust design and rigorous screening make this device especially  
suitableforoperationintemperature-extremeenvironmentsandrugged  
conditions.  
PIN CONFIGURATION  
1
2
3
OUT  
-IN  
14 OUT  
A
A
A
D
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))  
13 -IN  
D
Operating Temperature Range  
0°C to +70°C  
0°C to +70°C  
-55°C to 125°C  
+IN  
12  
+IN  
D
14-Pin  
Small Outline  
Package (SOIC)  
14-Pin  
Plastic Dip  
Package  
14-Pin  
CERDIP  
Package  
+
B
B
B
V
V-  
4
5
11  
10  
+IN  
+IN  
-IN  
C
ALD4702ASBL  
ALD4702BSBL  
ALD4702SBL  
ALD4702APBL  
ALD4702BPBL  
ALD4702PBL  
ALD4702ADB  
ALD4702BDB  
ALD4702DB  
6
7
9
8
-IN  
C
OUT  
OUT  
C
* Contact factory for leaded (non-RoHS) or high temperature versions.  
TOP VIEW  
SBL, PBL, DB PACKAGES  
Rev 2.0 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286  
www.aldinc.com  
ABSOLUTE MAXIMUM RATINGS  
+
-
-
+
Supply voltage, V referenced to V  
-0.3V to V +10.6V  
Supply voltage, V referenced to V  
±5.3V  
S
+
Differential input voltage range  
Power dissipation  
Operating tempurature range SBL, PBL packages  
-0.3V to V +0.3V  
600 mW  
0°C to +70°C  
-55°C to +125°C  
-65°C to +150°C  
+260°C  
DB package  
Storage tempurature range  
Lead tempurature, 10 seconds  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
T
= 25°C V = ±2.5V unless otherwise specified  
A
S
4702A  
4702B  
4702  
Test  
Parameter  
Symbol  
Min Typ  
Max Min Typ Max  
Min Typ Max  
Unit  
Conditions  
Supply  
Voltage  
V
V
±2.0  
4.0  
±5.0 ±2.0  
±5.0 ±2.0  
10.0 4.0  
±5.0  
10.0  
V
V
Dual Supply  
Single Supply  
S
+
10.0  
4.0  
Input Offset  
Voltage  
V
1.0  
2.0  
2.0  
3.5  
5.0  
6.5  
mV  
mV  
R 100KΩ  
S
OS  
0°C T +70°C  
A
Input Offset  
Current  
I
1.0  
1.0  
25  
240  
1.0  
1.0  
25  
240  
1.0  
1.0  
25  
240  
pA  
pA  
T = 25°C  
A
OS  
0°C T +70°C  
A
Input Bias  
Current  
I
30  
300  
30  
300  
30  
300  
pA  
pA  
T = 25°C  
A
B
0°C T +70°C  
A
+
Input Voltage  
Range  
V
-0.3  
-2.8  
5.3 -0.3  
+2.8 -2.8  
5.3 -0.3  
+2.8 -2.8  
5.3  
+2.8  
V
V
V
V
= +5V  
= ±2.5V  
IR  
S
12  
12  
12  
Input  
R
10  
10  
10  
IN  
Resistance  
Input Offset  
Voltage Drift  
TCV  
7
7
7
µV/°C  
R
R
100KΩ  
100KΩ  
OS  
S
Power Supply  
Rejection Ratio  
PSRR  
CMRR  
65  
65  
83  
83  
65  
65  
83  
83  
60  
60  
83  
83  
dB  
S
0°C T +70°C  
A
Common Mode  
Rejection Ratio  
65  
65  
83  
83  
65  
65  
83  
83  
60  
60  
83  
83  
dB  
R 100KΩ  
S
0°C T +70°C  
A
Large Signal  
Voltage Gain  
A
V
15  
28  
100  
15  
28  
100  
12  
28  
100  
V/mV  
V/mV  
R
L
R
L
= 10KΩ  
1MΩ  
Output  
Voltage  
Range  
V
V
low  
high  
0.002 0.01  
4.99 4.998  
0.002 0.01  
4.99 4.998  
0.002 0.01  
4.99 4.998  
R
= 1MSingle supply  
O
O
L
V
0°C T +70°C  
A
V
V
low  
high  
-2.44 -2.40  
2.44  
-2.44 -2.40  
2.44  
-2.44 -2.40  
2.40 2.44  
V
V
R = 10KDual supply  
L
O
O
2.40  
2.40  
0°C T +70°C  
A
Output Short  
I
8
8
8
mA  
SC  
Circuit Current  
Supply  
Current  
I
4.0  
20  
1
6.0  
30  
4.0  
20  
1
6.0  
30  
4.0  
20  
1
6.0  
30  
mA  
mW  
pF  
V
= 0V No Load  
IN  
S
Power  
Dissipation  
P
Both amplifiers  
V
D
= ±2.5V  
S
Input  
C
IN  
Capacitance  
Bandwidth  
Slew Rate  
Rise time  
B
S
0.7  
1.1  
1.5  
1.9  
0.2  
10  
0.7  
1.1  
1.5  
1.9  
0.2  
10  
0.7  
1.1  
1.5  
1.9  
0.2  
10  
MHz  
V/µs  
µs  
W
R
A
= +1 R = 10KΩ  
V
L
t
R = 10KΩ  
L
r
Overshoot  
Factor  
%
R = 10KC = 100pF  
L L  
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
2 of 9  
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)  
= 25°C V = ±2.5V unless otherwise specified  
T
A
S
4702A  
4702B  
4702  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max  
Unit  
Test Conditions  
Maximum Load  
Capacitance  
C
400  
4000  
400  
4000  
400  
4000  
pF  
pF  
Gain = 1  
Gain = 5  
L
Input Noise  
Voltage  
e
26  
26  
26  
nV/HZ  
fA/HZ  
f = 1KHZ  
n
Input Current  
Noise  
i
0.6  
0.6  
0.6  
f = 10HZ  
0.01%  
n
Settling  
Time  
t
s
8.0  
3.0  
8.0  
3.0  
8.0  
3.0  
µs  
µs  
0.1% A = -1  
V
R = 5KC = 50pF  
L
L
T
= 25°C V = ±5.0V unless otherwise specified  
S
A
4702A  
4702B  
4702  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max Unit  
Test Conditions  
Power Supply  
Rejection Ratio  
PSRR  
83  
83  
83  
83  
dB  
R
100KΩ  
S
Common Mode  
Rejection Ratio  
CMRR  
83  
83  
dB  
R
S
100KΩ  
Large Signal  
Voltage Gain  
A
250  
250  
250  
V/mV  
R
R
= 10KΩ  
= 10KΩ  
V
L
Output Voltage  
Range  
V
V
low  
high  
-4.90  
4.93  
-4.8  
-4.90 -4.8  
4.8 4.93  
-4.90  
4.8 4.93  
-4.8  
V
O
O
L
4.8  
Bandwidth  
Slew Rate  
B
S
1.7  
2.8  
1.7  
2.8  
1.7  
2.8  
MH  
Z
W
R
V/µs  
A
=+1  
V
C
L
=50pF  
V = +5.0V -55°C T +125°C unless otherwise specified  
S
A
4702ADA  
4702BDA  
4702DA  
Parameter  
Symbol Min  
Typ Max Min Typ Max Min Typ  
Max Unit  
Test Conditions  
Input Offset  
Voltage  
V
2.0  
4.0  
7.0 mV  
R
S
100KΩ  
OS  
Input Offset  
Current  
I
I
8.0  
8.0  
8.0 nA  
OS  
Input Bias  
Current  
10.0  
10.0  
10.0 nA  
B
Power Supply  
Rejection Ratio  
PSRR  
CMRR  
60  
60  
75  
83  
60  
60  
75  
83  
60  
60  
75  
83  
dB  
dB  
R
R
100KΩ  
100KΩ  
S
S
Common Mode  
Rejection Ratio  
Large Signal  
Voltage Gain  
A
10  
25  
10  
25  
7
25  
V/mV  
R
R
10KΩ  
10KΩ  
V
L
Output Voltage  
Range  
V
V
low  
high  
0.1  
4.9  
0.2  
0.1  
4.9  
0.2  
0.1  
4.9  
0.2  
V
O
O
L
4.8  
4.8  
4.8  
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
3 of 9  
Design & Operating Notes:  
1. TheALD4702A/ALD4702B/ALD4702CMOSoperationalamplifieruses  
a 3 gain stage architecture and an improved frequency compensation  
scheme to achieve large voltage gain, high output driving capability,  
and better frequency stability. The ALD4702A/ALD4702B/ALD4702 is  
internally compensated for unity gain stability using a novel scheme.  
This design produces a clean single pole roll off in the gain character-  
istics while providing for more than 70 degrees of phase margin at the  
unity gain frequency. A unity gain buffer using the ALD4702A/  
ALD4702B/ALD4702 will typically drive 400pF of external load capaci-  
tance without stability problems. In the inverting unity gain configura-  
tion, it can drive up to 800pF of load capacitance. Compared to other  
CMOS operational amplifiers, the ALD4702A/ALD4702B/ALD4702 is  
much more resistant to parasitic oscillations.  
3. The input bias and offset currents are essentially input protection  
diode reverse bias leakage currents, and are typically less than  
1pA at room temperature. This low input bias current assures that  
the analog signal from the source will not be distorted by input bias  
currents. For applications where source impedance is very high,  
it may be necessary to limit noise and hum pickup through proper  
shielding.  
4. The output stage consists of class AB complementary output  
drivers, capable of driving a low resistance load. The output  
voltage swing is limited by the drain to source on-resistance of the  
outputtransistorsasdeterminedbythebiascircuitry, andthevalue  
of the load resistor when connected. In the voltage follower  
configuration, the oscillation resistant feature, combined with the  
railtorailinputandoutputfeature,makestheALD4702A/ALD4702B/  
ALD4702 an effective analog signal buffer for medium to high  
source impedance sensors, transducers, and other circuit net-  
works.  
2. The ALD4702A/ALD4702B/ALD4702 has complementary p-channel  
and n-channel input differential stages connected in parallel to accom-  
plish rail-to-rail input common mode voltage range. With the common  
mode input voltage close to the power supplies, one of the two  
differential stages is switched off internally. To maintain compatibility  
withotheroperationalamplifiers,thisswitchingpointhasbeenselected  
to be about 1.5V above the negative supply voltage. As offset voltage  
trimming on the ALD4702A/ALD4702B/ALD4702 is made when the  
input voltage is symmetrical to the supply voltages, this internal  
switching does not affect a large variety of applications such as an  
invertingamplifierornon-invertingamplifierwithagaingreaterthan2.5  
(5V operation), where the common mode voltage does not make  
excursions below this switching point.  
5. The ALD4702A/ALD4702B/ALD4702 operational amplifier has  
been designed with static discharge protection. Internally, the  
design has been carefully implemented to minimize latch up.  
However, care must be exercised when handling the device to  
avoidstrongstaticfields.Inusingtheoperationalamplifier,theuser  
is advised to power up the circuit before, or simultaneously with,  
any input voltages applied and to limit input voltages to not exceed  
0.3V of the power supply voltage levels. Alternatively, a 100Kor  
higher value resistor at the input terminals will limit input currents  
to acceptable levels while causing very small or negligible accu-  
racy effects.  
TYPICAL PERFORMANCE CHARACTERISTICS  
OPEN LOOP VOLTAGE GAIN AS A FUNCTION  
OF SUPPLY VOLTAGE AND TEMPERATURE  
COMMON MODE INPUT VOLTAGE RANGE  
AS A FUNCTION OF SUPPLY VOLTAGE  
1000  
±7  
}
}
-55°C  
+25°C  
T
A
= 25°C  
±6  
±5  
±4  
100  
}
+125°C  
±3  
±2  
±1  
0
10  
1
R = 10K  
L
R = 5KΩ  
L
0
±2  
±4  
SUPPLY VOLTAGE (V)  
±6  
±8  
0
±1  
±2  
±3  
±4  
±5  
±6  
±7  
SUPPLY VOLTAGE (V)  
INPUT BIAS CURRENT AS A FUNCTION  
OF AMBIENT TEMPERATURE  
SUPPLY CURRENT AS A FUNCTION  
OF SUPPLY VOLTAGE  
12  
10  
8
10000  
1000  
INPUTS GROUNDED  
OUTPUTS UNLOADED  
V
S
=
± 2.5V  
100  
10  
T
A
= -55°C  
6
-25°C  
+25°C  
4
+80°C  
+125°C  
1.0  
0.1  
2
0
-50 -25  
0
25  
50  
75  
100  
125  
±1  
±2  
±3  
±4  
±5  
±6  
AMBIENT TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
4 of 9  
TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)  
OPEN LOOP VOLTAGE GAIN AS  
A FUNCTION OF FREQUENCY  
OUTPUT VOLTAGE SWING AS A  
FUNCTION OF SUPPLY VOLTAGE  
120  
100  
80  
±7  
±6  
V
T
= ±2.5V  
= 25°C  
S
-55°C T 125°C  
A
A
L
0
±5  
60  
40  
R
= 10KΩ  
45  
±4  
±3  
±2  
R
L
= 2KΩ  
90  
135  
180  
20  
0
-20  
1
10  
100  
1K  
10K 100K  
1M  
10M  
±4  
SUPPLY VOLTAGE (V)  
0
±1  
±2  
±3  
±5  
±6  
±7  
FREQUENCY (Hz)  
INPUT OFFSET VOLTAGE AS A FUNCTION  
OF AMBIENT TEMPERATURE  
INPUT OFFSET VOLTAGE AS A FUNCTION  
OF COMMON MODE INPUT VOLTAGE  
15  
REPRESENTATIVE UNITS  
+5  
V
T
= ±2.5V  
= 25°C  
S
A
10  
+4  
+3  
+2  
V
= ±2.5V  
S
5
+1  
0
0
-5  
-1  
-2  
-10  
-15  
-3  
-4  
-5  
-2  
-1  
0
+1  
+2  
+3  
-50  
-25  
0
+25  
+50  
+75  
+100 +125  
COMMON MODE INPUT VOLTAGE (V)  
AMBIENT TEMPERATURE (°C)  
VOLTAGE NOISE DENSITY AS A  
FUNCTION OF FREQUENCY  
OPEN LOOP VOLTAGE GAIN AS A  
FUNCTION OF LOAD RESISTANCE  
150  
125  
1000  
V
= ±2.5V  
= 25°C  
S
A
T
V
S
A
= ±2.5V  
100  
75  
T
= 25°C  
100  
10  
50  
25  
0
1
10  
100  
1K  
10K  
100K  
1000K  
1K  
10K  
LOAD RESISTANCE ()  
1000K  
100K  
FREQUENCY (Hz)  
SMALL - SIGNAL TRANSIENT  
RESPONSE  
LARGE - SIGNAL TRANSIENT  
RESPONSE  
V
T
R
C
= ±2.5V  
= 25°C  
= 10K  
= 50pF  
100mV/div  
S
A
L
L
5V/div  
V
= ±2.5V  
= 25°C  
= 10K  
= 50pF  
S
T
A
R
C
L
L
20mV/div  
2µs/div  
2µs/div  
1V/div  
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
5 of 9  
TYPICAL APPLICATIONS  
RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER  
RAIL-TO-RAIL WAVEFORM  
+5V  
INPUT  
5V  
0V  
~
12  
Z
IN  
= 10  
0.1µF  
-
+5V  
OUTPUT  
OUTPUT  
0V  
C
L
V
IN  
+
R
L
=10KΩ  
400pF  
Performance waveforms.  
Upper trace is the output of a  
Wien Bridge Oscillator. Lower  
trace is the output of Rail-to-Rail  
voltage follower.  
0 V 5V  
IN  
* See rail to rail waveform  
PHOTO DETECTOR CURRENT  
TO VOLTAGE CONVERTER  
LOW OFFSET SUMMING AMPLIFIER  
R
F
= 5M  
50K  
+2.5V  
- 2.5V  
10K  
10K  
I
.01µF  
.01µF  
INPUT 1  
INPUT 2  
+2.5V  
-2.5V  
-
-
V
= I x R  
F
OUT  
PHOTODIODE  
OUTPUT  
GAIN = 5  
+
+
C
= 4000pF  
L
R
= 10K  
L
* Circuit Drives Large Load  
Capacitance 4000pF  
RAIL-TO-RAIL VOLTAGE COMPARATOR  
WIEN BRIDGE OSCILLATOR (RAIL-TO -RAIL)  
SINE WAVE GENERATOR  
+5V  
+2.5V  
-
0.1µF  
OUTPUT  
V
IN  
-
+
10K  
+5V  
-2.5V  
10K  
OUTPUT  
+
50K  
.01µF  
C = .01µF  
10K  
R = 10K  
1
10M  
~
f =  
~ 1.6KHz  
2πR  
C
* See rail to rail waveform  
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
6 of 9  
SOIC-14 PACKAGE DRAWING  
14 Pin Plastic SOIC Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
E
1.75  
0.25  
0.45  
0.25  
8.75  
4.05  
0.053  
0.069  
1.35  
A
1
0.004  
0.014  
0.007  
0.336  
0.140  
0.010  
0.018  
0.010  
0.345  
0.160  
0.10  
0.35  
0.18  
8.55  
3.50  
b
C
S (45°)  
D-14  
E
e
1.27 BSC  
0.050 BSC  
0.224  
H
6.30  
0.937  
8°  
0.248  
0.037  
8°  
5.70  
0.60  
0°  
D
L
0.024  
0°  
ø
S
0.50  
0.010  
0.020  
0.25  
A
A
1
e
b
S (45°)  
C
H
L
ø
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
7 of 9  
PDIP-14 PACKAGE DRAWING  
14 Pin Plastic DIP Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
5.08  
0.105  
0.200  
3.81  
0.38  
1.27  
0.89  
0.38  
0.20  
17.27  
5.59  
7.62  
2.29  
7.37  
2.79  
1.02  
0°  
E
E
1
A
A
1
1.27  
2.03  
1.65  
0.51  
0.30  
19.30  
7.11  
8.26  
2.79  
7.87  
3.81  
2.03  
15°  
0.015  
0.050  
0.035  
0.015  
0.008  
0.680  
0.220  
0.300  
0.090  
0.290  
0.110  
0.040  
0°  
0.050  
0.080  
0.065  
0.020  
0.012  
0.760  
0.280  
0.325  
0.110  
0.310  
0.150  
0.080  
15°  
2
b
b
1
c
D-14  
E
E
1
D
e
S
e
1
L
A
2
A
S-14  
ø
L
A
1
e
b
b
1
c
ø
e
1
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
8 of 9  
CERDIP-14 PACKAGE DRAWING  
14 Pin CERDIP Package  
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
5.08  
2.16  
1.65  
0.58  
0.38  
19.94  
7.87  
8.26  
0.140  
0.200  
3.55  
E
E
1
A
1
0.050  
0.038  
0.014  
0.008  
--  
0.085  
0.065  
0.023  
0.015  
0.785  
0.310  
0.325  
1.27  
0.97  
0.36  
0.20  
--  
b
b
1
C
D-14  
E
D
0.220  
0.290  
5.59  
7.73  
E
1
e
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
A
1
s
e
1
A
L
5.08  
--  
0.150  
0.200  
--  
3.81  
L
1
0.125  
0.015  
--  
3.18  
0.38  
--  
L
1
L
L
2
L
2
1.78  
2.49  
15°  
0.070  
0.098  
15°  
b
b
1
S
Ø
0°  
0°  
e
C
ø
e
1
ALD4702A/ALD4702B  
ALD4702  
Advanced Linear Devices  
9 of 9  

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