ALD810023SCL [ALD]

QUAD SUPERCAPACITOR AUTO BALANCING (SAB™) MOSFET ARRAY; QUAD超级电容器自动平衡( SABA ?? ¢ ) MOSFET阵列
ALD810023SCL
型号: ALD810023SCL
厂家: ADVANCED LINEAR DEVICES    ADVANCED LINEAR DEVICES
描述:

QUAD SUPERCAPACITOR AUTO BALANCING (SAB™) MOSFET ARRAY
QUAD超级电容器自动平衡( SABA ?? ¢ ) MOSFET阵列

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TM  
A
L
D
DVANCED  
INEAR  
EVICES, INC.  
®
e
EPAD  
A
ALD810023/ALD810024/ALD810025/  
ALD810026/ALD810027/ALD810028  
QUAD SUPERCAPACITOR AUTO BALANCING (SAB) MOSFET ARRAY  
GENERAL DESCRIPTION  
FEATURES & BENEFITS  
TheALD8100xx andALD9100xx family of SupercapacitorAuto Balancing  
MOSFETs, or SAB™ MOSFETs, are EPAD® MOSFETs designed to  
address leakage balance of supercapacitors connected in series.  
Supercapacitors, also known as ultracapacitors or supercaps, when con-  
nected two in series, can be balanced with an ALD9100xx dual package.  
Supercaps connected two, three or four in series can be balanced with an  
ALD8100xx quad package.  
• Simple and economical to use  
• Precision factory trimmed  
• Automatically regulates and balances leakage currents  
• Effective for supercapacitor charge-balancing  
• Balances up to 4 supercaps with a single IC package  
• Balances 2-cell, 3-cell, 4-cell series-connected supercaps  
• Scalable to larger supercap stacks and arrays  
• Near zero additional leakage currents  
ALD SAB MOSFETs have unique electrical characteristics for active con-  
tinuous leakage current regulation and self-balancing of stacked series-  
connected supercaps and, at the same time, dissipate near zero leakage  
currents, practically eliminating extra power dissipation. For many  
applications, SAB MOSFET automatic charge balancing offers a simple,  
economical and effective method to balance and regulate supercap  
voltages. With SAB MOSFETs, each supercap in a series-connected stack  
is continuously and automatically controlled for precision effective supercap  
leakage current and voltage balancing.  
• Zero leakage at 0.3V below rated voltages  
• Balances with series-connect and parallel-connect  
• Leakage currents are exponential fuction of cell voltages  
• Active current ranges from < 0.3nA to > 1000µA  
• Always active, always fast response time  
• Minimizes leakage currents and power dissipation  
APPLICATIONS  
SAB MOSFETs offer a superior alternative solution to other passive  
resistor-based or operational amplifier based balancing schemes, which  
typically contribute continuous power dissipation due to linear currents at  
all voltage levels. They are also a preferred alternative to many other  
active supercap charging and balancing regulator ICs where tradeoffs in  
cost, efficiency, complexity and power dissipation are important design  
considerations.  
• Series-connected supercapacitor cell leakage balancing  
• Energy harvesting  
• Zero-power voltage divider at selected voltages  
• Matched current mirrors and current sources  
• Zero-power mode maximum voltage limiter  
• Scaled supercapacitor stacks and arrays  
The SAB MOSFET provides regulation of the voltage across a supercap  
cell by increasing its drain current exponentially across the supercap when  
supercap voltages increase, and by decreasing its drain current  
exponentially across the supercap when supercap voltages decrease.  
When a supercap in a supercap stack is charged to a voltage less than  
90% of the desired voltage limit, the SAB MOSFET across the supercap  
is turned off and there is zero leakage current contribution from the SAB  
MOSFET. On the other hand, when the voltage across the supercap is  
over the desired voltage limit, the SAB MOSFET is turned on to increase  
its drain currents to keep the over-voltage from rising across the supercap.  
However, the voltages and leakages of other supercaps in the stack are  
lowered simultaneously to maintain near-zero net leakage currents.  
PIN CONFIGURATION  
ALD8100xx  
16  
15  
14  
13  
12  
11  
1
2
3
IC*  
IC*  
M1  
M2  
D
D
N1  
N1  
N2  
N2  
The ALD8100xx/ALD9100xx SAB MOSFET family offers the user a se-  
lection of different threshold voltages for various supercap nominal volt-  
age values and desired leakage balancing characteristics. Each SAB  
MOSFET generally requires connecting its V+ pin to the most positive  
voltage and its V- and IC pins to the most negative voltage within the  
package. Note that each Drain pin has an internal reverse biased diode  
to its Source pin, and each Gate pin has a reverse biased diode to V-. All  
other pins must have voltages within V+ and V- voltage limits. Standard  
ESD protection facilities and handling procedures for static sensitive de-  
vices must also be used.  
G
S
G
S
V-  
V-  
N1  
N2  
V+  
4
5
V-  
M3  
V-  
M4  
D
N4  
G
N4  
S
N4  
D
N3  
N3  
N3  
6
7
8
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))  
G
S
10  
9
Operating Temperature Range*  
0°C to +70°C  
V-  
16-Pin SOIC Package  
SCL PACKAGES  
ALD810023SCL  
ALD810024SCL  
ALD810025SCL  
ALD810026SCL  
ALD810027SCL  
ALD810026SCL  
*IC pins are internally connected, connect to V-  
* Contact factory for industrial temp. range or user-specified threshold voltage values.  
©2013 Advanced Linear Devices, Inc., Vers. 1.0  
www.aldinc.com  
1 of 17  
TYPICAL APPLICATIONS  
TYPICAL CONNECTION FOR A  
FOUR-SUPERCAP STACK  
ALD8100xx PIN DIAGRAM  
16  
15  
14  
13  
12  
11  
1
2
3
16  
15  
14  
IC*  
1
2
3
IC*  
V+  
M1  
M1  
M2  
M2  
D
D
N1  
N1  
N2  
V1  
G
S
G
N2  
+
+
C1  
C2  
V-  
V-  
V-  
V-  
S
N1  
N2  
4
5
4
5
13  
12  
V1  
+
V
V-  
V+  
V3  
M3  
V-  
M4  
M3  
V-  
M4  
D
N4  
G
N4  
S
N4  
D
N3  
6
7
8
11  
10  
9
6
7
8
V2  
G
10  
9
N3  
+
+
C4  
C3  
V-  
V-  
S
N3  
SCHEMATIC DIAGRAM OF A TYPICAL  
CONNECTION FOR A FOUR-SUPERCAP STACK  
EXAMPLE OF ALD810025 CONNECTION  
ACROSS FOUR SUPERCAPS IN SERIES  
V+ +15.0V  
V+ = 10.0V  
ALD810025  
ALD8100XX  
I
80mA  
DS(ON)  
2, 12  
2, 12  
M1  
V =2.5V  
+
+
t
3
3
M1  
C1  
C1  
4
4
V
V
7.5V  
5.0V  
2.5V  
V
1
1
15  
15  
V =2.5V  
t
+
+
+
+
+
+
14  
14  
M2  
13  
C2  
C3  
C4  
M2  
13  
C2  
C3  
C4  
V
2
2
11  
11  
M3  
V =2.5V  
t
10  
7
10  
7
M3  
9
9
V
V
3
3
6
6
V =2.5V  
t
M4  
M4  
1, 5, 8, 16  
1, 5, 8, 16  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C4 DENOTES SUPERCAPACITORS  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C4 DENOTES SUPERCAPACITORS  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
2 of 17  
TYPICAL APPLICATIONS (cont.)  
SERIES CONNECTION OF TWO FOUR-SUPERCAP  
TYPICAL PARALLEL CONNECTION OF SAB  
MOSFETS WITH TWO SUPERCAPS  
STACKS EACH WITH A SEPARATE  
SAB MOSFET PACKAGE  
V+ +15.0V  
ALD8100XX  
V+ +30.0V  
(2 x 15.0V)  
I
80mA  
DS(ON)  
I
80mA  
DS(ON)  
15  
2, 12  
M1  
2, 12  
M1  
+
+
3
14  
7
+
3
C1  
C2  
M2  
13  
C1A  
4
4
V
1
11  
M3  
6
15  
+
+
+
10  
14  
M4  
M2  
13  
C2A  
C3A  
C4A  
ALD8100XX  
STACK 1  
9
11  
M3  
V+ - V +15.0V  
1, 5, 8, 16  
A
10  
7
9
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C2 DENOTES SUPERCAPACITORS  
6
M4  
1, 5, 8, 16  
EXAMPLE OF ALD810025 CONNECTION  
ACROSS TWO SUPERCAPS IN SERIES  
V
A
2, 12  
V+ = 10.0V  
ALD810025  
+
3
C1B  
M1  
4
2, 12  
15  
3
+
+
+
M1  
14  
M2  
13  
C2B  
C3B  
C4B  
4
+
ALD8100XX  
STACK 2  
C1  
15  
11  
M3  
14  
V
+15.0V  
A
M2  
10  
7
13  
9
V
5.0V  
1
11  
M3  
6
10  
7
M4  
9
+
C2  
6
1, 5, 8, 16  
M4  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1A-C4B DENOTES SUPERCAPACITORS  
1, 5, 8, 16  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C2 DENOTES SUPERCAPACITORS  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
3 of 17  
TYPICAL APPLICATIONS (cont.)  
TYPICAL SERIES CONNECTION OF SAB  
MOSFETS WITH THREE SUPERCAPS  
SERIES CONNECTION OF TWO THREE-SUPERCAP  
STACKS EACH WITH A SEPARATE  
SAB MOSFET PACKAGE  
V+ +15.0V  
ALD8100XX  
V+ +30.0V  
I
80mA  
DS(ON)  
(2 x 15.0V)  
2, 12  
M1  
I
80mA  
DS(ON)  
3
+
+
+
C1  
2, 12  
M1  
3
4
+
+
+
C1A  
V
V
1
15  
4
14  
10  
ALD8100XX  
STACK 1  
M2  
C2  
C3  
15  
M2  
13  
13  
14  
10  
V+ - V +15.0V  
A
C2A  
C3A  
2
11  
M3  
11  
9
M3  
1, 5, 6, 7, 8, 16  
9
1, 5, 6, 7, 8, 16  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C3 DENOTES SUPERCAPACITORS  
V
A
2, 12  
+
3
EXAMPLE OF ALD810028 CONNECTION  
ACROSS THREE SUPERCAPS IN SERIES  
C1B  
M1  
4
15  
V+ = 8.1V  
ALD810028  
+
+
14  
M2  
C2B  
C3B  
13  
11  
ALD8100XX  
STACK 2  
2, 12  
V =2.8V  
3
+
+
+
t
V
+15.0V  
C1  
A
M1  
10  
M3  
4
9
V
V
= 5.4V  
= 2.7V  
1
15  
V =2.8V  
t
14  
10  
1, 5, 6, 7, 8, 16  
M2  
C2  
C3  
13  
2
11  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1A-C3B DENOTES SUPERCAPACITORS  
V =2.8V  
t
M3  
9
1, 5, 6, 7, 8, 16  
1-16 DENOTES PACKAGE PIN NUMBERS  
C1-C3 DENOTES SUPERCAPACITORS  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
4 of 17  
TABLE 1. SUPERCAP AUTO BALANCING (SAB) MOSFET EQUIVALENT ON RESISTANCE AT  
DIFFERENT DRAIN-GATE SOURCE VOLTAGES AND DRAIN-SOURCE ON CURRENTS  
Drain-Gate  
Gate-  
Source  
Voltage (V)2  
SAB MOSFET DRAIN-SOURCE ON CURRENT  
ALD Part Threshold  
I
(µA)1  
T = 25°C  
A
DS(ON)  
Number  
Voltage  
Equivalent ON  
V (V)  
t
Resistance (M) 0.0001 0.001  
0.01  
0.1  
1
10  
100  
300  
1000  
3000 10000  
ALD910028  
ALD910027  
ALD910026  
ALD910025  
ALD910024  
ALD910023  
2.80  
2.70  
2.60  
2.50  
2.40  
2.30  
V
= V  
(V)  
2.4  
2.5  
2.6  
2.7  
27  
2.8  
2.8  
2.9  
3.02  
3.1  
3.24  
3.3 3.8  
GS  
DS  
R
(M)  
24000 2500  
260  
0.29  
0.030  
0.01  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.3  
2.4  
2.5  
2.6  
26  
2.7  
2.7  
2.8  
2.92  
3.0  
3.14  
3.2  
3.7  
GS  
DS  
R
(M)  
23000 2400  
250  
0.28  
0.029  
0.01  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.2  
2.3  
2.4  
2.5  
25  
2.6  
2.6  
2.7  
2.82  
2.9  
3.04  
3.1  
3.6  
GS  
DS  
R
(M)  
22000 2300  
240  
0.27  
0.028  
0.01  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.1  
2.2  
2.3  
2.4  
24  
2.5  
2.5  
2.6  
2.72  
2.8  
2.94  
3.0  
3.5  
GS  
DS  
R
(M)  
21000 2200  
230  
0.26  
0.027  
0.01  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.0  
2.1  
2.2  
2.3  
23  
2.4  
2.4  
2.5  
2.62  
2.7  
2.84  
2.9  
3.4  
GS  
DS  
R
(M)  
20000 2100  
220  
0.25  
0.026  
0.009  
0.003 0.001 0.0003  
DS(ON)  
V
= V  
(V)  
1.9  
2.0  
2.1  
2.2  
22  
2.3  
2.3  
2.4  
2.52  
2.6  
2.74  
2.8  
3.3  
GS  
DS  
R
(M)  
19000 2000  
210  
0.24  
0.025  
0.009  
0.003 0.001 0.0003  
DS(ON)  
Drain-Gate  
Source  
Voltage (V)2  
Gate-  
SAB MOSFET DRAIN-SOURCE ON CURRENT  
ALD Part Threshold  
I
(µA)1  
T = 25°C  
A
DS(ON)  
Number  
Voltage  
Equivalent ON  
Resistance (M) 0.0001 0.001  
V (V)  
t
0.01  
0.1  
1
10  
100  
300  
1000  
3000 10000  
ALD810028  
ALD810027  
ALD810026  
ALD810025  
ALD810024  
ALD810023  
2.80  
2.70  
2.60  
2.50  
2.40  
2.30  
V
= V  
(V)  
2.4  
2.5  
2.6  
2.7  
27  
2.8  
2.8  
2.9  
3.04  
3.14  
0.01  
3.32  
3.62 4.22  
GS  
DS  
R
(M)  
24000 2500  
260  
0.29  
0.030  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.3  
2.4  
2.5  
2.6  
26  
2.7  
2.7  
2.8  
2.94  
3.04  
0.01  
3.22  
3.52  
4.12  
GS  
DS  
R
(M)  
23000 2400  
250  
0.28  
0.029  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.2  
2.3  
2.4  
2.5  
25  
2.6  
2.6  
2.7  
2.84  
2.94  
0.01  
3.12  
3.42  
4.02  
GS  
DS  
R
(M)  
22000 2300  
240  
0.27  
0.028  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.1  
2.2  
2.3  
2.4  
24  
2.5  
2.5  
2.6  
2.74  
2.84  
0.01  
3.02  
3.32  
3.92  
GS  
DS  
R
(M)  
21000 2200  
230  
0.26  
0.027  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
2.0  
2.1  
2.2  
2.3  
23  
2.4  
2.4  
2.5  
2.64  
2.74  
2.92  
3.22  
3.82  
GS  
DS  
R
(M)  
20000 2100  
220  
0.25  
0.026  
0.009  
0.003 0.001 0.0004  
DS(ON)  
V
= V  
(V)  
1.9  
2.0  
2.1  
2.2  
22  
2.3  
2.3  
2.4  
2.54  
2.64  
2.82  
3.12  
3.72  
GS  
DS  
R
(M)  
19000 2000  
210  
0.24  
0.025  
0.009  
0.003 0.001 0.0004  
DS(ON)  
Selection of a SAB MOSFET device depends on a set of desired voltage vs. current characteristics that closely match the selected nominal bias voltage and  
bias currents that provide the best leakage and regulation profile of a supercap load. The V table, where Drain-Gate Source Voltage (V = V ) gives  
t
GS DS  
a range of V  
= V  
bias voltages as different V  
load voltages. At each V  
= V  
bias voltage, a corresponding Drain-Source ON Current  
GS  
DS  
supercap  
GS  
DS  
(I  
) is produced by a specific SAB MOSFET, which can be viewed as the amount of current available to compensate for supercap leakage current  
DS(ON)  
imbalances and results in an Equivalent ON Resistance (R  
)across a supercap cell. Selection of a supercap bias voltage with a SAB MOSFET  
that corresponds to the maximum supercap leakage current would result in the best possible tradeoff between leakage current balancing and  
DS(ON)  
I
DS(ON)  
voltage regulation.  
Notes: 1) The SAB MOSFET Drain Source ON Current (I ) is the maximum current available to offset the supercapacitor leakage current.  
DS(ON)  
2) The Drain-Gate Source Voltage (V =V ) is normally the same as the voltage across the supercapacitor.  
GS DS  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
5 of 17  
GENERAL DESCRIPTION (cont.)  
SUPERCAPS  
As all ALD8100xx and ALD9100xx devices operate the same way,  
an ALD810025 is used in the following illustration. At voltages be-  
low its threshold voltage, the ALD810025 rapidly turns off at a rate  
of approximately one decade of current per 104mV of voltage drop.  
Supercaps are typically rated with a nominal recommended  
working voltage established for long life at their maximum rated  
operating temperature. Excessive supercap voltages that exceed  
its rated voltage for a prolonged time period will result in reduced  
lifetime and eventual rupture and catastrophic failure. To prevent  
such an occurrence, a means of automatically adjusting (charge-  
balancing) and monitoring the maximum voltage is required in most  
applications having two or more supercaps connected in series,  
due to their different internal leakage currents that vary from one  
supercap to another.  
Hence, at V  
= V  
= 2.396V, the ALD810025 has drain current  
= 2.292V, the ALD810025 drain current  
GS  
of 0.1µA. At V  
DS  
= V  
GS  
DS  
GS  
0.001µA. It is apparent that at V  
becomes 0.01µA. At V  
= V  
= 2.188V, the drain current is  
DS  
= VDS 2.10V, the drain leak-  
GS  
age current 0.00014µA, which is essentially zero when compared  
to 1µA initial threshold current. When individual V  
= V volt-  
DS  
GS  
ages fall below 1.9V, the SAB MOSFET leakage current essentially  
goes to zero (~70pA).  
The supercap leakage current itself is a variable function of its many  
parameters such as aging, initial leakage current at zero input  
voltage, the material and construction of the supercap. Its leakage  
is also a function of the charging voltage, the charging current,  
operating temperature range and the rate of change of many of  
these parameters. Supercap balancing must accommodate these  
changing conditions.  
This exponential relationship between the Drain-Gate Source  
Voltage and the Drain-Source ON Current is an important  
consideration for replacing certain supercap charge balancing  
applications currently using fixed resistor or operational amplifier  
charge balancing. These other conventional charge-balancing cir-  
cuits would continue to dissipate a significant amount of current,  
even after the voltage across the supercaps had dropped, because  
the current dissipated is a linear function, rather than an exponen-  
tial function, of the supercap voltage (I = V/R). For supercap stacks  
consisting of more than two supercaps, the challenge of supercap  
balancing becomes more onerous.  
SUPERCAP CHARGING AND DISCHARGING  
During supercap charging, consideration must be paid to limit the  
rate of supercap charging so that excessive voltage and current do  
not build up across any two pins of the SAB MOSFETs, even  
momentarily, to exceed their absolute maximum rating. In most  
cases though, this is not an issue, as there may be other design  
constraints elsewhere in the circuit to limit the rate of charging or  
discharging the supercaps. For many types of applications, no  
further action, other than checking the voltage and current excur-  
sions, or including a simple current-limiting charging resistor, is nec-  
essary.  
For other IC circuits that offer charge balancing, active power is still  
being consumed even if the supercap voltage falls below 2.0V. For  
a four-cell supercap stack, this translates into a 2.0V x 4 ~= 8.0V  
power supply for an IC charge-balancing circuit. Even a two-cell  
supercap stack would be operating such an IC circuit with  
2.0V x 2 = 4V. A supercap stack with SAB MOSFET charge-  
balancing, on the other hand, would be the only way to lose  
exponentially decreasing amount of charge with time and preserve  
by far the greatest amount of charge on each of the supercaps, by  
not adding charge loss to the leakages contributed by the supercaps  
themselves.  
CHARACTERISTICS OF SUPERCAP AUTO BALANCING  
(SAB™) MOSFETS  
At V  
= V  
voltages of the ALD810025 above its V threshold  
t
GS  
voltage, its drain current behavior has the opposite near-exponen-  
tial effect. At V = V = 2.60V, for example, the ALD810025  
DS  
The principle behind the Supercap Auto Balancing MOSFET in  
balancing supercaps is basically simple. It is based on the natural  
threshold characteristics of a MOSFET device. The threshold volt-  
age of a MOSFET is the voltage at which a MOSFET turns on and  
starts to conduct a current. The drain current of the MOSFET, at or  
below its threshold voltage, is an exponentially non-linear function  
of its gate voltage. Hence, for small changes in the MOSFET’s  
gate voltage, its on-current can vary greatly, by orders of magni-  
tude. ALD’s SAB MOSFETs are designed to take advantage of  
this fundamental device characteristic.  
GS  
DS  
I
increases tenfold to 10µA. Similarly, I  
becomes  
DS(ON)  
100µA for a V  
DS(ON)  
voltage increase to 2.74V, and 300µA at  
= V  
GS  
2.84V. (See Table 1)  
DS  
As I  
changes rapidly with applied voltage on the Drain-Gate  
DS(ON)  
to Source pins, the SAB MOSFET device acts like a voltage  
limiting regulator with self-adjusting current levels. When this SAB  
MOSFET is connected across a supercap cell, the total leakage  
current across the supercap is compensated and corrected by the  
SAB MOSFET.  
SAB MOSFETs can be connected in parallel or in a series, to suit  
the desired leakage current characteristics, in order to charge-  
balance an array of supercaps. The combined SAB MOSFET and  
supercap array is designed to be self-regulating with various  
supercap array leakage mismatches and environmental  
temperature changes. The SAB MOSFETs can also be used only  
in the subthreshold mode, meaning the SAB MOSFET is used  
entirely at min., nominal and max. operating voltages in voltage  
ranges below its specified threshold voltage.  
Consider the case when two supercap cells are connected in  
series, each with a SAB MOSFET connected across it in the  
V mode (V  
= V ), charged by a power supply to a voltage  
t
DS  
GS  
equal to 2 x V .  
S
If the top supercap has a higher internal leakage current than the  
bottom supercap, the voltage V across it tends to drop lower  
S(top)  
than that of the bottom supercap. The SAB MOSFET I  
across  
DS(ON)  
the top supercap, sensing this voltage drop, drops off rapidly.  
Meanwhile, the bottom supercap V voltage tends to rise,  
For the ALD8100xx/ALD9100xx family of SAB MOSFETs, the  
S(bottom)  
threshold voltage V of a SAB MOSFET is defined as its drain-gate  
as V  
= (2 x V ) - V  
. This tendency for the voltage  
t
S(bottom)  
rise also increases V  
S
S(top)  
source voltage at a drain-source ON current, I  
its gate and drain terminals are connected together (V  
GS  
= 1µA when  
= V ).  
= V voltage of the SAB MOSFET across  
DS(ON)  
GS  
DS  
the bottom supercap. This increased V  
cause the I  
rapidly as well. The excess leakage current of the top supercap  
would now leak across the bottom SAB MOSFET, reducing the  
voltage rise tendency of the lower supercap. With this self-regulat-  
= V voltage would  
DS  
DS  
GS  
current of the bottom SAB MOSFET to increase  
This voltage is specified as xx, where the threshold voltage is in  
0.10V increments. For example, the ALD810025 features a 2.50V  
threshold voltage MOSFET with drain-gate source voltage,  
DS(ON)  
V = 2.50V, and I  
t
= 1µA. The SAB MOSFET has a precision  
DS(ON)  
trimmed threshold voltage where the tolerance of the threshold  
voltage is very tight, typically 2.50V +/-0.005V. When a 2.50V drain-  
gate source voltage bias is applied across an ALD810025/  
ing mechanism, the top supercap, V  
while the bottom supercap, V  
creating simultaneously opposing actions of the supercap leakage  
currents.  
, voltage tends to rise  
, voltage tends to drop,  
S(top)  
S(bottom)  
ALD910025 SAB MOSFET, it conducts an I  
= 1µA.  
DS(ON)  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
6 of 17  
GENERAL DESCRIPTION (cont.)  
A DESIGN EXAMPLE  
With appropriate design and selection of a specific SAB MOSFET  
device for a given pair of supercaps, it is now possible to have  
regulation and balancing of two series-connected supercaps, at  
essentially no extra leakage current, since the SAB MOSFET only  
conducts the difference in leakage current between the two  
supercaps.  
A single 5V power supply using two 2.7V rated supercaps con-  
nected in a series and a single SAB MOSFET array package.  
For a supercap with:  
1) max. operating voltage = 2.70V and  
2) max. leakage current = 10µA at 70°C.  
Likewise, the case of the bottom supercap having a higher leakage  
current than that of the top supercap works in similar fashion, with  
3) At 2.50V, the supercap max. leakage current = 2.5µA at 25°C.  
the tendency of the bottom supercap, V  
, voltage to drop,  
S(bottom)  
compensated by the tendency of the top supercap, V  
, voltage  
S(top)  
Next, pick ALD810026, a SAB MOSFET with V = 2.60V. For this  
t
to drop as well, effected by the top SAB MOSFET. This SAB  
MOSFET charge balancing scheme also extends to up to four  
supercaps in a series network by using four SAB MOSFETs in a  
single ALD8100xx SAB MOSFET package.  
device, at V  
= V = 2.60V, the nominal I  
= 1µA. Per the  
DS(ON)  
= 2.50V, I ~= 0.1µA.  
DS(ON)  
GS  
leakage current table, at V  
DS  
= V  
GS  
DS  
At a nominal operating voltage of 2.50V, the additional leakage  
current contribution by the ALD810026 is therefore 0.1µA. The  
total current for the supercap and the SAB MOSFET = 2.5µA +  
0.1µA ~= 2.6µA @ 2.50V operating voltage. At an operating  
voltage of 2.40V, the additional ALD810026 leakage current  
decreases to about 0.01µA.  
As ambient temperature increases, the supercap leakage current,  
as a function of temperature, increases. The SAB MOSFET thresh-  
old voltage is reduced with temperature increase, which causes the  
drain current to increase with temperature as well. This drain  
current increase compensates for the leakage current increase within  
the supercap, reducing the overall supercap temperature leakage  
effect and preserving charge balancing effectiveness. This tem-  
perature compensation assumes that all the supercaps and the SAB  
MOSFETs are in the same temperature environments.  
At a max. voltage of 2.70V across the ALD810026 SAB MOSFET,  
V
GS  
= V  
= 2.70V results in I = 10µA. 10µA is also the  
DS  
DS(ON)  
max. leakage current margin, the difference between top and bot-  
tom supercap leakage currents that can be compensated.  
Each drain pin of a SAB MOSFET has an internal reverse biased  
diode to its source pin, which can become forward biased if the  
drain voltage should become negative relative to its source pin. This  
forward-biased diode clamps the drain voltage to limit the negative  
voltage relative to its source voltage, and is limited to 80mA max.  
rated current between any two pins.  
If a higher max. leakage current margin is desired for an applica-  
tion, then the selection may need to go to the next SAB MOSFET  
down in the series, ALD810025. For an ALD810025 operating at a  
max. rated voltage of 2.70V, the max. leakage current margin is  
~= 50µA. For this device, the nominal operating current at 2.50V is  
~= 1µA, which is the average current consumption for the series-  
connected stack. The total current for the supercap and the SAB  
MOSFET is = 2.5µA + 1µA ~= 3.5µA @ 2.50V operating voltage.  
SPECIFYING SAB™ MOSFETS  
Because the SAB MOSFET is always active and always in “on”  
mode, there is no circuit switching or sleep mode involved. This  
may become an important factor when the time interval between  
the supercap discharging or recharging, and other events happen-  
ing in the application, is long, unknown or variable.  
The process of selecting SAB MOSFETs begins by analyzing the  
parameters and the requirements of a given selection of supercaps:  
1) For better leakage current matching results, pick the same make  
and model of supercaps to be connected in a series. If possible,  
select supercaps from the same production batch. (Note: SAB  
MOSFETs are precisely set at the factory and specified such that  
their lot-to-lot and MOSFET-to-MOSFET variation is not a concern.)  
In real life situations, the actual circuit behavior is a little different,  
further reducing overall leakage currents from both supercaps and  
SAB MOSFETs, due to the automatic compensation for different  
leakage current levels by both the supercaps themselves and in  
combination with the SAB MOSFETs. Take the above example of  
two supercaps in series, assuming that the top supercap is leaking  
10µA and the bottom one leaking 4µA (both at the rated 2.7V max.)  
while the power supply remains at 5V DC. The actual voltage across  
the top supercap tends to be less than 50% of 5.0V, due to its  
internal leakage current, and results in a lowered current level be-  
cause the voltage across it tends to be lower as well. The total  
voltage across both supercaps is still 5.0V, so each supercap would  
experience a lowered voltage at less than maximum rated voltage  
of 2.7V, thereby resulting in reduced overall leakage currents in  
each of the two supercaps.  
2) Determine the leakage current range of the supercaps.  
3) Determine the desired nominal operating voltage of the supercaps.  
4) Determine the maximum operating voltage rating of the supercaps.  
5) Calculate or measure the maximum leakage current of the  
supercap at the maximum rated operating voltage.  
6) Determine the operating temperature range of the supercaps.  
7) Determine any additional level of operating leakage current in  
the system.  
These leakage currents are then further regulated by the SAB  
MOSFETs connected across each of the supercaps. The end re-  
sult is a compensated condition where the top supercap has ~2.4V  
and the bottom cap has a voltage of ~2.6V. The excess leakage  
current of the top supercap is bypassed across the bottom SAB  
MOSFET, so that there is little or no net additional leakage current  
introduced by the bottom SAB MOSFET. Meanwhile the top SAB  
MOSFET, with ~2.4V across it, is biased to conduct (or leak) very  
little drain current. Note also that the top supercap is now biased at  
~2.4V and, therefore, would experience less current leakage than  
Next, determine the normalized drain current of a SAB MOSFET at  
a pre-selected operating voltage. For example, theALD810025 has  
a rated leakage, or drain, current of 1µA at applied drain-gate source  
voltage of 2.50V. If the desired normalized drain current is 0.01µA,  
then the ALD810025 would give a bias drain-gate source voltage of  
approximately 2.3V at that current, which produces an equivalent  
ON resistance of 2.3V/0.01µA ~= 230M(using the rule of thumb  
of one decade of current change per 0.10V of V  
= V change).  
GS  
DS  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
7 of 17  
GENERAL DESCRIPTION (cont.)  
when it is at 2.7V. The primary benefit here is that this process of  
For stacks of series-connected supercaps consisting of more than  
three or four supercaps, it is possible to use a single SAB MOSFET  
array for every three or four supercap stacks connected in series.  
Multiple SAB MOSFET arrays can be arrayed across multiple  
supercap stacks to operate at higher operating voltages. It is  
important to limit the voltage across any two pins within a single  
SAB MOSFET array package to be less than its absolute  
maximum voltage and current ratings.  
leakage balancing is fully automatic and works for a variety of  
supercaps, each with a different leakage characteristic profile of its  
own.  
A second benefit to note is that with ~2.4V and ~2.6V across the  
two supercaps, in this example, the actual current level difference  
between the top and the bottom SAB MOSFETs is at about a 100:1  
ratio (~2 orders of magnitude). The net additional leakage current  
contributed by theALD8110026 in the design example above would,  
therefore, be approximately 0.01µA. In this case, the difference in  
leakage currents between the two supercaps can have a ratio of  
100:1 and could still have charge balancing and voltage regulation.  
ENERGY HARVESTING APPLICATIONS  
Supercaps offer an important benefit for energy harvesting appli-  
cations from a low energy source, buffering and storing such  
energy to drive a higher power load.  
The dynamic response of a SAB MOSFET circuit is very fast, and  
the typical response time is determined by the R C time constant of  
the equivalent ON resistance value of the SAB MOSFET and the  
capacitance value of the supercap. In many cases the R value is  
small initially, responding rapidly to a large voltage transient by  
having a smaller R C time constant. As the voltages settle down,  
the equivalent R increases. As these R and C values can become  
very large, it can take a long time for the voltages across the  
supercaps to settle down to steady state leakage current levels.  
The direction of the voltage movements across the supercap,  
however, would indicate the trend that the supercap voltages are  
moving away from the voltage limits.  
For energy harvesting applications, supercap leakage currents are  
a critical factor, as the average energy harvesting input charge must  
exceed the average supercap internal leakage currents in order for  
any net energy to be harvested and saved. Often times the input  
energy is variable, meaning that its input voltage and current  
magnitude is not constant and may be dependent upon a whole set  
of other parameters such as the source energy availability, energy  
sensor conversion efficiency, etc.  
For these types of applications, it is essential to pick supercaps  
with low leakage specifications and to use SAB MOSFETs that  
minimize the amount of energy loss due to leakage currents.  
PARALLEL-CONNECTED AND SERIES-CONNECTED SAB  
MOSFETS  
For up to 90% of the initial voltages of a supercap used in energy  
harvesting applications, supercap charge loss is lower than its  
maximum leakage rating, at less than its max. rated voltage. SAB  
MOSFETs used for charge balancing, due to their high input thresh-  
old voltages, would be completely turned off, consuming zero drain  
current while the supercap is being charged, maximizing any  
energy harvesting gathering efforts. The SAB MOSFET would not  
become active until the supercap is already charged to over 90%  
of its max. rated voltage. The trickle charging of supercaps with  
energy harvesting techniques tends to work well with SAB MOSFETs  
as charge balancing devices, as it is less likely to have high  
transient energy spurts resulting in excessive voltage or current  
excursions.  
In the previous design example, note that theALD810026 is a quad  
pack, with four SAB MOSFETs in a single SOIC package. For a  
standard configuration of two supercaps connected in series, the  
ALD9100xx dual SAB MOSFET is recommended for charge  
balancing. If a two-stack supercap requires charge balancing, then  
there is also an option to parallel-connect two SAB MOSFETs of a  
quad ALD8100xx for each of the two supercaps. Parallel-connec-  
tion generally means that the drain, gate and source terminals of  
each of two SAB MOSFETs are connected together to form a  
MOSFET with a single drain, a single gate and a single source  
terminal with twice the output currents. In this case, at a nominal  
operating voltage of 2.50V, the additional leakage current contribu-  
tion by the SAB MOSFET is equal to 2 x 0.1µA = 0.2µA. The total  
current for the supercaps and the SB MOSFET is = 2.5µA + 0.2µA  
~= 2.7µA @ 2.50V operating voltage. At max. voltage of 2.70V  
If an energy harvesting source only provides a few µA of current,  
the power budget does not allow wasting any of this current on  
capacitor leakage currents and power dissipation of resistor or  
operational amplifier based charge-balancing circuits. It may also  
be important to reduce long term leakage currents, as energy  
harvesting charging at low levels may take up to many days.  
across the SAB MOSFET, V  
= V = 2.70V results in a drain  
GS  
DS  
current of 2 x 10µA = 20µA. So this configuration would be chosen  
to increase max. charge balancing leakage current at 2.70V to 20µA,  
at the expense of an additional 0.1µA leakage at 2.50V.  
In summary, in order for an energy harvesting application to be  
successful, the input energy harvested must exceed all the energy  
required due to the leakages of the supercaps and the charge-  
balancing circuits, plus any load requirements. With their unique  
balancing characteristics and near-zero charge loss, SAB MOSFETs  
are ideal devices for use in supercap charge-balancing in energy  
harvesting applications.  
This method also extends to four supercaps in series, although this  
may require two separate ALD810026 packages, if the maximum  
voltage ratings of the SAB MOSFET are exceeded.  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
8 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810023  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.28  
2.30  
5
2.32  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
19000  
µA  
MΩ  
=1.90V  
=2.00V  
=2.10V  
=2.20V  
=2.30V  
=2.40V  
=2.54V  
=2.64V  
=2.82V  
=3.12V  
=3.72V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2000  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
210  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
22  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.3  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.24  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.025  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.009  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
I
10.6  
V
DSX  
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
DS  
DS  
=5.0V, V  
GS  
= +125°C  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V  
=5.0V  
DS  
ISS  
GS  
t
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
9 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810024  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.38  
2.40  
5
2.42  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
20000  
µA  
MΩ  
=2.00V  
=2.10V  
=2.20V  
=2.30V  
=2.40V  
=2.50V  
=2.64V  
=2.74V  
=2.92V  
=3.22V  
=3.82V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2100  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
220  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
23  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.4  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.25  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.026  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.009  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
I
10.6  
V
DSX  
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
GS  
= +125°C  
DS  
DS  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V  
=5.0V  
DS  
ISS  
GS  
t
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
10 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810025  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.48  
2.50  
5
2.52  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
TC  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
21000  
µA  
MΩ  
=2.10V  
=2.20V  
=2.30V  
=2.40V  
=2.50V  
=2.60V  
=2.74V  
=2.84V  
=3.02V  
=3.32V  
=3.92V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2200  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
230  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
24  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.5  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.26  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.027  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.01  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
10.6  
V
DSX  
I
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
DS  
DS  
=5.0V, V  
GS  
= +125°C  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V =5.0V  
DS  
ISS  
GS  
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
t
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
11 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810026  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.58  
2.60  
5
2.62  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
22000  
µA  
MΩ  
=2.20V  
=2.30V  
=2.40V  
=2.50V  
=2.60V  
=2.70V  
=2.84V  
=2.94V  
=3.12V  
=3.42V  
=4.02V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2300  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
240  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
25  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.6  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.27  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.028  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.01  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
I
10.6  
V
DSX  
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
GS  
= +125°C  
DS  
DS  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V  
=5.0V  
DS  
ISS  
GS  
t
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
12 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810027  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.68  
2.70  
5
2.72  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
23000  
µA  
MΩ  
=2.30V  
=2.40V  
=2.50V  
=2.60V  
=2.70V  
=2.80V  
=2.94V  
=3.04V  
=3.22V  
=3.52V  
=4.12V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2400  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
250  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
26  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.7  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.28  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.029  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.01  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
I
10.6  
V
DSX  
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
DS  
DS  
=5.0V, V  
GS  
= +125°C  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V  
=5.0V  
DS  
ISS  
GS  
t
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
13 of 17  
ABSOLUTE MAXIMUM RATINGS  
V+ to V- voltage  
Drain-Source voltage, V  
Gate-Source voltage, V  
Operating Current  
Power dissipation  
15.0V  
10.6V  
10.6V  
80mA  
500mW  
DS  
GS  
Operating temperature range SCL  
Storage temperature range  
Lead temperature, 10 seconds  
0°C to +70°C  
-65°C to +150°C  
+260°C  
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.  
OPERATING ELECTRICAL CHARACTERISTICS  
+
-
V = +5V V = GND T = 25°C unless otherwise specified  
A
ALD810028  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Gate Threshold Voltage  
Offset Voltage  
V
V
2.78  
2.80  
5
2.82  
20  
V
V
V
V
V
V
=V I  
DS; DS(ON)  
=1µA  
=1µA  
t
GS  
mV  
- V or V - V  
t2 t3  
OS  
t1  
t4  
t4  
Offset Voltage Tempco  
Gate Threshold Voltage Tempco  
TC  
5
µV/C  
mV/C  
- V or V - V  
t2 t3  
VOS  
Vt  
t1  
TC  
-2.2  
=V  
=V  
I
DS; DS(ON)  
GS  
GS  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.0001  
24000  
µA  
MΩ  
=2.40V  
=2.50V  
=2.60V  
=2.70V  
=2.80V  
=2.90V  
=3.04V  
=3.14V  
=3.32V  
=3.62V  
=4.22V  
DS(ON)  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.001  
2500  
µA  
MΩ  
V
V
V
V
V
V
V
V
V
V
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
=V  
DS(ON)  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.01  
260  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
0.1  
27  
µA  
MΩ  
DS(ON)  
DS(ON)  
Drain Source On Current  
Drain Source On Resistance  
I
R
1
µA  
MΩ  
DS(ON)  
DS(ON)  
2.8  
Drain Source On Current  
Drain Source On Resistance  
I
R
10  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.29  
Drain Source On Current  
Drain Source On Resistance  
I
R
100  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.030  
Drain Source On Current  
Drain Source On Resistance  
I
R
300  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.01  
Drain Source On Current  
Drain Source On Resistance  
I
R
1000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.003  
Drain Source On Current  
Drain Source On Resistance  
I
R
3000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.001  
Drain Source On Current  
Drain Source On Resistance  
I
R
10000  
µA  
MΩ  
DS(ON)  
DS(ON)  
0.0004  
Drain Source Breakdown Voltage  
Drain Source Leakage Current1  
BV  
10.6  
V
DSX  
I
10  
5
400  
4
pA  
nA  
V
V
=V  
=V  
= +125°C  
=V - 1.0  
t
t
DS (OFF)  
GS  
GS  
DS  
DS  
=V - 1.0,  
T
A
Gate Leakage Current1  
I
200  
1
pA  
nA  
V
V
=5.0V, V  
=0V  
=0V,  
GSS  
GS  
DS  
DS  
=5.0V, V  
GS  
= +125°C  
T
A
Input Capacitance  
Turn-on Delay Time  
Turn-off Delay Time  
C
15  
pF  
V
=0V, V  
=5.0V  
DS  
ISS  
GS  
t
on  
off  
10  
10  
60  
ns  
ns  
dB  
t
Crosstalk  
f = 100KHz  
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
14 of 17  
TYPICAL PERFORMANCE CHARACTERISTICS  
DRAIN-GATE SOURCE VOLTAGE  
vs. DRAIN SOURCE ON CURRENT  
DRAIN-GATE SOURCE VOLTAGE  
vs. DRAIN SOURCE ON CURRENT  
1.0 E-02  
1.0 E-03  
1.0 E-04  
1.0 E-05  
1.0 E-06  
1.0 E-07  
1.0 E-08  
1.0 E-09  
1.0 E-10  
1.0 E-03  
1.0 E-04  
1.0 E-05  
1.0 E-06  
1.0 E-07  
1.0 E-08  
1.0 E-09  
T
A
T
A
= + 25°C  
+70°C  
+85°C  
+25°C  
0°C  
V +0.5 V +0.7  
V +0.3  
t
V +0.3  
t
V +0.2  
V +0.1  
t
V +0.4  
t
V -0.5 V -0.3 V -0.1 V +0.1  
V -0.7  
t t t t  
V -0.3 V -0.2 V -0.1  
V
t
t
t
t
t
t
t
t
DRAIN-GATE SOURCE VOLTAGE  
= V (V)  
DRAIN-GATE SOURCE VOLTAGE  
= V (V)  
V
V
GS  
GS  
DS  
DS  
FORWARD TRANSFER CHARACTERISTICS  
LOW VOLTAGE  
EQUIVALENT ON RESISTANCE vs.  
DRAIN-GATE SOURCE VOLTAGE  
500  
100000.00  
10000.00  
1000.00  
100.00  
10.00  
T
A
= + 25°C  
400  
V
= V  
DS  
GS  
= + 25°C  
T
A
300  
200  
100  
1.00  
0.10  
0.01  
0.001  
0
V
t
+0.2  
V
t
+0.4  
V
t
-0.3  
V
t
-0.1  
V
t
+0.1  
V
t
+0.3  
V
V
t
-0.2  
V
t
t
-0.4  
+0.1 +0.2  
-0.2 -0.1  
-0.3  
0
+0.3 +0.4 +0.5  
DRAIN-GATE SOURCE OVERDRIVE VOLTAGE  
(V = V ) - V (V)  
DRAIN-GATE SOURCE VOLTAGE (V)  
GS  
DS  
t
OFFSET VOLTAGE vs.  
AMBIENT TEMPERATURE  
DRAIN OFF LEAKAGE CURRENT I  
DS(OFF)  
vs. AMBIENT TEMPERATURE  
+10  
+8  
600  
THREE REPRESENTATIVE UNITS  
500  
400  
+6  
+4  
+2  
V
OS  
V
OS  
= V M1 - V M2  
t t  
V
= V = V - 1.0V  
DS t  
GS  
= V M3 - V M4  
t
t
0
-2  
-4  
300  
200  
100  
0
I
DS(OFF)  
-6  
-8  
-10  
-50  
-25  
0
+25  
+50  
+75 +100 +125  
-50  
0
+25  
+50  
+75  
+100 +125  
-25  
AMBIENT TEMPERATURE - T (°C)  
A
AMBIENT TEMPERATURE - T (°C)  
A
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
15 of 17  
TYPICAL PERFORMANCE CHARACTERISTICS (cont.)  
HIGH LEVEL OUTPUT CONDUCTANCE  
vs. GATE THRESHOLD VOLTAGE  
LOW LEVEL OUTPUT CONDUCTANCE  
vs. AMBIENT TEMPERATURE  
0.44  
0.42  
0.44  
0.42  
T = + 25°C  
A
V = V  
GS DS  
V
= V  
DS  
= 1µA  
GS  
I
DS  
I
= 1mA  
DS  
0.40  
0.38  
0.40  
0.38  
0.36  
0.34  
0.36  
0.34  
-50  
-25  
+100 +125  
0
+25  
+50  
+75  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
2.9  
AMBIENT TEMPERATURE - T (°C)  
A
GATE THRESHOLD VOLTAGE - V (V)  
t
HIGH LEVEL OUTPUT CONDUCTANCE  
vs. AMBIENT TEMPERATURE  
LOW LEVEL OUTPUT CONDUCTANCE  
vs. GATE THRESHOLD VOLTAGE  
0.36  
0.35  
0.44  
0.42  
T
= + 25°C  
= V  
A
V
GS  
= 1µA  
DS  
DS  
V = 2.3V to 2.8V  
t
DS  
I
I
= 1mA  
0.40  
0.38  
0.34  
0.33  
0.32  
0.31  
0.36  
0.34  
-50  
-25  
0
+25  
+50  
+75  
+100 +125  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
2.9  
AMBIENT TEMPERATURE - T (°C)  
A
GATE THRESHOLD VOLTAGE - V (V)  
t
LOW LEVEL OUTPUT TRANSCONDUCTANCE  
vs. AMBIENT TEMPERATURE  
120  
TRANSCONDUCTANCE vs.  
GATE THRESHOLD VOLTAGE  
89  
T
V
= + 25°C  
= V  
DS  
A
110  
GS  
= 1µA to 10µA  
88  
87  
I
V = 2.3V to 2.8V  
t
DS  
I
= 1µA to 10µA  
DS  
100  
90  
86  
85  
80  
70  
84  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
2.9  
-50  
-25  
0
+25  
+50  
+75 +100 +125  
GATE THRESHOLD VOLTAGE - V (V)  
t
AMBIENT TEMPERATURE - T (°C)  
A
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
16 of 17  
SOIC-16 PACKAGE DRAWING  
16 Pin Plastic SOIC Package  
E
Millimeters  
Inches  
Dim  
A
Min  
Max  
Min  
Max  
1.75  
0.25  
0.45  
0.25  
10.00  
4.05  
0.053  
0.069  
1.35  
S (45°)  
0.004  
0.014  
0.007  
0.385  
0.140  
0.010  
0.018  
0.010  
0.394  
0.160  
0.10  
0.35  
0.18  
9.80  
3.50  
A
1
b
C
D-16  
E
D
1.27 BSC  
0.050 BSC  
0.224  
e
6.30  
0.937  
8°  
0.248  
0.037  
8°  
5.70  
0.60  
0°  
H
0.024  
0°  
L
A
ø
0.50  
0.010  
0.020  
0.25  
S
A
e
1
b
S (45°)  
C
H
L
ø
ALD810023, ALD810024, ALD810025,  
ALD810026, ALD810027, ALD810028  
Advanced Linear Devices, Inc.  
17 of 17  

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