A1386LLHLT-T [ALLEGRO]
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply Functionality, Analog Output, and Miniature Package Options; 5 V现场可编程线性霍尔效应传感器IC，具有3 V电源的功能，模拟输出和微型包装选项
| 型号： | A1386LLHLT-T |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | 5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply Functionality, Analog Output, and Miniature Package Options |
| 文件： | 总19页 (文件大小：412K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A1386
5 V Field-Programmable Linear Hall Effect Sensor IC
with 3 V Supply Functionality, Analog Output, and Miniature Package Options
Features and Benefits
Description
TheAllegro® A1386 programmable, linear, Hall effect sensor
ICisdesignedforlowpower,highaccuracy,andsmallpackage
size applications. The accuracy of this device is enhanced via
programmabilityontheoutputpinforend-of-lineoptimization
withouttheaddedcomplexityandcostofafullyprogrammable
device.
• Low power consumption using 3 V supply
• Factory programmed sensitivity temperature coefficient
(0.13%/°C nominal)
• Programmability at end-of-line
• Ratiometric sensitivity, quiescent voltage output, and
clamps for interfacing with application DAC
• Temperature-stable quiescent voltage output and sensitivity
• Precise recoverability after temperature cycling
• Output voltage clamps provide short circuit diagnostic
capabilities
• Wide ambient temperature range: –40°C to 150°C
• Resistant to mechanical stress
• Miniature package options
The A1386 has two operating modes, normal and low power.
In normal operation mode the A1386 operates much like its
predecessors,theA1381,A1382,A1383,andA1384,asahighly
accurate,user-programmablelinearsensorICwitharatiometric
output.Inlowpowermode,thedeviceactuallydisengagessome
internal components in order to reduce power consumption.
Although the accuracy of the device is substantially reduced
during low power operation, it remains effective as a detector
ofmagneticregions(suchasnorthandsouthpolesonarotating
ring magnet). This unique feature allows the device to be used
in systems that are put to sleep, during which time there may
be only 3 V available, or in applications that have start-up
conditions where the available supply voltage may drop below
4.5 V for a period of time.
Packages
3-pin ultramini SIP
1.5 mm × 4 mm × 3 mm
(suffix UA)
This ratiometric Hall effect device provides a voltage output
thatisproportionaltotheappliedmagneticfieldovertheentire
Continued on the next page…
Approximate scale
Functional Block Diagram
V+
VCC
Chip Reference
Currents
To all subcircuits
Amp
Out
VOUT
CBYPASS
Hall Drive Circuit
Gain Temperature
Coefficient
Gain
Offset
Trim Control
GND
A1386-DS, Rev. 3
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Description (continued)
2.7 to 5.5 V supply operating region. Both the quiescent voltage Each device contains a BiCMOS monolithic circuit that integrates
output and magnetic sensitivity are user adjustable. The quiescent
voltageoutputcanbesettoapproximately50%ofthesupplyvoltage,
and the sensitivity adjusted between 1.90 and 3.50 mV/G for VCC
= 5 V. The sensitivity temperature coefficient is programmed at the
factory, at 0.13%/°C nominal, to compensate for Neodymium-style
magnets. The features of this linear device make it ideal for the high
accuracy requirements of automotive and industrial applications.
Performance is guaranteed over an extended temperature range,
–40°C to 150°C.
a Hall element, temperature-compensating circuitry to reduce the
intrinsicsensitivitydriftoftheHallelement,asmall-signalhigh-gain
amplifier, a clamped low-impedance output stage, and a proprietary
dynamic offset cancellation technique.
The A1386 device is provided in a 3-pin ultramini single-in-line
package (UAsuffix), and a 3-pin surface mount SOT-23W package
(LH suffix). Both packages are lead (Pb) free, with 100% matte tin
leadframe plating.
Selection Guide
TA
(°C)
Part Number
Packing*
Package
A1386LLHLT-T
A1386LUA-T
Tape and reel, 3000 pieces/reel
Bulk bag, 500 pieces/bag
Surface mount
Through hole
–40 to 150
*Contact Allegro for additional packing options.
Absolute Maximum Ratings
Characteristic
Forward Supply Voltage
Reverse Supply Voltage
Forward Output Voltage
Reverse Output Voltage
Output Source Current
Symbol
Notes
Rating
Units
V
VCC
VRCC
VOUT
VROUT
8
–0.1
V
28
V
–0.1
V
IOUT(SOURCE) VOUT to GND
8
2
mA
mA
ºC
ºC
ºC
Output Sink Current
IOUT(SINK)
TA
VCC to VOUT
Range L
Operating Ambient Temperature
Storage Temperature
–40 to 150
–65 to 165
165
Tstg
Maximum Junction Temperature
TJ(max)
Pin-out Diagrams
LH Package
3
UA Package
Terminal List Table
Number
Name
Description
LH
UA
1
1
VCC
GND
Input power supply; use bypass capacitor to connect to ground
Ground
3
2
1
2
1
2
3
2
3
VOUT Output signal
Allegro MicroSystems, Inc.
115 Northeast Cutoff
2
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
OPERATING CHARACTERISTICS, valid over full operating temperature range, TA; CBYPASS= 0.1 μF, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max. Units1
Electrical Characteristics
VCC(NORM)
VCC(LOWPWR)
tVCC
4.5
2.8
–
–
–
5.5
3.2
10
–
V
V
Supply Voltage
Supply Voltage Turn On Time
–
ms
V
–
4.1
3.7
8.3
6.4
–
VCC(LOWPWR) → VCC(NORM)
Operation Mode Threshold
Voltage2
VTHRESH
VZ
–
–
V
VCC(NORM) → VCC(LOWPWR)
Supply Zener Clamp Voltage
Supply Current
TA = 25°C, ICC = 11 mA
6
–
V
VCC = VCC(NORM) , RL(PULLDWN) = 10 kΩ
VCC = VCC(LOWPWR) , RL(PULLDWN) = 10 kΩ
–
8
mA
mA
ICC
–
4
VCC = VCC(NORM), TA = 25°C, CBYPASS = open,
CL (of test probe) = 4.7 nF
–
–
30
50
–
–
μs
μs
Power-On Time2
tPO
VCC = VCC(LOWPWR), TA = 25°C, CBYPASS = open,
CL (of test probe) = 4.7 nF
Internal Bandwidth
BWi
fC
Small signal –3 dB, 100 G(p-p), magnetic input signal
TA = 25°C
–
–
20
–
–
kHz
kHz
Chopping Frequency3
Output Characteristics
200
VCC = 5 V, TA = 25°C, B = 750 G,
Sens = 3.3 mV/G, RL(PULLDWN) = 10 kꢀ
4.39
2.62
0.39
0.19
–
4.5
2.7
0.5
0.3
18
4.58
2.78
0.58
0.37
–
V
V
VCLP(HIGH)
VCLP(LOW)
VN(p-p)
VCC = 3 V, TA = 25°C, B = 750 G,
Sens = 3.3 mV/G, RL(PULLDWN) = 10 kꢀ
VOUT Voltage Clamp4
VCC = 5 V, TA = 25°C, B = –750 G,
Sens = 3.3 mV/G, RL(PULLDWN) = 10 kꢀ
V
VCC = 3 V, TA = 25°C, B = –750 G,
Sens = 3.3 mV/G, RL(PULLDWN) = 10 kꢀ
V
VCC = VCC(NORM), TA = 25°C, CL = 4.7 nF,
Sens = 3.3 mV/G, no external filter
mV
mV
VOUT Noise (peak to peak)
V
CC = VCC(LOWPWR), TA = 25°C, CL = 4.7 nF,
–
18
–
Sens = 1.75 mV/G, no external filter
VOUT DC Output Resistance
VOUT Load Capacitance
VOUT Load Resistance
ROUT
CL
–
–
< 1
–
–
4.7
–
Ω
VOUT to GND
nF
RL(PULLDWN) VOUT to GND
VCC = VCC(NORM), CL = 4.7 nF
CC = VCC(LOWPWR), CL = 4.7 nF
10
–
–
kΩ
140
50
–
V/ms
V/ms
VOUT Output Slew Rate
SR
V
–
–
Continued on the next page...
Allegro MicroSystems, Inc.
115 Northeast Cutoff
3
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
OPERATING CHARACTERISTICS (continued), valid over full operating temperature range, TA; CBYPASS= 0.1 μF, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max. Units1
Pre-Programming Targets
VCC = 3 V, B = 0 G, TA = 25°C
CC = 5 V, B = 0 G, TA = 25°C
VCC = 3 V, TA = 25°C
CC = 5 V, TA = 25°C
1.34
–
1.53
–
V
Pre-Programming Quiescent
Voltage Output
VOUT(Q)PRE
V
–
–
–
2.5
–
V
1.14
–
mV/G
mV/G
Pre-Programming Sensitivity
SensPRE
V
1.4
Quiescent Voltage Output Programming
Guaranteed Quiescent Voltage
VOUT(Q)
VCC = 5 V, B = 0 G, TA = 25°C
2.4
–
–
5
2.6
–
V
Output Range4,5.6
Quiescent Voltage Output
Programming Bits
bit
Average Quiescent Voltage
Output Step Size7,8
StepVOUT(Q) VCC = 5 V
ErrPGVOUT(Q) VCC = 5 V
12
–
16
18
–
mV
mV
Quiescent Voltage Output
Programming Resolution9
StepVOUT(Q)
× ±0.5
Sensitivity Programming
Guaranteed Sensitivity
Range 4,5,10
Sens
VCC = 5 V, TA = 25°C
1.9
–
3.3
mV/G
Sensitivity Programming Bits
–
6
–
bit
Average Sensitivity Step Size7,8
StepSENS
ErrPGSENS
VCC = 5 V, TA = 25°C
VCC = 5 V, TA = 25°C
30
40
50
μV/G
Sensitivity Programming
Resolution9
StepSENS
× ±0.5
–
–
mV/G
Lock Bit Programming
Overall Programming Lock Bit
LOCK
–
1
–
bit
Factory Programmed Sensitivity Temperature Coefficient
Factory Programmed Sensitivity
Temperature Coefficient Target
TCSENS(TGT) VCC = 5 V, TA = 150°C
–
0.13
–
–
%/°C
%/°C
Factory Programmed Sensitivity
Temperature Coefficient Range11
TCSENS
0.10
0.16
Error Components
VCC = VCC(NORM)
CC = VCC(LOWPWR)
–
–
–
–
–
–
–
–
–
–
±1.5
±2
–
–
–
–
–
–
–
–
–
–
%
%
%
%
%
%
%
%
%
%
Linearity Sensitivity Error2
LinERR
SymERR
V
VCC = VCC(NORM)
±1.5
±2
Symmetry Sensitivity Error2
VCC = VCC(LOWPWR)
VCC = VCC(NORM)
±1.5
±2.5
±1.5
±2.5
±1.5
±2.5
Ratiometry Quiescent Voltage
Output Error2,12
RatERRVOUT(Q)
RatERRSENS
RatERRCLP
VCC = VCC(LOWPWR)
VCC = VCC(NORM)
Ratiometry Sensitivity Error2,13
Ratiometry Clamp Error2,13
VCC = VCC(LOWPWR)
VCC = VCC(NORM) , TA = 25°C
V
CC = VCC(LOWPWR) , TA = 25°C
Continued on the next page...
Allegro MicroSystems, Inc.
115 Northeast Cutoff
4
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
OPERATING CHARACTERISTICS (continued), valid over full operating temperature range, TA; CBYPASS= 0.1 μF, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max. Units1
Drift Characteristics
VCC = VCC(NORM), Sens = 3.3 mV/G, TA = 25°C to 150°C
–
–
–
–
–
±35
–
mV
mV
%
Quiescent Voltage Output Drift
Through Temperature Range2
∆VOUT(Q)
V
CC = VCC(LOWPWR), Sens = 1.75 mV/G, TA = 25°C to 150°C
VCC = VCC(NORM)
CC = VCC(LOWPWR)
±35
±3
–
Maximum Sensitivity Drift
ThroughTemperatureRange14,15
∆SensTC
V
±5
–
%
Sensitivity Drift Due to Package
Hysteresis2,15
∆SensPKG
TA = 25°C; after temperature cycling
–
±2
–
%
11G (gauss) = 0.1 mT (millitesla).
2See Characteristic Definitions section.
3fC varies up to approximately ± 20% over the full operating ambient temperature range, TA, and process.
4Sens, VOUT(Q), VCLP(LOW) , and VCLP(HIGH) scale with VCC due to ratiometry.
5For optimal device accuracy in the VCC(NORM) operating range, the device should be programmed with VCC = 5 V.
6VOUT(Q)(max) is the value available with all programming fuses blown (maximum programming code set). The VOUT(Q) range is the total range from
VOUT(Q)init up to and including VOUT(Q)(max). See Characteristic Definitions section.
7Step size is larger than required, to account for manufacturing spread. See Characteristic Definitions section.
8Non-ideal behavior in the programming DAC can cause the step size at each significant bit rollover code to be greater than twice the maximum
specified value of StepVOUT(Q) or StepSENS
.
9Overall programming value accuracy. See Characteristic Definitions section.
10Sens(max) is the value available with all programming fuses blown (maximum programming code set). Sens range is the total range from Sensinit up
to and including Sens(max). See Characteristic Definitions section.
11Factory programmed at 150°C and calculated relative to 25°C.
12Percent change from actual value at VCC = 3 V or VCC = 5 V, for a given temperature, over the guaranteed supply voltage operating range.
13Percent change from actual value at VCC = 3 V or VCC = 5 V, with TA = 25°C, over the guaranteed supply voltage operating range.
14Sensitivity drift from expected value of VOUT at TA , after programming TCSENS. See Characteristic Definitions section.
15Guaranteed by design only. Parameter is not tested in production flow.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
5
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Value Units
Package LH, 1-layer PCB with copper limited to solder pads
228 ºC/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side
connected by thermal vias
RθJA
Package Thermal Resistance
110
ºC/W
Package UA, 1-layer PCB with copper limited to solder pads
165 ºC/W
*Additional thermal information available on Allegro website.
Power Derating Curve
6
5
4
3
2
1
0
V
CC(max)
1-layer PCB, Package LH
(RQJA = 228 ºC/W)
V
CC(min)
1-layer PCB, Package UA
(RQJA = 165 ºC/W)
2-layer PCB, Package LH
(RQJA = 110 ºC/W)
20
40
60
80
100
120
140
160
180
Temperature (ºC)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
20
40
60
80
100
120
140
160
180
Temperature (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Characteristic Definitions
Supply Voltage Turn On Time To ensure that the internal compo- in figure 1. At the initial power up, the device remains in the
Low Power operating mode until reaching the VCC(LOWPWR)
VCC(NORM) VTHRESH voltage.
→
nents of the A1386 device are initialized to their proper values,
the supply voltage, VCC, must be powered up within a specified
time interval. Supply Voltage Turn On Time, tVCC, is defined as
the time it takes for the supply voltage to transition from 10% to
90% of its steady state value.
Power-On Time When the supply is ramped to its operating volt-
age, the device requires a finite time to power its internal com-
ponents before responding to an input magnetic field. Power-On
Time, tPO, is defined as: the time it takes for the output voltage
to settle within ±10% of its steady state value under an applied
magnetic field, after the power supply has reached its minimum
specified operating voltage, VCC(min), as shown in figure 2.
Operating Mode Threshold The A1386 has two modes of
operation, Normal and Low Power. In Low Power mode, certain
components of the device are disengaged to limit the current con-
sumption of the device. As a result, the overall device accuracy is
limited. In Normal mode, all components are fully functional.
Quiescent Voltage Output In the quiescent state (no significant
magnetic field: B = 0 G), the output, VOUT(Q), has a constant
ratio to the supply voltage, VCC , throughout the entire operating
ranges of VCC and ambient temperature, TA.
The VCC supply level is used by the device to determine the mode
of operation. The threshold voltage, VTHRESH , is the VCC thresh-
old voltage required to switch from Low Power operation to
Normal operation (VCC(LOWPWR) → VCC(NORM)) or from Normal
operation to Low Power operation (VCC(NORM) → VCC(LOWPWR)).
A region of hysteresis exists between the Normal VCC opera-
Guaranteed Quiescent Voltage Output Range The quiescent
voltage output, VOUT(Q), can be programmed around its nominal
value of 2.5 V, within the guaranteed quiescent voltage range lim-
tional range and the Low Power VCC operational range, as shown its, VOUT(Q)(min) and VOUT(Q)(max). The available guaranteed
Initial power-up operating mode
V
VCC
VCC(typ.)
VOUT
90% VOUT
VCC(min.)
tPO
t1
t2
t1= time at which power supply reaches
minimum specified operating voltage
t2= time at which output voltage settles
within ±10% of its steady state value
under an applied magnetic field
0
+t
2.7
5.5
V
THRESH
Power-On Time
V
(V)
CC
Figure 1. Operating Mode relationship to VCC, with VCC shown over the
full operating range
Figure 2. VCC and VOUT during power-on time interval
Allegro MicroSystems, Inc.
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
programming range for VOUT(Q) falls within the distributions of
the initial, VOUT(Q)init, and the maximum programming code for
setting VOUT(Q), as shown in figure 3.
Sensitivity The presence of a south polarity magnetic field, per-
pendicular to the branded surface of the package face, increases
the output voltage from its quiescent value toward the supply
voltage rail. The amount of the output voltage increase is propor-
tional to the magnitude of the magnetic field applied. Conversely,
the application of a north polarity field decreases the output
voltage from its quiescent value. This proportionality is specified
as the magnetic sensitivity, Sens (mV/G), of the device, and it is
defined as:
Average Quiescent Voltage Output Step Size The average qui-
escent voltage output step size for a single device is determined
using the following calculation:
VOUT(Q)maxcode –VOUT(Q)init
.
StepVOUT(Q)
=
(1)
2n–1
where:
n is the number of available programming bits in the trim range,
2n–1 is the value of the maximum programming code in the
range, and
VOUT(BPOS) – VOUT(BNEG)
Sens
,
(4)
=
BPOS – BNEG
VOUT(Q)maxcode is the quiescent voltage output at code 2n–1.
where BPOS and BNEG are two magnetic fields with opposite
polarities.
Quiescent Voltage Output Programming Resolution The
programming resolution for any device is half of its programming
step size. Therefore, the typical programming resolution will be:
Sensitivity Temperature Coefficient Device sensitivity changes
as temperature changes, with respect to its programmed sensitiv-
ity temperature coefficient, TCSENS. TCSENS is programmed at
150°C, and calculated relative to the nominal sensitivity program-
ming temperature of 25°C. TCSENS (%/°C) is defined as:
ErrPGVOUT(Q)(typ)
= 0.5 × StepVOUT(Q)(typ)
.
(2)
Quiescent Voltage Output Drift Through Temperature Range
Due to internal component tolerances and thermal considerations,
the quiescent voltage output, VOUT(Q), may drift from its nominal
value over the operating ambient temperature, TA. For purposes
of specification, the Quiescent Voltage Output Drift Through
Temperature Range, ∆VOUT(Q) (mV), is defined as:
⎛
⎞ ⎛
⎞
SensT2 – SensT1
1
(5)
⎜
⎜
⎟ ⎜
100%
⎟
⎟
TCSens
,
=
×
⎟ ⎜
SensT1
T2–T1
⎝
⎠ ⎝
⎠
where T1 is the nominal Sens programming temperature of 25°C,
and T2 is the TCSENS programming temperature of 150°C. The
expected value of Sens over the full ambient temperature range,
SensEXPECTED(TA), is defined as:
∆VOUT(Q)
VOUT(Q)(TA) –VOUT(Q)(25°C)
.
=
(3)
VOUT(Q) should be calculated using the actual measured values
of VOUT(Q)(TA) and VOUT(Q)(25°C) , rather than programming target
values.
SensEXPECTED(TA) Sens
[100% +TCSENS (TA –T1)]
.
=
(6)
T1
SensEXPECTED(TA) should be calculated using the actual measured
values of SensT1 and TCSENS rather than programming target
values.
VOUT(Q)init(typ)
Sensitivity Drift Through Temperature Range Second order
sensitivity temperature coefficient effects cause the magnetic sen-
sitivity, Sens, to drift from its expected value over the operating
ambient temperature range, TA. For purposes of specification, the
sensitivity drift through temperature range, ∆SensTC, is defined as:
Guaranteed Output
Programming
Range, VOUT(Q)
Distribution for
VOUT(Q)init
SensTA – SensEXPECTED(TA)
Distribution for
∆SensTC
.
100%
=
Max Code VOUT(Q)
×
(7)
SensEXPECTED(TA)
VOUT(Q)(min)
VOUT(Q)(max)
Sensitivity Drift Due to Package Hysteresis Package stress and
relaxation can cause the device sensitivity at TA = 25°C to change
during and after temperature cycling.
Figure 3. Relationship of the guaranteed quiescent output voltage and
overall VOUT(Q) values.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
8
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
For purposes of specification, the sensitivity drift due to package
Symmetry error, SymERR (%), is measured and defined as:
hysteresis, ∆SensPKG, is defined as:
⎛
SensBPOS
SensBNEG
⎞
⎜
⎟
⎟
Sens(25°C)2 – Sens(25°C)1
1–
SymERR
,
100%
=
×
(12)
⎜
(8)
,
100%
∆SensPKG
=
×
⎝
⎠
Sens(25°C)1
where SensBx is as defined in equation 10, and BPOS and BNEG
are positive and negative magnetic fields such that |BPOS| = |BNEG|.
where Sens(25°C)1 is the programmed value of sensitivity
at TA = 25°C, and Sens(25°C)2 is the value of sensitivity at
TA = 25°C, but after temperature cycling TA up to 150°C, down to
–40°C, and back to up 25°C.
Ratiometry Error The A1386 device features a ratiometric
output. This means that the quiescent voltage output, VOUT(Q)
,
Linearity Sensitivity Error The A1386 is designed to provide
a linear output in response to a ramping applied magnetic field.
Consider two magnetic fields, B1 and B2. Ideally, the sensitivity
of a device is the same for both fields, for a given supply voltage
and temperature. Linearity error is present when there is a differ-
ence between the sensitivities measured at B1 and B2.
magnetic sensitivity, Sens, and clamp voltages, VCLP(HIGH) and
VCLP(LOW), are proportional to the supply voltage, VCC. In other
words, when the supply voltage increases or decreases by a
certain percentage, each characteristic also increases or decreases
by the same percentage. Error is the difference between the
measured change in the supply voltage relative to 5 V, and the
measured change in each characteristic.
Linearity Error is calculated separately for the positive
(LinERRPOS) and negative (LinERRNEG) applied magnetic fields.
Linearity error (%) is measured and defined as:
The ratiometric error in quiescent voltage output, RatERRVOUT(Q)
(%), for a given supply voltage, VCC, is defined as:
⎛
⎜
⎝
SensBPOS2
SensBPOS1
⎞
⎜
⎟
⎟
1–
LinERRPOS
,
,
=
=
100%
100%
×
×
⎠
⎛
VOUT(Q)(VCC) / VOUT(Q)(5V)
⎞
⎜
⎟
⎟
1–
RatERRVOUT(Q)
.
100%
=
×
(13)
⎜
SensBNEG2
⎛
⎞
VCC / 5 V
⎝
⎠
⎜
⎟
1–
LinERRNEG
(9)
⎜
⎟
SensBNEG1
⎝
⎠
The ratiometric error in magnetic sensitivity, RatERRSens (%), for
a given supply voltage, VCC, is defined as:
where:
|VOUT(Bx)
V
|
–
OUT(Q)
⎛
Sens(VCC) / Sens(5V)
⎞
(10)
SensBx
,
=
Bx
⎜
⎟
⎟
1–
RatERRSens
.
100%
=
×
(14)
⎜
VCC / 5 V
⎝
⎠
and BPOSx and BNEGx are positive and negative magnetic fields,
with respect to the quiescent voltage output such that
|BPOS2| > |BPOS1| and |BNEG2| > |BNEG1|. Then:
The ratiometric error in the clamp voltages, RatERRCLP (%), for a
given supply voltage, VCC, is defined as:
LinERR max(LinERRPOS , LinERRNEG
)
.
=
(11)
⎛
VCLP(VCC) / VCLP(5V)
⎞
⎜
⎟
⎟
1–
RatERRCLP
.
100%
=
×
(15)
⎜
Symmetry Sensitivity Error The magnetic sensitivity of the
A1386 device is constant for any two applied magnetic fields of
equal magnitudes and opposite polarities.
VCC / 5 V
⎝
⎠
where VCLP is either VCLP(HIGH) or VCLP(LOW)
.
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
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A1386
Typical Application Drawing
V+
VCC
VOUT
CL
CBYPASS
GND
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
at base band, while the DC offset becomes a high-frequency
switchpoint accuracy is the small signal voltage developed across signal. The magnetic-sourced signal then can pass through a
the Hall element. This voltage is disproportionally small relative
to the offset that can be produced at the output of the Hall ele-
ment. This makes it difficult to process the signal while main-
taining an accurate, reliable output over the specified operating
low-pass filter, while the modulated DC offset is suppressed. The
chopper stabilization technique uses a 200 kHz high frequency
clock. For the demodulation process, a sample and hold technique
is used, where the sampling is performed at twice the chop-
temperature and voltage ranges. Chopper stabilization is a unique per frequency (400 kHz). This high-frequency operation allows
approach used to minimize Hall offset on the chip. The patented a greater sampling rate, which results in higher accuracy and
Allegro technique, namely Dynamic Quadrature Offset Cancella- faster signal-processing capability. This approach desensitizes
tion, removes key sources of the output drift induced by thermal
and mechanical stresses. This offset reduction technique is based
on a signal modulation-demodulation process. The undesired
offset signal is separated from the magnetic field-induced signal
in the frequency domain, through modulation. The subsequent
demodulation acts as a modulation process for the offset, causing
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall output
voltages and Precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
the magnetic field-induced signal to recover its original spectrum and-hold circuits.
Regulator
Clock/Logic
Low-Pass
Filter
Hall Element
Amp
Chopper Stabilization Technique
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Programming Guidelines
Overview
Definition of Terms
Register. The section of the programming logic that controls the
choice of programmable modes and parameters.
Programming is accomplished by sending a series of input volt-
age pulses serially through the VOUT pin of the device. A unique
combination of different voltage level pulses controls the internal
programming logic of the device to select a target programmable
parameter and change its value. There are two programming
pulses, referred to as a high voltage pulse, VPH, consisting of a
VP(LOW) –VP(HIGH) –VP(LOW) sequence and a mid voltage pulse,
VPM, consisting of a VP(LOW) –VP(MID) –VP(LOW) sequence.
Bit Field. The internal fuses unique to each register, represented
as a binary number. Incrementing the bit field of a particular
register causes its programmable parameter to change, based on
the internal programming logic.
Key. A series of VPM voltage pulses used to select a register, with
a value expressed as the decimal equivalent of the binary value.
The LSB of a register is denoted as key 1, or bit 0.
The A1386 features Try mode, Blow mode, and Lock mode:
• In Try mode, the value of a single programmable parameter may
be set and measured. The parameter value is stored temporarily,
and resets after cycling the supply voltage. Note that other
parameters cannot be accessed simultaneously in this mode.
• In Blow mode, the value of a single programmable parameter
may be permanently set by blowing solid-state fuses internal to
the device. Additional parameters may be blown sequentially.
• In Lock mode, a device-level fuse is blown, blocking the further
programming of all parameters.
Code. The number used to identify the combination of fuses
activated in a bit field, expressed as the decimal equivalent of the
binary value. The LSB of a bit field is denoted as code 1, or bit 0.
Addressing. Incrementing the bit field code of a selected register
by serially applying a pulse train through the VOUT pin of the
device. Each parameter can be measured during the addressing
process, but the internal fuses must be blown before the program-
ming code (and parameter value) becomes permanent.
Fuse Blowing. Applying a VPH voltage pulse of sufficient dura-
tion at the VP(HIGH) level to permanently set an addressed bit by
blowing a fuse internal to the device. Once a bit (fuse) has been
blown, it cannot be reset.
The programming sequence is designed to help prevent the
device from being programmed accidentally; for example, as a
result of noise on the supply line.
Although any programmable variable power supply can be used
to generate the pulse waveforms, Allegro highly recommends
using the Allegro Sensor Evaluation Kit, available on the Allegro
website On-line Store. The manual for that kit is available for
download free of charge, and provides additional information on
programming these devices.
Blow Pulse. A VPH voltage pulse of sufficient duration at the
VP(HIGH) level to blow the addressed fuse.
Cycling the Supply. Powering-down, and then powering-up the
supply voltage. Cycling the supply is used to clear the program-
ming settings in Try mode.
Programming Pulse Requirements, Protocol at TA = 25°C
Characteristic
Symbol
VP(LOW)
VP(MID)
Notes
Min. Typ. Max. Units
-
-
5.5
16
28
V
V
V
Programming Voltage
Measured at the VOUT pin.
14
26
15
27
VP(HIGH)
Minimum supply current required to ensure proper fuse blowing. In addition, a min-
imum capacitance, CBLOW = 0.1 μF, must be connected between the VOUT and
GND pins during programming to provide the current necessary for fuse blowing.
Programming Current
Pulse Width
IP
300
-
-
mA
tOFF(HIGH)
tOFF(MID)
Duration at VP(LOW) level following a VP(HIGH) level.
Duration at VP(LOW) level following a VP(MID) level.
30
5
-
-
-
-
-
-
-
-
μs
μs
μs
μs
μs
μs
μs
-
tACTIVE(HIGH) Duration of VP(HIGH) level for VPH pulses during key/code selection.
tACTIVE(MID) Duration of VP(MID) level for VPH pulses during key/code selection.
30
15
30
1
-
-
tBLOW
tPr
Duration at VP(HIGH) level for fuse blowing.
-
Pulse Rise Time
Pulse Fall Time
Rise time required for transitions from VP(LOW) to either VP(MID) or VP(HIGH)
.
100
100
tPf
Fall time required for transitions from VP(HIGH) to either VP(MID) to VP(LOW)
.
1
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
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Programming Procedures
When addressing the bit field, the number of VPM pulses is rep-
resented by a decimal number called a code. Addressing activates
Parameter Selection
Each programmable parameter can be accessed through a specific
register. To select a register, a sequence of voltage pulses con-
sisting of a VPH pulse, a series of VPM pulses, and a VPH pulse
(with no VCC supply interruptions) must be applied serially to
the VOUT pin. The number of VPM pulses is called the key, and
uniquely identifies each register. The pulse train used for selec-
tion of the first register, key 1, is shown in figure 4.
the corresponding fuse locations in the given bit field by incre-
menting the binary value of an internal DAC. The value of the bit
field (and code) increments by one with the falling edge of each
VPM pulse, up to the maximum possible code (see the Program-
ming Logic table). As the value of the bit field code increases, the
value of the programmable parameter changes.
Measurements can be taken after each pulse to determine if the
desired result for the programmable parameter has been reached.
Cycling the supply voltage resets all the locations in the bit field
that have unblown fuses to their initial states.
The A1386 has two registers that select among the three program-
mable parameters:
• Register 1:
Sensitivity, Sens
• Register 2:
Quiescent voltage output, VOUT(Q)
Overall device locking, LOCK
Fuse Blowing
After the required code is found for a given parameter, its value
can be set permanently by blowing individual fuses in the appro-
priate register bit field. Blowing is accomplished by applying
a VPH pulse, called a blow pulse, of sufficient duration at the
VP(HIGH) level to permanently set an addressed bit by blowing a
fuse internal to the device. Due to power requirements, the fuse
for each bit in the bit field must be blown individually. To accom-
plish this, the code representing the desired parameter value
Bit Field Addressing
After a programmable parameter has been selected, a VPH pulse
transitions the programming logic into the bit field address-
ing state. Applying a series of VPM pulses to the VOUT pin of
the device, as shown in figure 5, increments the bit field of the
selected parameter.
V+
V+
VP(HIGH)
VP(HIGH)
VP(MID)
VP(MID)
VP(LOW)
0
VP(LOW)
tLOW
tACTIVE
0
Figure 4. Parameter selection pulse train. This shows the sequence for sel-
ecting the register corresponding to key 1, indicated by a single VPM pulse.
Figure 5. Bit field addressing pulse train. Addressing the bit field by
incrementing the code causes the programmable parameter value to
change. The number of bits available for a given programming code, n,
varies among parameters; for example, the bit field for VOUT(Q) has 6 bits
available, which allows 63 separate codes to be used.
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
must be translated to a binary number. For example, as shown
in figure 6, decimal code 5 is equivalent to the binary number
101. Therefore bit 2 (code 4) must be addressed and blown, the
device power supply cycled, and then bit 0 (code 1) addressed
and blown. An appropriate sequence for blowing code 5 is shown
in figure 7. The order of blowing bits, however, is not important.
Blowing bit 0 first, and then bit 2 is acceptable.
Locking the Device
After the desired code for each parameter is programmed, the
device can be locked to prevent further programming of any
parameters.
Additional Guidelines
The additional guidelines in this section should be followed to
ensure the proper behavior of these devices:
Note: After blowing, the programming is not reversible, even
after cycling the supply power. Although a register bit field fuse
cannot be reset after it is blown, additional bits within the same
register can be blown at any time until the device is locked. For
example, if bit 1 (binary 10) has been blown, it is still possible to
blow bit 0. The end result would be binary 11 (decimal code 3).
• A 0.1 μF blowing capacitor, CBLOW, must be mounted between
the VOUT pin and the GND pin during programming, to ensure
enough current is available to blow fuses.
• The CBLOW blowing capacitor must be replaced in the final
application with a suitable CL. (The maximum load capacitance
is 10 nF for proper operation.)
Bit Field Selection
Address Code Format
(Decimal Equivalent)
Code 5
• The power supply used for programming must be capable of
delivering at least 26 V and 300 mA.
(Binary)
Code in Binary
1
0 1
• Be careful to observe the tLOW delay time before powering
down the device after blowing each bit.
Fuse Blowing
Target Bits
Bit 2
Bit 0
• The following programming order is recommended:
Fuse Blowing
Address Code Format
Code 4
(Decimal Equivalents)
Code 1
1. Sens
2. VOUT(Q)
3. LOCK (only after all other parameters have been pro-
grammed and validated, because this prevents any further
programming of the device)
Figure 6. Example of code 5 broken into its binary components, which are
code 4 and code 1.
V+
VP(HIGH)
VP(MID)
VP(LOW)
Register
Register
Blow
(Code 1 in
Key 1)
Blow
(Code 4 in
Key 1)
Addressing
(Code 4)
Selection
Selection
(Key 1)
(Key 1)
0
tBLOW
Addressing
(Code 1)
VCC = 0 V
VCC = 0 V
VCC = 0 V
Programming of Code 5 in Key 1
Figure 7. Example of programming pulses applied to the VOUT pin that
result in permanent parameter settings. In this example, the register
corresponding to key 1 is selected and code 5 is addressed and blown.
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
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A1386
Programming Modes
Try Mode
Blow Mode
Try mode allows a single programmable parameter to be tested
After the required value of the programmable parameter is found
without permanently setting its value. Multiple parameters cannot using Try mode, its corresponding code should be blown to make
be tested simultaneously in this mode. After powering the VCC
supply, select the desired parameter register and address its bit
field. When addressing the bit field, each VPM pulse increments
the value of the parameter register, up to the maximum possible
code (see Programming Logic table). The addressed parameter
value remains stored in the device even after the programming
drive voltage is removed from the VOUT pin, allowing the value
to be measured. Note that for accurate time measurements, the
blow capacitor, CBLOW, should be removed during output voltage
measurement.
its value permanent. To do this, select the required parameter
register, and address and blow each required bit separately (as
described in the Fuse Blowing section). The supply must be
cycled between blowing each bit of a given code. After a bit is
blown, cycling the supply will not reset its value.
Lock Mode
To lock the device, address the LOCK bit and apply a blow pulse
with CBLOW in place. After locking the device, no future pro-
gramming of any parameter is possible.
It is not possible to decrement the value of the register without
resetting the parameter bit field. To reset the bit field, and thus the
value of the programmable parameter, cycle the supply (VCC) voltage.
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
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Programming State Machine
Power-Up
VPM
Initial
VPH
Parameter Selection
VPH
VPM
VPM
VPM
VOUT(Q),
LOCK
Sens
VPH
Bit Field Addressing
VPM
2n – 1
n = total
bits in
VPM
VPM
VPM
VPM
1
2
3
register
VPH
Fuse Blowing
VPM = VP(LOW) , VP(MID) , VP(LOW)
VPH = VP(LOW) , VP(HIGH) , VP(LOW)
User Power-Down
Required
Initial State After system power-up, the programming logic is
reset to a known state. This is referred to as the Initial state. All
the bit field locations that have intact fuses are set to logic 0.
While in the Initial state, any VPM pulses on the VOUT pin are
ignored. To enter the Parameter Selection state, apply one VPH
pulse on the VOUT pin.
Bit Field Addressing State This state allows the selection of the
individual bit fields to be programmed in the selected parameter
register (see Programming Logic table). To leave this state, either
cycle device power or blow the fuses for the selected code. Note
that merely addressing the bit field does not permanently set
the value of the selected programming parameter; fuses must be
blown to do so.
Parameter Selection State This state allows the selection of the
parameter register containing the bit fields to be programmed. To
select a parameter register, increment through the keys by apply-
ing VPM pulses on the VOUT pin. Register keys select among the
following programming parameters:
Fuse Blowing State To blow an addressed bit field, apply a
VPH pulse on the VOUT pin. Power to the device should then be
cycled before additional programming is attempted. Note: Each
bit representing a decimal code must be blown individually (see
the Fuse Blowing section).
• 1 pulse - Sens
• 2 pulses - VOUT(Q) and LOCK
To enter the Bit Field Addressing state, apply one VPH pulse on
the VOUT pin.
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
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A1386
Programming Logic Table
Bit Field Address
Programmable
Parameter
(Register Key)
Description
Binary Format
[MSB → LSB]
Decimal Equivalent
Code
000000
0
63
0
Initial value (Sensinit
)
Sens
(1)
111111
Maximum value of sensitivity (Sens) in range
000000
Initial value (VOUT(Q)init)
Maximum value of quiescent voltage output
(VOUT(Q)) in range; B = 0 G
V
OUT(Q), LOCK
011111
100000
31
32
(2)
LOCK bit, enables permanent locking of all pro-
gramming bit fields in the device
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Package LH, 3 Pin; (SOT-23W)
+0.12
–0.08
2.98
3
D
1.49
+4°
–0°
4°
A
+0.020
–0.053
0.180
D
0.96
D
+0.10
2.90
+0.19
–0.06
2.40
1.91
–0.20
0.70
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
PCB Layout Reference View
Seating Plane
Gauge Plane
B
Branded Face
8X 10° REF
1.00 ±0.13
+0.10
NNT
1
0.05
–0.05
C
Standard Branding Reference View
0.95 BSC
0.40 ±0.10
N = Last two digits of device part number
T = Temperature code
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Active Area Depth, 0.28 mm REF
A
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
D
Branding scale and appearance at supplier discretion
Hall element, not to scale
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Package UA, 3-Pin SIP
+0.08
4.09
–0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44
E
E
Mold Ejector
Pin Indent
+0.08
–0.05
2X10°
3.02
NNT
45°
Branded
Face
1
Standard Branding Reference View
D
A
= Supplier emblem
N = Last two digits of device part number
T = Temperature code
1.02
MAX
0.79 REF
0.51
REF
1
2
3
For Reference Only; not for tooling use (reference DWG-9013)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
14.99 ±0.25
+0.03
–0.06
0.41
Dambar removal protrusion (6X)
A
B
C
D
Gate and tie bar burr area
Active Area Depth, 0.50 mm REF
Branding scale and appearance at supplier discretion
E
Hall element, not to scale
+0.05
–0.07
1.27 NOM
0.43
Please note that there are changes to the existing UA package drawing pending.
Please contact the Allegro Marketing department for additional information.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
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5 V Field-Programmable Linear Hall Effect Sensor IC with 3 V Supply
Functionality Analog Output, and Miniature Package Options
A1386
Copyright ©2009, Allegro MicroSystems, Inc.
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per-
mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
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