A3989 [ALLEGRO]
Bipolar Stepper and High Current DC Motor Driver; 双极步进及高电流直流电动机驱动器
| 型号： | A3989 |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Bipolar Stepper and High Current DC Motor Driver |
| 文件： | 总12页 (文件大小：1097K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A3989
Bipolar Stepper and High Current DC Motor Driver
Features and Benefits
▪ꢀ 36ꢀVꢀoutputꢀrating
Description
The A3989 is designed operate at voltages up to 36 V while driving
one bipolar stepper motor, at currents up to 1.2A, and one dc motor,
at currents up to 2.4 A. The A3989 includes a fixed off-time pulse
width modulation (PWM) regulator for current control. The stepper
motor driver features dual 2-bit nonlinear DACs (digital-to-analog
converters) that enable control in full, half, and quarter steps. The
dc motor is controlled using standard PHASE and ENABLE signals.
Fast or slow current decay is selected via the MODE pin. The PWM
current regulator uses the Allegro® patented mixed decay mode for
reduced audible motor noise, increased step accuracy, and reduced
power dissipation.
▪ꢀ 2.4ꢀAꢀdcꢀmotorꢀdriver
▪ꢀ 1.2ꢀAꢀbipolarꢀstepperꢀdriver
▪ꢀ Synchronousꢀrectification
▪ꢀ Internalꢀundervoltageꢀlockoutꢀ(UVLO)
▪ꢀ Thermalꢀshutdownꢀcircuitry
▪ꢀ Crossover-currentꢀprotection
▪ꢀ VeryꢀthinꢀprofileꢀQFNꢀpackage
Internal synchronous rectification control circuitry is provided to
improve power dissipation during PWM operation.
Package: 36 pin QFN with exposed thermal pad
0.90 mm nominal height (suffix EV)
Protection features include thermal shutdown with hysteresis,
undervoltage lockout (UVLO) and crossover current protection.
Special power up sequencing is not required.
The A3989 is supplied in a leadless 6 mm × 6 mm × 0.9 mm,
36 pin QFN package with exposed power tab for enhanced thermal
performance. The package is lead (Pb) free, with 100% matte tin
leadframe plating.
Approximate scale 1:1
0.1 µF
50 V
0.1 µF
50 V
100 µF
50 V
0.22 µF
50 V
CP1 CP2 VCP VBB VBB
VDD
OUT1A
OUT1B
SENSE1
PHASE1
I01
A3989
I11
OUT2A
Microcontroller or
Controller Logic
PHASE2
I02
OUT2B
SENSE2
I12
PHASE3
ENABLE
MODE
VREF1
VREF2
VREF3
OUT3A
OUT3A
OUT3B
OUT3B
SENSE3
SENSE3
GND GND
Figure 1. Typical application circuit
A3989DS
A3989
Bipolar Stepper and High Current DC Motor Driver
Selection Guide
Part Number
Packing
A3989SEV-T
61 pieces per tube
1500 pieces per reel
A3989SEVTR-T
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Supply Voltage
Symbol
Notes
Rating
-0.5 to 36
38
Units
V
VBB
VDD
Pulsed tw < 1 µs
V
–0.4 to 7
1.ꢀ
V
Stepper motor driver, continuous
Stepper motor driver, pulsed tw < 1µs
Dc motor driver, continuous
A
ꢀ.8
A
Output Current*
IOUT
ꢀ.4
A
Dc motor driver, pulsed tw < 1µs
3.5
A
Logic Input Voltage Range
SENSEx Pin Voltage
VIN
–0.3 to 7
0.5
V
V
VSENSEx
Pulsed tw < 1µs
Range S
ꢀ.5
V
VREFx Pin Voltage
VREFx
TA
ꢀ.5
V
Operating Temperature Range
Junction Temperature
–ꢀ0 to 85
150
ºC
ºC
ºC
TJ(max)
Tstg
Storage Temperature Range
–55 to 150
* May be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a
Junction Temperature of 150°C.
Thermal Characteristics (may require derating at maximum conditions)
Characteristic
Symbol
Test Conditions
Min. Units
RθJA
Package Thermal Resistance
EV package, 4 layer PCB based on JEDEC standard
ꢀ7 ºC/W
Power Dissipation versus Ambient Temperature
5500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
EV Package
4-layer PCB
(RQJA = 27 ºC/W)
0
25
50
75
100
125
150
175
Temperature (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
ꢀ
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Functional Block Diagram
0.1 µF
50 V
0.1 µF
50 V
To
VBB2
100 µF
50 V
0.22 µF
50 V
VBB1
VDD
DMOS
Full Bridge 1
OSC
CHARGE PUMP
VCP
OUT1A
OUT1B
PHASE1
I01
I11
Control Logic
Stepper Motor
PHASE2
I02
SENSE1
GATE
DRIVE
RS1
VBB1
DMOS
I12
Full Bridge 2
Sense1
PWM Latch
BLANKING
VREF1
VREF2
3
OUT2A
OUT2B
3
PWM Latch
BLANKING
Sense 2
VCP
PHASE3
ENABLE
MODE
Sense 2
Sense 3
SENSE2
Control Logic
DC Motor
RS2
GATE
DRIVE
OUT3A
OUT3A
OUT3B
OUT3B
SENSE3
SENSE3
Sense 3
3
DMOS
Full Bridge 3
PWM Latch
BLANKING
VREF3
RS3
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
ELECTRICAL CHARACTERISTICS1, valid at TA = 25 °C, VBB = 36 V, unless otherwise noted
Characteristics
Load Supply Voltage Range
Logic Supply Voltage Range
VDD Supply Current
Symbol
VBB
Test Conditions
Min.
8.0
3.0
–
Typ.ꢀ
–
Max.
36
Units
V
Operating
Operating
VDD
–
5.5
10
V
IDD
7
mA
mΩ
mΩ
mΩ
mΩ
V
Source driver, IOUT = –1.ꢀ A, T = ꢀ5°C
–
350
350
700
700
–
450
450
800
800
1.ꢀ
ꢀ0
J
Output On Resistance (dc motor driver)
RDS(on)dc
RDS(on)st
Sink driver, IOUT = 1.ꢀ A, T = ꢀ5°C
J
Source driver, IOUT = –1.ꢀ A, T = ꢀ5°C
J
Sink driver, IOUT = 1.ꢀ A, T = ꢀ5°C
J
–
–
Output On Resistance (stepper motor
driver)
–
Vf, Outputs
IOUT = 1.ꢀ A
–
Output Leakage
IDSS
IBB
Outputs, VOUT = 0 to VBB
–ꢀ0
–
µA
IOUT = 0 mA, outputs on, PWM = 50 kHz,
DC = 50%
VBB Supply Current
–
–
8
mA
Control Logic
VIN(1)
VIN(0)
IIN
0.7×VDD
–
–
–
–
0.3×VDD
ꢀ0
V
V
Logic Input Voltage
Logic Input Current
Input Hysteresis
VIN = 0 to 5 V
–ꢀ0
150
350
35
<1.0
300
550
–
µA
mV
ns
ns
ns
ns
ns
µs
µs
V
Vhys
500
1000
300
1000
ꢀ50
1000
4
PWM change to source on
PWM change to source off
PWM change to sink on
PWM change to sink off
Propagation Delay Times
tpd
350
35
550
–
Crossover Delay
tCOD
tBLANKdc
tBLANKst
VREFx
IREF
300
ꢀ.5
0.7
0.0
–
4ꢀ5
3.ꢀ
1
Blank Time (dc motor driver)
Blank Time (stepper motor driver)
VREFx Pin Input Voltage Range
VREFx Pin Reference Input Current
1.3
Operating
–
1.5
VREF = 1.5
–
±1
μA
%
VREF = 1.5, phase current = 100%
VREF = 1.5, phase current = 67%
VREF = 1.5, phase current = 33%
–5
–
5
Current Trip-Level Error3
VERR
–5
–
5
%
–15
–
15
%
Protection Circuits
VBB UVLO Threshold
VBB Hysteresis
VUV(VBB)
VUV(VBB)hys
VUV(VDD)
VUV(VDD)hys
TJTSD
VBB rising
VDD rising
7.3
400
ꢀ.65
75
7.6
500
ꢀ.8
105
165
15
7.9
600
ꢀ.95
1ꢀ5
175
–
V
mV
V
VDD UVLO Threshold
VDD Hysteresis
mV
°C
°C
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
155
–
TJTSDhys
1For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
ꢀTypical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for indi-
vidual units, within the specified maximum and minimum limits.
3VERR = [(VREF/3) – VSENSE] / (VREF/3).
DC Control Logic
PHASE
ENABLE
MODE
OUTA
OUTB
Function
1
1
0
0
X
1
0
1
1
1
1
0
0
0
1
0
1
0
1
0
0
H
H
L
L
L
L
L
H
H
L
Forward (slow decay SR)
Forward (fast decay SR)
Reverse (slow decay SR)
Reverse (fast decay SR)
Brake (slow decay SR)
Fast decay SR*
L
H
H
L
Fast decay SR*
* To prevent reversal of current during fast decay SR – the outputs will go to the high impedance state as the current gets near zero.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
4
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Functional Description
Device Operation The A3989 is designed to operate one
dc motor and one bipolar stepper motor. The currents in each of
the full bridges, all N-channel DMOS, are regulated with fixed
off-time pulse width modulated (PWM) control circuitry. The
peak current in each full bridge is set by the value of an external
Blanking This function blanks the output of the current sense
comparator when the outputs are switched by the internal current
control circuitry. The comparator output is blanked to prevent
false detections of overcurrent conditions, due to reverse recovery
currents of the clamp diodes, or to switching transients related to
the capacitance of the load. Dc motors require more blank time
current sense resistor, RSx , and a reference voltage, VREFx
.
than stepper motors. The stepper driver blank time, tBLANKst
is approximately 1 μs. The dc driver blank time, tBLANKdc , is
approximately 3 μs.
,
If the logic inputs are pulled up to VDD, it is good practice to use
a high value pullup resistor in order to limit current to the logic
inputs should an overvoltage event occur. Logic inputs include:
PHASEx, I0x, I1x, ENABLE, and MODE.
Control Logic Stepper motor communication is implemented
via industry standard I1, I0, and PHASE interface. This commu-
nication logic allows for full, half, and quarter step modes. Each
bridge also has an independent VREF input so higher resolution step
modes can be programmed by dynamically changing the voltage
on the corresponding VREFx pin. The dc motor is controlled using
standard PHASE, ENABLE communication. Fast or slow current
decay during the off-time is selected via the MODE pin.
Internal PWM Current Control Each full-bridge is
controlled by a fixed off-time PWM current control circuit that
limits the load current to a user-specified value, ITRIP. Initially,
a diagonal pair of source and sink DMOS outputs are enabled
and current flows through the motor winding and RSx. When the
voltage across the current sense resistor equals the voltage on the
VREFx pin, the current sense comparator resets the PWM latch,
which turns off the source driver.
Charge Pump (CP1 and CP2) The charge pump is used to
generate a gate supply greater than the VBB in order to drive the
source-side DMOS gates. A 0.1 μF ceramic capacitor should be
connected between CP1 and CP2 for pumping purposes. A 0.1 μF
ceramic capacitor is required between VCP and VBBx to act as a
reservoir to operate the high-side DMOS devices.
The maximum value of current limiting is set by the selection of
RS and the voltage at the VREF input with a transconductance
function approximated by:
ITripMax = VREF / (3×RS)
The stepper motor outputs will define each current step as a
percentage of the maximum current, ITripMax. The actual current at
each step ITrip is approximated by:
Shutdown In the event of a fault (excessive junction tem-
perature, or low voltage on VCP), the outputs of the device are
disabled until the fault condition is removed. At power-up, the
undervoltage lockout (UVLO) circuit disables the drivers.
ITrip = (% ITripMax / 100) ITripMax
where % ITripMax is given in the Step Sequencing table.
Synchronous Rectification When a PWM-off cycle is
triggered by an internal fixed off-time cycle, load current will
recirculate. The A3989 synchronous rectification feature will
turn on the appropriate MOSFETs during the current decay. This
effectively shorts the body diode with the low RDS(on) driver. This
significantly lowers power dissipation. When a zero current level
Note: It is critical to ensure that the maximum rating of ±500 mV
on each SENSEx pin is not exceeded.
Fixed Off-Time The internal PWM current control circuitry
uses a one shot circuit to control the time the drivers remain off.
The one shot off-time, toff, is internally set to 30 µs.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
5
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
is detected, synchronous rectification is turned off to prevent
reversal of the load current.
MODE Control input MODE is used to toggle between fast
decay mode and slow decay mode for the dc driver. A logic high
puts the device in slow decay mode. Synchronous rectification is
always enabled when ENABLE is low.
Mixed Decay Operation The stepper driver operates in
mixed decay mode. Referring to figure 2, as the trip point is
reached, the device goes into fast decay mode for 30.1% of
the fixed off-time period. After this fast decay portion, tFD, the
device switches to slow decay mode for the remainder of the
off-time. The dc driver decay mode is determined by the MODE
pin. During transitions from fast decay to slow decay, the drivers
are forced off for approximately 600 ns. This feature is added to
prevent shoot-through in the bridge. As shown in figure 2, during
this “dead time” portion, synchronous rectification is not active,
and the device operates in fast decay and slow decay only.
Braking Driving the device in slow decay mode via the MODE
pin and applying an ENABLE chop command implements
the Braking function. Because it is possible to drive current in
both directions through the DMOS switches, this configura-
tion effectively shorts the motor-generated BEMF as long as the
ENABLE chop mode is asserted. The maximum current can be
approximated by VBEMF/RL. Care should be taken to ensure that
the maximum ratings of the device are not exceeded in worst case
braking situations: high speed and high inertia loads.
VPHASE
+
See Enlargement A
IOUT
0
–
Enlargement A
Fixed Off-Time 30 µs
21 µs
9 µs
ITrip
IOUT
SDSR
FDSR
FDDT
SDDT
SDDT
Figure ꢀ. Mixed Decay Mode Operation
Allegro MicroSystems, Inc.
6
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Step Sequencing Diagrams
100.0
100.0
66.7
66.7
Phase 1
(%)
Phase 1
(%)
0
0
–66.7
–66.7
–100.0
–100.0
100.0
66.7
100.0
66.7
Phase 2
(%)
Phase 2
(%)
0
0
–66.7
–66.7
–100.0
–100.0
Half step 2 phase
Full step 2 phase
Modified half step 2 phase
Modified full step 2 phase
Figure 3. Step Sequencing for Full-Step Increments.
Figure 4. Step Sequencing for Half-Step Increments.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
7
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
100.0
66.7
33.3
Phase 1
(%)
0
–33.3
–66.7
–100.0
100.0
66.7
33.3
Phase 2
(%)
0
–33.3
–66.7
–100.0
Figure 5. Decay Modes for Quarter-Step Increments
Step Sequencing Settings
Phase 1
Phase ꢀ
(%ITripMax)
Full
1/ꢀ
1/4
I0x
I1x
PHASE
I0x
I1x
PHASE
(%ITripMax
)
1
1
ꢀ
3
4
5
6
7
8
9
10
11
1ꢀ
13
14
15
16
0
33
66*/100
100
100
100
66*/100
33
0
33
66*/100
100
100
100
66*/100
33
H
L
H
L
L
L
H
L
H
L
H
L
L
H
H
L*/H
L
L
L
L*/H
H
H
H
L*/H
L
x
1
1
1
1
1
1
1
x
0
0
0
0
0
0
0
100
100
66*/100
33
0
33
66*/100
100
100
100
66*/100
33
L
L
H
L
H
L
H
L
L
L
H
L
H
L
L
L
L*/H
H
H
H
L*/H
L
L
L
L*/H
H
1
1
1
1
X
0
0
0
0
0
0
0
X
1
1
1
1
ꢀ
3
4
5
6
7
8
ꢀ
3
4
L
L
L*/H
H
0
33
66*/100
100
H
H
L*/H
L
L
H
L
H
L
* Denotes modified step mode
Allegro MicroSystems, Inc.
8
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Logic Timing Diagram, DC Driver
ENB
PH
MODE
VBB
OUTA
0 V
VBB
OUTB
0 V
IOUT
0 A
A
1
2
3
4
5
6
7
8
9
VBB
VBB
1
5
6
7
OutA
OutB
OutA
OutB
2
4
8
3
9
A
Charge Pump and VREG Power-up Delay (z200 µs)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
9
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Applications Information
in the diagram below, illustrates how to create a star ground
under the device, to serve both as low impedance ground point
and thermal path.
MotorConfigurationsForapplicationsthatrequireeitherdual
dc or dual stepper motors, Allegro offers the A3988 and A3995.
Both devices are offered in a 36 pin QFN package. Please refer to
the Allegro website for further information and datasheets for the
devices.
The two input capacitors should be placed in parallel, and as
close to the device supply pins as possible. The ceramic capaci-
tor should be closer to the pins than the bulk capacitor. This is
necessary because the ceramic capacitor will be responsible for
delivering the high frequency current components.
Layout The printed circuit board should use a heavy ground-
plane. For optimum electrical and thermal performance, the
A3989 must be soldered directly onto the board. On the under-
side of the A3989 package is an exposed pad, which provides a
path for enhanced thermal dissipation. The thermal pad should be Sense Pins The sense resistors, RSx, should have a very
soldered directly to an exposed surface on the PCB. Thermal vias
are used to transfer heat to other layers of the PCB.
low impedance path to ground, because they must carry a large
current while supporting very accurate voltage measurements
by the current sense comparators. Long ground traces will cause
additional voltage drops, adversely affecting the ability of the
comparators to accurately measure the current in the windings.
As shown in the layout below, the SENSEx pins have very short
traces to the RSx resistors and very thick, low impedance traces
directly to the star ground underneath the device. If possible,
there should be no other components on the sense circuits.
Grounding In order to minimize the effects of ground bounce
and offset issues, it is important to have a low impedance single-
point ground, known as a star ground, located very close to the
device. By making the connection between the exposed thermal
pad and the groundplane directly under the A3989, that area
becomes an ideal location for a star ground point.
A low impedance ground will prevent ground bounce during
high current operation and ensure that the supply voltage remains
Note: When selecting a value for the sense resistors, be sure not to
stable at the input terminal. The recommended PCB layout shown exceed the maximum voltage on the SENSEx pins of ±500 mV.
VBB
VBB
CVCP
CIN3
CVCP
GND
CCP
GND
CCP
CIN3
RS3
1
RS1
NC
MODE
OUT3A
SENSE3
OUT3B
VBB
OUT1A
OUT1B
OUT1A
SENSE1
OUT1B
VBB
U1
A3989
PAD
OUT3B
RS1
RS3
CIN1
CIN2
OUT2B
SENSE2
OUT2A
NC
OUT3B
SENSE3
OUT3A
NC
CIN1
CIN2
RS2
OUT2B
OUT2A
OUT3A
RS2
CVDD1
GND
CVDD1
CVDD2
VDD
CVDD2
Figure 5. Printed circuit board layout with typical application circuit, shown at right. The copper area directly under the
A3989 (U1) is soldered to the exposed thermal pad on the underside of the device. The thermal vias serve also as electrical
vias, connecting it to the ground plane on the other side of the PCB , so the two copper areas together form the star ground.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
10
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Pin-out Diagram
PHASE1
PHASE2
GND
I12
I11
28
29
30
31
32
33
34
35
36
18
17
16
15
14
13
12
11
10
GND
VCP
CP1
PAD
NC
VREF3
VREF2
VREF1
VDD
CP2
I01
I02
PHASE3
ENABLE
Terminal List Table
Number
Name
Description
1
NC
No Connect
ꢀ
3
4
5
6
7
8
9
OUT1A
SENSE1
OUT1B
VBB
OUTꢀB
SENSEꢀ
OUTꢀA
NC
DMOS Full Bridge 1 Output A
Sense Resistor Terminal for Bridge 1
DMOS Full Bridge 1 Output B
Load Supply Voltage
DMOS Full Bridge ꢀ Output B
Sense Resistor Terminal for Bridge ꢀ
DMOS Full Bridge ꢀ Output A
No Connect
10
11
1ꢀ
13
14
15
16
17
18
19
ꢀ0
ꢀ1
ꢀꢀ
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
30
31
3ꢀ
33
34
35
36
PHASE3
VDD
VREF1
VREFꢀ
VREF3
NC
Control Input
Logic Supply Voltage
Analog Input
Analog Input
Analog Input
No Connect
Ground
Control Input
Control Input
GND
PHASEꢀ
PHASE1
NC
OUT3A
SENSE3
OUT3B
VBB
OUT3B
SENSE3
OUT3A
MODE
I1ꢀ
I11
GND
VCP
CP1
CPꢀ
I01
I0ꢀ
ENABLE
No Connect
DMOS Full Bridge 3 Output A
Sense Resistor Terminal for Bridge 3
DMOS Full Bridge 3 Output B
Load Supply Voltage
DMOS Full Bridge 3 Output A
Sense Resistor Terminal for Bridge 3
DMOS Full Bridge 3 Output B
Control Input
Control Input
Control Input
Ground
Reservoir Capacitor Terminal
Charge Pump Capacitor Terminal
Charge Pump Capacitor Terminal
Control Input
Control Input
Control Input
Exposed pad for enhanced thermal performance. Should
be soldered to the PCB
–
PAD
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
11
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
EV Package, 36 Pin QFN with Exposed Thermal Pad
6.15 .242
5.85 .230
A
Preliminary dimensions, for reference only
(reference JEDEC MO-220VJJD-1, except exposed thermal pad)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
36
1
2
A
A
B
Terminal #1 mark area
6.15 .242
5.85 .230
Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C
Reference land pattern layout (reference IPC7351
QFN50P600X600X100-37V1M); adjust as necessary to
meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
C
36X
SEATING
PLANE
0.08 [.003]
C
0.30 .012
0.18 .007
36X
1.00 .039
0.80 .031
0.10 [.004] M
0.05 [.002] M
C
C
A B
0.20 .008
REF
0.25 .010
0.50 .020
32X0.20 .008
NOM
0.05 .002
0.00 .000
MIN
0.50 .020
1.15 .045
NOM
0.75 .030
0.35 .014
36
NOM
1
2
5.8 .228
NOM
C
.163
4.15
NOM
4X0.20 .008
MIN
R0.30 .012
REF
.163
4.15
NOM
2
1
4X0.20 .008
MIN
36
.163
4.15
NOM
.163
4.15
NOM
5.8 .228
NOM
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright© 2006 AllegroMicrosystems, Inc.
For the latest version of this document, visit our website:
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115 Northeast Cutoff, Box 15036
1ꢀ
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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