AAS33001LLEATR_技术文档

AAS33001

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

FEATURES AND BENEFITS

DESCRIPTION

The AAS33001 is a 360° angle sensor IC that provides

contactlesshigh-resolutionangularpositioninformationbased

on magnetic circular vertical Hall (CVH) technology. It has a

system-on-chip (SoC) architecture that includes: a CVH front

end, digital signal processing to calculate the angular position

information,andmultipleoutputformats:serialprotocol(SPI),

pulse-widthmodulation(PWM),andeithermotorcommutation

(UVW) or encoder outputs (A, B, I). It also includes on-chip

EEPROM technology, capable of supporting up to 100

read/write cycles, for flexible programming of calibration

parameters.TheAAS33001isidealforautomotiveapplications

requiring 0° to 360° angle measurements, such as electronic

powersteering(EPS), electronicpowerbraking(EPBorIDB),

transmission actuators, and BLDC pumps.

• Contactless 0° to 360° angle sensor IC, for angular

position, rotational speed, and direction measurement

□ Capable of sensing magnet rotational speeds targeting

12.5-bit effective resolution with 300 G field; higher

effective resolution possible at higher field strengths

□ Circular Vertical Hall (CVH) technology provides a

single channel sensor system, with air gap independence

• On-chip 32 segment linearization to improve angle accuracy

□ Reduces impact of magnet to sensor misalignment

□ Reduces impact of imperfect magnetization of target

magnet

• Developed as a Safety Element out of Context (SEooC)

in accordance with ISO 26262:2011 requirements for

hardware product development for use in safety-critical

applications (pending assessment)

TheAAS33001includeson-chip32segmentlinearization.This

canbeusedtocalibrateouterrorsduetomisalignmentbetween

the magnet and the sensor or imperfect magnetization of the

target magnet (which can present itself as a misalignment of

the magnet to the sensor).

□ Single die version designed to meet ASIL B

requirements when integrated and used in conjunction

with the appropriate system-level control, in the

manner prescribed in the AAS33001 Safety Manual

□ Dual die version designed to meet ASIL D

The AAS33001 supports customer integration into safety-

critical applications.

requirements when integrated and used in conjunction

with the appropriate system-level control, in the

manner prescribed in the AAS33001 Safety Manual

The AAS33001 is available in a dual-die 24-pin eTSSOP and

a single-die 14-pin TSSOP package. The packages are lead

(Pb) free with 100% matte-tin leadframe plating. The 1 mm

thin package reduces the minimum air gap between the CVH

transducer and the target magnet. The AAS33001 device is

pin-compatible with the A1333 to enable easy migration.

Continued on next page...

PACKAGES

24-pin eTSSOP (Suffix LP)

14-pin TSSOP (Suffix LE)

Not to scale

Die 1 (bottom die)

BYP_1

VCC_1

Charge

Pump

EEPROM

with CRC

Self Test

Regulator

To all internal circuits

S

Circuit Trimmings

and Customer Settings

GND_1

PWM_1

PWM

Band

Pass

CVH

ADC

N

A_1/U_1

B_1/V_1

I_1/W_1

Linearization,

Offset, and

Direction Invert

ABI/UVW

PLL Angle

Detect

Averaging

Filter

eTSSOP-24

Magnet oriented

for 0° output

Comparison

CS_1

ZCD Angle

Detect

SPI Interface

with CRC

S

MISO_1

MOSI_1

SCLK_1

Field

Strength

Temp

Sensor

ADC

N

eTSSOP-14

xxx_2

Die 2 (top die, LP-24 only)

Thermal Pad (LP-24 only)

Figure 1: AAS33001 Magnetic Circuit and IC Diagram

AAS33001-DS, Rev. 1

MCO-0000408

September 4, 2018

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

FEATURES AND BENEFITS (continued)

• High diagnostic coverage

□ PWM interface provides initial position for ABI/UVW

interfaces

□ 10 MHz SPI for low latency angle and diagnostic

information; enables multiple independent ICs to be

connected to same bus

□ On-chip diagnostics include logic built-in self-test (LBIST),

signal path diagnostics, and watchdogs to support safety-

critical (ASIL) applications

□ 4-bit CRC on SPI

• On-chip EEPROM for storing factory and customer calibration

parameters

♦5 V SPI can be supported

□ Output resolution on ABI and UVW are selectable

• Multiple programming/configuration formats supported

□ The system can be completely controlled and programmed

over SPI, including EEPROM writes

□ For system with limited pins available, writing and reading

can be performed over VCC and PWM pins. This allows

configuring the EEPROM in production line for a device

with only ABI/UVW and PWM pins connected.

• 1 mm thin surface-mount TSSOP packages for both single and

dual die versions to minimize air gap from target magnet to

CVH transducer for improved field strength

□ Single-bit error correction; dual-bit error detection, error

correction control (ECC)

• Supports operating in harsh conditions required for automotive

and industrial applications, including direct connection to 12 V

battery

□ Operating temperature range from –40°C to 150°C

□ Operating supply voltage range from 3.7 to 18 V, absolute

maximum of 28 V continuous

♦Can support ISO 7637-2 Pulse 5b up to 39 V

• Multiple output formats supported for ease of system

integration

□ Pin-compatible to single and dual die A1333 devices

□ Stacked dual die construction to improve channel-to-channel

matching for systems that require redundant sensors

□ ABI and UVW interfaces provide high resolution and lowest

latency angle information

Table of Contents

EEPROM and Shadow Memory Usage................................. 33

Enabling EEPROM Access............................................... 33

EEPROM Write Lock....................................................... 33

EEPROM Access and Write Lock Exceptions ..................... 34

Write Transaction............................................................ 34

Read Transaction............................................................ 38

Shadow Memory Read and Write Transactions................... 40

Serial Interface Table.......................................................... 41

Primary Serial Interface Registers Reference ........................ 42

EEPROM and Shadow Register Table .................................. 48

EEPROM Reference .......................................................... 49

Safety and Diagnostics ....................................................... 56

Alive Counter.................................................................. 56

Oscillator Watchdogs....................................................... 56

Logic Built-In Self-Test (LBIST)......................................... 56

CVH Self-Test................................................................. 56

Application Information ....................................................... 57

Magnetic Target Requirements ......................................... 57

Typical SPI and ABI/UVW Applications .............................. 58

I/O Structures .................................................................... 60

Package Outline Drawings .................................................. 61

Features and Benefits........................................................... 1

Description.......................................................................... 1

Packages............................................................................ 1

Simplified Block Diagram ...................................................... 1

Selection Guide ................................................................... 2

Absolute Maximum Ratings................................................... 2

Thermal Characteristics ........................................................ 2

Pinout Diagrams and Terminal List ......................................... 4

Operating Characteristics...................................................... 5

Functional Description .......................................................... 8

Overview ......................................................................... 8

Angle Measurement .......................................................... 8

System Level Timing ......................................................... 8

Power-Up......................................................................... 8

PWM Output .................................................................... 8

Linearization................................................................... 12

Incremental Output Interface (ABI).................................... 13

Brushless DC Motor Commutation .................................... 18

ABI Behavior at Power-Up ............................................... 20

Angle Hysteresis............................................................. 21

Device Programming Interface............................................. 22

Interface Structure .......................................................... 22

SPI Interface .................................................................. 23

Manchester Interface....................................................... 27

2

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

SELECTION GUIDE*

Part Number

System Die

Dual

Interface Voltage (V)

Package

Packing

AAS33001LLPBTR-DD

AAS33001LLEATR

3.3

24-pin eTSSOP

14-pin TSSOP

4000 pieces per 13-inch reel

Single

* Contact Allegro for 5 V interface variants if required.

ABSOLUTE MAXIMUM RATINGS

Characteristic

Symbol

Notes

Sampling angles, respecting T_J(max)

Not sampling angles

Rating

28

Unit

V

Forward Supply Voltage

V_CC

Reverse Supply Voltage

V_RCC

V_IN

–18

V

All Other Pins Forward Voltage

All Other Pins Reverse Voltage

Operating Ambient Temperature

Maximum Junction Temperature

Storage Temperature

5.5

V

V_R

0.5

V

T_A

L range

–40 to 150

170

°C

T_J(max)

T_stg

–65 to 170

THERMAL CHARACTERISTICS: May require derating at maximum conditions

Characteristic

Symbol

Test Conditions*

Value

Unit

LP-24 package with exposed thermal pad; measured on JEDEC JESD51-7 2s2p board

LE-14 package; measured on JEDEC JESD51-7 2s2p board

69

°C/W

Package Thermal Resistance

R_θJA

82

°C/W

3

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

PINOUT DIAGRAMS AND TERMINAL LIST TABLE

Pinout Diagrams

Terminal List Table

Pin Number

Name

LP 24-Pin eTSSOP

Function

LE-14

LP-24

9

1

2

24

23

22

21

20

19

18

17

16

15

14

13

CS_1

SCLK_1

MOSI_1

MISO_1

A_1/U_1

B_1/V_1

I_1/W_1

GND_1

PWM_1

TEST_1

VCC_1

BYP_2

PWM_1

BYP_1

4

1

PWM Angle Output (die 1)

VCC_2

TEST_2

PWM_2

GND_2

I_2/W_2

B_2/V_2

A_2/U_2

MISO_2

MOSI_2

SCLK_2

CS_2

12

External bypass capacitor terminal for internal regulator (die 1)

3

Option 1: Quadrature A output signal signal (die 1)

Option 2: U (phase 1) output signal (die 1)

4

A_1/U_1

12

5

Option 1: Quadrature B output signal (die 1)

Option 2: V (phase 2) output signal (die 1)

6

B_1/V_1

VCC_1

13

2

6

11

7

PAD

7

Power supply

8

Option 1: Quadrature I (index) output signal (die 1)

Option 2: W (phase 3) output signal (die 1)

9

I_1/W_1

14

10

11

12

VCC_2

MISO_2

SCLK_2

–

23

16

14

Power supply

SPI Master Input / Slave Output (die 2)

SPI Clock terminal input (die 2)

BYP_1

SPI Master Output / Slave Input (die 2); also address selection

for Manchester interface

MOSI_2

CS_2

–

15

13

LE 14-Pin TSSOP

SPI Chip Select terminal, active low input (die 2); also address

selection for Manchester interface

1

2

3

4

5

6

7

14

13

BYP_1

VCC_1

TEST_1

PWM_1

GND

I_1/W_1

B_1/V_1

GND

5, 6, 7

–

Device ground terminal

12 A_1/U_1

11 MISO_1

10 MOSI_1

GND_1

GND_2

PWM_2

BYP_2

–

8

Device ground terminal

20

21

24

Device ground terminal

9

8

PWM Angle Output (die 2)

GND

SCLK_1

CS_1

GND

External bypass capacitor terminal for internal regulator (die 2)

Option 1: Quadrature A output signal (die 2)

Option 2: U (phase 1) output signal (die 2)

A_2/U_2

B_2/V_2

I_2/W_2

–

17

18

19

Option 1: Quadrature B output signal (die 2)

Option 2: V (phase 2) output signal (die 2)

Option 1: Quadrature I (index) output signal (die 1)

Option 2: W (phase 3) output signal (die 1)

MISO_1

SCLK_1

11

9

4

2

SPI Master Input / Slave Output (die 1)

SPI Clock terminal input (die 1)

SPI Master Output / Slave Input (die 1); also address selection

for Manchester interface

MOSI_1

CS_1

10

8

3

1

SPI Chip Select terminal, active low input (die 1); also address

selection for Manchester interface

TEST_1

TEST_2

PAD

3

–

10

22

Connect to ground (die 1)

Connect to ground (die 2)

PAD

Exposed pad for thermal dissipation

4

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

OPERATING CHARACTERISTICS: Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted

Characteristics

ELECTRICAL CHARACTERISTICS

Supply Voltage

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit^[2]

V_CC

3.7

–

15

–

18

19

3.7

–

V

mA

V

Supply Current

I_CC(full)

V_PORHI

V_PORLOWV_CCfalling, dV/dt = 1 V/ms, T_A= 25°C

For single die

V_CCrising, dV/dt = 1 V/ms, T_A= 25°C

–

Power-On Reset Threshold Voltage^[3]

3.3

3.7

26.5

–

V

Undervoltage Warning Level ^[6]

Supply Zener Clamp Voltage

Reverse Battery Current

V_UV

V_ZSUP

I_RCC

T_A= –40°C to 150°C

3.82

–

4.0

–

V

I_CC= I_CC(AWAKE)+ 3 mA, T_A= 25°C

V_RCC= 18 V, T_A= 25°C

V

–

5

mA

Power-on diagnostics disabled,

interface working, but angle not yet settled

Power-On Time^[4]

t_PO

–

300

3.3

–

µs

V

Bypass Pin Output Voltage^[5]

V_BYP

T_A= 25°C, C_BYP= 0.1 µF

2.97

3.63

SPI AND ABI/UVW INTERFACE SPECIFICATIONS (for 3.3 V interface)

¯¯¯¯

MOSI, SCLK, CS pins

Digital Input High Voltage

Digital Input Low Voltage

Output High Voltage

V_IH

V_IL

2.8

–

3.63

0.5

3.63

–

V

¯¯¯¯

MOSI, SCLK, CS pins

–

V_OH

V_OL

MISO and ABI/UVW pins, C_L= 20 pF, T_A= 25°C

2.93

–

3.3

0.3

Output Low Voltage

SPI AND ABI/UVW INTERFACE SPECIFICATIONS (for 5.0 V interface) (Contact Allegro for 5 V SPI ordering information)

¯¯¯¯

MOSI, SCLK, CS pins

Digital Input High Voltage

Digital Input Low Voltage

Output High Voltage

V_IH

V_IL

3.75

–

5.5

0.5

5.5

–

V

¯¯¯¯

MOSI, SCLK, CS pins

–

V_OH

V_OL

MISO and ABI/UVW pins, C_L= 20 pF, T_A= 25°C

4.0

–

5.0

0.3

Output Low Voltage

SPI INTERFACE SPECIFICATIONS

SPI Clock Frequency^[6]

SPI Clock Duty Cycle^[6]

SPI Frame Rate^[6]

f_SCLK

D_fSCLK

t_SPI

MISOx pins, C_L= 20 pF

SPI_CLKDC

0.1

40

–

-

10

60

588

–

MHz

%

5.8

50

–

kHz

ns

Chip Select to First SCLK Edge^[6]

t_CS

¯¯¯¯

Time from CSx going low to SCLKx falling edge

¯¯¯¯

Time in which CSx is held high before the next

frame

Chip Select Inactive Time

t_CSH

150

–

ns

Data Output Valid Time^[6]

MOSI Setup Time^[6]

MOSI Hold Time^[6]

t_DAV

t_SU

Data output valid after SCLKx falling edge

Input setup time before SCLKx rising edge

Input hold time after SCLKx rising edge

–

25

50

5

–

50

–

ns

pF

t_HD

–

SCLK to CS Hold Time^[6]

Load Capacitance^[6]

t_CHD

C_L

Hold SCLKx high time before CSx rising edge

–

¯¯¯¯

Loading on digital output (MISOx) pin

–

20

Continued on the next page…

5

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted

Characteristics

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit^[2]

PWM INTERFACE SPECIFICATIONS

PWM Frequency Min Setting, T_Ain specification

PWM Programmable Options (number of steps)

PWM Frequency Max Setting, T_Ain specification

–

98

128

3.125

5

–

Hz

steps

kHz

%

PWM Carrier Frequency

f_PWM

PWM Output Low Clamp

PWM Output High Clamp

D_PWM(min)Corresponding to digital angle of 0x000

D_PWM(max)Corresponding to digital angle of 0xFFF

95

%

INCREMENTAL OUTPUT SPECIFICATIONS

ABI and UVW Output Angular

hys_ANG

Programmable

0

–

1.38

degrees

Hysteresis ^[6]

MANCHESTER INTERFACE SPECIFICATIONS

Manchester High Voltage ^[6]

Manchester Low Voltage ^[6]

V_MAN(H)

V_MAN(L)

Applied to VCC line

7.3

8

5

V_CC(max)

5.7

V

V_CC(min)

Line state changes once or twice per bit;

maximum speed is usually limited by VCC line

capacitance

Manchester Bitrate ^[6]

f_MAN

2.2

–

100

kbit/s

BUILT-IN SELF TEST

Logic BIST Time

t_LBIST

Configurable to run on power-up or on user request

–

30

–

ms

Circular Vertical Hall Self-Test Time

MAGNETIC CHARACTERISTICS

Magnetic Field

t_CVHST

B

Range of input field

–

1200

G

Continued on the next page…

6

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted

Characteristics

ANGLE CHARACTERISTICS

Output^[7]

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit^[2]

RES_ANGLEBoth 12 and 15-bit angle values are available via SPI

–

12/15

1.0

–

bit

µs

Angle Refresh Rate^[8]

Response Time ^[6]

t_ANG

No averaging

t_RESPONSE

Angular latency; valid for ABI or UVW interface

10

T_A= 25°C, ideal magnet alignment, B = 300 G,

target rpm = 0

–1

±0.4

±0.7

1

degrees

Angle Error ^[9]

ERR_ANG

ANGLE_DRIFT

N_ANG

T_A= 150°C, ideal magnet alignment, B = 300 G,

target rpm = 0

–1.3

1.3

T_A= 150°C, B = 300 G, angle change from 25°C

T_A= –40°C, B = 300 G, angle change from 25°C

–1.4

–

1.4

–

degrees

Temperature Drift

Angle Noise ^[10][11]

0.9

T_A= 25°C, B = 300 G, no internal filtering, target

rpm = 0, 3 sigma noise

–

±0.22

–

degrees

T_A= 150°C, B = 300 G, no internal filtering,

target rpm = 0, 3 sigma noise

–

±0.28

12.47

0.5

–

degrees

bits

Effective Resolution ^[12]

B = 300 G, T_A= 25°C

B = 300 G, average maximum drift observed

following AEC-Q100 qualification testing

Angle Drift Over Lifetime ^[13]

ANGLE_{Drift_Life}

degrees

^[1]Typical data is at T_A= 25°C and V_CC= 5 V, and it is for design estimates only.

^[2]1 G (gauss) = 0.1 mT (millitesla).

^[3]At power-on, a die will not respond to commands until V_CCrises above V_PORHI. After that, the die will perform and respond normally until V_CCdrops

below V_PORLOW

.

^[4]During the power-on phase, the AAS33001 SPI transactions are not guaranteed.

^[5]The output voltage and current specifications are to aid in PCB design. The pin is not intended to drive any external circuitry. The specifications

indicate the peak capacitor charging and discharging currents to be expected during normal operation.

^[6]Parameter is not guaranteed at final test. Determined by design.

^[7]RES_ANGLErepresents the number of bits of data available for reading from the die registers.

^[8]The rate at which a new angle reading will be ready.

^[9]Error value as measured at Allegro final test before any on-chip linearization is applied. Actual raw angle error performance in application can vary

with multiple factors (e.g. magnet to sensor alignment, etc). Using the on-chip linearization features of the AAS33001 can significantly reduce these

errors.

^[10]Error and noise values are with no further signal processing. Angle Noise can be reduced with internal filtering and slower Angle Refresh Rate value.

^[11]This value represents 3-sigma or three times the standard deviation of the measured samples.

^[12]Effective Resolution is calculated using the formula below:

n

1

log₂(360) – log₂

i

n

( )

i = 1

where σ is the Standard Deviation based on thirty measurements taken at each of the 32 angular positions, I = 11.25, 22.5, … 360.

^[13]Maximum observed angle drift following AEC-Q100 stress was 1.4 degrees.

7

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

FUNCTIONAL DESCRIPTION

update every t_ANG(if an angle change has occurred). SPI, which

is asynchronously clocked, results in a varying latency depending

Overview

The AAS33001 is a rotary position Hall-sensor-based device.

It incorporates one or two electrically independent Hall sensor

dies in the same surface-mount package to provide solid-state

consistency and reliability, and to support a wide variety of

automotive applications. Each Hall-sensor-based die measures

the direction of the magnetic field vector through 360° in the x-y

plane (parallel to the branded face of the device) and computes an

angle measurement based on the actual physical reading, as well

as any internal parameters that have been set by the user. The

output of each die is used by the host microcontroller to provide a

single channel of target data.

on sampling frequency and SCLK speed. The values which are

presented to the user are copied from the data path to the output

registers between 0 and 125 ns after the SPI falling chip select

edge. The first bit never contains data. If the SPI clock is 10 MHz,

the data will be clocked out after 1.6 µs. As the data were sampled

in at the first clock edge at an age of maximum t_RESPONSE, their

age after the SPI transaction has finished will be between 1.6 and

1.6 + t_RESPONSEµs.

Figure 2 shows the update rate and the signal delay of the differ-

ent angle output paths depending on the sensor settings.

This device is an advanced, programmable system-on-chip (SoC).

Each integrated circuit includes a circular vertical Hall (CVH)

analog front end, a high-speed sampling A-to-D converter, digital

filtering, digital signal processing, a digital control SPI interface,

motor commutation outputs (UVW), and encoder outputs (A, B, I).

The value of the “angle_zcd” register is updated approximately

every 32 µs. The value of the register “gauss” is update approxi-

mately every 128 µs.

Power-Up

Advanced offset, gain, and linearization adjustment options are

available in the AAS33001. These options can be configured in

onboard EEPROM, providing a wide range of sensing solutions

in the same device.

Upon applying power to the AAS33001, the device automatically

runs through an initialization routine. The purpose of this

initialization is to ensure that the device comes up in the

same predictable operating condition every power cycle. This

initialization routine takes a finite amount of time to complete,

which is referred to as Power-On Time, t_PO. Regardless of the

state of the device before a power cycle, the device will repower

with EEPROM shadow bits copied from the EEPROM anew,

and serial registers in their default states. For example, on every

power-up, the device will power with the “zero_offset” that was

stored in the EEPROM. The extended write access field “write_

adr” will be set back to its default value, zero.

Angle Measurement

The AAS33001 can monitor the angular position of a rotating

magnet at speeds ranging from 0 to more than 15,000 rpm. The

AAS33001 has a typical output refresh rate of 1 µs.

Readout in SPI is possible with 12-bit resolution, with error

flags included in the same word, or in 15-bit resolution without

included error flags. Reading out the angle takes 16 SPI clock

cycles. See SPI Interface section for details on SPI usage.

PWM Output

PWM output is always resolved to a 12-bit angle resolution.

The AAS33001 provides a pulse-width-modulated output with

duty cycle proportional to measured angle. The PWM duty cycle

is clamped at 5% and 95% DC for diagnostic purposes. 5% DC

corresponds to 0 degrees of angle; 95% DC corresponds to 360°

of angle. The 0% and 100% (pulled low and pulled high) states

are reserved for error condition notifications. The rising edges of

the output are always at the same points in time, while the falling

edge moves from 5% to 95% over angles of 0 to 360 degrees.

ABI/UVW resolution can be set to the level desired by the

customer.

The sensor readout is processed and linearized in various steps.

These are detailed in Figure 3.

System Level Timing

Internal registers are updated with a new angle value every t_ANG

.

In case of errors, the setting “peo” = 1 will make errors affect the

PWM pin. The setting “pes” = 0 will tristate the PWM pin, while

with setting “pes” = 1, the output frequency will be halved, and

the outputs will be fixed to the levels in Table 1.

Due to signal path delay, the angle is t_RESPONSEold at each update.

In other words, t_RESPONSEis the delay from time of magnet sam-

pling until generation of a processed angle value. The streaming

protocols ABI and UVW, which require no external trigger, will

8

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Table 1: PWM Output Errors

Error

WDE

OFE

STF

PLK

ZIE

Priority

Duty Cycle %

5

Description / Persistence

Watchdog error. Permanent error until restart.

1 (highest)

2

3

4

5

6

7

10.625

16.25

Oscillator frequency watchdog error.

Self-test failure. Permanent error until restart.

PLL not locked. Persists until PLL locks.

21.875

27.5

Zero-crossing integrity error. Persists as long as the issue exists.

Angle averaging error. Outputs once then clears.

AVG

UV

33.125

38.75

Undervoltage (UVA and/or UVCC dependent on serial error masks). Persists until no

unmasked undervoltage.

MSL

ESE

SAT

MSH

TR

8

44.375

50

Persists until field strength higher than low threshold.

EEPROM correctable error. Outputs once, then clears.

Saturation error. Persists as long as the issue exists.

Persists until field strength lower than high threshold.

Persists until temperature within range.

9

10

55.625

61.25

66.875

11

12 (lowest)

The duty cycle of the pin can be configured using the “pwm_

band” and the “pwm_freq” fields, yielding the frequencies shown

in Table 2.

Table 2: PWM Frequency Table (Hz)

“pwm_band”

0

1

2

3

4

5

6

7

0

1

3125

3101

3077

3053

3030

3008

2985

2963

2941

2920

2899

2878

2857

2837

2817

2797

2778

2740

2703

2667

2632

2597

2564

2532

2500

2469

2439

2410

2381

2353

2326

2299

2273

2222

2174

2128

2083

2041

2000

1961

1923

1887

1852

1818

1786

1754

1724

1695

1667

1613

1563

1515

1471

1429

1389

1351

1316

1282

1250

1220

1190

1163

1136

1111

1087

1042

1000

962

926

893

862

833

806

781

758

735

714

694

676

658

641

610

581

556

532

510

490

472

455

439

424

410

397

385

373

362

352

333

316

301

287

275

263

253

243

234

225

217

210

203

197

191

185

175

166

157

150

143

137

131

126

121

116

112

108

105

101

98

2

3

4

5

6

7

8

9

10

11

12

13

14

15

9

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

CVH

PLL + processing

Latency 10 µs

Rate 1 µs

Latency: 10 µs

Rate: 1 µs

Op�onal Angle averaging

Reduce rate by 2^“orate”�mes

0 ≤ “orate” ≤ 12

Latency: 10 + (2^“orate”– 1) µs

Rate: 1 µs × 2^“orate”

µC

Latency: 10 + (2^“orate”– 1) µs

Rate: 1 µs ×2^“orate”

ABI / UVW pins

Latency ~ ns (push/pull output)

Rate can be limited by “slew_rate”

Latency = f_PWM^-1+ 10 µs + (2^“orate”– 1) µs

-1

Rate = f_PWM

PWM pin

New data rate= max of [f_PWM^-1and 2^“orate”µs]

Latency ≤1 PWM cycles of(98...3125 Hz)

Rate (98...3125 Hz)

Latency ≤10µs + 2^“orate”µs + 16/f_SPI

Rate = 16/f_SPI

SPI bus

New data rate= max of [16/f_SPIand 2^“orate”] µs

Latency ≤1 µs · 2^orate+ 16/f_SPI(f_SPI,max= 10 MHz)

Rate 16/f_SPI

Figure 2: Signal Latency and Update Rates

10

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

CVH

ΣΔ-ADC

Filter & PLL angle

measurement logic

Angle averaging

(“orate”)

Rotaꢀon direcꢀon

Oﬀset adjust

(“zero_oﬀset”)

(“ro”)

Segmented

linearizaꢀon

(“eli”, “ls”, “LIN##“)

Rotaꢀon direcꢀon

(“ro”)

Segmented

linearizaꢀon

(“eli”, “ls”, “LIN##”)

Oﬀset adjust

(“zero_oﬀset”)

“zal”=0

180° rotaꢀon

(“rd”)

ABI / UVW pins

(“uvw”,“ioe”,“plh”,“wdh”,“index_mode”,“inv”,

“abi_slew_ꢀme”,“resoluꢀon_pairs”)

“ahe”=0

“phe”=0

Angle hysteresis

(“hysteresis”)

PWM pin

(“pen”,“pwm_band”,“pwm_freq”,“peo”,“pes”)

“angle” and “angle_15” output register

“angle_hys” output register

Figure 3: Angle data ﬂow chart.

Text in quotes (“”) denotes registers that aﬀect their containing block.

11

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Linearization

Table 3: Linearization Coefficients

Electrical

angle (°)

measured by

sensor

Correction

value

Written in

EEPROM

The AAS33001 contains linearization functionality. Linearization

allows for conversion of the initially sensor-measured magnetic

field data into customer-desired linear output. This can be used

to correct minor imperfections in the encoder signal, or to allow

motor commutation in side-shaft measurement setups.

Output angle

Visible on sensor output

0.00

11.25

LIN0

LIN1

Output = 0.00 – LIN0

Output = 11.25 – LIN1

Output = 22.50 – LIN2

Output = 33.75 – LIN3

Output = 45.00 – LIN4

Output = 56.25 – LIN5

Output = 67.50 – LIN6

Output = 78.75 – LIN7

Output = 90.00 – LIN8

Output = 101.25 – LIN9

Output = 112.50 – LIN10

Output = 123.75 – LIN11

Output = 135.00 – LIN12

Output = 146.25 – LIN13

Output = 157.50 – LIN14

Output = 168.75 – LIN15

Output = 180.00 – LIN16

Output = 191.25 – LIN17

Output = 202.50 – LIN18

Output = 213.75 – LIN19

Output = 225.00 – LIN20

Output = 236.25 – LIN21

Output = 247.50 – LIN22

Output = 258.75 – LIN23

Output = 270.00 – LIN24

Output = 281.25 – LIN25

Output = 292.50 – LIN26

Output = 303.75 – LIN27

Output = 315.00 – LIN28

Output = 326.25 – LIN29

Output = 337.50 – LIN30

Output = 348.75 – LIN31

Linearization converts the electrical angles (the angle as mea-

sured by the sensor front end) into mechanical angles (the actual

angle of the encoder signal).

22.50

LIN2

33.75

LIN3

45.00

LIN4

To use the linearization feature, it is most convenient to use

the Allegro AAS33001 Samples Programmer Graphical User

Interface (GUI). It allows the user to measure points along the

mechanical rotation, calculate all parameters that need to be

written into the sensor, and writes these values into the sensor.

To use this function, the user must be able to read and control the

mechanical angle.

56.25

LIN5

67.50

LIN6

78.75

LIN7

90.00

LIN8

101.25

112.50

123.75

135.00

146.25

157.50

168.75

180.00

191.25

202.50

213.75

225.00

236.25

247.50

258.75

270.00

281.25

292.50

303.75

315.00

326.25

337.50

348.75

LIN9

LIN10

LIN11

LIN12

LIN13

LIN14

LIN15

LIN16

LIN17

LIN18

LIN19

LIN20

LIN21

LIN22

LIN23

LIN24

LIN25

LIN26

LIN27

LIN28

LIN29

LIN30

LIN31

The sensor performs linearization by taking the measured electri-

cal angles and, depending on the angle measured, subtracting

a linearization coefficient stored in EEPROM. There are 32 of

these linearization coefficients in the EEPROM. The angle value

at a sensor angle reading of 0.00, 11.25, 22.50, … 348.75 electri-

cal degrees will be modified by the values in EEPROM fields

LIN0, LIN1, LIN2, … LIN31. The EEPROM LIN values are

subtracted from the electrical sensor angles, as shown in Table 3.

The LIN fields are 12-bit signed values. Each LIN coefficient has

a range of –2048…+2047 LSB that corresponds to a correction of

the electrical angle by +22.50…–22.49 degrees (EEPROM field

“ls” = 0) or by +45.00…–44.98 degrees (EEPROM field “ls” = 1).

When the electrical angle is between of two of the linearization

points, the sensor calculates the appropriate correction value for

this angle by linear interpolation between the two coefficients

next to the value. For example, if the sensor measures an angle of

5.625°, the output will be 5.625 – (LIN0 + LIN1) / 2.

Figure 4 is an example showing a nonlinear curve that is cor-

rected by the sensor. In this example, the values of LIN0, LIN1,

LIN2, and LIN3 are negative numbers, while LIN4 is a positive

number. The linearized output angle in the example is close to the

mechanical angle, but not perfect. This was done on purpose to

show a more realistic example.

The output delay of the AAS33001 is not affected by enabling or

disabling linearization. If linearization is disabled, the EEPROM

LIN fields can be used for other customer purposes.

12

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Since A and B are offset by ¼ of a cycle, they are in quadra-

ture and together have four unique states per cycle. Each state

represents R = [360 / (4 × 2^N)] degrees of the full revolution. This

angular distance is the quadrature resolution of the encoder. The

order in which the states change, or the order of the edge transi-

tions from A to B, allow the direction of rotation to be deter-

mined. If a given B edge (rising/falling) precedes the following A

edge, the angle is increasing from the perspective of the electrical

(sensor) angle and the angle position should be incremented by

the quadrature resolution (R) at each state transition. Conversely,

if a given A edge precedes the following B edge, the angle is

decreasing from the perspective of the electrical (sensor) angle

and the angle position should be decremented by the quadrature

resolution (R) at each state transition. The angle position accumu-

lator wraps each revolution back to 0. The quadrature states are

designated as Q1 through Q4 in the following diagrams, and are

defined as follows:

45.00

Electrical angle (not linearized)

Linearizaꢀon parameters

Linearized output angle

33.75

22.50

11.25

0.00

State Name

A

0

1

B

0

1

0

Q1

Q2

Q3

Q4

Electrical angle measured by sensor [degree]

11.25 22.50 33.75

0.00

45.00

Figure 4: Linearization Example

Incremental Output Interface (ABI)

Note that the A/B progression is a grey coding sequence where

only one signal transitions at a time. The state progression must

be as follows to be valid:

The AAS33001 offers an incremental output mode in the form

of quadrature A/B and Index outputs to emulate an optical or

mechanical encoder. The A and B signals toggle with a 50%

duty cycle (relative to angular distance, not necessarily time) at

a frequency of 2N cycles per magnetic revolution, giving a cycle

resolution of (360 / 2^N) degrees per cycle. B is offset from A by

¼ of the cycle period. The “I” signal is an index pulse that occurs

once per revolution to mark the zero (0) angle position. One revo-

lution is shown in Figure 5.

Increasing angle: Q1 → Q2 → Q3 → Q4 → Q1 → Q2 → Q3 → Q4

Decreasing angle: Q4 → Q3 → Q2 → Q1 → Q4 → Q3 → Q2 → Q1

The duration of one cycle is referred to as 360 electrical degrees,

or 360e. One half of a cycle is therefore 180e and one quarter of

a cycle (one quadrature state, or R degrees) is 90e. This is the

A

B

I

Angle →

0

+R +2R +3R

-3R -2R -R

0

Increase angle – B edge precedes A edge

Decreasing angle – A edge precedes B edge

One full magnetic rotation (360 magnetic degrees)

Figure 5: One Full Revolution

13

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

terminology used to express variance from perfect signal behav-

ior. Ideally, the A and B cycle would be as shown below for a

constant velocity (see Figure 6).

In reality, the edge rate of the A and B signals, and the switching

threshold of the receiver I/Os, will affect the quadrature periods

(see Figure 7).

Cycle=360e

A

B

Q1

Q2

Q3

Q4

90e

Figure 6: Electrical Cycle

Cycle=360e

A

B

Q4

90e

Q1

75e

Q2

90e

Q3

105e

Figure 7: Electrical Cycle

14

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

RESOLUTION

The AAS33001 supports the following ABI output resolutions.

This is set via the resolution_pairs field in EEPROM.

Table 4: ABI Output Resolution

EEPROM

Resolution

Field

Cycle

Resolution

(Bits = N)

Quadrature

Resolution

(Bits = 4 × N)

Cycles per

Revolution

(A or B)

Quadrature

States per

Revolution

Cycle Resolution

(Degrees)

Quadrature

Resolution (R)

(Degrees)

0

1

Factory Use Only

2

3

11

10

9

13

12

11

10

9

2048

8192

4096

2048

1024

512

256

128

64

0.176

0.352

0.703

1.406

2.813

5.625

11.250

22.500

45.000

90.000

180.0

360.0

n/a

0.044

0.088

0.176

0.352

0.703

1.406

2.813

5.625

11.250

22.5

4

1024

512

256

128

64

32

16

8

5

6

8

7

8

6

8

9

5

7

10

11

12

13

14

15

4

6

3

5

32

2

4

16

1

3

2

8

45.0

0

2

1

4

90.0

n/a

15

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

normal sample rate output resumes. This skipping will most likely

occur either at very low velocities, if the noise is high, or at very

high velocities when the angle changes more than the quadrature

resolution in one angle sample period.

SLEW RATE LIMITING

Slew rate limiting is enabled when the ABI.abi_slew_time field is non-

zero. This option separates the sample update rate from the ABI output

rate, and can be used to control two circumstances:

•

The ABI receiver at the host end cannot reliably detect edge

transitions that are spaced at the sample rate of 1 µs. The slew limit

time can be set greater than the nominal angle sample update period,

providing the velocity of the angle rotation would not on average

require ABI transitions greater than the angle sample rate.

•

The angle sample does not monotonically increase or decrease at the

quadrature resolution, thereby “skipping” one or more quadrature

states. In this case, the slew rate limiting logic transitions the ABI

signals in the required valid sequence, at the slew rate, until the

ABI output “catches up” with the angle samples, at which point the

A

B

Q1

Q4

X°

Q2

X + 2R°

Q4

X°

Q2

Q3

Bad AB 

Actual

X + R°

X – 2R°

X – R°

Without Slew Rate Limiꢀng

A

B

Slew

Time

Q1

Q4

Q2

Q4

Q2

Q3

Good AB 

Q1

Actual

X + R°

X°

X + 2R°

X°

X – 2R°

X – R°

X+R°

X– R°

Output 

X + 2R°

X – 2R°

With Slew Rate Limiꢀng

Figure 8: Slew Rate Limiting

16

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

INDEX PULSE

The index pulse I (or Z in some descriptions) marks the absolute zero

(0) position of the encoder. Under rotation, this allows the receiver to

synchronize to a known mechanical/magnetic position, and then use

the incremental A/B signals to keep track of the absolute position. To

support a range of ABI receivers, the ‘I’ pulse has four widths, defined

in Figure 9.

A

B

I/Z Mode 0

I/Z Mode 1

I/Z Mode 2

I/Z Mode 3

A=-2R

Q3

A=-R

Q4

A=0

Q1

A=+R

Q2

True Zero to 360 Disconꢀnuity

Figure 9: Index Pulse

17

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

the measured mechanical angle crosses the value where a change

Brushless DC Motor Output (UVW)

should occur. If hysteresis is used, then the output update method

is different. The output behavior when hysteresis is enabled is

described in the “Angle Hysteresis” section. Figure 10 and Figure

11 below show the UVW waveforms for three and five pole-pair

BLDC motors.

The AAS33001 offers U, V, and W signals for stator commutation

of brushless DC (BLDC) motors. The device is mode-selectable

for 1 to 16 pole-pairs. The BLDC signals (U, V, and W) are gen-

erated based on the quantity of pole-pairs and on angle informa-

tion from the angle sensor. The U, V, and W outputs switch when

U

V

W

Electrical

Angle

0

120

40

240

80

0

120

160

240

200

0

120

280

240

320

0

Mechanical

Angle

120

240

Figure 10: U, V, W Outputs for Three Pole-Pair BLDC Motor

U

V

W

Electrical

Angle

0

150

30

300

60

90

240

120

30

180

330

210

120

240

270

60

210

330

0

Mechanical

Angle

150

300

Figure 11: U, V, W Outputs for Five Pole-Pair BLDC Motor

18

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Conversion from Electrical

Degrees to Mechanical Degrees

Quantity of Poles

(“resolution_pairs”)

Quantity of

Pole-Pairs

Electrical (°)

Mechanical (°)

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

1

2

90

45

3

30

4

22.5

18

5

6

15

7

12.857…

11.25

10

8

9

10

11

12

13

14

15

16

9

8.1818…

7.5

6.9231…

6.4286…

6

5.625

19

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

ABI Behavior at Power-Up

is faster. The time for catching up is at most:

At power-up, the AAS33001 ABI interface communicates the

current position. This means that reading the angle through the

PWM output is not needed to find the current position when

using the ABI interface. The behavior at start-up is the following:

180°

t_{Sꢀꢁꢁꢂꢀ(MAꢃ)}

=

ꢅ AꢆIꢇsleꢈꢇtiꢉe

ꢄ

with R = quadrature resolution.

• During t_PO, the state of the interface is undefined

• After catching up, with the output angle is completed, the

sensor will operate normally.

• During a delay phase, the output will display a 0° angle. With

default settings, the 0° angle is indicated by A = B = low and

I = high.

If “ABI_slew_time” is set to 0, there is no “catch-up” phase. The

output will jump to the final position immediately, e.g. with A =

high and B = low. With “ABI_slew_time” set to 0, the user can-

not determine the position at startup from the ABI interface.

• The interface will the “catch up” with the actual measured

angle by moving in positive or negative direction, whichever

t_Pꢀ

t_catch-ꢅꢆ

Normal oꢆeration

ꢁ ms ꢂmaꢃꢄ

V_CC

A

B

ꢇAꢈꢉꢊslewꢊtimeꢋ

I

�me

Figure 12: ABI Startup Behavior

20

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

angle exits the hysteresis window in either direction. If the exit

is in the opposite direction of rotation where the “head” was, the

Angle Hysteresis

Hysteresis can be applied to the compensated angle to moderate

jitter in the angle output due to noise or mechanical vibration. In

the AAS33001, the hysteresis field (ANG.hysteresis) defines the

width of an angle window at 14-bit resolution. Mathematically,

the width of this window is:

head flips to the opposite end of the hysteresis window and that

becomes the new reference direction. The current direction of

rotation, or “head” for the purposes of hysteresis, is viewable via

the STA.rot bit, where 0 is increasing angle direction and 1 is in

decreasing angle direction.

ANG.hysteresis × (360 / 16384) degrees

giving a range of 0 to 1.384 degrees.

,

This behavior has the following consequences:

1. If the hysteresis window is greater than the output resolution,

the output angle will skip consecutive incremental steps. If the

hysteresis-compensated angle is selected for the ABI output,

this would result in an integrity failure due to skipped quadra-

ture states. To avoid this, it is recommended that the slew rate

limiting be enabled on the ABI interface if hysteresis is used.

The hysteresis-compensated angle can be routed to the ABI or

UVW interface by setting the ABI.ahe bit to 1. On the SPI or Man-

chester interface, the hysteresis-compensated angle can be read via

an alternate register (HANG.angle_hys) at 12-bit resolution.

The effect of the hysteresis is shown in Figure 13. The current

angle position as measured by the sensor is at the “head” of

the hysteresis window. As long as the sensor (electrical) angle

advances in the same direction of rotation, the output angle will

be the sensor angle, minimizing latency. If the sensor angle

reverses direction, the output angle is held static until the sensor

2. If there is jitter due to noise or mechanical vibration, especially

at a static angle position or very slow rotation, the angle will

tend to bias to one side of the window, depending on the direc-

tion of rotation as the angular velocity approaches zero (i.e.,

towards the current “head”) rather than to the average position

of the jitter.

Sensor angle posiꢀon

Output angle

Sensor angle and output angle the same

Window of hysteresis

Direcꢀon of rotaꢀon as seen by the hysteresis logic

Hysteresis

Rotaꢀon

Electrical Angle

1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1

Rotaꢀon

2.7

Hysteresis

Rotaꢀon

2.8

Hysteresis

2.9

Hysteresis

3.0

Rotaꢀon

Hysteresis

2.5

Hysteresis

2.4

Hysteresis

Angle Jump

2.3

Hysteresis

Figure 13: Eﬀect of Hysteresis

Note: The rotation direction resets to 0, or increasing angle direction. At power-up or after LBIST, the hysteresis window will always be behind the initial angle

position, so if hysteresis is enabled, a decreasing angle direction of rotation will not register until the hysteresis window is past.

21

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

DEVICE PROGRAMMING INTERFACE

The AAS33001 can be programmed in two ways:

tions) operate through the primary registers, whether it be via SPI

or Manchester.

• Using the SPI interface for input and output, while supplying

The primary serial registers also provide a data and address loca-

tion for accessing extended memory locations. Accessing these

extended location is done in an indirect fashion: the controller

writes into the primary interface to give a command to the sensor

to access the extended locations. The read/write is executed and

the result is again presented in the primary interface.

the VCC pin with normal operating voltage

• Using a Manchester protocol on the supply pin for input, and

the PWM pin for output.

The AAS33001 does not require special supply voltages to write

to the EEPROM.

All setting fields and all data fields of the sensor can be read

and written using both protocols. If EEPROM locking is used

(detailed in EEPROM lock section), then write access using

either of the protocols will be prevented.

This concept is shown in Figure 14 below.

For writing extended locations, the primary interface offers

extended write address, data, and control registers. Refer to the

section “Write Transaction to EEPROM and Other Extended

Locations” for details on their usage.

A separate setting to completely disable the Manchester interface

is available in the dm field of the EEPROM. Using this setting

will cause the sensor to ignore any commands entered using

Manchester protocol. The SPI interface will not be disabled by

disabling the Manchester interface.

For reading extended locations, the primary interface offers

extended read address, data, and control registers. Refer to the

section “Read Transaction from EEPROM and other Extended

Locations” for details on their usage.

Interface Structure

EEPROM writing requires additional procedures. For more infor-

mation on EEPROM and shadow memory read and write access,

see “EEPROM and Shadow Memory Usage” section.

The AAS33001 consists of two memory blocks. The primary

serial interface registers are used for direct writes and reads

by the host controller for frequently required information (for

example, angle data, warning flags, field strength, and tempera-

ture). All forms of communication (even to the extended loca-

The primary serial interface can be accessed using the SPI and

using the Manchester interface. These two interfaces are detailed

in the sections below.

Primary Serial Interface

Extended Loca�ons

SPI / Manchester IF

User

Address Func�on

Shadow EEPROM

Address Address

Name

02:03 Extended Write Address

04:05 Extended Write Data High

06:07 Extended Write Data Low

08:09 Extended Write Control/Status

0A:0B Extended Read Address

0C:0D Extended Read Control/Status

0E:0F Extended Read Data High

10:11 Extended Read Data Low

–

0x17

0x18

0x19

0x1A

0x1B

...

CU2

PWE

ABI

MSK

PWI

...

Write data

0x58

0x59

0x5A

0x5B

...

Read data

...

1E:1F Device Control (CTRL)

20:21 Angle (ANG)

...

Figure 14: Serial Registers allow access to extended memory (EEPROM and Shadow)

22

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

TIMING

SPI Interface

The interface timing parameters from the specification table are

defined in Figure 16 and Figure 17 below.

The AAS33001 provides a full-duplex 4-pin SPI interface for

each die, using SPI mode 3 (CPHA = 1, CPOL = 1). All program-

ming can be done using this interface, but all programming can

also be done using the Manchester interface.

t

CSH

CSx

t

CHD

CS

SCLKL

SCLKH

If the SPI interface is not used, do not leave the chip select line

floating but instead follow the recommendations in the “Typical

SPI and ABI/UVW Applications” section.

SCLKx

MOSIx

t

HD

SU

The sensor responds to commands received on the MOSI

(Master-Out Slave-In), SCLK (Serial Clock), and CSB (Chip

Select) pins, and outputs data on the MISO (Master-In Slave-Out)

pin. All three input pins are 3.3 V and 5 V SPI compatible, with

threshold values determined by factory EEPROM settings. MISO

output voltage level will conform to 3.3 V or 5 V SPI levels,

based on factory settings. Regular part are shipped with 3.3 V

interface. Contact Allegro for ordering options of the 5 V variant.

R / W

Figure 16: SPI Interface Timings Input

t

CSH

CSx

SCLKx

MISOx

t

CHD

CS

SCLKL

SCLKH

t

DAV

The setup for communication using the SPI interface is given in

Figure 15 below:

DO-15

DO-14

DO-x

Register Contents

Fixed supply

voltage, e.g. 5V

Figure 17: SPI Interface Timings Output

VCC

Host

SPI

Sensor

R/W commands and

return data (SPI)

GND

Figure 15: Programming Connections for SPI Interface

23

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

The purpose of the 17-bit SPI option is to allow delayed reading of

the MISO line by the host. Some hosts allow sampling of data from

MESSAGE FRAME SIZE

The SPI interface requires either 16, 17, or 20-bit packet lengths.

An extended 20-bit SPI packet allows 4 bits of CRC to accom-

pany every data packet. A 17-bit packet is only allowed if the

EEPROM/Shadow bit “s17” is set to 1.

the slave not on the rising edge, but on the next falling edge of

SCLK. This way, in case of long interface delays caused by large

line capacitance or very long cables, the permissible clock speed

can be increased. However, a 17th falling edge is required to read

the 16th bit coming from the sensor. For the sensor to not display

an error when this 17th clock is found, the bit “s17” must be set.

CSN

SCLK

MISO

WRITE CYCLE

15

14

1

0

MOSI

Write cycles consist of a 1-bit low, a 1-bit R/W (write = high), 6

address bits (corresponding to the primary serial register), 8 data

bits, and 4 optional CRC bits. To write a full 16-bit serial register,

two write commands are required (even and odd byte addresses).

MOSI bits are clocked in on the rising edge of the Master-gener-

ated SCLK signal.

Figure 18: 16-Bit SPI Frame

CSN

SCLK

MISO

MOSI

15

14

1

0

X

READ CYCLE

Figure 19: 17-Bit SPI Frame

Reading data always involves at least two SPI frames. In the first

frame, the read command is sent, while in the second frame, the

result from the first read is received. While receiving data from

the last read command, it is possible to send another read com-

mand (duplexed read). This way, every frame except the first one

contains data from the sensor. This is useful for very fast reading

of angle information.

CSN

SCLK

MISO

MOSI

C3

C2

C1

C0

15

14

1

0

Figure 20: 20-Bit SPI Frame

When receiving the last frame, the host can transmit a command

with MOSI set to all zeros. This represents a read command from

register 0x00 and will not change the state of the sensor. Reading

from register 0x00 will output the value 0x0000.

If more clock pulses than expected were detected by the sensor in

an SPI transaction, the interface warning “warn.ier” will activate.

This warning will not activate on clean SPI transactions with 16

or 20 bit, or with clean 17-bit transactions when “s17” is enabled.

In frames where no previous read command was sent, the MISO

data output should be ignored.

24

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Because an SPI read command can transmit 16 data bits at one

time, and the primary serial registers are built from one even

and one odd byte, the entire 16-bit contents of one serial register

may be transmitted with one SPI frame. This is accomplished by

providing an even serial address value. If an odd value address

is sent, only the contents of the single byte will be returned, with

the eight most significant bits within the SPI packet set to zero.

Example: To read all 16 bits of the error register (0x24:0x25), an

SPI read request using address 0x24 should be sent. If only the

8 LSBs are desired, the address 0x25 should be used. Figure 21

shows examples of both an SPI write and an SPI read request,

using a 16-bit SPI message frame.

Input

latched

CSx

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

SCLKx

MOSIx

MISOx

(A) SPI Write Example

(duplexed read available)

R/W

A5

A4

A3

A2

A1

A0

D7

D6

D5

D4

D3

D2

D1

D0

DO-15 DO-14 DO-13 DO-12 DO-11 DO-10 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0

Register Contents (previous Read command selection, or Don’t Care)

Input

latched

CSx

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

(B) SPI Read Example:

register selection

(duplexed read available)

SCLKx

MOSIx

R/W A5

A4

A3

A2

A1

A0

0

DO-15 DO-14 DO-13 DO-12 DO-11 DO-10 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0

MISOx

CSx

Register Contents (previous Read command selection, or Don’t Care)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

(C) SPI Read Example:

data output from

selected register

SCLKx

MOSIx

R/W A5

A4

A3

A2

A1

A0

0

MISOx

DO-15 DO-14 DO-13 DO-12 DO-11 DO-10 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0

Register Contents (previous Read command selection, or Don’t Care)

Figure 21: SPI Read and Write Pulse Sequences

25

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

The CRC can be calculated with the following C code:

CRC

/*

If the user want to check the data coming from the sensor, it is pos-

sible to use 20-bit SPI frames. Without additional setting required,

a 4-bit CRC is automatically generated and placed on the MISO

line if more than 16 bits are read from the sensor.

* CalculateCRC

*

* Take the 16-bit input and generate a 4-bit CRC

* Polynomial = x^4 + x + 1

* LFSR preset to all 1’s

*/

uint8_t CalculateCRC(uint16_t input)

{

The four additional CRC bits on the MOSI line coming from

the host are ignored by the sensor, unless the “PWI.sc” bit is set

within EEPROM. When the incoming CRC check is enabled, an

incoming SPI packet with an incorrect CRC will be discarded,

and the CRC error flag set in serial register “warn.crc”.

bool CRC0 = true;

bool CRC1 = true;

bool CRC2 = true;

bool CRC3 = true;

int i;

The CRC is based on the polynomial x⁴+ x + 1 with the linear

feedback shift register preset to all 1s. The 16-bit packet is shifted

through from bit 15 (MSB) to bit 0 (LSB). The CRC logic is

shown in Figure 22. Data are fed into the CRC logic with MSB

first. Output is sent as C3-C2-C1-C0.

bool DoInvert;

uint16_t mask = 0x8000;

for (i = 0; i < 16; ++i)

{

DoInvert = ((input & mask) != 0) ^ CRC3; // XOR

required?

C0

C1

C2

C3

Input Data

CRC3 = CRC2;

CRC2 = CRC1;

CRC1 = CRC0 ^ DoInvert;

CRC0 = DoInvert;

mask >>= 1;

Figure 22: SPI CRC

The CRC output by the sensor on the MISO pin will always be

calculated correctly. The CRC from the host on the MOSI pin

must be correct if the CRC enable bit PWI.sc in the EEPROM

was set.

}

return (CRC3 ? 8U : 0U) + (CRC2 ? 4U : 0U) + (CRC1 ? 2U

: 0U) + (CRC0 ? 1U : 0U);

}

Note: If the ERD (extended read data) register is read before the

“ERCS.ERD” bit indicates a read has completed, there is a pos-

sibility of a CRC error, as the data could change during the read.

Do not read the ERD register until it is known to be stable based

on the done bit indication or waiting sufficient time.

This code can be tested at http://codepad.org/jPPW1CQ4.

26

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

The master can freely choose any supported Manchester commu-

nication frequency for each transaction. The sensor will recognize

the transaction speed used by the master and send the response at

the same data rate.

Manchester Interface

To facilitate addressable device programming when using the

unidirectional PWM output mode with no need for additional

wiring, the AAS33001 incorporates a serial interface on the VCC

line. All programming can be done using this interface, but all

programming can also be done using the SPI interface.

As Manchester commands are sent on the supply line, the speed

is usually limited by capacitances on the supply line. A reduction

of the bit rate, or using a stronger line driver, can help to ensure

stable communication.

This interface allows an external controller to read and write

registers in the AAS33001 EEPROM and volatile memory. The

device uses a point-to-point communication protocol, based on

Manchester encoding per G.E. Thomas (a rising edge indicates a

0 and a falling edge indicates a 1), with address and data transmit-

ted MSB first. The addressable Manchester code implementation

uses the logic states of the CSN/MOSI pins to set address values

for each die. In this way, individual communication with up to four

AAS33001 dies is possible. Using a broadcast Manchester com-

mand, any die receiving the command will respond. To prevent any

undesired programming of the AAS33001, the serial interface can

be disabled by setting the Disable Manchester bit, “PWI.dm”, to

1. With this bit set, the sensor will ignore any Manchester input on

VCC.

If a correct read command was sent, the sensor responds to the

master using the open-drain output on the PWM line. The high

level will be determined by the PWM pull-up (usually 3.3 V or

5 V), and the low level will be close to GND. The PWM uses an

open drain output, setting the logic levels to GND and logic level

high (see Figure 23). A sufficient pull-up resistor (e.g. 4.7 kΩ)

must be used to pull the line to a maximum logic high level V_IN.

ENTERING MANCHESTER COMMUNICATION MODE

Provided the Disable Manchester bit is not set in EEPROM, the

AAS33001 continuously monitors the VCC line for valid Man-

chester commands. The part takes no action until a valid Man-

chester Access Code is received.

The setup for communication using the Manchester interface is

given in Figure 23.

There are two special Manchester code commands used to

activate or deactivate the serial interface and specify the output

format used during Read operations:

R/W commands

(Manchester code)

1. Manchester Access Code: Enters Manchester Communication

Mode; Manchester code output on the PWM pin. See further

paragraphs for example.

to logic high supply

VCC

Host

GND

MOSI

CS

Set to logic high

or to GND to

choose target ID#

PWM

2. Manchester Exit Code; returns the PWM pin to normal opera-

tion. See further paragraphs for example.

Sensor

Return data

(Manchester code)

Once the Manchester Communication Mode is entered, the PWM

output pin will cease to provide angle data, interrupting any data

transmission in progress.

GND

Figure 23: Manchester Interface Programming Setup

CONCEPT OF MANCHESTER COMMUNICATION

TRANSACTION TYPES

The AAS33001 receives all commands via the VCC pin, and

responds to Read commands via the PWM pin. This implementa-

tion of Manchester encoding requires the communication pulses

be within a high (V_MAN(H)) and low (V_MAN(L)) range of voltages

on the VCC line. Each transaction is initiated by a command from

the controller; the sensor does not initiate any transactions. Two

commands are recognized by the AAS33001: Write and Read.

The Manchester interface allows programming and readout with

a minimal number of pins involved. This is beneficial for sen-

sor subassemblies connected to wiring harnesses, because less

connections are needed. The supply level is typically modulated

between 5 and 8 volts (V_MAN(H)and V_MAN(L)) to produce a “low”

and “high” signal. In the absence of a clock signal, Manchester

encoding is used, allowing the sensor to determine the bit rate

that the host is using.

27

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

When the AAS33001 is operating in PWM mode, the Die ID

value is determined by the state of the CSN and MOSI pins, as

detailed in Table 6:

CONTROLLER MANCHESTER MESSAGE STRUCTURE

The general format of a command message frame is shown in

Figure 24. Note that, in the Manchester coding used, a bit value

of 1 is indicated by a falling edge within the bit boundary, and

a bit value of zero is indicated by a rising edge within the bit

boundary.

Table 6: Pin Values

MOSI

CS

0

ID Value

ID0

0

1

ID1

0

ID2

1

ID3

Using the 4 bits of the Chip Select field, die can be selected

via their ID value, allowing up to four die to be individually

addressed and providing for different group addressing schemes.

Example: If Target ID = [1 0 1 0], all die with ID3 or ID1 will be

selected. If Target ID is set to [0 0 0 0], then no ID comparison

will be made, allowing all sensors to be addressed at once. In

case of PWM line sharing for Manchester communication, read-

ing must be done one die at a time.

Figure 24: Manchester Message Format

A brief description of the bit fields is provided in Table 5:

Table 5: Manchester Message Bit Fields

Bits

Parameter Name

Synchronization

Read/Write

Description

Value '00' sent to identify a command

start and to synchronise sensor clock

2

1

0 = write, 1 = read

Select the target ID for this transaction.

[ID3 ID2 ID1 ID0] are each adressed /

ignored by a 1 / 0 at their address, so

that a write to [0011] will write to ID0

and ID1.

4

Target ID

Reading from several sensors at the

same time will result in corrupted

outputs if the output pins are tied

together.

Writing to [0000] is a broadcast write; it

is written to all sensor dies.

6

16

3

Address

Data

Serial address for read/write

Only for writes: 16 bit write data. Omit

for read commands

CRC

3-bit CRC, needed for all commands

28

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

In addition to the contents of the requested memory location, a

Return Status field is included with every Read Response. This field

provides the ID used to communicate with the part and any errors

which may have occurred during the transaction. These bits are:

SENSOR MANCHESTER MESSAGE STRUCTURE

If a read command with the desired register number was sent

from the controller to the sensor, the device responds with a Read

Response frame using the Manchester protocol over the PWM

output.

• ID – ID (CSN/MOSI) unless BC = 1 (ID will be 00)

• BC – Broadcast; ID field was zero or SPI mode active

• AE – Abort Error; edge detection failure after sync detect

The following command messages can be exchanged between the

device and the external controller:

• Manchester Access Code (host to sensor)

• Manchester Exit Code (host to sensor)

• Manchester Write Command (host to sensor)

• Manchester Read Command (host to sensor)

• Manchester Read Response (sensor to host)

• OR– Overrun Error; A new Manchester command has been

received before the previous request could be completed

• CS – Checksum error; a prior command had a checksum error

For EEPROM address information, refer to the EEPROM

structure section. For serial address locations, refer to the serial

register map.

MANCHESTER ACCESS CODE

Table 7: Manchester Access Code

The Manchester Access Code has to be sent before other Man-

chester commands.

Bits

2

Parameter Name

Synchronization

Read/Write

Description

‘00’

‘0’

1

The Manchester Access Code always operates as a broadcast

pulse, meaning the sensor will not look at the Target ID field. For

example, if two sensors configured with ID0 and ID1 respec-

tively are sharing a common VCC line, a Manchester Access

Code with a Target ID value of [0 0 1 0] results in both sensors

entering Manchester Serial Communication mode.

4

Target ID

‘0000’ (this command will always be a

broadcast, even if it is addressed)

6

16

3

Address

Data

‘111111’ (fixed number for Manchester

access message)

0x62D2 (fixed number for Manchester

access message)

CRC

3-bit CRC

An example is given below, with target ID = [0 0 0 1], data =

access code = 0x62D2, and CRC = ‘110’.

0x62

0xD2

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Figure 25: Target ID = [0 0 0 1], Data = Access code = 0x62D2, CRC = ‘110’ 4.3.5.2

29

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

MANCHESTER EXIT CODE

Table 8: Manchester Exit Code

The Manchester Exit Code can be sent after Manchester access

is complete in order to avoid accidental decoding of Manchester

commands.

Bits

2

Parameter Name

Synchronization

Read/Write

Description

‘00’

‘0’

1

The Manchester Exit Code always operates as a broadcast pulse,

meaning the sensor will not look at the Target ID field. For exam-

ple, if two sensors configured with ID0 and ID1 respectively are

sharing a common VCC line, a Manchester Access Code with a

Target ID value of [0 0 1 0] results in both sensors exiting Man-

chester Serial Communication mode.

4

Target ID

‘0000’ (this command will always be a

broadcast, even if it is addressed)

6

16

3

Address

Data

‘111111’ (fixed number for Manchester

exit message)

0x0000 (any value except 0x62D2 can

be used for Manchester exit message)

CRC

3-bit CRC

An example is given below, with target ID = [0 0 0 1], data =

0x0000, and CRC = ‘110’.

0x00

0

1

0

1

0

Figure 26: Target ID = [0 0 0 1], Data = 0x0000, CRC = ‘110’

MANCHESTER READ COMMAND

Determines the serial address within the sensor from which the

next Read Response will transmit data. The sensor must first

receive a Manchester Access Code before responding to a read

command.

An example is given below where register 0x20 “angle” is read

from target ID [0 0 0 1] with CRC = ‘111’. The two sync pulses

from the Read Response on the PWM return line are also shown.

0x20

This command is sent by the controller.

0

1

0

1

0

1

Table 9: Manchester Read Command

0

Bits

2

Parameter Name

Synchronization

Read/Write

Description

‘00’

‘1’

Figure 27: Target ID = [0 0 0 1], “angle” = 0x20, CRC = ‘111’

1

4

Target ID

Depends on targeted sensor ID, e.g. to

target ID0, use ‘0001’

6

3

Address

CRC

Serial Register Address, e.g. 0x10 for

“read_data_lo”, or 0x20 for “angle”

3-bit CRC

30

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Read from an even address returns even byte [15:8] and odd byte

[7:0].

MANCHESTER READ RESPONSE

The read response transmits data from the sensor to the control-

ler after a read command. These data are sent by the sensor on the

open-drain PWM pin. A pull-up resistor is needed for this to work.

Read from an odd address returns odd byte [7:0] only. Data bits

[15:8] will be zeroes.

Table 10: Manchester Read Response

Bits

2

Parameter Name

Synchronization

ID

Description

‘00’

2

Target ID of the responding sensor die. ‘00’ for ID0, ‘01’ for ID1, ‘10’ for ID2, ‘11’ for ID3.

1

BC flag

“Broadcast”: Value set to ‘1’ if read command was a broadcast command (Target-ID set to [0 0 0

0]), ‘0’ if not.

1

AE flag

OR flag

“Abort error”: Value set to ‘1’ if a previous transaction was aborted and discarded, typically caused

by incorrect bit lengths, ‘0’ is there was no problem. The error is stored until it can be transmitted

on the next read response, and is cleared afterwards.

“Overrun error”: If a command is sent to the sensor while the sensor is still sending a read

response, and this command is completely transmitted before the read response was finished, and

overrun error has occurred. This error is then stored until it can be transmitted on the next read

response, and is cleared afterwards.

1

CS flag

“CRC error”: Value set to ‘1’ if a previous transaction had an incorrect CRC, ‘0’ means there was no

problem. The error is stored until it can be transmitted on the next read response, and is cleared

afterwards.

16

3

data

Read from an Even address: even byte [15:8] and odd byte [7:0].

Read from an Odd address: odd byte [7:0] only. Data bits [15:8] will be zeroes.

CRC

3-bit CRC.

An example is given below where register 0x20 “angle” is read,

and the response is ID ‘00’ (ID0), the four flags are all zeroes (no

errors), the data is “0x5C34”, and the CRC is ‘100’.

0x20

0

1

0

1

0

1

0x5C

0x34

0

1

0

1

0

1

0

1

0

1

0 0

Figure 28: ID = ‘00’, error ﬂag = ‘0000’, Data = 0x5C34, CRC = ‘100’

MANCHESTER READ RESPONSE DELAY

The Manchester Read Reponse starts at the end of the Read

Command. The response may start a ¼ bit time before the CRC

is finished transmitting (overlap with last CRC bit) or ¼ after the

CRC finished transmitting.

31

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

The 3-bit Manchester CRC can be calculated using the following

C code:

CRC

The serial Manchester interface uses a cyclic redundancy check

(CRC) for data-bit error checking of all the bits coming after

the two synchronization bits. The synchronization bits are not

included in the CRC. The CRC algorithm is based on the polyno-

mial:

// command: the manchester command, right justified, does not

include the space for the CRC

// numberOfBits: number of bits in the command not including

the 2 zero sync bits at the start of the command and the three

CRC bits

// Returns: The three bit CRC

// This code can be tested at http://codepad.org/yqTKnfmD

g(x) = x³+ x + 1.

The calculation is represented graphically in Figure 29. The trail-

ing 3 bits of a message frame comprise the CRC token. The CRC

is initialized at 111. Data are fed into the CRC logic with MSB

first. Output is sent as C2-C1-C0.

uint16_t ManchesterCRC(uint64_t data, uint16_t numberOfBits)

{

bool C0 = false;

bool C1 = false;

bool C2 = false;

bool C0p = true;

bool C1p = true;

bool C2p = true;

uint64_t bitMask = 1;

C0

C1

C2

Input Data

bitMask <<= numberOfBits - 1;

1 × x⁰

1 × x¹

1 × x²

1 × x³= x³× x × 1

// Calculate the state machine

for (; bitMask != 0; bitMask >>= 1)

{

Figure 29: Manchester CRC Calculation

C2 = C1p;

C0 = C2p ^ ((data & bitMask) != 0);

C1 = C0 ^ C0p;

C0p = C0;

C1p = C1;

C2p = C2;

}

return (C2 ? 4U : 0U) + (C1 ? 2U : 0U) + (C0 ? 1U : 0U);

}

32

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

EEPROM AND SHADOW MEMORY USAGE

The device uses EEPROM to permanently store configuration

parameters for operation. EEPROM is user-programmable and

permanently stores operation parameter values or customer

information. The operation parameters are downloaded to shadow

(volatile) memory at power-up. Shadow fields are initially loaded

from corresponding fields in EEPROM, but can be overwritten,

either by performing an extended write to the shadow addresses,

or by reprogramming the corresponding EEPROM fields and

power cycling the IC. Use of Shadow Memory is substantially

faster than accessing EEPROM. In situations where many

parameter need to be tested quickly, shadow memory is recom-

mended for trying parameter values before permanently program-

ming them into EEPROM. The shadow memory registers have

the same format as the EEPROM and are accessed at extended

addresses 0x40 higher than the equivalent EEPROM address.

Unused bits in the EEPROM do not exist in the related shadow

register, and will return 0 when read. Shadow registers do not

contain the ECC bits. Shadow registers have the same protection

restrictions as the EEPROM. All registers can be read without

unlocking. The mapping of bits from registers addresses in

EEPROM to their corresponding register addresses in SHADOW

is shown in the EEPROM table (See “EEPROM table” section).

EEPROM Write Lock

It is possible to protect the EEPROM against accidental writes.

• Setting the EEPROM field “lock” to value 0xC (‘1100’ binary)

will block any writes to the EEPROM, so that permanent

changes are not possible anymore. Temporary changes to the

setting are still possible by writing to the shadow memory, but

these changes are lost after a power cycle.

This lock is permanent and cannot be reversed. Reading of the

settings is still possible.

• Setting the EEPROM field “lock” to value 0x3 (‘0011’ binary)

will lock EEPROM writes AND shadow memory writes. This

means none of the sensor settings can be changed anymore.

This lock is permanent and cannot be reversed. Reading of the

settings is still possible.

Enabling EEPROM Access

To enable EEPROM write access after power-on-reset, a unlock

code needs to be written to the serial register “keycode”. This

involves five write commands, which should be executed after

each other:

Write 0x00 to register 0x3C[15:8]

Write 0x27 to register 0x3C[15:8]

Write 0x81 to register 0x3C[15:8]

Write 0x1F to register 0x3C[15:8]

Write 0x77 to register 0x3C[15:8]

This needs to be done once after power-on reset if the customer

intends to write to the EEPROM.

Writing to serial registers and reading from serial registers does

not require anything special after power-on.

Reading all EEPROM cells is always possible.

33

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

This is controlled using the EEPROM fields “cud” (customer

EEPROM Access Exceptions and Write Lock

Exceptions

uses disables), “del” (disable EEPROM lock) and “dur” (disable

unlock requirement). By default, the fields “cud”, “del” and “dur”

are all set to zero.

It is possible to allow writes to the fields “cust” and “cust2”

without having to enable EEPROM access, and even when the

EEPROM write lock is enabled (“lock” = 0xC or “lock” = 0x3).

Table 11 shows how these settings control EEPROM access to

different fields:

Table 11: EEPROM access exceptions for field “customer” and “customer2”

Writes to Customer2

Writes to Customer

(0x1F) possible…

Writes to all other

EEPROM possible…

“cud” setting

“dur setting

“del” setting

“lock” setting

(0x17) possible…

after keycode

always

0

1

0

1

0

1

0

1

0

1

0/1

0

0x0

after keycode

never

after keycode

never

0x0

0xC/0x3

0x0

never

1

after keycode

never

0

never

1

always

never

0/1

0

after keycode

always

after keycode

always

after keycode

never

0x0

0xC/0x3

never

1

after keycode

never

after keycode

never

0

never

1

always

never

The 32-bit of data in “ewd” are then written to the address speci-

fied in “ewa”.

Write Transaction to EEPROM and Other

Extended Locations

The bit “ewcs.wdn” can be polled to determine when the write

completes. This is only necessary for EEPROM writes, which can

take up to 24 ms to complete. Shadow register writes complete

immediately in one system clock cycle after synchronization.

Invoking an extended write access is a three-step process:

1. Write the extended address into the “ewa” register (using

SPI or Manchester direct access). “ewa” is the 8-bit extended

address that determines which extended memory address will

be accessed.

2. Write the data that is to be transferred into the “ewd” regis-

ters (using SPI or Manchester direct access). This will take

four SPI writes or 2 Manchester packets to load all 32 bits of

data.

3. Invoke the extended access by writing the direct “ewcs.exw”

bit with ‘1’.

34

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

For example, to write location 0x1F in the EEPROM with 0x00A45678:

• Write 0x1F to lower 8 bits of EWA register (0x1F to EWA+1 Address 0x03)

0x43

0x1F

• Write 0x00A45678 to EWD (0x00 to EWD, 0xA4 to EWD+1, 0x56 to EWD+2, 0x78 to EWD+3)

0x44

0x00

0x45

0xA4

0x46

0x56

0x47

0x78

• Write 0x80 to EWCS

0x48

0x80

• Read EWCS+1 until bit 0 (“wdn”) is set, or wait enough time.

In the example, register 0x08 is read, so that the second output byte is from register 0x09, and we wait for bit 0 to become ‘1’, which

happens in the last read.

0x00

0x08

0x00

0x01

0x08

0x00

0x01

0x00

0x08

0x00

0x01

If an access violation occurs (address not unlocked), the transaction will be terminated and the corresponding “rdn” or “wdn” bit set,

and the “xee” warning bit will assert. The “xee” bit in the “err” register will also set if the EEPROM write aborts.

35

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

In the figure below, V

_NOM(H)represents the nominal voltage

After writing to the EEPROM, verify that the write was success-

ful by performing an EEPROM margin check.

programmed into EEPROM cells containing a ‘1’, and V_NOM(L)

represents the nominal voltage programmed into EEPROM cells

containing a ‘0’. The red and blue lines represent the actual volt-

age levels in the programmed cells for ‘1’ and ‘0’ values respec-

tively. As can be seen, at time 0 when the margin test is run, both

high and low levels still appear to be the correct value when the

threshold is moved to the margin testing levels.

EEPROM Margin Check

Due to nonidealities in transistors, current will slowly leak into

or out of EEPROM cells and can, over time, cause small changes

in the stored voltage level. Variances in voltage levels of the

charge pump can result in a variety of stored EEPROM cell

voltages when programming. If this value is marginally close to

the threshold, the small drift over lifetime can cause this value to

move across the threshold. This results in a corrupted EEPROM

value. Since this drift happens slowly over time, if there is an

issue, it may not appear for years. For this reason, it is important

to perform margin testing (margining) to verify the internal volt-

age levels of EEPROM cells after programming, and ensure there

will be no issue in the future.

EEP voltage

V_NOM(H)

Margin Test [H]

V_THRESH

Margining is performed by Allegro on all registers at final test.

Since EEPROM cell voltages are only modified when writing to

the cell, it is not necessary to perform margining on registers that

have not been modified.

Margin Test [L]

V_NOM(L)

Margining is performed in two steps: the first checks the validity

of the voltage stored on digital ‘1’ cells, and the second checks

the voltage stored on digital ‘0’ cells. It is important to perform

both steps to ensure there are no issues.

�me

Figure 30: Example of passing programming voltages

In the figure below, the high and low voltage levels at the time

of programming are further from their target. The drift over time

results in these value crossing V_THRESH, and becoming corrupted.

At time 0 when the margin test is run, these values fail, and

would be reported as errors to be reprogrammed.

In order to perform margining, a value of ‘0b0001’ must be writ-

ten to the SPECIAL field of the CTRL register. This reduces the

internal threshold value. Once this value is written, an EEPROM

read will use this lower threshold when reading EEPROM values.

Perform a read on all EEPROM registers that are being tested,

and confirm they read correctly. If a stored voltage is marginal

to the normal operating threshold, it will appear as a ‘1’ when it

should be a ‘0’.

EEP voltage

V_NOM(H)

Repeat this test with the value of ‘0b0010’ in the SPECIAL reg-

ister to raise the threshold value above normal operation. Again,

read all EEPROM registers being tested. In this test, any stored

high voltage that is marginal to the normal threshold will appear

as a ‘0’ when they should be ‘1’.

Margin Test [H]

V_THRESH

Margin Test [L]

If during either test, a bit is read incorrectly, simply perform

another EEPROM write of the desired values to the register, and

retest the margins.

V_NOM(L)

Unlike other values in the SPECIAL field, these values will

persist and can be read to confirm the write was successful. As a

result, the SPECIAL register must be cleared (or power cycled) to

return the threshold value to its normal level.

�me

Figure 31: Example of failing programming voltages

36

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Margining is shown below as a list of high level steps. For details

on performing individual steps, see the associated sections.

1. Clear the ERR and WARN registers.

2. Write new data to EEPROM as desired.

3. Check the following ﬂags for communication errors: ESE,

EUE, XEE, IER, CRC, BSY.

4. Set CTRL.special to ‘0001’ and conﬁrm by writing 0xA5 to

CTRL.initiate_special.

5. Check the following ﬂags for communication errors: ESE,

EUE, XEE, IER, CRC, BSY.

6. Read all EEPROM registers changed in step 1 and verify

their contents.

7. Set CTRL.special to ‘0010’ and conﬁrm by writing 0xA5 to

CTRL.initiate_special.

8. Check the following ﬂags for communication errors: ESE,

EUE, XEE, IER, CRC, BSY.

9. Read all EEPROM registers changed in step 1 and verify

their contents.

10. If any values read in steps 3/5 are not what was set in step 1,

repeat steps 1-6 for erroneous registers.

11. Set CTRL.special to ‘0000’, or power cycle the part.

37

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

EEPROM read accesses may take up to 2 µs to complete. The

Read Transaction from EEPROM and other

Extended Locations

“ercs.rdn” bit can be polled to determine if the read access is

complete before reading the data. Shadow register reads complete

in one system clock cycle after synchronization. Do not attempt

to read the “erd” registers if the read access is potentially in

process, as it could change during the serial access and the data

will be inconsistent. It is also possible that an SPI CRC error will

be detected if the data changes during the serial read via the SPI

interface.

Extended access is provided to additional memory space via the

direct registers. This access includes the EEPROM and EEPROM

shadow registers. All extended registers are up to 32 bits wide.

Invoking an extended read access is a three-step process:

1. Write the extended address to be read into the “era” register

(using SPI or Manchester direct access). “era” is the 8-bit

extended address that determines which extended memory

address will be accessed.

2. Invoke the extended access by writing the direct “ercs.ext”

bit with ‘1’. The address speciﬁed in “era” is then read, and

the data is loaded into the “erd” registers.

3. Read the “erd” registers (using SPI or Manchester direct ac-

cess) to get the extended data. This will take multiple packets

to get all 32 bits.

38

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

For example, to read location 0x1F in the EEPROM:

• Write 0x1F to lower 8 bits of “era” (0x1F to “era+1”, Address 0x0B)

0x4B

0x1F

• Write 0x80 to “ercs”

0x4C

0x80

• Read “ercs”+1 until bit 0 (“rdn”) is set, or wait enough time.

In the example, register 0x0C is read, so that the last bit of the second output byte contains the “rdn” bit.

0x0C

0x52

0x00

0x7B

0x00

0x01

• Read “erdh” (upper 16 bits of read data)

• Read “erdl” (lower 16 bits of read data)

In the example below, the result for the data at address 0x1F is 0x58A45678. In this value,

□ Bit [31:26] are the EEPROM CRC

□ Bit [25:24] are unused and zero

□ Bit [23:0] are the EEPROM values that can be used. These are the 24 bits containing the information 0xA45678 that was written

in the EEPROM write example.

0x00

0xA4

0x10

0x00

0x56

0x0E

0x00

0x58

0x00

0x78

Note that it would have been possible to pipeline transactions in this example, i.e. send a new command while reading return data from

the old command. This way the transaction could have been performed in 5 SPI frames instead of 8.

39

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Shadow Memory Read and Write Transactions

Shadow memory Read and Write transactions are identical to

those for EEPROM. Instead of addressing to the EEPROM

extended address, one must address to the Shadow Extended

addresses, which are located at an offset of 0x40 above the

EEPROM. Refer to the EEPROM table for all addresses.

40

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

SERIAL INTERFACE TABLE

Table 12: Primary Serial Interface Registers Bits Map

Addressed Byte (MSB)

Addressed Byte + 1 (MSB)

Address* Register Read/

LSB

(0x00) Symbol Write

Address

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0x02

0x04

0x06

0x08

0x0A

0x0C

0x0E

0x10

ewa

ewdh

ewdl

RW

0

write_adr

0x03

0x05

0x07

0x09

0x0B

0x0D

0x0F

0x11

write_data_hi

write_data_lo

ewcs WO/RO exw

0

wip

0

wdn

rdn

era

ercs

erdh

erdl

RW

WO/RO

RO

0

read_adr

exr

rip

0

read_data_hi

read_data_lo

RO

0x12

0x14

0x16

0x18

0x1A

0x1C

0x13

0x15

0x17

0x19

0x1B

0x1D

Unused

RO

0

0x1E

0x20

0x22

0x24

0x26

0x28

0x2A

0x2C

0x2E

0x30

0x32

0x34

0x36

0x38

0x3A

0x3C

0x3E

ctrl

RW/WO

RO

special

cls

clw

cle

initiate_special

0x1F

0x21

0x23

0x25

0x27

0x29

0x2B

0x2D

0x2F

0x31

0x33

0x35

0x37

0x39

0x3B

0x3D

0x3F

ang

0

1

0

ef

0

uv

0

p

0

1

0

p

angle

sta

RO

0

war

ier

0

stf

crc

0

dieid

rot

plk

xee

0

zie

tr

sdn

eue

ese

0

bdn

ofe

sat

0

lbr

uvd

0

cstr

uva

bsy

0

bip

msl

msh

0

aok

rst

0

err

RO

0

1

avg

0

abi

srw

0

warn

RO

0

1

Unused

hang

RO

0

RO

0

RO

0

RO

0

RO

ef

uv

angle_hys

ang15

zang

RO

angle_15

RO

ef

0

uv

0

p

0

angle_zcd

Unused

key

RO

0

RO

0

RO

0

WO/RO

RO

keycode

cul

0

Unused

0

*Addresses that span multiple bytes are addressed by the most significant byte.

41

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

PRIMARY SERIAL INTERFACE REGISTERS REFERENCE

Location 0x02:0x03 (“ewa”)

Location 0x0A:0x0B (“era”)

ewa.write_adr

era.read_adr

The field “write_adr” is a bit field located at address 0x02[7:0].

This bit field is part of the location “ewa”.

The field “read_adr” is a bit field located at address 0x0A[7:0].

This bit field is part of the location “era”.

8-bit address for extended writes. Writes require unlock.

8-bit address for extended reads.

0x00-0x1F: EEPROM (takes about 24 ms)

0x40-0x5F: Shadow

0x00-0x1F: EEPROM (takes about 2 µs)

0x40-0x5F: Shadow

NOTE: After LBIST or a reload of EEPROM values, this value of

read_adr will be changed.

Location 0x04:0x05 (“ewdh”)

ewdh.write_data_hi

Location 0x0C:0x0D (“ercs”)

The field “write_data_hi” is a bit field located at address

0x04[15:0]. This bit field is part of the location “ewdh”.

ercs.rdn

Upper 16 bits of data for an extended write operation.

The field “rdn” is a bit located at address 0x0C[0]. This bit is part

of the location “ercs”.

Location 0x06:0x07 (“ewdl”)

Read done when ‘1’, clears when “exr” set to ‘1’.

ewdl.write_data_lo

ercs.rip

The field “write_data_lo” is a bit field located at address

0x06[15:0]. This bit field is part of the location “ewdl”.

The field “rip” is a bit located at address 0x0C[8]. This bit is part

of the location “ercs”.

Lower 16 bits of data for an extended write operation.

Read in progress when ‘1’.

Location 0x08:0x09 (“ewcs”)

ercs.exr

ewcs.wdn

The field “exr” is a bit located at address 0x0C[15]. This bit is

part of the location “ercs”.

The field “wdn” is a bit located at address 0x08[0]. This bit is

part of the location “ewcs”.

Initiate extended read by writing with ‘1’. Set “rip” and clears

“rdn”. Write-only, always reads back 0.

Write done when wdn = ‘1’; wdn clears when exw is set to ‘1’.

Location 0x0E:0x0F (“erdh”)

ewcs.wip

The field “wip” is a bit located at address 0x08[8]. This bit is part

of the location “ewcs”.

erdh.read_data_hi

The field “read_data_hi” is a bit field located at address

0x0E[15:0]. This bit field is part of the location “erdh”.

Write in progress when ‘1’.

Upper 16 bits of data from extended read operation, valid when

RDN set to ‘1’.

ewcs.exw

The field “exw” is a bit located at address 0x08[15]. This bit is

part of the location “ewcs”.

Initiate extended write by writing with ‘1’. Set “wip” and clears

“wdn”. Write-only, always reads back 0.

42

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

ctrl.special

Location 0x10:0x11 (“erdl”)

The field “special” is a bit field located at address 0x1E[15:12].

This bit field is part of the location “ctrl”.

erdl.read_data_lo

The field “read_data_lo” is a bit field located at address

0x10[15:0]. This bit field is part of the location “erdl”.

Special actions. Some of the actions will only be invoked after

the “initiate_special” field is written with the correct value. This

field will return 0x00 on completion. Self-tests may be run in

parallel.

Lower 16 bits of data from extended read operation, valid when

RDN set to ‘1’.

0000 - No action.

Location 0x1E:0x1F (“ctrl”)

0001 - Enable EEPROM low voltage margining.

0010 - Enable EEPROM high voltage margining.

0101 - Reload EEPROM. Requires unlock of part. Starts after

writing 0xA5 to “initiate_special”.

0111 - Hard reset. Requires unlock of part. Starts after writing

0x5A to “initiate_special”.

1001 - Run CVH self-test. Starts after writing 0xB9 to “initi-

ate_special”.

1010 - Run logic BIST. Starts after writing 0xB9 to “initi-

ate_special”.

ctrl.initiate_special

The field “initiate_special” is a bit field located at address

0x1E[7:0]. This bit field is part of the location “ctrl”.

For certain actions from “special” bit field, a code must be set to

“initiate special”. These are to be written into this bit field.

0xB9 initiates CVH self-test or functional BIST.

0xA5 initiates EEPROM margin or EEPROM reload.

0x5A initiates hard reset.

1011 - Run CVH self-test and logic-BIST in parallel. Starts

after writing 0xB9 to “initiate_special”.

Read always returns 0x00.

Location 0x20:0x21 (“ang”)

ctrl.cle

The field “cle” is a bit located at address 0x1E[8]. This bit is part

of the location “ctrl”.

ang.angle

The field “angle” is a bit field located at address 0x20[11:0]. This

bit field is part of the location “ang”.

Clear error register “err” when written with ‘1’. Clears bits that

were previously read from the “err”. Bits that were not yet read

will not be cleared, so the user needs to read ERR first. Write-

only, always returns 0.

Angle from PLL after processing. Angle in degrees = unsigned

12-bit value × (360 / 4096).

ang.p

ctrl.clw

The field “p” is a bit located at address 0x20[12]. This bit is part

of the location “ang”.

The field “clw” is a bit located at address 0x1E[9]. This bit is part

of the location “ctrl”.

Odd parity computed across all bits of this register. Value is cho-

sen in such a way that there should always be an odd number of

1’s in the 16-bit word.

Clear warning (WARN) register when set to ‘1’. Clears bits that

were previously read from the WARN, so need to read WARN

first. Write-only, always returns 0.

ang.uv

ctrl.cls

The field “uv” is a bit located at address 0x20[13]. This bit is part

of the location “ang”.

The field “cls” is a bit located at address 0x1E[10]. This bit is

part of the location “ctrl”.

Undervoltage flag (real time). OR of “uva” and “uvd” undervolt-

age flags. Conditions are realtime, but are masked by the Shadow

mask bits.

Clear bits “sdn” and “bdn” from “status” register when set to ‘1’.

Write-only, returns 0 when read.

43

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

ang.ef

sta.rot

The field “ef” is a bit located at address 0x20[14]. This bit is part

of the location “ang”.

The field “rot” is a bit located at address 0x22[7]. This bit is part

of the location “sta”.

Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is

set.

Rotation direction based on hysteresis

(‘0’ = increasing angle, ‘1’ = decreasing angle).

Location 0x22:0x23 (“sta”)

sta.dieid

The field “dieid” is a bit field located at address 0x22[9:8]. This

bit field is part of the location “sta”.

sta.aok

The field “aok” is a bit located at address 0x22[0]. This bit is part

of the location “sta”.

DIE ID from EEPROM (for multi-die packages).

Angle output OK. PLL is in lock

Location 0x24:0x25 (“err”)

This is the error register. All errors are latched, meaning they will

remain high after they occurred just once. Errors need to be read

and then cleared in order to remove them. It is important that the

user clears errors, so that subsequent errors become visible. This

is especially important for the “rst” error flag (reset), which is

always enabled after power on. Not removing it means that an

unexpected reset cannot be discovered afterwards.

sta.bip

The field “bip” is a bit located at address 0x22[1]. This bit is part

of the location “sta”.

Boot in progress.

sta.cstr

The field “cstr” is a bit located at address 0x22[2]. This bit is part

of the location “sta”.

err.rst

The field “rst” is a bit located at address 0x24[0]. This bit is part

of the location “err”.

CVH self-test running.

Reset condition. Sets on power-on reset or on hard reset. Does

not set on LBIST.

sta.lbr

The field “lbr” is a bit located at address 0x22[3]. This bit is part

of the location “sta”.

err.msl

LBIST running.

The field “msl” is a bit located at address 0x24[1]. This bit is part

of the location “err”.

sta.bdn

Magnetic sense low fault. Magnetic sense was below the “mag_

thres_lo” limit.

The field “bdn” is a bit located at address 0x22[4]. This bit is part

of the location “sta”.

err.uva

Boot complete. EEPROM loaded and any startup self-tests are

complete.

The field “uva” is a bit located at address 0x24[2]. This bit is part

of the location “err”.

sta.sdn

Undervoltage detector tripped. Will be set again after clearing if

the undervoltage situation persists. Based on analog regulator.

The field “sdn” is a bit located at address 0x22[5]. This bit is part

of the location “sta”.

Special access (from ctrl register) done. Clears to ‘0’ when SPE-

CIAL triggered, set ‘1’ when complete.

44

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

err.uvd

err.stf

The field “stf” is a bit located at address 0x24[10]. This bit is part

of the location “err”.

The field “uvd” is a bit located at address 0x24[3]. This bit is part

of the location “err”.

Self-test failure.

Undervoltage detector tripped. Will be set again after clearing if

the undervoltage situation persists.

err.war

The field “war” is a bit located at address 0x24[11]. This bit is

part of the location “err”.

err.ofe

The field “ofe” is a bit located at address 0x24[4]. This bit is part

of the location “err”.

Warning. Some unmasked error bits are set in the WARN register.

If WAR in mask register “MSK” is set, this will be forced to 0.

Oscillator frequency watchdog tripped.

Location 0x26:0x27 (“warn”)

err.eue

warn.msh

The field “eue” is a bit located at address 0x24[5]. This bit is part

of the location “err”.

The field “msh” is a bit located at address 0x26[1]. This bit is

part of the location “warn”.

EEPROM uncorrectable error. A multi-bit EEPROM read

occurred.

Magnetic sense high fault. Magnetic sense has exceeded the

“mag_thres_hi” limit.

warn.bsy

err.zie

The field “bsy” is a bit located at address 0x26[2]. This bit is part

of the location “warn”.

The field “zie” is a bit located at address 0x24[6]. This bit is part

of the location “err”.

Extended access overflow. An EXW or EXR was initiated while

previous extended read or write was in progress.

Zero crossing integrity error. A zero crossing did not occur within

the maximum time expected, likely indicating missing magnet, an

extreme rotation speed, or a sensor defect.

warn.sat

The field “sat” is a bit located at address 0x26[4]. This bit is part

of the location “warn”.

err.plk

The field “plk” is a bit located at address 0x24[7]. This bit is part

of the location “err”.

Aggregate saturation flag. Shows that any internal signals have

saturated, likely to have been cause by extremely strong or weak

fields.

PLL lost lock.

warn.ese

err.abi

The field “ese” is a bit located at address 0x26[5]. This bit is part

of the location “warn”.

The field “abi” is a bit located at address 0x24[8]. This bit is part

of the location “err”.

EEPROM soft error. A correctable (single-bit) EEPROM read

occurred.

ABI integrity fault. The quadrature integrity of the ABI could not

be maintained.

warn.tr

err.avg

The field “tr” is a bit located at address 0x26[6]. This bit is part

of the location “warn”.

The field “avg” is a bit located at address 0x24[9]. This bit is part

of the location “err”.

Temperature out of range. The temperature sensor calculated

a temperature below –60°C or above 180°C. Temperature will

saturate at those limits.

Angle averaging error. The ORATE is too high for the velocity

and the averaging is corrupted.

45

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

warn.xee

Location 0x30:0x31 (“hang”)

The field “xee” is a bit located at address 0x26[7]. This bit is part

of the location “warn”.

hang.angle_hys

The field “angle_hys” is a bit field located at address 0x30[11:0].

This bit field is part of the location “hang”.

Extended execute error. A command intiated by an extended

write failed. Write failed due to access error (not unlocked) or

EEPROM write failure.

Angle from PLL after processing. Angle in degrees = unsigned

12-bit value × (360 / 4096).

warn.srw

hang.p

The field “srw” is a bit located at address 0x26[8]. This bit is part

of the location “warn”.

The field “p” is a bit located at address 0x30[12]. This bit is part

of the location “hang”.

Slew rate warning. This warning is asserted if the ABI slew rate

limiting is enabled and a condition that requires the limiting to be Odd parity computed across all bits of this register. Value is cho-

applied has occurred.

sen in such a way that there should always be an odd number of

1’s in the 16-bit word.

warn.crc

hang.uv

The field “crc” is a bit located at address 0x26[10]. This bit is

part of the location “warn”.

The field “uv” is a bit located at address 0x30[13]. This bit is part

of the location “hang”.

Incoming SPI CRC error. Packet was discarded.

Undervoltage flag (real time). OR of analog and digital UV flags.

Conditions are realtime, but are masked by the Shadow mask

warn.ier

The field “ier” is a bit located at address 0x26[11]. This bit is part bits.

of the location “warn”.

hang.ef

Interface error. Invalid number of bits in SPI packet, or bit 15 of

MOSI data = ‘1’. Packet was discarded.

The field “ef” is a bit located at address 0x30[14]. This bit is part

of the location “hang”.

Also Manchester error.

Error flag. Will be ‘1’ if any unmasked bit in ERR or WARN is

set.

Location 0x28:0x29 (“tsen”)

Location 0x32:0x33 (“ang15”)

tsen.temperature

The field “temperature” is a bit field located at address

0x28[11:0]. This bit field is part of the location “tsen”.

ang15.angle_15

The field “angle_15” is a bit field located at address 0x32[14:0].

This bit field is part of the location “ang15”.

Current junction temperature from internal temperature sensor

relative to 25°C (signed value). Value is in 1/8 of a degree. Tem-

perature °C = (tsen.temperature / 8) + 25.0.

15-bit compensated angle (not rounded).

Location 0x2A:0x2B (“field”)

ﬁeld.gauss

The field “gauss” is a bit field located at address 0x2A[11:0].

This bit field is part of the location “field”.

Field strength in gauss.

46

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Location 0x34:0x35 (“zang”)

Location 0x3C:0x3D (“key”)

zang.angle_zcd

key.cul

The field “angle_zcd” is a bit field located at address 0x34[11:0].

This bit field is part of the location “zang”.

The field “cul” is a bit located at address 0x3C[0]. This bit is part

of the location “key”.

Angle from zero-crossing-detector, which is used to verify that

the PLL angle is correct.

Customer unlocked if ‘1’.

key.keycode

Angle in degrees = unsigned 12-bit value × (360 / 4096).

The field “keycode” is a bit field located at address 0x3C[15:8].

This bit field is part of the location “key”.

zang.p

The field “p” is a bit located at address 0x34[12]. This bit is part

of the location “zang”.

Customer access keycode is entered here, using five subsequent

write commands with the numbers: 0x00, 0x27, 0x81, 0x1F,

0x77.

Odd parity computed across all bits of this register. Value is cho-

sen in such a way that there should always be an odd number of

1’s in the 16-bit word.

Always reads back 0.

zang.uv

The field “uv” is a bit located at address 0x34[13]. This bit is part

of the location “zang”.

Undervoltage flag (real time). OR of analog and digital UV flags.

Conditions are realtime, but are masked by the Shadow mask

bits.

zang.ef

The field “ef” is a bit located at address 0x34[14]. This bit is part

of the location “zang”.

Error flag. Will be ‘1’ if any unmasked bit in ERR or WARN is set.

47

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

EEPROM AND SHADOW REGISTER TABLE

The EEPROM register bitmap is shown below. Addresses that

span multiple bytes are addressed by the most significant byte.

ECC field in bits [31:26] of each word are not shown here. Bits

[25:24] of each EEPROM word are unused and not shown here,

but are included in the ECC.

All EEPROM content can be read by the user. The EEPROM

Table 13: EEPROM/Shadow Memory Map

Shadow

Bits

EEPROM Register

Memory

Address Name

23

22

21

20

–

19

–

18

–

17

–

16

–

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Address

–

0x17

0x18

0x19

CU2

PWE

ABI

customer 2

0x58

0x59

0x5A

0x5B

0x5C

0x5D

0x5E

–

tr

–

msh sat

ese msl

uv

avg

zie

plk

stf

eue

ofe

abi_slew_time

inv

ahe

–

index_mode wdh plh

ioe uvw

resolution_pairs

0x1A MSK ierm crcm

srwm xeem trm esem satm tcwm bsym mshm tovm warm stfm avgm abim plkm ziem euem ofem uvdm uvam mslm rstm

0x1B

0x1C ANG

0x1D

0x1E COM

0x1F CUS

PWI

pen

–

pwm_band

pwm_freq

-

phe peo pes

eli

–

ls

–

wp_hys

zal

–

wp_thres

dm

–

s17

–

sc

orate

–

rd

–

ro

–

hysteresis

cycle_time

zero_offset

–

lock

lbe

cse

dur

del

-

cud

dst

dhr

mag_thres_hi

mag_thres_lo

customer

0x60

0x61

…

0x20 LIN00

0x21 LIN01

Linearization Error Segment 1

Linearization Error Segment 3

…

Linearization Error Segment 0

Linearization Error Segment 2

---

…

0x6E

0x6F

0x80

0x2E LIN14

0x2F LIN15

Linearization Error Segment 29

Linearization Error Segment 31

Linearization Error Segment 28

Linearization Error Segment 30

–

ALV

Alive counter

48

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

EEPROM REFERENCE

PWE.zie

Location 0x17 (“CU2”)

The field “zie” is a bit located at address 0x18[4]. This bit is part

of the location “PWE”.

Customer-useable field, intended for storing data.

This word can be written even if EEPROM is locked. Write

may be allowed without the unlock code based on COM.dur and

COM.del settings (see word 0x1E).

PWM zero crossing integrity error enable. Duty cycle 27.5% at

half the selected PWM frequency.

PWE.avg

CU2.customer 2

The field “avg” is a bit located at address 0x18[5]. This bit is part

of the location “PWE”.

The field “customer 2” is a bit field located at address

0x17[23:0]. This bit field is part of the location “CU2”.

PWM angle averaging error enable. Duty cycle is 33.125% at

half the selected PWM frequency.

Customer-useable field, intended for storing data.

Depending on COM.dur and COM.del settings, this word can

be written even if EEPROM is locked. Details are given in the

chapter “EEPROM write lock”.

PWE.uv

The field “uv” is a bit located at address 0x18[6]. This bit is part

of the location “PWE”.

Location 0x18 (“PWE”)

PWM undervoltage Fault enable (analog or digital). Duty cycle

38.75% at half the selected PWM frequency.

PWE.ofe

PWE.msl

The field “ofe” is a bit located at address 0x18[0]. This bit is part

of the location “PWE”.

The field “msl” is a bit located at address 0x18[7]. This bit is part

of the location “PWE”.

PWM oscillator frequency watchdog error enable. Duty cycle

output 5% at half the selected PWM frequency.

PWM magnetic Sense Low Fault enable. Duty cycle 44.375% at

half the selected PWM frequency.

PWE.eue

PWE.ese

The field “eue” is a bit located at address 0x18[1]. This bit is part

of the location “PWE”.

The field “ese” is a bit located at address 0x18[8]. This bit is part

of the location “PWE”.

PWM EEPROM uncorrectable error enable. Duty cycle 10.625%

at half the selected PWM frequency.

PWM EEPROM Soft Error enable. Duty cycle 50% at half the

selected PWM frequency.

PWE.stf

PWE.sat

The field “stf” is a bit located at address 0x18[2]. This bit is part

of the location “PWE”.

The field “sat” is a bit located at address 0x18[9]. This bit is part

of the location “PWE”.

PWM self-test failure error enable. Duty cycle 16.25% at half the

selected PWM frequency.

PWM saturation warning enable. Duty cycle 55.625% at half the

selected PWM frequency.

PWE.plk

PWE.msh

The field “plk” is a bit located at address 0x18[3]. This bit is part

of the location “PWE”.

The field “msh” is a bit located at address 0x18[10]. This bit is

part of the location “PWE”.

PWM PLL Lost Lock error enable. Duty cycle 21.875% at half

the selected PWM frequency.

PWM magnetic sense high fault enable. Duty cycle 61.25% at

half the selected PWM frequency.

49

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

PWE.tr

ABI.index_mode

The field “tr” is a bit located at address 0x18[11]. This bit is part

of the location “PWE”.

The field “index_mode” is a bit field located at address

0x19[9:8]. This bit field is part of the location “ABI”.

PWM temperature sensor out of range error enable. Duty cycle

66.875% at half the selected PWM frequency.

ABI index mode, defines width and placement of index pulse.

Mode 0: Angle = 0

Mode 1: Angle = –R or 0

Mode 2: Angle = –R, 0 or +R

Mode 3: Angle = –2R, –R, 0 or +R

Location 0x19 (“ABI”)

ABI.resolution_pairs

The field “resolution_pairs” is a bit field located at address

0x19[3:0]. This bit field is part of the location “ABI”.

ABI.ahe

The field “ahe” is a bit located at address 0x19[12]. This bit is

part of the location “ABI”.

ABI or UVW resolution.

If ABI selected, this selects AB cycle counts per rotation. Cycle

count = 2^(14–n)where n is selected code.

ABI hysteresis enable. If 1, use hysteresis on angle going to ABI.

ABI.inv

If UVW selected, this is the number of pole pairs – 1.

The field “inv” is a bit located at address 0x19[15]. This bit is

part of the location “ABI”.

ABI.uvw

The field “uvw” is a bit located at address 0x19[4]. This bit is

part of the location “ABI”.

Invert ABI or UVW signals.

ABI.abi_slew_time

Incremental outputs UVW (1), ABI (0).

The field “abi_slew_time” is a bit field located at address

0x19[21:16]. This bit field is part of the location “ABI”.

ABI.ioe

The field “ioe” is a bit located at address 0x19[5]. This bit is part

of the location “ABI”.

ABI slew rate limit. ‘0’ mean slew rate limiter is disabled. Oth-

erwise, (N + 1) × 125 ns (nominal) is the minimum edge-to-edge

time for the ABI output. This limits the maximum ABI velocity.

Reducing the ABI output resolution may be useful to counteract

this effect.

Incremental output pins enable (see UVW).

ABI.plh

The field “plh” is a bit located at address 0x19[6]. This bit is part

of the location “ABI”.

Location 0x1A (“MSK”)

MSK.rstm

Enable ABI all high (before inversions) as error mode if PLL is

unlocked.

The field “rstm” is a bit located at address 0x1A[0]. This bit is

part of the location “MSK”.

ABI.wdh

Reset mask. If set to ‘1’, the corresponding error will not affect

the error flag “ef”.

The field “wdh” is a bit located at address 0x19[7]. This bit is

part of the location “ABI”.

MSK.mslm

Enable ABI all high (before inversions) as error mode if high-

frequency watchdog trips.

The field “mslm” is a bit located at address 0x1A[1]. This bit is

part of the location “MSK”.

Magnetic Sense Low Fault Mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

50

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

MSK.uvam

MSK.avgm

The field “uvam” is a bit located at address 0x1A[2]. This bit is

part of the location “MSK”.

The field “avgm” is a bit located at address 0x1A[9]. This bit is

part of the location “MSK”.

Analog undervoltage Fault Mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

Angle averaging fault mask. If set to ‘1’, the corresponding error

will not affect the error flag “ef”.

MSK.uvdm

MSK.stfm

The field “uvdm” is a bit located at address 0x1A[3]. This bit is

part of the location “MSK”.

The field “stfm” is a bit located at address 0x1A[10]. This bit is

part of the location “MSK”.

Digital undervoltage Fault Mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

Self-test failure error mask. If set to ‘1’, the corresponding error

will not affect the error flag “ef”.

MSK.ofem

MSK.warm

The field “ofem” is a bit located at address 0x1A[4]. This bit is

part of the location “MSK”.

The field “warm” is a bit located at address 0x1A[11]. This bit is

part of the location “MSK”.

Oscillator frequency watchdog error mask. If set to ‘1’, the cor-

responding error will not affect the error flag “ef”.

If set to 1, will not set WAR bit in the ERR register when

unmasked warnings are present.

MSK.euem

MSK.mshm

The field “euem” is a bit located at address 0x1A[5]. This bit is

part of the location “MSK”.

The field “mshm” is a bit located at address 0x1A[13]. This bit is

part of the location “MSK”.

EEPROM Uncorrectable Error Mask. If set to ‘1’, the corre-

sponding error will not affect the error flag “ef”.

Magnetic Sense High Fault Mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

MSK.ziem

MSK.bsym

The field “ziem” is a bit located at address 0x1A[6]. This bit is

part of the location “MSK”.

The field “bsym” is a bit located at address 0x1A[14]. This bit is

part of the location “MSK”.

Zero crossing integrity error mask. If set to ‘1’, the corresponding Indirect access busy error mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

MSK.plkm

MSK.satm

The field “plkm” is a bit located at address 0x1A[7]. This bit is

part of the location “MSK”.

The field “satm” is a bit located at address 0x1A[16]. This bit is

part of the location “MSK”.

PLL Lost Lock error mask. If set to ‘1’, the corresponding error

will not affect the error flag “ef”.

Aggregate saturation flag mask. If set to ‘1’, the corresponding

error will not affect the error flag “ef”.

MSK.abim

MSK.esem

The field “abim” is a bit located at address 0x1A[8]. This bit is

part of the location “MSK”.

The field “esem” is a bit located at address 0x1A[17]. This bit is

part of the location “MSK”.

ABI integrity fault mask. If set to ‘1’, the corresponding error

will not affect the error flag “ef”.

EEPROM Soft Error Mask. If set to ‘1’, the corresponding error

will not affect the error flag “ef”.

51

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

MSK.trm

Location 0x1B (“PWI”)

The field “trm” is a bit located at address 0x1A[18]. This bit is

part of the location “MSK”.

PWI.sc

The field “sc” is a bit located at address 0x1B[0]. This bit is part

of the location “PWI”.

Temperature sensor out of range error mask. If set to ‘1’, the cor-

responding error will not affect the error flag “ef”.

SPI CRC (incoming) validated if SC = 1, ignored if SC = 0.

MSK.xeem

PWI.s17

The field “xeem” is a bit located at address 0x1A[19]. This bit is

part of the location “MSK”.

The field “s17” is a bit located at address 0x1B[1]. This bit is part

of the location “PWI”.

Execute Error Mask. If set to ‘1’, the corresponding error will not

affect the error flag “ef”.

SPI ignore 17th clock to allow negative edge host sampling.

PWI.dm

MSK.srwm

The field “dm” is a bit located at address 0x1B[3]. This bit is part

of the location “PWI”.

The field “srwm” is a bit located at address 0x1A[20]. This bit is

part of the location “MSK”.

Slew rate warning mask. If set to ‘1’, the corresponding error will Disable Manchester interface. If ‘1’, any Manchester input on

not affect the error flag “ef”.

VCC will be ignored.

MSK.crcm

PWI.zal

The field “crcm” is a bit located at address 0x1A[22]. This bit is

part of the location “MSK”.

The field “zal” is a bit located at address 0x1B[7]. This bit is part

of the location “PWI”.

CRC Error Mask (SPI). If set to ‘1’, the corresponding error will

not affect the error flag “ef”.

Zero offset after linearization:

0 = Before linearization and rotation

1 = After linearization

MSK.ierm

The field “ierm” is a bit located at address 0x1A[23]. This bit is

part of the location “MSK”.

PWI.ls

The field “ls” is a bit located at address 0x1B[10]. This bit is part

of the location “PWI”.

Interface Error Mask. If set to ‘1’, the corresponding error will

not affect the error flag “ef”.

Linearization scale:

0 = ±22.5 degrees

1 = ±45 degrees

PWI.eli

The field “eli” is a bit located at address 0x1B[11]. This bit is part

of the location “PWI”.

Enable linearization:

0 = Disabled

1 = Enabled

52

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

PWI.pes

Location 0x1C (“ANG”)

The field “pes” is a bit located at address 0x1B[12]. This bit is

part of the location “PWI”.

ANG.zero_oﬀset

The field “zero_offset” is a bit field located at address

0x1C[11:0]. This bit field is part of the location “ANG”.

PWM error select (if “peo” = 1).

0 - PWM tristated, must reset (or set “peo” back to 0 in

shadow) to release the PWM output.

Post-compensation zero offset (or DC adjust) at angle resolution.

This value is subtracted from the measured angle.

1 - PWM carrier frequency halved and highest priority error

output on PWM as selected duty cycle. See “PWM Output”

section for more details.

ANG.hysteresis

The field “hysteresis” is a bit field located at address

0x1C[17:12]. This bit field is part of the location “ANG”.

PWI.peo

Angle hysteresis threshold, angle resolution × 4 (14 bit). Range is

about 0 to 1.384 degrees.

The field “peo” is a bit located at address 0x1B[13]. This bit is

part of the location “PWI”.

ANG.ro

PWM error output enable. If ‘1’, “pes” selects the response to an

enabled error (see “abe” word).

The field “ro” is a bit located at address 0x1C[18]. This bit is part

of the location “ANG”.

PWI.phe

Rotation Direction (post-linearization). If set to 0, increasing

angle movement is in the clockwise direction when looking down

on the top of the die. If set to 1, increasing angle movement is in

the counter-clockwise direction.

The field “phe” is a bit located at address 0x1B[14]. This bit is

part of the location “PWI”.

PWM hysteresis enable. If 1, use hysteresis on angle going to

PWM.

ANG.rd

PWI.pwm_freq

The field “rd” is a bit located at address 0x1C[19]. This bit is part

of the location “ANG”.

The field “pwm_freq” is a bit field located at address

0x1B[19:16]. This bit field is part of the location “PWI”.

Rotate die. Rotates final angle by 180 degrees. This is the very

last step in the angle processing algorithm. The sensor is Allegro

factory-calibrated to deliver identical field directions for both

dies. If the user want the two outputs to be 180° offset from each

other, this setting is a convenient way to do so.

PWM frequency select. See “PWM Output” section for more

details.

PWI.pwm_band

The field “pwm_band” is a bit field located at address

0x1B[22:20]. This bit field is part of the location “PWI”.

ANG.orate

The field “orate” is a bit field located at address 0x1C[23:20].

This bit field is part of the location “ANG”.

PWM frequency band. See “PWM Output” section for more

details.

Reduces the output rate by averaging samples. 2^oratesamples will

be averaged. ORATE values above 12 are reduced to 12 in the

logic, meaning that up to 4096 samples = 4 ms can be selected as

averaging time.

PWI.pen

The field “pen” is a bit located at address 0x1B[23]. This bit is

part of the location “PWI”.

PWM Enable = 1. If 0, PWM is tristate.

53

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

COM.dst

Location 0x1D (“LPC”)

The field “dst” is a bit located at address 0x1E[13]. This bit is

part of the location “COM”.

LPC.cycle_time

The field “cycle_time” is a bit field located at address

0x1D[17:12]. This bit field is part of the location “LPC”.

Disable self-test initiation in serial CTRL register special if ‘1’.

COM.cud

Alive counter increment rate in 8.192 ms increments with cycle

time = [(N + 1) × 8.192 ms].

The field “cud” is a bit located at address 0x1E[14]. This bit is

part of the location “COM”.

Location 0x1E (“COM”)

If ‘1’, the “customer” word 0x1F will use the “dur” and “del”

configuration in addition to the “customer2” word 0x17.

COM.mag_thres_lo

The field “mag_thres_lo” is a bit field located at address

0x1E[5:0]. This bit field is part of the location “COM”.

COM.del

The field “del” is a bit located at address 0x1E[16]. This bit is

part of the location “COM”.

Magnetic field low comparator value, field value equals low field

error threshold in gauss divided by 16.

Disable EEPROM lock for CUST2 (EEPROM word 0x17) and, if

CUD = 1, CUST word 0x1F. EEPROM lock will not affect write-

ability of word 0x17 (and 0x1F if enabled).

If set to 0, low threshold is disabled.

00 0000: Low field flag disabled

00 0001: 16 gauss

COM.dur

00 0010: 32 gauss

…

The field “dur” is a bit located at address 0x1E[17]. This bit is

part of the location “COM”.

00 1101: 208 gauss (factory setting)

…

11 1111: 1108 gauss

Disable unlock requirement for CUST2 (EEPROM word 0x17)

and if CUD = 1, CUST word 0x1F.

COM.mag_thres_hi

COM.cse

The field “mag_thres_hi” is a bit field located at address

0x1E[11:6]. This bit field is part of the location “COM”.

The field “cse” is a bit located at address 0x1E[18]. This bit is

part of the location “COM”.

Magnetic field high comparator value, field value equals maxi-

mum field threshold in gauss divided by 32. If set to 0, high

threshold is disabled.

Enable CVH self-test at power-up.

COM.lbe

00 0000: High field flag disabled

The field “lbe” is a bit located at address 0x1E[19]. This bit is

part of the location “COM”.

00 0001: 32 gauss

00 0010: 64 gauss

…

Power-up logic BIST enable.

10 0101: 1184 gauss (factory setting)

…

COM.lock

11 1111: 2016 gauss

The field “lock” is a bit field located at address 0x1E[23:20].

This bit field is part of the location “COM”.

COM.dhr

The field “dhr” is a bit located at address 0x1E[12]. This bit is

part of the location “COM”.

Lock options:

1100 Lock EEPROM writes

0011 Lock EEPROM writes AND indirect register writes

Disable hard reset in serial CTRL register special if ‘1’.

54

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Location 0x1F (“CUS”)

Location 0x2F (“LIN15”)

CUS.customer

LIN15.Linearization Error Segment 30

The field “customer” is a bit field located at address 0x1F[23:0].

This bit field is part of the location “CUS”.

The field “Linearization Error Segment 30” is a bit field located

at address 0x2F[11:0]. This bit field is part of the location

“LIN15”.

Customer-useable field, intended for storing data.

Correction value at segment boundary. Signed, resolution is

based on LS bit. Will be subtracted from sensor angle to produce

linearized angle.

With certain settings, this word can be written even if EEPROM

is locked. Details are given in the chapter “EEPROM write lock”.

If COM.cud = ‘1’, then, depending on COM.dur and COM.del

settings, this word can be written even if EEPROM is locked.

Details are given in the chapter “EEPROM write lock”.

For LS = 0, range is ±22.5 degrees.

For LS = 1, range is ±45 degrees.

LIN15.Linearization Error Segment 31

Location 0x20 (“LIN00”)

The field “Linearization Error Segment 31” is a bit field located

at address 0x2F[23:12]. This bit field is part of the location

“LIN15”.

LIN00.Linearization Error Segment 0

The field “Linearization Error Segment 0” is a bit field located at

address 0x20[11:0]. This bit field is part of the location “LIN00”.

Correction value at segment boundary. Signed, resolution is

based on LS bit. Will be subtracted from sensor angle to produce

linearized angle.

Correction value at segment boundary. Signed, resolution is

based on LS bit. Will be subtracted from sensor angle to produce

linearized angle.

For LS = 0, range is ±22.5 degrees.

For LS = 1, range is ±45 degrees.

For LS = 0, range is ±22.5 degrees.

For LS = 1, range is ±45 degrees.

Location 0x80 (“ALV”)

LIN00.Linearization Error Segment 1

ALV.alive counter

The field “Linearization Error Segment 1” is a bit field located

at address 0x20[23:12]. This bit field is part of the location

“LIN00”.

The field “alive counter” is a bit field located at address

0x80[31:0]. This bit field is part of the location “ALV”.

Alive counter is a 32-bit counter, which increments periodically

from zero after power-on or hard reset. The alive increment

period is based on the EEPROM cycle_time, which has a resolu-

tion of 8.192 ms. The alive counter can overflow. The overflow

period of the counter is [2³²× 8.192 × (cycle_time + 1)] millisec-

onds. At cycle_time = 0, this period is approximately 400 days.

Correction value at segment boundary. Signed, resolution is

based on LS bit. Will be subtracted from sensor angle to produce

linearized angle.

For LS = 0, range is ±22.5 degrees.

For LS = 1, range is ±45 degrees.

NOTE: linearization segments 2…29 have been omitted from the

datasheet for reasons of brevity.

55

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

SAFETY AND DIAGNOSTICS

The AAS33001 was developed in accordance to the ASIL design

flow. It incorporates several diagnostics.

CVH Self-Test

CVH self-test is a method of verifying the operation of the CVH

transducer without applying an external magnetic field. This

feature is useful for both manufacturing test and for integration

debug. The CVH self-test is implemented by changing the switch

configuration from the normal operating mode into a test configu-

ration, allowing a test current to drive the CVH in place of the

magnetic field. By changing the direction of the test current and

by changing the elements in the CVH that are driven, the self-test

circuit emulates a changing angle of magnetic field. The mea-

sured angle is monitored to determine a passing or failing device.

Alive Counter

A 32-bit counter increments periodically from zero after power-

on or hard reset. It is read via an extended read at address 0x80.

The alive increment period is based on the EEPROM cycle_time,

which has a resolution of 8.192 ms.

The alive counter can overflow. The overflow period of the

counter is [2³²× 8.192 × (lpm_cycle_time + 1)] milliseconds. At

lpm_cycle_time = 0, this period is approximately 400 days.

CVH self-test typically takes 30 ms to verify.

Oscillator Watchdogs

Self-test can be run on power-up, by setting the EEPROM field

SHA.COM.cse = 1

The watchdogs run constantly. These watchdogs are intended to

detect gross failures of either oscillator. Logic running on clocks

based on each oscillator effectively counts clock periods pro-

duced in the other clock domain and compares to expected limits.

Self-test can also be invoked via the serial control register by

issuing the corresponding “special” command.

Logic Built-In Self-Test (LBIST)

The test is complete when either:

Logic BIST is implemented to verify the integrity of the

AAS33001 logic. It can be executed in parallel with the CVH

self-test. LBIST is effectively a form of auto-driven scan. The

logic to be tested is broken into 31 scan chains. The chains are

fed in parallel by a 31-bit linear feedback shift register (LFSR) to

generate pseudo-random data. The output of the scan chains are

fed back into a multiple input shift register (MISR) that accumu-

lates the shifted bits into a 31-bit signature. LBIST takes typically

30 ms to verify.

• “STA.sdn” = 1 (special done) or

• “STA.cstr” = 0 (CVH self-test not running).

Failure is indicated by:

• “ERR.stf” = 1 (assuming it was cleared before test was run).

56

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

APPLICATION INFORMATION

Magnetic Target Requirements

1600

1400

1200

1000

800

600

400

200

0

The AAS33001 is designed to operate with magnets constructed

with a variety of magnetic materials, geometries, and field

strengths. See Table 14 for a list of common magnet dimensions.

The AAS33001 actively measures and adapts to its magnetic

environment. This allows operation throughout a large range of

field strengths (recommended range is 300 to 1000 G, operation

beyond this range will not result in long term damage). Due to

the greater signal-to-noise ratio provided at higher field strengths,

performance inherently increases with increasing field strength.

NdFe30

SmCo24

Ceramic

(Ferrite)

0.5

2.5

4.5

6.5

8.5

Table 14: Target Magnet Parameters

Air Gap (mm)

Magnetic Material

Diameter

(mm)

Thickness

(mm)

Figure 32: Magnetic Field versus Air Gap for a magnet 6 mm

in diameter and 2.5 mm thick.

Neodymium (sintered)*

Neodymium (sintered)

Neodymium / SmCo

10

8

2.5

3

Allegro can provide similar curves for customer application magnets

upon request. Allegro recommends larger magnets for applications

that require optimized accuracy performance.

6

2.5

S

N

Thickness

Diameter

* A sintered Neodymium magnet with 10 mm (or greater) diameter

and 2.5 mm thickness is the recommended magnet for redundant

applications.

57

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Typical SPI and ABI/UVW Applications

Below, typical application diagrams for SPI and ABI are given.

interface is useful for low pin count applications (e.g. ABI). See

Programming and controlling are possible using the SPI interface Manchester Interface section for details on programming with

and the Manchester interface. The Manchester programming

this interface.

Supply or battery

100 Ω, use only if supplied

by car battery and voltage

drop can be tolerated

100 nF

BYP

V_CC

PWM

Float if unused

A / U

B/ V

I / W

Micro

Controller

Sensor

CSB

SCLK

MOSI

MISO

SCLK

MOSI

MISO

TEST

GND

Figure 33: Typical SPI Application Diagram

Notes:

• PWM and ABI/UVW can be used in parallel to the SPI interface.

58

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Supply or battery

100 Ω, use only if supplied

by car battery and voltage

drop can be tolerated

100 nF

Logic High Level

PWM in (GPIO)

BYP

PWM

V_CC

A/U in (GPIO)

B/V in (GPIO)

I/W in (GPIO)

A / U

B/ V

I / W

Sensor

Micro

CSB

Controller

SCLK

MOSI

MISO

Float

TEST

GND

Figure 34: Typical ABI / UVW Application Diagram

Notes:

• PWM output can be left floating if not required. The absolute position is transferred through ABI pins after power on, so that PWM

information is not needed to find the start position. The AAS33001 is different from the A1333 in this regard.

• For programming the sensor, CSB and MOSI determine the slave address. Read the Manchester Interface section for more details.

• If not needed by the host, any of the ABI outputs can be left floating. For example,

□ If only rotational frequency is needed, only pin A could be used.

□ If frequency and position is needed, but direction is always the same, only pin B and I could be used.

59

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

I/O STRUCTURES

A/U, B/V, I/W

33 Ω

PWM

33 Ω

SCK/CSN/MOSI

1 kΩ

60

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

PACKAGE OUTLINE DRAWINGS

For Reference Only – Not for Tooling Use

(Reference MO-153 ADT)

NOT TO SCALE

Dimensions in millimeters

Dimensions exclusive of mold ﬂash, gate burrs, and dambar protrusions

Exact case and lead conﬁguration at supplier discretion within limits shown

7.80 0.10

4.32 NOM

8º

0º

24

0.20

0.09

E1

E

E2

B

F1

F2

F

3 NOM 4.40 0.10 6.40 0.20

E

2.20

A

1.00 REF

0.60 0.15

1

2

3.90

0.25 BSC

E

SEATING PLANE

GAUGE PLANE

C

24X

1.20 MAX

SEATING

0.10

C

PLANE

0.30

0.19

0.65 BSC

0.15

0.00

XXXXXXXXX

Date Code

Lot Number

0.45

0.65

1

D

Standard Branding Reference View

Lines 1, 2, 3: Maximum 9 characters per line

1.65

Line 1: Part number

Line 2: Logo A, 4-digit date code

Line 3: Characters 5, 6, 7, 8 of

Assembly Lot Number

3.00

6.10

A

B

Terminal #1 mark area.

Exposed thermal pad (bottom surface); dimensions may vary with device.

C

Reference land pattern layout (reference IPC7351 TSOP65P640X120-25M);

all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances; when

mounting on a multilayer PCB, thermal vias can improve thermal dissipation

(reference EIA/JEDEC Standard JESD51-5).

4.32

D

E

F

Branding scale and appearance at supplier discretion.

Hall elements (E1, E2), corresponding to respective die; not to scale.

Active Area Depth. F1: 0.47 mm; F2: 0.62 mm.

C

PCB Layout Reference View

Figure 35: Package LP, 24-Pin TSSOP with Exposed Thermal Pad

61

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

For Reference Only – Not for Tooling Use

(Reference DWG-2870)

Dimensions in millimeters – NOT TO SCALE

Dimensions exclusive of mold ﬂash, gate burrs, and dambar protrusions

Exact case and lead conﬁguration at supplier discretion within limits shown

5.00 0.10

8º

D

2.50

0º

14

E

0.20

0.09

D

D1

D

D1

4.40 0.10 6.40 BSC

+0.15

–0.10

0.60

2.20

D

A

1.00 REF

1

2

0.25 BSC

Branded Face

SEATING PLANE

GAUGE PLANE

D

D1

C

16X

0.95

0.85

1.10 MAX

0.10

C

SEATING

PLANE

0.15

0.00

0.30

0.19

0.65 BSC

XXXXXXX

Date Code

Lot Number

0.45

0.65

1

14

C

Standard Branding Reference View

Lines 1, 2: Maximum 7 characters per line

Line 3: Maximum 5 characters per line

1.70

Line 1: Part number

Line 2: Logo A, 4-digit date code

Line 3: Characters 5, 6, 7, 8 of

Assembly Lot Number

6.00

A

B

Terminal #1 mark area.

Reference land pattern layout (reference IPC7351 TSOP65P640X120-14M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances; when

mounting on a multilayer PCB, thermal vias at the exposed thermal pad land

can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5).

C

D

E

Branding scale and appearance at supplier discretion.

Hall element (D1); not to scale.

1

2

B

PCB Layout Reference View

Active Area Depth 0.36 mm.

Figure 36: Package LE, 14-Pin TSSOP

62

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Precision Angle Sensor IC with Incremental and

Motor Commutation Outputs and On-Chip Linearization

AAS33001

Revision History

Number

Date

Description

–

1

March 28, 2018

Initial release

Updated Selection Guide (page 3) and Terminal List table (page 4)

September 4, 2018

Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to

permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that

the information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of

Allegro’s product can reasonably be expected to cause bodily harm.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its

use; nor for any infringement of patents or other rights of third parties which may result from its use.

Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

www.allegromicro.com

63

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com


型号：	AAS33001LLEATR
厂家：	ALLEGRO MICROSYSTEMS
描述：	Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip Linearization
文件：	总63页 (文件大小：1848K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AAS33001LLEATR [ALLEGRO]

相关型号：

AAS33001LLPBTR-DD

AAS33051LLEATR

AAS33051LLPBTR-DD

AASC1-1.000MHZ-L3

AASC1-10.000MHZ-G

AASC1-12.28890MHZ-G

AASC1-12.28890MHZ-L

AASC1-12.28890MHZ-L3

AASC1-12.28890MHZ-V

AASC1-2.4576MHZ-SP

AASC1-3.000MHZ-L

AASC1-3.2768MHZ-I