ACS781LLRTR-100U-T [ALLEGRO]
Core-less, micro-sized, 100 A continuous current package;
| 型号： | ACS781LLRTR-100U-T |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Core-less, micro-sized, 100 A continuous current package |
| 文件： | 总22页 (文件大小：1201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACS781xLR
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
FEATURES AND BENEFITS
DESCRIPTION
▪ꢀCore-less,ꢀmicro-sized,ꢀ100ꢀAꢀcontinuousꢀcurrentꢀpackage
▪ꢀUltra-lowꢀpowerꢀloss:ꢀ200ꢀµΩꢀinternalꢀconductorꢀ
resistance
The Allegro ACS781xLR is a fully integrated current sensor
linear IC in a new core-less package designed to senseAC and
DC currents up to 100 A. This automotive-grade, low-profile
(1.5 mm thick) sensor IC package has a very small footprint.
The Hall sensor technology also incorporates common-mode
field rejection to optimize performance in the presence of
interferingmagneticfieldsgeneratedbynearbycurrentcarrying
conductors.
▪ꢀImmunityꢀtoꢀcommon-modeꢀfieldꢀinterference
▪ꢀGreatlyꢀimprovedꢀtotalꢀoutputꢀerrorꢀthroughꢀdigitallyꢀ
programmed and compensated gain and offset over the full
operating temperature range
▪ꢀIndustry-leadingꢀnoiseꢀperformanceꢀthroughꢀproprietaryꢀ
amplifier and filter design techniques
▪ꢀIntegratedꢀshieldꢀgreatlyꢀreducesꢀcapacitiveꢀcouplingꢀfromꢀ
current conductor to die due to high dV/dt signals, and
prevents offset drift in high-side, high-voltage applications
▪ꢀMonolithicꢀHallꢀICꢀforꢀhighꢀreliability
Thedeviceconsistsofaprecision,low-offsetlinearHallcircuit
with a copper conduction path located near the die. Applied
current flowing through this copper conduction path generates
a magnetic field which the Hall IC converts into a proportional
voltage. Device accuracy is optimized through the close
proximity of the primary conductor to the Hall transducer and
factory programming of the sensitivity and quiescent output
voltage at the Allegro factory.
▪ꢀ3ꢀtoꢀ3.6ꢀV,ꢀsingleꢀsupplyꢀoperation
▪ꢀ120ꢀkHzꢀtypicalꢀbandwidth
▪ꢀ3.6ꢀµsꢀoutputꢀriseꢀtimeꢀinꢀresponseꢀtoꢀstepꢀinputꢀcurrent
▪ꢀOutputꢀvoltageꢀproportionalꢀtoꢀACꢀorꢀDCꢀcurrentsꢀ
▪ꢀFactory-trimmedꢀforꢀaccuracy
▪ꢀExtremelyꢀstableꢀquiescentꢀoutputꢀvoltage
▪ꢀAEC-Q100ꢀautomotiveꢀqualification
Chopper-stabilized signal path and digital temperature
compensation technology also contribute to the stability of the
device across the operating temperature range.
High-level immunity to current conductor dV/dt and stray
electric fields, offered byAllegro proprietary integrated shield
technology for low-output voltage ripple and low-offset drift
in high-side, high-voltage applications.
PACKAGE:
7-pin PSOF package (suffix LR)
Theoutputofthedevicehasapositiveslope(>VCC/2)whenan
increasingcurrentflowsthroughtheprimarycopperconduction
Continued on the next page…
Not to scale
ACS781xLR
RF
CF
3
2
5
6
VOUT
GND
IP+
VOUT
IP
3.3 V
CBYP
0.1 µF
IP–
1
VCC
Typical Application
Application 1: The ACS781xLR outputs an analog signal, VOUT, that varies linearly with the bidirectional AC or DC primary
current, IP, within the range specified. CF is for optimal noise management, with values that depend on the application.
ACS781xLR-DS
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
DESCRIPTION (CONTINUED)
pathꢀ(fromꢀterminalꢀ5ꢀtoꢀterminalꢀ6),ꢀwhichꢀisꢀtheꢀpathꢀusedꢀforꢀ 7), and allows the device to operate safely with voltages up to 100 V
current sampling. The internal resistance of this conductive path is peak on the primary conductor.
200ꢀµΩꢀtypical,ꢀprovidingꢀlowꢀpowerꢀloss.ꢀ
The device is fully calibrated prior to shipment from the factory.
The thickness of the copper conductor allows survival of the device The ACS781xLR family is lead (Pb) free. All leads are plated with
at high overcurrent conditions. The terminals of the conductive path 100% matte tin, and there is no Pb inside the package. The heavy
are electrically isolated from the signal leads (pins 1 through 4, and gauge leadframe is made of oxygen-free copper.
SELECTION GUIDE
Primary Sampled
Current, IP
(A)
Sensitivity
Sens (Typ.)
(mV/A)
Sensed Current
Direction
TOP
(°C)
Part Number
Packing1
ACS781LLRTR-050B-T
ACS781LLRTR-050U-T
ACS781LLRTR-100B-T
ACS781LLRTR-100U-T
Bidirectional
Unidirectional
Bidirectional
Unidirectional
±50
0 to 50
±100
26.4
39.6
13.2
26.4
–40 to 150
–40 to 125
0 to 100
Tape and reel
±150 transient
±100 continuous
ACS781KLRTR-150B-T
ACS781KLRTR-150U-T
Bidirectional
8.8
0 to 150 transient
0 to 100 continuous
Unidirectional
17.6
1 Contact Allegro for additional packing options.
Allegro MicroSystems, LLC
115 Northeast Cutoff
2
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
VCC
Notes
Rating
6
Unit
V
Forward Supply Voltage
Reverse Supply Voltage
Forward Output Voltage
Reverse Output Voltage
Output Source Current
Output Sink Current
VRCC
–0.5
V
VOUT
25
V
VRIOUT
IOUT(Source)
IOUT(Sink)
–0.5
V
VOUT to GND
2.8
mA
mA
ºC
ºC
ºC
ºC
Minimum pull-up resistor of 500 Ω
Range K
10
–40 to 125
–40 to 150
165
Nominal Operating Ambient Temperature
TOP
Range L
Maximum Junction
TJ(max)
Tstg
Storage Temperature
–65 to 165
THERMAL CHARACTERISTICS: May require derating at maximum conditions
Characteristic
Symbol
Test Conditions*
Value
Unit
Mounted on the Allegro evaluation board ASEK781
85-0807-001 with FR4 substrate and 8 layers of 2 oz.
copper (with an area of 1530 mm2 per layer) connected to
the primary leadframe and with thermal vias connecting
the copper layers. Performance is based on current flow-
ing through the primary leadframe and includes the power
consumed by the PCB.
Package Thermal Resistance
RθJA
18
ºC/W
*Additional thermal information available on the Allegro website
TYPICAL OVERCURRENT CAPABILITIES1,2
Characteristic
Symbol
Notes
Rating
285
Unit
A
TA = 25°C, 1 s on time, 60 s off time
TA = 85°C, 1 s on time, 35 s off time
TA = 125°C, 1 s on time, 30 s off time
TA = 150°C, 1 s on time, 10 s off time
225
A
Overcurrent
IPOC
170
A
95
A
1 Test was done with Allegro evaluation board (85-0807-001). The maximum allowed current is limited by TJ(max) only.
2 For more overcurrent profiles, please see FAQ on the Allegro website, www.allegromicro.com.
Allegro MicroSystems, LLC
115 Northeast Cutoff
3
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
IP+
VCC
ACS781xLR
To all subcircuits
Master Current
Supply
EEPROM and
Control Logic
Programming
Control
Temperature
Sensor
Hall Current
Drive
Sensitivity
Control
Offset
Control
VOUT
Tuned
Filter
Amp
GND
IP–
Functional Block Diagram
NC
4
Terminal List Table
Number
Name
Description
VOUT
GND
VCC
3
2
1
IP+
5
6
1
2
3
VCC
GND
Device power supply terminal
Signal ground terminal
Analog output signal
VOUT
IP–
No connection, connect to GND for optimal
ESD performance
7
NC
4
NC
5
6
IP+
IP–
Terminal for current being sampled
Terminal for current being sampled
Pinout Diagram
No connection, connect to GND for optimal
ESD performance
7
NC
Allegro MicroSystems, LLC
115 Northeast Cutoff
4
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
COMMON OPERATING CHARACTERISTICS valid at TOP = –40°C to 150°C and VCC = 3.3 V, unless otherwise specified
Characteristic
Supply Voltage
Symbol
VCC
Test Conditions
Min.
Typ.
3.3
11
Max.
3.6
15
Unit
V
3
–
Supply Current
Power-On Time
ICC
Output open
mA
µs
tPO
TA = 25°C, CBYPASS = Open, CL = 1 nF
CBYPASS = Open, CL= 1 nF
180
–
–
Temperature Compensation
Time
tTC
–
50
–
µs
VPORH
VPORL
VPORHYST
tPORR
tPORD
Vz
TA = 25°C, VCC rising
TA = 25°C, VCC falling
–
–
2.85
2.6
250
150
14
–
–
–
–
–
–
–
–
–
V
V
Power-On Reset Voltage
Power-On Reset Hysteresis
Power-On Reset Release Time
Power-On Reset Disable Time
Supply Zener Clamp Voltage
Internal Bandwidth
–
mV
µs
TA = 25°C, VCC rising
TA = 25°C, CL = 1 nF
TA = 25°C, ICC = 30 mA
Small signal –3 dB, CL = 1 nF, TA = 25°C
TA = 25°C
–
–
µs
6.5
–
7.5
120
500
8
V
BWi
kHz
kHz
MHz
Chopping Frequency
fC
–
Oscillator Frequency
fOSC
TA = 25°C
–
OUTPUT CHARACTERISTICS
Propagation Delay Time
Rise Time
tpd
tr
TA = 25°C, CL = 1 nF
–
–
2.2
–
–
µs
µs
µs
V
TA = 25°C, CL = 1 nF
3
Response Time
tRESPONSE
VSAT(HIGH)
VSAT(LOW)
ROUT
TA = 25°C, CL = 1 nF
–
3.6
–
TA = 25°C, RLOAD = 10 kΩ to GND
TA = 25°C, RLOAD = 10 kΩ to VCC
RL = 4.7 kΩ from VOUT to GND, VOUT = VCC/2
VOUT to VCC
3.1
–
–
–
Output Saturation Voltage
DC Output Resistance
Output Load Resistance
–
200
–
mV
Ω
–
<1
RL(PULLUP)
RL(PULLDWN)
CL
4.7
4.7
–
–
–
–
kΩ
kΩ
nF
µΩ
V
VOUT to GND
–
Output Load Capacitance
VOUT to GND
1
10
–
Primary Conductor Resistance
RPRIMARY
VOUT(QBI)
VOUT(QU)
TA = 25°C
–
180
IP = 0 A, TA = 25°C
–
VCC/2
VCC × 0.1
–
Quiescent Output Voltage
Unidirectional variant, IP = 0 A, TA = 25°C
–
–
V
Ratiometry Quiescent Output
Voltage Error
RatERRVOUT(Q) Through supply voltage range (VCC = 3.3 V)
–
–
–
0
–
–
–
%
%
Ratiometry Sensitivity Error
RatERRSens
CMFR
Through supply voltage range (VCC = 3.3 V)
Magnetic field perpendicular to Hall plates
< ±0.5
–35
Common-Mode Magnetic Field
Rejection
dB
Allegro MicroSystems, LLC
115 Northeast Cutoff
5
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X050B PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
IP
Test Conditions
Min.
–50
Typ.
–
Max.
50
Unit
A
Primary Sampled Current
SensTA
Measured using 50% of full scale IP, TA = 25°C
25.5
25.542
25.41
–
26.4
26.4
26.4
36
27.258
27.258
27.39
–
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 50% of full scale IP, TOP = 25°C to 150°C
Sens(TOP)LT Measured using 50% of full scale IP, TOP = –40°C to 25°C
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C
±5
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 50% of full scale IP, TOP = 25°C to 150°C
Measured using 50% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 50% of full scale IP, TOP = 25°C to 150°C
ETOT(LT,LIFE) Measured using 50% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QBI) = 1.65 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
Allegro MicroSystems, LLC
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X050U PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
IP
Test Conditions
Min.
0
Typ.
–
Max.
50
Unit
A
Primary Sampled Current
SensTA
Measured using 50% of full scale IP, TA = 25°C
38.3
38.313
38.115
–
39.6
39.6
39.6
35.6
40.887
40.887
41.085
–
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 50% of full scale IP, TOP = 25°C to 150°C
Sens(TOP)LT Measured using 50% of full scale IP, TOP = –40°C to 25°C
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C
±5
VOE(TOP)LT
IP = 0 A, TOP = –40°C to 25°C
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 50% of full scale IP, TOP = 25°C to 150°C
Measured using 50% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 50% of full scale IP, TOP = 25°C to 150°C
ETOT(LT,LIFE) Measured using 50% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QU)= 0.33 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
Allegro MicroSystems, LLC
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X100B PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
IP
Test Conditions
Min.
–100
12.8
Typ.
–
Max.
100
Unit
A
Primary Sampled Current
SensTA
Measured using 33% of full scale IP, TA = 25°C
13.2
13.2
13.2
18
13.629
13.629
13.695
–
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 33% of full scale IP, TOP = 25°C to 150°C
Sens(TOP)LT Measured using 33% of full scale IP, TOP = –40°C to 25°C
12.771
12.705
–
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C
±5
VOE(TOP)LT
IP = 0 A, TOP = –40°C to 25°C
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 33% of full scale IP, TOP = 25°C to 150°C
Measured using 33% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 33% of full scale IP, TOP = 25°C to 150°C
ETOT(LT,LIFE) Measured using 33% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QBI) = 1.65 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
Allegro MicroSystems, LLC
115 Northeast Cutoff
8
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X100U PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
IP
Test Conditions
Min.
0
Typ.
–
Max.
100
Unit
A
Primary Sampled Current
SensTA
Measured using 33% of full scale IP, TA = 25°C
25.5
25.542
25.41
–
26.4
26.4
26.4
36
27.258
27.258
27.39
–
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 33% of full scale IP, TOP = 25°C to 150°C
Sens(TOP)LT Measured using 33% of full scale IP, TOP = –40°C to 25°C
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C
±5
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 33% of full scale IP, TOP = 25°C to 150°C
Measured using 33% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 33% of full scale IP, TOP = 25°C to 150°C
ETOT(LT,LIFE) Measured using 33% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QU) = 0.33 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
Allegro MicroSystems, LLC
115 Northeast Cutoff
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X150B PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 125°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
–150
–100
8.5
Typ.
–
Max.
150
100
9.08
9.08
9.13
–
Unit
A
Transient
Primary Sampled Current
IP
Continuous
–
A
SensTA
Measured using 25% of full scale IP, TA = 25°C
8.8
8.8
8.8
12
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 25% of full scale IP, TOP = 25°C to 125°C
Sens(TOP)LT Measured using 25% of full scale IP, TOP = –40°C to 25°C
8.51
8.47
–
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 125°C
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C
±5
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 125°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 25% of full scale IP, TOP = 25°C to 125°C
Measured using 25% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 25% of full scale IP, TOP = 25°C to 125°C
ETOT(LT,LIFE) Measured using 25% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QBI) = 1.65 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
X150U PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 125°C, VCC= 3.3 V, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
0
Typ.
–
Max.
150
Unit
A
Transient
Primary Sampled Current
IP
Continuous
0
–
100
A
SensTA
Measured using 25% of full scale IP, TA = 25°C
17.0
17.02
16.94
–
17.6
17.6
17.6
24
18.17
18.17
18.26
–
mV/A
mV/A
mV/A
mV
Sensitivity2
Sens(TOP)HT Measured using 25% of full scale IP, TOP = 25°C to 125°C
Sens(TOP)LT Measured using 25% of full scale IP, TOP = –40°C to 25°C
VNOISEPP
INOISE
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
Input referred
Noise4
mARMS
/√(Hz)
–
0.6
–
Nonlinearity
ELIN
Measured at VOUT around 2.31 V and 2.97 V
IP = 0 A, TA = 25°C
–1
–
1
%
VOE(TA)
–10
–10
–20
±3
10
10
20
mV
mV
mV
Electrical Offset Voltage5,6
VOE(TOP)HT IP = 0 A, TOP = 25°C to 125°C
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C
±5
±10
Electric Offset Voltage Over
Lifetime3
TOP = –40°C to 125°C, estimated shift after AEC-Q100 grade 0
qualification testing
ΔVOE(LIFE)
–
±1
–
mV
ETOT(HT)
ETOT(LT)
Measured using 25% of full scale IP, TOP = 25°C to 125°C
Measured using 25% of full scale IP, TOP = –40°C to 25°C
–3.25
–3.75
–4.1
±0.8
±1.5
3.25
3.75
4.1
%
%
%
%
Total Output Error
ETOT(HT,LIFE) Measured using 25% of full scale IP, TOP = 25°C to 125°C
ETOT(LT,LIFE) Measured using 25% of full scale IP, TOP = –40°C to 25°C
±2.28
±2.98
Total Output Error Including
Lifetime Drift7
–5.6
5.6
1 See Characteristic Performance Data page for parameter distributions over temperature range.
2 This parameter may drift a maximum of ΔSensLIFE over lifetime.
3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4 ±3 sigma noise voltage.
5 Drift is referred to ideal VOUT(QU) = 0.33 V.
6 This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7 The maximum drift of any single device during qualification testing was 4%.
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
CHARACTERISTIC PERFORMANCE DATA
DATA TAKEN USING THE ACS781KLR-150B
Response Time (tRESPONSE
)
IP = 90 A with 10-90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF
Rise Time (tr)
IP = 90 A with 10%-90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
Propagation Delay (tPD
)
IP = 90 A with 10% - 90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF
Power-On Time (tPO
)
IP = 60 A DC, CBYPASS = Open, CL = 1 nF
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
CHARACTERISTIC DEFINITIONS
Definitions of Accuracy Characteristics
andꢀtheꢀratiometricꢀchangeꢀ(%)ꢀinꢀsensitivityꢀisꢀdefinedꢀas:
SENSITIVITY (Sens)
Sens(V
Sens(3.3V)
)
CC
The change in device output in response to a 1A change through
the primary conductor. The sensitivity is the product of the mag-
neticꢀcircuitꢀsensitivityꢀ(Gꢀ/A)ꢀandꢀtheꢀlinearꢀICꢀamplifierꢀgainꢀ
(mV/G).ꢀTheꢀlinearꢀICꢀamplifierꢀgainꢀisꢀprogrammedꢀatꢀtheꢀfactoryꢀ
to optimize the sensitivity (mV/A) for the half-scale current of the
device.
RatERRSens
1 –
× 100%
=
VCC
3.3 V
QUIESCENT OUTPUT VOLTAGE (VOUT(Q)
)
Theꢀoutputꢀofꢀtheꢀdeviceꢀwhenꢀtheꢀprimaryꢀcurrentꢀisꢀzero.ꢀForꢀ
bidirectional sensors, it nominally remains at VCCꢀ⁄ꢀ2ꢀandꢀforꢀ
unidirectional sensors at 0.1 × VCC. Thus, VCCꢀ=ꢀ3.3ꢀVꢀtrans-
lates into VOUT(BI)ꢀ=ꢀ1.65ꢀVꢀandꢀVOUT(QU)ꢀ=ꢀ0.33ꢀV.ꢀꢀVariationꢀinꢀ
VOUT(Q)ꢀcan be attributed to the resolution of the Allegro linear
IC quiescent voltage trim and thermal drift.
NOISE (VNOISE
)
The noise floor is derived from the thermal and shot noise
observed in Hall elements. Dividing the noise (mV) by the sensi-
tivity (mV/A) provides the smallest current that the device is able
to resolve.
ELECTRICAL OFFSET VOLTAGE (VOE
)
The deviation of the device output from its ideal quiescent value
due to nonmagnetic causes.
NONLINEARITY (ELIN
)
The ACS781xLR is designed to provide a linear output in
responseꢀtoꢀaꢀrampingꢀcurrent.ꢀConsiderꢀtwoꢀcurrentꢀlevels:ꢀI1ꢀ
and I2. Ideally, the sensitivity of a device is the same for both
currents, for a given supply voltage and temperature. Nonlinear-
ity is present when there is a difference between the sensitivities
measured at I1 and I2. Nonlinearity is calculated separately for
theꢀpositiveꢀ(ELINposꢀ)ꢀandꢀnegativeꢀ(ELINneg ) applied currents as
follows:
TOTAL OUTPUT ERROR (ETOT
)
The maximum deviation of the actual output from its ideal value,
also referred to as accuracy, illustrated graphically in the output
voltage versus current chart on the following page.
ETOTꢀisꢀdividedꢀintoꢀfourꢀareas:
• 0 A at 25°C. Accuracy at the zero current flow at 25°C,
ꢀ
ꢀ
E
E
LINpos = 100 (%) × {1 – (SensIPOS2ꢀ/ SensIPOS1ꢀ) }
LINneg = 100 (%) × {1 – (SensINEG2ꢀ/ SensINEG1ꢀ)}
without the effects of temperature.
• 0 A over Δ temperature. Accuracy at the zero current flow
including temperature effects.
• Full-scale current at 25°C. Accuracy at the full-scale current at
where:
SensIx = (VIOUT(Ix) – VIOUT(Q))/ Ix
25°C, without the effects of temperature.
• Full-scale current over Δ temperature. Accuracy at the full-
scale current flow including temperature effects.
and IPOSx and INEGx are positive and negative currents.
VIOUT(IP) – VIOUT_IDEAL(IP)
Then:
ETOT(IP)
× 100 (%)
=
SensIDEAL × IP
ꢀ
E
LINꢀ=ꢀmax(ꢀELINposꢀ,ꢀELINneg
)
where
VIOUT_IDEAL(IP) = VIOUT(Q)ꢀ+ (SensIDEAL × IP )
RATIOMETRY
The device features a ratiometric output. This means that the
quiescent voltage output, VOUTQ, and the magnetic sensitivity,
Sens, are proportional to the supply voltage, VCC.The ratiometric
changeꢀ(%)ꢀinꢀtheꢀquiescentꢀvoltageꢀoutputꢀisꢀdefinedꢀas:
VOUT(Q)(V
VOUT(Q)(3.3V)
)
CC
RatERRVOUT(Q)
1 –
× 100%
=
VCC
3.3 V
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High-Precision Linear Hall-Effect-Based
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ACS781xLR
Definitions of Dynamic Response Characteristics
POWER-ON TIME (tPO
)
When the supply is ramped to its operating voltage, the device
requires a finite time to power its internal components before
responding to an input magnetic field.
Power-OnꢀTime,ꢀtPO, is defined as the time it takes for the output
voltage to settle within ±10% of its steady state value under an
applied magnetic field, after the power supply has reached its
minimum specified operating voltage, VCC(min), as shown in the
chart at right.
RISE TIME (tr)
The time interval between a) when the device reaches 10% of its
full scale value, and b) when it reaches 90% of its full scale value.
Bothꢀtr and tRESPONSE are detrimentally affected by eddy current
losses observed in the conductive IC ground plane.
Power-On Time (tPO
)
RESPONSE TIME (tRESPONSE
)
The time interval between a) when the applied current reaches
80% of its final value, and b) when the sensor reaches 80% of its
output corresponding to the applied current.
Primary Current
(%)
90
V
OUT
PROPAGATION DELAY (tPD
)
The time interval between a) when the input current reaches 20%
of its final value, and b) when the output reaches 20% of its final
value.
Rise Time, t
r
20
10
0
POWER-ON RESET VOLTAGE (VPOR
)
t
Propagation Delay, t
PROP
At power-up, to initialize to a known state and avoid current
spikes, the sensor is held in Reset state. The Reset signal is
disabled when VCC reaches VPORH and time tPORR has elapsed,
allowing output voltage to go from a high-impedance state
into normal operation. During power-down, the Reset signal is
enabled when VCC reaches VPORL, causing output voltage to go
into a high-impedance state. (Note that a detailed description of
PORꢀoperationꢀcanꢀbeꢀfoundꢀinꢀtheꢀFunctionalꢀDescriptionꢀsec-
tion.)
Propagation Delay (tPD) and Rise Time (tr)
Primary Current
(%)
80
V
OUT
Response Time, t
RESPONSE
0
t
Response Time (tRESPONSE
)
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
POWER-ON RESET RELEASE TIME (tPORR
)
Accuracy
Over ∆Temp erature
Increasing VIOUT(V)
When VCC rises to VPORHꢀ,ꢀtheꢀPower-OnꢀResetꢀCounterꢀstarts.ꢀ
The sensor output voltage will transition from a high-impedance
stateꢀtoꢀnormalꢀoperationꢀonlyꢀwhenꢀtheꢀPower-OnꢀResetꢀCounterꢀ
Accuracy
25°C Only
Average
V
IOUT
has reached tPORR
.
Accuracy
Over ∆Temp erature
Accuracy
25°C Only
IP(min)
–IP (A)
+IP (A)
Half Scale
IP(max)
0 A
Decreasing VIOUT(V)
Accuracy
25°C Only
Accuracy
Over ∆Temp erature
Output Voltage versus Sampled Current
Total Output Error at 0 A and at Full-Scale Current
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
FUNCTIONAL DESCRIPTION
Power-On Reset (POR)
deviceꢀSensitivityꢀandꢀQVOꢀafterꢀtimeꢀtTCꢀ[5],ꢀ[5’].ꢀVCC drops
below VCC(min) = 3.0 V. If VCC drops below VPORHꢀ[6’]ꢀbutꢀ
remains higher than VPORLꢀ[7’]ꢀꢀtheꢀoutputꢀwillꢀcontinueꢀtoꢀbeꢀ
VCC /2.
Theꢀdescriptionsꢀinꢀthisꢀsectionꢀassume:ꢀtemperatureꢀ=ꢀ25°C,ꢀnoꢀ
output load (RL, CL ) , and IP = 0 A.
•
Power-Up. At power-up, as VCC ramps up, the output is in a
high-impedance state. When VCC crosses VPORH (location [1]
inꢀFigureꢀ1ꢀandꢀ[1’]ꢀinꢀFigureꢀ2),ꢀtheꢀPORꢀReleaseꢀcounterꢀ
starts counting for tPORRCꢀ[2],ꢀ[2’].ꢀAtꢀthisꢀpoint,ꢀtheꢀEEPROMꢀ
content will be loaded in volatile memory after tEELOAD
[3],[3’]ꢀandꢀtheꢀoutputꢀwillꢀgoꢀtoꢀVCC/ 2 after tPORDꢀ[4],ꢀ[4’].ꢀ
The temperature compensation engine will then adjust the
•
Power-Down. As VCC ramps down below VPORLꢀ[6],[8’],ꢀtheꢀ
output will enter a high-impedance state.
4
V
CC
1 2
3
5
6
3.3
V
V
PORH
PORL
GND
Time
t
TC
V
OUT
1.65
t
PORD
t
PORRC
t
PORR
Slope =
/2
t
EELOAD
V
CC
GND
Time
High Impedance
High Impedance
Figure 1: POR Operation: Slow Rise Time Case
1’ 2’ 4’
3’
V
CC
7’
8’
6’
5’
3.3
V
PORH
PORL
V
GND
OUT
Time
Time
t
TC
V
t
PORD
Slope =
/2
Slope =
/2
V
V
CC
CC
1.65
t
EELOAD
High Impedance
GND
t
PORR
PORRC
High Impedance
t
Figure 2: POR Operation: Fast Rise Time Case
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
sourced signal then can pass through a low-pass filter, while the
switchpoint accuracy is the small signal voltage developed across modulated DC offset is suppressed.
the Hall element. This voltage is disproportionally small relative
In addition to the removal of the thermal and stress-related offset,
to the offset that can be produced at the output of the Hall sensor
IC. This makes it difficult to process the signal while maintaining
an accurate, reliable output over the specified operating tempera-
ture and voltage ranges.
this novel technique also reduces the amount of thermal noise
in the Hall sensor IC while completely removing the modulated
residue resulting from the chopper operation. The chopper sta-
bilizationꢀtechniqueꢀusesꢀaꢀhigh-frequencyꢀsamplingꢀclock.ꢀForꢀ
demodulation process, a sample-and-hold technique is used. This
high-frequency operation allows a greater sampling rate, which
results in higher accuracy and faster signal-processing capability.
This approach desensitizes the chip to the effects of thermal and
mechanical stresses, and produces devices that have extremely
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. Allegro employs a technique to remove
key sources of the output drift induced by thermal and mechani-
cal stresses. This offset reduction technique is based on a signal
modulation-demodulation process. The undesired offset signal is
separated from the magnetic field-induced signal in the frequency stable quiescent Hall output voltages and precise recoverabil-
domain, through modulation. The subsequent demodulation acts ity after temperature cycling. This technique is made possible
as a modulation process for the offset, causing the magnetic field- throughꢀtheꢀuseꢀofꢀaꢀBiCMOSꢀprocess,ꢀwhichꢀallowsꢀtheꢀuseꢀofꢀ
induced signal to recover its original spectrum at baseband, while low-offset, low-noise amplifiers in combination with high-density
the DC offset becomes a high-frequency signal. The magnetic-
logic integration and sample-and-hold circuits.
Regulator
Clock/Logic
Hall Element
Amp
Anti-Aliasing
LP Filter
Tuned
Filter
Concept of Chopper Stabilization Technique
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
APPLICATION-SPECIFIC INFORMATION
Field from Nearby Current Path
┌
│
│
│
┐
│
│
│
2 × I
1
1
ToꢀbestꢀuseꢀtheꢀCMRꢀcapabilitiesꢀofꢀtheseꢀdevices,ꢀtheꢀcircuitꢀ
board containing the ICs should be designed to make the external
magnetic fields on both Hall plates equal. This helps to minimize
error due to external fields generated by the current-carrying
PCBꢀtracesꢀthemselves.ꢀThereꢀareꢀthreeꢀmainꢀparametersꢀforꢀeachꢀ
current-carrying trace that determine the error that it will induce
onꢀanꢀIC:ꢀdistance from the IC, width of the current-carrying
conductor, and the angleꢀbetweenꢀitꢀandꢀtheꢀIC.ꢀFigureꢀ3ꢀshowsꢀ
an example of a current-carrying conductor routed near an IC.
The distance between the device and the conductor, d, is the
distance from the device center to the center of the conductor.
The width of the current path is w. The angle between the device
and the current path, θ, is defined as the angle between a straight
line connecting the two Hall plates and a line perpendicular to the
current path.
Error =
×
–
Cf
Hspace
Hspace
d –
× cosθ d +
× cosθ
2
2
where Hspace is the distance between the two Hall plates and Cf is
the coupling factor of the IC. This coupling factor varies between
the different ICs. The ACS781 has a coupling factor of 5 to 5.5
G/A,ꢀwhereasꢀotherꢀAllegroꢀICsꢀcanꢀrangeꢀfromꢀ10ꢀtoꢀ15ꢀG/A.
Other Layout Practices to Consider
When laying out a board that contains an Allegro current sensor
ICꢀwithꢀCMR,ꢀtheꢀdirectionꢀandꢀproximityꢀofꢀallꢀcurrent-carryingꢀ
paths are important, but they are not the only factors to consider
whenꢀoptimizingꢀICꢀperformance.ꢀOtherꢀsourcesꢀofꢀstrayꢀfieldsꢀ
that can contribute to system error include traces that connect to
theꢀIC’sꢀintegratedꢀcurrentꢀconductor,ꢀasꢀwellꢀasꢀtheꢀpositionꢀofꢀ
nearby permanent magnets.
The way that the circuit board connects to a current sensor IC
must be planned with care. Common mistakes that can impact
performanceꢀare:ꢀ
• The angle of approach of the current path to the IP pins
• ExtendingꢀtheꢀcurrentꢀtraceꢀtooꢀfarꢀbeneathꢀtheꢀIC
I
H2
d
θ
H1
THE ANGLE OF APPROACH
OneꢀcommonꢀmistakeꢀwhenꢀusingꢀanꢀAllegroꢀcurrentꢀsensorꢀICꢀisꢀ
toꢀbringꢀtheꢀcurrentꢀinꢀfromꢀanꢀundesirableꢀangle.ꢀFigureꢀ4ꢀshowsꢀ
an example of the approach of the current traces to the IC (in this
case, the ACS781). In this figure, traces are shown for IP+ and
IP–. The light green region is the desired area of approach for the
current trace going to IP+. This region is from 0° to 85°. This rule
applies likewise for the IP– trace.
w
Figure 3: ACS781 with nearby current path, viewed
from the bottom of the sensor
The limitation of this region is to prevent the current-carrying
trace from contributing any stray field that can cause error on
the IC output. When the current traces connected to IP are outside
thisꢀregion,ꢀtheyꢀmustꢀbeꢀtreatedꢀasꢀdiscussedꢀaboveꢀ(Fieldꢀfromꢀaꢀ
Nearby Current Path).
Whenꢀitꢀisꢀnotꢀpossibleꢀtoꢀkeepꢀθꢀcloseꢀtoꢀ90°,ꢀtheꢀnextꢀbestꢀ
option is to keep the distance from the current path to the current
sensor IC, d, as large as possible. Assuming that the current path
isꢀatꢀtheꢀworst-caseꢀangleꢀinꢀrelationꢀtoꢀtheꢀIC,ꢀθꢀ=ꢀ0°ꢀorꢀ180°,ꢀtheꢀ
equation:
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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
Figure 4: ACS781 Current Trace Approach – the desired
range of the angle θ is from 0° to 85°
ENCROACHMENT UNDER THE IC
In the LR package, the encroachment of the current-carrying
trace under the device actually changes the path of the current
flowing through the IP bus. This can cause a change in the cou-
pling factor of the IP bus to the IC and can significantly reduce
deviceꢀperformance.ꢀUsingꢀANSYSꢀMaxwellꢀElectromagneticꢀ
Suites, the current density and magnetic field generated from the
currentꢀflowꢀwereꢀsimulated.ꢀInꢀFigureꢀ5,ꢀthereꢀareꢀresultsꢀfromꢀ
two different simulations. The first is the case where the current
trace leading up to the IP bus terminates at the desired point. The
second case is where the current trace encroaches far up the IP
bus. The red arrows in both simulations represent the areas of
high current density. In the simulation with no excess overlap, the
red areas, and hence the current density, are very different from
the simulation with the excess overlap. It was also observed that
the field on H1 was larger when there was no excess overlap.
This can be observed by the darker shade of blue.
Figure 5: Simulations of ACS781 Leadframe with Differ-
ent Overlap of the Current Trace and the IP Bus
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High-Precision Linear Hall-Effect-Based
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ACS781xLR
PACKAGE OUTLINE DRAWING
6.40 0.10
2.99 0.10
NNN
+0.05
–0.03
1.79 0.10 ×2
0.81 0.10 ×2
7
YYWW
LLLLLLL
0.38
(Plating Included)
Parting Line
1
5º 2º ꢀ2
0.80 0.10
Standard Branding Reference View
C
12º 2º ꢀ2
= Supplier emblem
1.37 0.20
3.06 0.20
D1
D2
= Last three numbers of device part number
= Last two digits of year of manufacture
= Week of manufacture
N
Y
W
L
D
0.38 0.10 ×2
6.40 0.10
7
= Lot identifier
4.80 0.10
5º 2º ꢀ2
A
12º 2º ꢀ2
1.56 0.20
3.00
1.80 MIN
B
1
2
5
6
0.80
1.41 ×2
0.38 0.10 ×3
0.90
1.60 0.10 ×2
2.40
0.60
5.60
7
4
Branded Face
12º 2º ꢀ2
4.80
A
0.9
0.70
+0.03
1.50 0.10
0.02
-0.02
SEATING
PLANE
0.90
3
2
1
1.60
5º 2º ꢀ2
0.50
PCB Layout Reference View
E
R0.97 0.05
R0.×5 0.05
1
2
0.70 0.ꢀ0
0.×8 ꢁ×
For Reference Only, not for tooling use (DWG-0000428)
Dimensions in millimeters
7
Dimensions exclusive of mold flash, gate burs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Terminal #1 mark area
A
ꢀ.73 0.ꢀ0 ꢁ×
0.90 0.ꢀ0 ꢁ×
Dambar removal protrusion (16×)
B
Branding scale and appearance at supplier discretion
C
R0.50 ꢁ×
0.81
×2
Hall elements (D1 and D2); not to scale
0.50 ꢁ×
D
0.88
Reference land pattern layout;
E
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB
layout tolerances
Package LR, 7-Pin PSOF Package
Allegro MicroSystems, LLC
115 Northeast Cutoff
21
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS781xLR
Revision History
Number
Date
Description
–
August 8, 2016
Initial release
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For the latest version of this document, visit our website:
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Allegro MicroSystems, LLC
115 Northeast Cutoff
22
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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