ATS17501PSGATN-SDTROL
更新时间:2024-09-18 22:56:38
品牌:ALLEGRO
描述:Dual Output Differential Speed and Direction Sensor IC
ATS17501PSGATN-SDTROL 概述
Dual Output Differential Speed and Direction Sensor IC
ATS17501PSGATN-SDTROL 数据手册
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Dual Output Differential Speed and Direction Sensor IC
FEATURES AND BENEFITS
DESCRIPTION
• High-speed switching bandwidth up to 40 kHz
• Two independent output channels with options for high
resolution XOR speed, pulse, and direction protocol
• ASIL B(D) compliant (ISO 26262), assessment pending
• Optional fault detection output protocol
• Immune to common external magnetic disturbance
• EEPROM enables factory traceability throughout product
life cycle
TheATS17501 is a single IC solution designed for rotational
position sensing of a ferrous gear target found in automotive
and industrial electric motor applications (often with specific
application and safety requirements). The IC is housed in an
SG package that incorporates a rare-earth magnetic pellet for
ease of manufacturing, consistent application performance
over temperature, and enhanced reliability.
ThreeHallelementsareincorporatedtocreatetwoindependent
differential channels. These inputs are processed by digital
circuits and robust algorithms designed to eliminate the
detrimental effects of magnetic and system offsets, and to
address false output transitions caused by target vibrations
in electric motors at startup and low speed operation. The
differential signals are used to produce a highly accurate
speed output and, if desired, provide information on the
direction of rotation.
• Ideally suited for asynchronous electric motor applications
2
-
Advanced calibration techniques are used to optimize signal
offset and amplitude. This calibration, combined with the
digital tracking of the signal, results in accurate switch points
over air gap, speed, and temperature.
PACKAGE:
The IC can be programmed for a variety of applications
requiring dual-phase gear speed and position signal
information or simultaneous high-resolution gear speed
and direction information. It can be configured to enable
Fault Detection mode for ASIL B(D) utilization (assessment
pending).
4-Pin SIP
(suffix SG)
The ATS17501 SG package is a lead (Pb) free 4-pin SIP
package with an integrated back-biasing magnet and a 100%
matte-tin-plated lead frame.
Not to scale
Functional Block Diagram
Analog
Regulator
EEPROM
VCC
Diagnostics
Digital
Regulator
Temperature
Sensor
OUTA
Digital
Controller
Oscillator
Hall
Elements
Analog
Gain
OUTB
GND
ADC
Filter
Analog
Filter
Gain
ADC
ATS17501-DS, Rev. 2
MCO-0000734
March 19, 2020
Advance Information Datasheet • Subject to Change Without Notice
ATS17501
Dual Output Differential Speed and Direction Sensor IC
SELECTION GUIDE [1]
Part Number
Packing
ATS17501PSGATN-SDFUYJ
ATS17501PSGATN-VDFUYJ
ATS17501PSGATN-WDFUYJ
800 pieces per 13-inch reel
[1] Not all selectable combinations are available, contact Allegro for additional
selections and packing options.
W – OUTA: Inverse Direction, OUTB: XOR Speed
Operating Temperature Range
Allegro Identifier and Device Type
2
Allegro MicroSystems
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Advance Information Datasheet
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Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
ATS17501
Dual Output Differential Speed and Direction Sensor IC
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
VCC
Notes
Refer to Power Derating section
Rating
28
Unit
V
Supply Voltage
Reverse Supply Voltage
Output Voltage
VRCC
–18
28
V
VOUT
Each output pin
V
Reverse Output Voltage
VROUT
Each output pin; RPULLUP ≥ 1 kΩ
–0.5
V
Short-term output current for OUTA and OUTB independently,
not intended for continuous operation
Output Sink Current
IOUT
50
mA
Operating Ambient Temperature Range
Junction Temperature
TA
TJ
–40 to 160
175
°C
°C
°C
Storage Temperature Range
Tstg
–65 to 170
PINOUT DIAGRAM
ꢄranded
ꢅace
ꢃ
ꢀ
ꢂ
ꢁ
SG Package, 4-Pin SIP
PINOUT TABLE
Name
Pin
Function
VCC
1
2
3
4
Supply Voltage
OUTA
OUTB
GND
Configurable Output A
Configurable Output B
Ground
3
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Manchester, NH 03103-3353 U.S.A.
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
TYPICAL APPLICATION CIRCUIT
[2]
VPULLUP
VSUPPLY
RSERIES
RPULLUP(A)
VCC
OUTA
VOUT(A)
CLOAD(A)
VPULLUP
[2]
CBYPASS
ATS17501
RPULLUP(B)
GND
OUTB
VOUT(B)
CLOAD(B)
COMPONENTS [3]
Characteristic
Symbol
Notes
Value (Typ.)
Unit
Series Resistance
RSERIES
Recommended for typical EMC requirements
100
1
Ω
Required for functional operation; recommended value
dependent on programming options
OUTA Pullup Resistance
RPULLUP(A)
kΩ
Required for functional operation; recommended value
dependent on programming options
OUTB Pullup Resistance
Bypass Capacitance
RPULLUP(B)
CBYPASS
CLOAD(A)
1
kΩ
nF
nF
Recommended for typical EMC requirements
100
2.2
Recommended for typical EMC requirements; required for
certain programming options
OUTA Load Capacitance
Recommended for typical EMC requirements; required for
certain programming options
OUTB Load Capacitance
CLOAD(B)
2.2
nF
[2]
V
may be connected to VCC if VCC meets VPULLUP requirements. See Operating Characteristics section.
PULLUP
[3] Components listed are typical recommended values and are not suited for all applications and/or programmable options. See Operating Characteristics and Selection Guide for more information.
4
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Advance Information Datasheet
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Subject to Change Without Notice
March 19, 2020
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
OPERATING CHARACTERISTICS: Valid throughout operating ranges, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ. [4]
Max.
Unit
ELECTRICAL SUPPLY CHARACTERISTICS
Supply Voltage [5]
VCC
VCC(UV)
ICC
Voltage across VCC and GND
4
–
–
–
24
3.99
15
V
Undervoltage Lockout
Supply Current
V
–
10
–
mA
mA
Reverse Supply Current
IRCC
VCC = –18 V
–10
–
ELECTRICAL PROTECTION CHARACTERISTICS
Supply Clamp Voltage
VCSUPPLY TA = 25°C; ICC = 18 mA
VRCSUPPLY TA = 25°C; ICC = –3 mA
28
–
–
–
–
–
–18
–
V
V
V
Reverse Supply Clamp Voltage
Output Clamp Voltage
VOUT
TA = 25°C; IOUT = 3 mA
28
Current limited by design for short circuit event
on OUTA and OUTB independently;
low impedance output state
Output Current Internal Limiter
IOUT(LIM)
30
55
85
mA
POWER-ON CHARACTERISTICS
Power-On State
POS
tPO
For OUTA and OUTB
VOUT(HIGH)
–
V
Time from VCC > VCC(min) to when sensor IC
output is valid
Power-On Time
–
1
ms
CALIBRATION CHARACTERISTICS
Amount of target rotation with constant direction
following power-on until first electrical output
transition; Dynamic Threshold option; see Figure 1
First Output Edge
–
–
–
–
1
2
TCYCLE
–
Amount of target rotation with constant direction
following power-on until calibration is complete;
Dynamic Threshold option; see Figure 1
Initial Calibration
–
TCYCLE
OUTPUT CHARACTERISTICS [6]
Fault Detection Mode disabled; IOUT = 10 mA
–
0.165
–
0.35
1.25
V
V
5 V, 1 kΩ or 5 V, 3 kΩ
option
Output Low Voltage
VOUT(LOW)
0.5
Fault Detection Mode
enabled
12 V, 1 kΩ option
1.2
–
–
3.6
–
V
V
Fault Detection Mode disabled
5 V, 1 kΩ or 5 V, 3 kΩ
VPULLUP
Output High Voltage
VOUT(HIGH)
3.75
8.4
–
–
4.5
V
V
Fault Detection Mode
enabled
option
12 V, 1 kΩ option
10.8
Continued on next page...
[4] Typical values are at TA = 25°C and VCC = 5 V. Performance may vary for individual units, within the specified maximum and minimum limits.
[5] Maximum voltage must be adjusted for power dissipation and junction temperature; see representative for Power Derating discussions.
[6] Output characteristics are valid for each output independently, unless otherwise specified.
5
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
OPERATING CHARACTERISTICS (continued): Valid throughout operating ranges, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ. [7]
Max.
Unit
OUTPUT CHARACTERISTICS (continued) [8]
Fault Detection
Mode enabled;
5 V, 1 kΩ or
High fault (VFAULT(HIGH)
)
4.5
1.25
–
–
–
–
–
–
–
–
–
–
1
–
–
–
–
–
–
3.75
0.5
–
V
V
Mid fault (VFAULT(MID)
Low fault (VFAULT(LOW)
High fault (VFAULT(HIGH)
Mid fault (VFAULT(MID)
Low fault (VFAULT(LOW)
)
)
V
5 V, 3 kΩ option
Fault Voltage [9]
VFAULT
)
10.8
3.6
–
V
Fault Detection
Mode enabled;
12 V, 1 kΩ option
)
8.4
1.2
24
V
)
V
Fault Detection Mode disabled
4
V
Allowable Pullup Voltage
VPULLUP
5 V, 1 kΩ or 5 V, 3 kΩ option
12 V, 1 kΩ option
4.75
11.4
–
5.25
12.6
–
V
Fault Detection
Mode enabled
V
Fault Detection Mode disabled
5 V, 1 kΩ option
Fault Detection
Mode enabled
kΩ
kΩ
kΩ
kΩ
nF
µA
0.8
1.46
0.9
1
1.46
3.4
1.1
–
Allowable Pullup Resistor [10]
RPULLUP
5 V, 3 kΩ option
12 V, 1 kΩ option
Allowable Load Capacitor [11]
Output Leakage Current
CLOAD
Fault Detection Mode enabled
IOUT(OFF) Fault Detection Mode disabled; VOUT = VOUT(HIGH)
–
10
Speed output protocol; Dynamic Threshold
option; sinusoidal input signal; fOP < 1 kHz
Duty Cycle
D
45
–
50
5
55
–
%
µs
µs
µs
µs
10%→90%; VPULLUP = 5 V; RPULLUP = 1 kΩ;
CLOAD = 2.2 nF
Output Rise Time
tr
Fault Detection Mode disabled;
–
0.5
3.5
6
–
Fast fall time option
90%→10%;
VPULLUP = 5 V;
Fault Detection Mode disabled;
Output Fall Time
tf
–
–
RPULLUP = 1 kΩ; Slow fall time option
CLOAD = 2.2 nF
Fault Detection Mode
–
–
enabled
Forward Pulse Width [12]
Reverse Pulse Width [12]
tw(FWD)
tw(REV)
38
76
45
90
52
µs
µs
104
Delay from the magnetic signal crossing a switch
point threshold to the start of the output transition
Propagation Delay
td
–
8
–
µs
target degrees
target degrees
target degrees
BDIFF(pk-pk) = 100 G
–
–
–
–
–
–
0.13
0.086
0.064
σ×6; sinusoidal
input signal;
fOP = 1 kHz
Jitter [13]
BDIFF(pk-pk) = 150 G
BDIFF(pk-pk) = 200 G
–
Continued on next page...
[7] Typical values are for VCC = 5 V and TA = 25°C, unless otherwise specified.
[8] Output characteristics are valid for each output independently, unless otherwise specified.
[9] Valid with Fault Detection Mode enabled and correct programming of the Fault Detection Load Circuit option; see Selection Guide.
[10] See Application Circuit section.
[11] Minimum capacitor required when Fault Detection Mode is enabled to ensure correct output levels over operating conditions. Increased load capacitance will directly impact maximum operating
frequency due to the increased rise and fall times; see Application Circuit section.
[12] Time from start of output transition from VOUT(HIGH) to VOUT(LOW) to start of output transition from VOUT(LOW) to VOUT(HIGH). Measured pulse width will vary with load circuit configurations and measure-
ment thresholds. Valid with Pulse or Pulse Inverted output protocol; see Programming Options section.
[13] Guaranteed by design and characterization only. Characterization performed by measuring greater than 1,000 falling output edges of the same target feature at constant temperature using Reference
Target 60-0, see Reference Target Characteristics section. Value representative of a 6-σ distribution, such that 99.76% of the measured values are within the specified target degree.
6
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Advance Information Datasheet
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955 Perimeter Road
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
OPERATING CHARACTERISTICS (continued): Valid over operating ranges, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ. [14]
Max.
Unit
SWITCH POINT CHARACTERISTICS
% of BDIFF(PKPK); VOUT = VOUT(LOW) → VOUT
VOUT(HIGH); Dynamic Threshold option
=
Operate Point
BOP
BRP
–
–
70
30
–
–
%
%
% of BDIFF(PKPK); VOUT = VOUT(HIGH) → VOUT
VOUT(LOW); Dynamic Threshold option
=
Release Point
Hysteresis
ΔBDIFF after
switch point
% of BDIFF(PKPK);
Dynamic Threshold option
–
–
40
10
–
–
%
G
BHYS
to allow next
output transition
Fixed Threshold option
INPUT CHARACTERISTICS
Sinusoidal input signal; forward and reverse
target rotation; not valid for Pulse or Inverse
Pulse output protocol
Operating Frequency
fOP
0
–
40
kHz
Forward Pulse Operating Frequency
Reverse Pulse Operating Frequency
fOP(FWD)
fOP(REV)
Pulse or Inverse Pulse output protocol
Pulse or Inverse Pulse output protocol
0
0
–
–
9
6
kHz
kHz
Dynamic Threshold option;
fOP ≤ 20 kHz
30
40
–
–
–
–
G
G
Operating Magnetic Input [15]
BDIFF(pk-pk) See Figure 2
Dynamic Threshold option;
fOP > 20 kHz
Fixed Threshold option
100
–
–
–
G
G
Operating Magnetic Input Peak [15]
BDIFF
See Figure 2
–1150
1150
Bounded amplitude ratio within TWINDOW; no
missed output transitions; possible incorrect
direction information and/or reduction in switch
point accuracy; see Figure 3 and Figure 4
Operating Magnetic Input Signal
Variation [16]
ΔBDIFF(pk-pk)
0.6
–
2
–
Operating Magnetic Input Signal
Variation Window
Rolling window in which ΔBDIFF(pk-pk) cannot
exceed bounded ratio; see Figure 3 and Figure 4
TWINDOW
AG
8
–
–
–
TCYCLE
mm
Using Reference Target 60-0; fOP < 10 kHz;
Dynamic Threshold option
Operating Air Gap [17]
0.75
2.75
THERMAL CHARACTERISTICS
Minimum-K PCB, single layer, single-sided, with
copper limited to solder pads
–
–
126
84
–
–
°C/W
°C/W
Package Thermal Resistance
RθJA
Low-K PCB, single layer, single-sided, with
copper limited to solder pads and 3.57 in.2
(23.03 cm2) of copper area each side
[14] Typical values are for VCC = 5 V and TA = 25°C, unless otherwise specified.
[15] Differential magnetic field is measured for Left Channel (F1-F2) and Right Channel (F2-F3) independently; see Package Diagram. Magnetic field is measured orthogonally to the branded package
face.
[16] Operating magnetic input variation is valid for symmetrical peak variation about the signal offset. BDIFF(pk-pk) must always be greater than BDIFF(pk-pk,min)
.
[17] Operating air gap is dependent on the available magnetic field. The available magnetic field is target geometry, material, and speed dependent. Operational air gap should be independently charac-
terized for each target.
7
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Advance Information Datasheet
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Subject to Change Without Notice
March 19, 2020
www.allegromicro.com
ATS17501
Dual Output Differential Speed and Direction Sensor IC
REFERENCE
Typical Application Circuit
TCYCLE
Target
Tooth
Valley
TCYCLE
BDIFF
Figure 1: Definition of TCYCLE
TCYCLE = Target Cycle; the amount of rotation that moves one tooth and valley across the sensor.
BDIFF = The differential magnetic flux density sensed by the IC.
Differential Magnetic Input
ꢁDIꢂꢂ
ꢀꢁꢂꢃꢃꢄꢅaꢆꢇ
ꢀꢁꢂꢃꢃ
ꢀꢁꢂꢃꢃꢄꢈꢉꢊꢈꢉꢇ
ꢀꢁꢂꢃꢃꢄꢅinꢇ
Tiꢀe
Figure 2: Differential Magnetic Input
BDIFF = The differential magnetic flux density sensed by the IC.
BDIFF(pk-pk) = The peak-to-peak magnetic flux density sensed by the IC.
8
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
Operating Magnetic Signal Variation and Window
Figure 3: Repeated Period Variation
Figure 4: Single Period Variation
9
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
REFERENCE TARGET CHARACTERISTICS: Allegro Reference Target 60-0
Characteristics
Symbol
Test Conditions
Typ.
Units
Symbol Key
D
h
t
Outside Diameter
Do
Outside diameter of target
120
mm
o
t
F
Breadth of tooth, with respect to
branded face of the Sensor IC
Face Width
F
t
6
3
mm
Length of tooth, with respect to
branded face of the Sensor IC
t
v
Circular Tooth Length
degrees
Length of valley, with respect to
branded face of the Sensor IC
Circular Valley Width
Tooth Whole Depth
tv
3
3
degrees
mm
ht
Air Gap
Material
Low Carbon Steel
–
–
Branded Face of Sensor
Branded Face
of Sensor
Reference
Target 60-0
Figure 5: Reference Target 60-0
10
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
CHARACTERIZATION PLOTS [18]
[18] Characterization data representative of distribution averages. Characterization tested with Dynamic Threshold algorithm at fOP = 1 kHz, VCC = 5 V, VPULLUP = 5 V, RPULLUP = 1 kΩ, and CLOAD = 2.2 nF
unless otherwise specified.
11
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955 Perimeter Road
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
12
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Advance Information Datasheet
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March 19, 2020
955 Perimeter Road
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
FUNCTIONAL DESCRIPTION
General
The ATS17501 sensor module contains a single-chip, dual differ-
ential Hall-effect sensor IC, a rare-earth pellet, and a flat ferrous
pole piece (concentrator). As shown in Figure 6, the Hall-effect
sensor IC supports three Hall elements that sense the magnetic
profile of the ferrous gear target simultaneously but at different
points (each channel spaced at 1.75 mm pitch), generating two
differential internal signals processed for precise switching of the
digital output signals. Direction of rotation can be determined
based on the phase relationship of the two differential internal
signals. The ATS17501 is intended for use with ferromagnetic
targets.
ꢒarget
ꢄꢓearꢇ
ꢀꢁꢂꢃꢄꢁ ꢅꢆꢃꢁꢇꢈꢉꢈꢃꢊꢇ ꢈꢊ Tꢉꢆꢋꢁꢈ
ꢂacꢋage Caꢌe
ꢀranꢆeꢆ ꢍace
ꢍ1
ꢍ2
ꢍꢕ
ꢄꢀottoꢎ ꢏieꢐ oꢊ
ꢂacꢋage Caꢌeꢇ
ꢔC
South ꢂoꢈe
ꢄꢂin 1 Siꢆeꢇ
ꢄꢂin ꢅ Siꢆeꢇ
North ꢂoꢈe
ꢉeꢊt Channeꢈ ꢃight Channeꢈ
ꢌꢁꢄꢍꢉꢇꢃꢄꢉꢎ ꢏꢊꢐꢃꢈꢃꢊꢇ ꢑTꢉꢆꢋꢁꢈ ꢒꢊꢂꢁꢐ ꢓꢉꢐꢈ ꢔꢁꢂꢃꢄꢁ ꢓꢃꢇ ꢕ ꢈꢊ ꢓꢃꢇ ꢖꢗ
ꢒarget
ꢄꢓearꢇ
The Hall-effect sensor IC is self-calibrating and possesses a tem-
perature-compensated amplifier as well as a full-range analog-
to-digital converter (ADC). This allows for accurate processing
of a wide range of target magnetic profile amplitudes and offsets.
The on-chip voltage regulator provides supply noise rejection
throughout the operating voltage range. Changes in temperature
do not greatly affect the ATS17501 due to the stable amplifier
design and full-range ADC. The Hall elements and signal pro-
cessing electronics are integrated on the same silicon substrate.
ꢒhiꢌ tooth
ꢌenꢌeꢆ ꢈater
ꢒhiꢌ tooth
ꢌenꢌeꢆ earꢈier
Channeꢈ
ꢑꢈeꢎent ꢂitch
Target Magnetic Profile
ꢖꢀ
ꢘC ꢘꢇꢈꢁꢆꢇꢉꢎ ꢀꢃꢙꢙꢁꢆꢁꢇꢈꢃꢉꢎ ꢚꢃꢋꢇꢉꢎꢐꢛ ꢜꢀꢘꢝꢝ
ꢀ
ꢁꢂ
ꢃight Channeꢈ
ꢀ
ꢃꢂ
The ATS17501 is capable of providing digital information that
is representative of the mechanical features of a rotating target
gear. Figure 6 shows the automatic translation of the mechanical
profile to the digital output signal. No additional optimization is
needed, and minimum processing circuitry is required. This ease
of use reduces design time and incremental assembly costs for
most applications.
ꢀ
ꢁꢂ
ꢉeꢊt Channeꢈ
ꢀ
ꢃꢂ
ꢅꢞꢈꢓꢞꢈ ꢅꢓꢈꢃꢊꢇꢟ ꢚꢓꢁꢁꢔ ꢅꢞꢈꢓꢞꢈ ꢏꢆꢊꢈꢊꢄꢊꢎ
ꢃight Channeꢈ
ꢉeꢊt Channeꢈ
Figure 6: Magnetic Profile
13
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
Threshold Algorithms
The ATS17501 contains selectable algorithms for determining
when to produce an output transition from the magnetic input sig-
nal. For all options, a threshold is set within the sensor IC that trig-
gers the output transition when crossed by the digitized magnetic
signals (switch point).
Ferrous Target
Tooth
Valley
BDIFF
Dynamic Threshold
With the ATS17501 programmed for the Dynamic Threshold
option, each switch point is calculated from information learned
from the previous target feature. This algorithm allows for robust
tracking to produce accurate output transitions for inconsistent
magnetic input signals (offset drift, amplitude changes, etc.).
Speed Output Protocol
After power-on, the magnetic input signal is tracked to find the
peaks of the signal. After each new peak is found, the switch points
are updated based on a percentage of the previous two peaks.
Figure 7: Dynamic Threshold Option
Switch Point Algorithm (BOP = 70%, BRP = 30%)
Fixed Threshold
With the ATS17501 programmed for the Fixed Threshold option,
an absolute threshold stored in memory is used to set the switch
point for both the operate point and release point. This algorithm
allows for accurate output transitions immediately after power-on
for consistent magnetic input signals without the need to “learn”
the signal. The threshold stored in memory and loaded during
power-on contains threshold levels over temperature to allow for
offset drift adjustment of the magnetic input signal over tempera-
ture. The ATS17501 sensor IC contains a temperature sensor used
continuously to adjust the switch point over temperature as needed
by the application.
Ferrous Target
Tooth
Valley
BDIFF
The fixed thresholds stored in memory can be pre-programmed
for unique switch points over temperature for each application.
Additionally, the ATS17501 can find and set the threshold for each
installation over temperature during end-of-line calibration.
Speed Output Protocol
If during the application the magnetic input signal offset does not
match the programmed threshold stored in memory (due to inaccu-
rate programming, mechanical shift, etc.), the ATS17501 identifies
the threshold as “out of range”, calculates the threshold for the
current temperature, and updates the threshold to produce correct
output transitions. After the update, algorithms use the current
temperature to recharacterize the threshold over the operational
temperature range. This prevents the update from overcompensat-
ing the threshold at a distant temperature relative to the update
temperature. After the updated threshold is confirmed to be within
the magnetic input signal’s switch point range over several target
features, the updated threshold is stored into memory such that it
can be used for subsequent power-on cycles.
Figure 8: Fixed Threshold Option
Switch Point Algorithm
14
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
from the magnetic input signal, the algorithm will transition from
using the fixed threshold switch point to using the dynamic thresh-
old switch points. This transition occurs only when the magnetic
input signal is near a maximum or minimum value, such that
“double-switching” on the transition can be avoided.
Hybrid Threshold
With the ATS17501 programmed for the Hybrid Threshold
option, the threshold is determined from the Fixed Threshold
option at startup, then transitions to the Dynamic Threshold
option after tracking signals have correctly acquired the magnetic
input signals. This algorithm allows for both accurate output tran-
sitions immediately following power-on for consistent magnetic
input signals as well as robust tracking to produce accurate output
transitions of inconsistent magnetic input signals (offset drift,
amplitude changes, etc.).
While the majority of the power-on will use the Dynamic Thresh-
old option for robust signal tracking, the ATS17501 will continue
to monitor the fixed threshold for comparison to the fixed threshold
stored in memory. Should the fixed threshold require an update, the
ATS17501 will update and write the new threshold to memory for
use in subsequent power-on cycles.
Once the tracking signals have identified consistent peak values
15
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
put transitions. These channels are determined by the Hall elements
used to produce the differential signal, where the left channel
Output
The ATS17501 contains a number of selectable options to change the
output protocol or adjust the output behavior. These options allow for
the ATS17501 to be programmed to application-level needs.
differential signal is determined by the left and center element (F1-
F2), and the right channel is referenced from the center and right
element (F2-F3); see Package Diagram. XOR Speed and Direction
output protocols are channel-independent, as both channels are
used to determine the output transitions.
Output Protocol
The ATS17501 contains several programmable output protocols;
see Figure 9. These protocols can be programmed for either output
pin (OUTA or OUTB) independently. For example, Left Chan-
nel Speed can be programmed as the output protocol for OUTA,
OUTB, or both output pins.
For Speed, XOR Speed and Direction output protocols, the polarity
of the signal can be inverted by selecting the “Inverse” option of
the corresponding protocol. Selecting one of these options will
invert the polarity of the output (VOUT(HIGH) and VOUT(LOW)) rela-
tive to the BDIFF signal(s). For the Pulse output protocols, selecting
the “Inverse” option will invert the pulse width for forward and
reverse rotation (tw(FWD) and tw(REV)).
The ATS17501 contains two independent signal paths. Most
output protocols reference a specific magnetic input signal channel
(BDIFF(LEFT) or BDIFF(RIGHT)), which is used to determine the out-
ꢀDIꢁꢁꢂꢃꢄꢁTꢅ
Change in ꢀirection
ꢀDIꢁꢁꢂꢆIꢇꢈTꢅ
ꢃeft Cꢉannel
Speed
ꢆiꢊꢉt Cꢉannel
Speed
ꢃeft Cꢉannel
Speed Inꢋerted
ꢆiꢊꢉt Cꢉannel
Speed Inꢋerted
ꢌOꢆ
ꢌOꢆ Inꢋerted
Direction
ꢁꢂꢃꢄꢅꢆꢂWꢇ
ꢁꢂꢃꢄꢅꢈꢉꢊꢈꢇ
ꢌirꢏt Sꢋitch ꢐoint ꢑꢒter ꢀirection Change
ꢁꢂꢃꢄꢅꢆꢂWꢇ
Direction Inꢋerted
ꢁꢂꢃꢄꢅꢈꢉꢊꢈꢇ
ꢃeft Cꢉannel
ꢍulse
ꢄꢋꢅꢍꢎꢁꢇ
ꢄꢋꢅꢌWꢀꢇ
ꢆiꢊꢉt Cꢉannel
ꢍulse
ꢃeft Cꢉannel
ꢍulse Inꢋerted
ꢆiꢊꢉt Cꢉannel
ꢍulse Inꢋerted
Figure 9: Output Protocol Options
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
Fault Detection Mode
tPO
The ATS17501 allows for the output to transition between one
of two sets of values. With Fault Detection mode disabled, the
output will transition between approximately 0% and 100% of
VPULLUP. With Fault Detection mode disabled, the output transi-
VHIGH = VPULLUP
tions between approximately 20% and 80% of VPULLUP
.
At the beginning of power-on, the ATS17501 outputs initialize to
the VPULLUP level. With Fault Detection mode enabled, the output
levels transition from VPULLUP to VHIGH before the end of power-
on. After power-on, the output transitions as determined by the
programmed algorithm and output protocol between VOUT(HIGH)
VLOW
and VOUT(LOW)
.
Figure 10: Fault Detection Mode Disabled Output
Enabling Fault Detection mode allows for additional communica-
tion for cases of open wire or short circuit, as well as allowing for
the ATS17501 to communicate a fault detected from the internal
diagnostics. For a typical application load circuit, these cases can
be detected by observing either OUTA or OUTB transition to
tPO
VPULLUP
VHIGH
approximately 0 V or VPULLUP after tPO
.
VLOW
0 V
Figure 11: Fault Detection Mode Enabled Output
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
Fault Voltage
>1 ms
The ATS17501 communicates a fault condition by configuring
either output to hold within one of three VFAULT ranges (high,
mid, and low) for greater than 1 millisecond. Normal operation
allows for output transitions to occur over the VFAULT(MID) range;
as such, it is necessary to ignore fast transients for less than
1 millisecond through this range.
VFAULT (HIGH,min)
VFAULT (MID,max)
For internal diagnostics that trigger fault conditions (force the
output to go to VFAULT), both outputs will go to the VFAULT(HIGH)
range. As there may exist internal or external faults that cause
either or both output pins to hold a VFAULT(MID) or VFAULT(LOW)
level, these fault ranges should also be monitored. Examples of
these fault conditions could be a short circuit of the output to
ground, forcing the output to VFAULT(LOW), or a fault in the IC
VFAULT (MID,min)
VFAULT (MID,min)
output controller that forces the output to VFAULT(MID)
.
See Figure 12, Figure 13, and Figure 14 for examples of the out-
put communicating a fault condition.
Normal Opera�on
Assumed Fault
Figure 12: Assumed Fault Example: High Fault
>1 ms
>1 ms
VFAULT (HIGH,min)
VFAULT (HIGH,min)
VFAULT (MID,max)
VFAULT (MID,max)
VFAULT (MID,min)
VFAULT (MID,min)
VFAULT (MID,min)
VFAULT (MID,min)
Normal Opera�on
Normal Opera�on
Assumed Fault
Assumed Fault
Figure 13: Assumed Fault Example: Mid Fault
Figure 14: Assumed Fault Example: Low Fault
18
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
DEVICE FEATURES
Undervoltage Lockout
Vibration Robust Signal Tracking
During vibration events, the magnetic input signals can produce
oscillations with a sufficient amplitude for the peak tracking
algorithms to bound in and produce a non-ideal peak-to-peak.
When the ATS17501 detects a direction change, inward bounding
of the peak tracking signals is prevented. This prevents cases of
erroneous output transitions from switch points being incorrectly
set from vibration signals. Additionally, this allows for immediate
acquisition of the magnetic input signals once real target rotation
resumes following a vibration event.
When supply voltage falls below the Undervoltage Lockout volt-
age (VCC(UV)), the ATS17501 enters Reset, where the output state
returns to the Power-On State (POS) until sufficient VCC is sup-
plied. This feature prevents false signals, caused by undervoltage
conditions, from propagating to the output of the sensor IC.
Power Supply Protection
The ATS17501 contains an on-chip regulator and can operate
over a wide VCC range. For applications that need to operate from
an unregulated power supply, transient protection must be added
externally. For applications using a regulated line, EMI/RFI pro-
tection is recommended. Contact Allegro for more information
about circuitry to address EMC requirement compliance. Refer to
the Typical Application Circuit section.
Signature Tooth Robust Signal Tracking
Signature teeth (characterized by an extra target tooth and/or
valley) can produce significant variations of the magnetic input
signals. The bounded updating of the tracking signals prevent
overcompensation for these signature variations to provide robust
and accurate switch points for the signature region, as well as the
features about the signature region.
Startup Hysteresis
With a Power-On and a target held at zero-speed (fOP ≈ 0 Hz),
noise and/or vibration can produce magnetic input signals.
Startup hysteresis prevents peak tracking and switch point setting
at startup immediately following power-on. This occurs until
the sensed differential magnetic signal has moved sufficiently
to satisfy the hysteresis band for signal tracking. This feature
helps to ensure optimal self-calibration of the magnetic signals
by rejecting electrical noise and low-amplitude target vibrations
during startup and ensures that calibration occurs on actual target
features.
Temperature Drift Robust Signal Tracking
As temperature changes can impact both the amplitude and offset
of the magnetic signal, a full-range ADC, advanced algorithms,
temperature compensation, watchdog timers, and an internal tem-
perature sensor ensure robust signal tracking over temperature.
To compensate for amplitude changes over temperature, tempera-
ture compensated gain is first applied to normalize the amplitude
over temperature. The full-range ADC and peak tracking algo-
rithms track and acquire the signal to accurately set the switch
points.
Small Signal Lockout
To compensate for offset changes over temperature, two algo-
rithms are implemented to ensure the signal tracking accurately
follows and updates the switch points to follow the offset. With
nominal target rotation, peak-tracking algorithms automatically
follow and update the switch points over offset drift. With no
target rotation (stopped condition), a watchdog timer is imple-
mented which adjust the algorithms to track together, allowing
for preservation of the correct signal peak-to-peak and switch
points once rotation resumes.
When BDIFF(pk-pk) falls below specification, the internal logic of
the sensor IC will indicate a reduced signal, as measured in an
excessive air gap or a vibration condition. Small Signal Lockout
will hold the output state at the level when BDIFF(pk-pk) was last
in-specification. Once BDIFF(pk-pk) returns to an in-specification
value, the output state is released to transition as expected during
normal operation. When direction information is not explicitly
defined by the selected output protocol, Small Signal Lockout
is controlled independently for each channel. For example, Left
Channel Speed + Right Channel Speed output protocol will allow
for one channel to continue switching while the other is in lock-
out. When direction information is explicitly communicated, for
example XOR + Direction output protocol, Small Signal Lockout
will occur when either channel’s BDIFF(pk-pk) falls below specifi-
cation.
With the Fixed Threshold algorithm option selected, algorithms
are implemented for continuous monitoring and updating of the
fixed threshold over temperature to follow the offset drift of the
system. This compensation is implemented for each channel
independently to provide robust tracking of both signal channels
over temperature.
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
to-peak and phase relationship of the magnetic input signals can
meet the conditions to calibrate. Once normal rotation resumes,
Diagnostics and Fault Reporting
The ATS17501 contains diagnostics monitors of analog and
digital circuits of the IC. These continuously monitor and report
if any defect, calculation error, or invalid input stimulus is found.
If a diagnostic monitor fires, the outputs of the ATS17501 will
transition to a VFAULT level. For all faults, the outputs will remain
at the VFAULT level for enough time to allow the system control-
ler to monitor that a fault has occurred. For some diagnostics, it
is possible to clear the fault with a reset of the internal controller
of the sensor IC. If any of those diagnostic monitors triggers the
fault event, the ATS17501 will automatically perform a reset of
the internal controller after the output is held VFAULT for enough
time to allow the system controller to monitor the fault event.
the actual signal amplitudes can be much larger than the peak
signals acquired during calibration. Rather than wait several
TCYCLE events for the peak signal to be tracked to actual levels,
the ATS17501 will detect the difference and recalibrate on the
new signal. Recalibration allows for fast and robust correction
from cases of calibration on vibration events.
Pulse Collision Prevention
In cases of “high-speed” vibration, output transitions can occur
at very high frequencies, to prevent pulse collision (truncation of
the pulse width), the ATS17501 will prevent output transitions
until the current output pulse transition is complete to ensure
the system controller can accurately interpret the output signal.
This feature is only implemented when a pulse protocol option is
selected.
For diagnostics and fault reporting to perform correctly, proper
programming and adherence to the specifications and assump-
tions stated in this datasheet, the ATS17501 Safety Manual, and
any other addendum, corrigendum, and application note that
applies to the ATS17501. For more information on diagnostics
and fault reporting, see the ATS17501 Safety Manual.
High Configurability
The ATS17501 contains programmable parameters, as shown in
the Selection Guide, that can be configured to provide applica-
tion-level optimization.
Recalibration
Under large amplitude vibration conditions at startup, the peak-
20
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
POWER DERATING
The device must be operated below the maximum junction tem-
perature of the device (TJ(max)). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems website.)
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding TJ(max)
at a selected RθJA and TA.
,
For example, calculating reliability of VCC given observed worst-
case ratings, specifically:
TA = 160°C, RθJA=126°C/W, TJ(max) =175°C, VCC(max)= 24 V,
and ICC(max) = 15 mA.
The Package Thermal Resistance (RθJA) is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity (K)
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case (RθJC ) is a rela-
tively small component of RθJA. Ambient air temperature (TA) and
air motion are significant external factors, damped by overmolding.
Calculation of the maximum allowable power, PD(max), can be
done by first inverting equation 3 and calculating the maximum
allowable increase to TJ:
ΔTmax = TJ(max) – TA = 175°C–160°C = 15°C
Then, maximum allowable power can be calculated by:
PD(max) = ΔTmax ÷RθJA =15°C÷126°C/W=119mW
The effect of varying power levels (Power Dissipation or PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 119mW÷15mA=7.9 V
The results indicate that, at TA, the application and ATS17501 can
dissipate adequate amounts of heat at voltages less than or equal
PD = VIN
I
(1)
(2)
(3)
×
IN
ꢀ
ꢀ
ΔT = PD
R
×
θJA
to VCC(est)
.
TJ = TA + ΔT
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC(avg) = 8.5 mA, and RθJA = 126°C/W, then:
PD = VCC
I
= 12 V 8.5 mA = 102 mW
CC(avg)
×
×
ΔT = PD
R
= 102 mW 126°C/W = 12.9°C
×
×
θJA
TJ = TA + ΔT = 25°C + 12.9°C = 37.9°C
21
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
PACKAGE OUTLINE DRAWING
For Reference Only – Not for Tooling Use
(Reference DWG-0000040)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
F
ꢀ.ꢀ0 0.0ꢀ
1.75
F
E
8.00 0.0ꢀ
1.75
F2
F
Lot Number
AXXXXX
ꢀ.80 0.0ꢀ
F1
F3
Date Code
Branded
Face
F
F
1.70 0.10
4.70 0.10
D
Standard Branding Reference View
Line 1, 2, 3 = 7 characters, centered
B
A
1
2
3
4
Logo A molded in
Line 1: 7-digit alphanumeric Lot Number
Line 2: Part Number
0.60 0.10
0.71 0.0ꢀ
Line 3: 4-digit Date Code
0.40 0.10
1.27 0.10
+0.06
–0.04
0.38
24.6ꢀ 0.10
1ꢀ.30 0.10
A
A
B
C
Dambar removal protrusion (16X)
Metallic protrusion, electrically connected to pin 4 and substrate (both sides)
Thermoplastic Molded Lead Bar for alignment during shipment
1.0 REF
1.60 0.10
D
E
F
Branding scale and appearance at supplier discretion
Active Area Depth, 0.43 mm
C
0.71 0.10
Hall elements (F1, F2, F3), not to scale
5.50 0.10
0.71 0.10
Figure 15: Package SG, 4-Pin SIP
22
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ATS17501
Dual Output Differential Speed and Direction Sensor IC
Revision History
Number
Date
Description
–
November 18, 2019
February 27, 2020
Initial release
Updated Selection Guide (page 2), Electrical Protection Characteristics names and symbols (page 5),
Operating Air Gap maximum value (page 7)
1
2
Updated Features and Benefits (page 1); removed 50%/50% switch point options (updated Selection
Guide (page 2), Output Current Internal Limiter test conditions (page 5), Operate Point, Release
Point, and Hysteresis characteristics (page 7); removed 50%/50% Dynamic Threshold Option figure
(page 14); updated Output Protocol Options figure (page 16), Startup Hysteresis section (page 19);
removed Hidden Hysteresis (page 20))
March 19, 2020
Copyright 2020, Allegro MicroSystems.
Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:
www.allegromicro.com
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