UCN5818EPF [ALLEGRO]
BiMOS II 32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS; 采用BiMOS II 32位串行输入，具有ACTIVE- DMOS下拉功能锁存源极驱动器
| 型号： | UCN5818EPF |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | BiMOS II 32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS |
| 文件： | 总8页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5818-F
BiMOS II 32-BIT SERIAL-INPUT, LATCHED
SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS
Designed primarily for use with vacuum-fluorescent displays, the
UCN5818EPF
UCN5818AF and UCN5818EPF smart power BiMOS II drivers combine
CMOS shift registers, data latches, and control circuitry, with bipolar high-
speed sourcing outputs and DMOS active pull-down circuitry. The high-
speed shift register and data latches allow direct interfacing with microproces-
sor LSI-based systems. A CMOS serial data output enables cascade connec-
tions in applications requiring additional drive lines. Both devices feature
60 V and -40 mA output ratings, allowing them to be used in many other
peripheral power driver applications.
7
39
38
37
OUT
4
OUT
29
8
9
10
36
35
34
11
12
13
14
These smart power drivers have been designed with BiMOS II logic for
improved data entry rates. With a 5 V supply, it will operate to at least 3.3
MHz. At 12 V, higher speeds are possible. Use of these devices with TTL
may require the use of appropriate pull-up resistors to ensure an input logic
high. All devices can be operated over the ambient temperature range of -
20°C to +85°C. The UCN5818AF is supplied in a 40-pin plastic dual in-line
package with 0.600" (15.24 mm) row spacing. A copper lead frame, reduced
supply current requirement, and low output saturation voltage permits
operation with minimum junction temperature rise. The ‘A’ package allows
all 32 outputs to be operated at -25 mA continuously over the operating
temperature range.
33
32
31
15
16
17
OUT
13
30
29
NC
OUT
19
Dwg. PP-059-2
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
For high-density packaging applications, the UCN5818EPF is furnished
in a 44-lead plastic chip carrier (quad pack) for surface mounting on solder
lands with 0.050" (1.27 mm) centers. The PLCC allows -25 mA continuous
operation of all outputs simultaneously at ambient temperatures to 60°C.
Similar devices are available as the UCN5810AF/LWF (10 bits), UCN5811A
(12 bits), and UCN5812AF/EPF (20 bits).
Logic Supply Voltage, VDD .................... 15 V
Driver Supply Voltage, VBB ................... 60 V
Continuous Output Current,
I
OUT ......................... -40 mA to +15 mA
Input Voltage Range,
VIN ....................... -0.3 V to VDD + 0.3 V
Package Power Dissipation, PD
FEATURES
(UCN5818AF) ............................ 3.5 W*
(UCN5818EPF) ......................... 2.7 W†
Operating Temperature Range,
I Low-Power CMOS Logic
and Latches
I Reduced Supply Current
Requirements
I 60 V Source Outputs
I High-Speed Source Drivers
I To 3.3 MHz Data Input Rate
I Low-Output Saturation Voltages
I Active DMOS Pull-Downs
TA ................................. -20°C to +85°C
Storage Temperature Range,
I Improved Replacements for
SN75518N/FN
TS ............................... -55°C to +150°C
* Derate at rate of 28 mW/°C above TA = +25°C
† Derate at rate of 22 mW/°C above TA = +25°C
Caution: CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical
charges.
Always order by complete part number, e.g., UCN5818EPF .
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
UCN5818AF
FUNCTIONAL BLOCK DIAGRAM
LOGIC
SUPPLY
LOAD
SUPPLY
40
39
1
2
3
4
5
6
V
V
DD
BB
LOGIC
SUPPLY
V
DD
CLOCK
SERIAL
DATA IN
SERIAL
DATA OUT
SERIAL
DATA IN
SERIAL
DATA OUT
38 OUT
37 OUT
36 OUT
35 OUT
OUT
32
1
2
3
4
5
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
OUT
31
STROBE
OUT
30
OUT
29
BLANKING
OUT
28
34
33
32
31
30
OUT
OUT
OUT
OUT
OUT
7
8
MOS
BIPOLAR
OUT
27
6
7
8
OUT
26
LOAD
SUPPLY
9
V
BB
10
11
12
13
14
OUT
25
OUT
24
9
GROUND
OUT OUT OUT
OUT
N
Dwg. FP-013-1
1
2
3
29 OUT
28 OUT
27 OUT
26 OUT
OUT
OUT
10
11
12
13
23
22
TYPICAL INPUT CIRCUIT
OUT
OUT
OUT
OUT
OUT
21
20
19
18
17
15
16
V
DD
25
24
23
22
OUT
OUT
OUT
14
15
16
17
18
BLANKING 19 BLNK
20
STROBE
ST
IN
21 CLOCK
GROUND
CLK
Dwg. PP-029-4
3.0
2.5
2.0
Dwg. EP-010-5
SUFFIX 'A', R
= 36°C/W
θJA
TYPICAL OUTPUT DRIVER
V BB
1.5
1.0
SUFFIX 'EP', R
= 46°C/W
θJA
OUTN
0.5
0
25
50
75
100
125
150
AMBIENT TEMPERATURE IN °C
Dwg. No. A-14,219
Dwg. GP-025A
Dwg. GP-025A
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1988, 2000 Allegro MicroSystems, Inc.
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
ELECTRICAL CHARACTERISTICS at T = + 25°C, V
= 60 V unless otherwise noted.
A
BB
Limits @ V
= 5 V Limits @ V
= 12 V
DD
DD
Characteristic
Symbol
Test Conditions
Mln. Typ. Max.
Min. Typ. Max.
Units
µA
V
Output Leakage Current
Output Voltage
I
V
= 0 V, T = +70°C
—
58
—
-5.0
58.5
2.0
—
-15
—
—
58
-5.0
58.5
—
-15
—
CEX
OUT
OUT
OUT
OUT
A
V
I
I
I
= -25 mA
= 1 mA
= 2 mA
OUT(1)
OUT(0)
V
3.0
—
—
—
V
—
—
2.0
—
3.5
—
V
Output Pull-Down Current
Input Voltage
I
V
= 5 V to V
BB
2.0
—
3.5
—
—
—
mA
mA
V
OUT(0)
OUT
OUT
V
= 20 V to V
—
8.0
10.5
-0.3
—
13
—
BB
V
V
3.5
-0.3
—
—
5.3
+0.8
0.5
—
12.3
+0.8
1.0
-1.0
—
IN(1)
IN(0)
IN(1)
IN(0)
—
—
V
Input Current
I
I
V
V
= V
0.05
0.1
-0.1
µA
µA
V
IN
DD
= 0.8 V
—
-0.05 -0.5
—
IN
Serial Data Output Voltage
V
V
I
I
= -200 µA
= 200 µA
4.5
—
4.7
200
—
—
250
—
11.7 11.8
OUT(1)
OUT
OUT
—
—
—
—
—
—
—
—
—
—
100
—
200
—
mV
MHz
µA
µA
mA
µA
ns
OUT(0)
Maximum Clock Frequency
Supply Current
f
I
I
I
I
t
t
t
t
3.3*
—
clk
All Outputs High
All Outputs Low
100
100
3.0
300
300
6.0
100
—
200
200
3.0
500
500
6.0
100
—
DD(1)
DD(0)
BB(1)
BB(0)
PHL
PLH
f
—
Outputs High, No Load
Outputs Low
—
—
10
10
Blanking to Output Delay
C = 30 pF, 50% to 50%
—
2000
1000
1450
650
1000
850
650
700
L
C = 30 pF, 50% to 50%
—
—
—
ns
L
Output Fall Time
Output Rise Time
C = 30 pF, 90% to 10%
—
—
—
ns
L
C = 30 pF, 10% to 90%
—
—
—
ns
r
L
Negative current is defined as coming out of (sourcing) the specified device terminal.
* Operation at a clock frequency greater than the specified minimum value is possible but not warranteed.
www.allegromicro.com
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
Serial Data present at the input is transferred
to the shift register on the logic “0” to logic “1”
transition of the CLOCK input pulse. On
succeeding CLOCK pulses, the registers shift data
information towards the SERIAL DATA OUT-
PUT. The SERIAL DATA must appear at the
input prior to the rising edge of the CLOCK input
waveform.
CLOCK
A
D
B
DATA IN
STROBE
BLANKING
OUTN
E
F
C
Information present at any register is trans-
ferred to the respective latch when the STROBE
is high (serial-to-parallel conversion). The
latches will continue to accept new data as long as
the STROBE is held high. Applications where
the latches are bypassed (STROBE tied high) will
require that the BLANKING input be high during
serial data entry.
G
Dwg. No. A-12,649A
TIMING REQUIREMENTS
When the BLANKING input is high, the
output source drivers are disabled (OFF); the
DMOS sink drivers are ON, the information
stored in the latches is not affected by the
BLANKING input. With the BLANKING input
low, the outputs are controlled by the state of
their respective latches.
(TA = +25°C,VDD = 5 V, Logic Levels are VDD and Ground)
A. Minimum Data Active Time Before Clock Pulse
(Data Set-Up Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 ns
B. Minimum Data Active Time After Clock Pulse
(Data Hold Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 ns
C. Minimum Data Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 ns
D. Minimum Clock Pulse Width. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 ns
E. Minimum Time Between Clock Activation and Strobe . . . . . . . . . . . 300 ns
F. Minimum Strobe Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ns
G. Typical Time Between Strobe Activation and
Output Transistion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 ns
Timing is representative of a 3.3 MHz clock. Higher speeds may be attainable
with increased supply voltage; operation at high temperatures will reduce the
specified maximum clock frequency.
TRUTH TABLE
Serial
Data Clock
Input Input I
Shift Register Contents
Serial
Data Strobe
Output Input
Latch Contents
Output Contents
...
I
I
...
I
I
I
I
I
...
I
I
Blanking
I
I
I
I
I
N-1 N
1
2
3
N-1
N
1
2
3
N-1
N
1
2
3
H
L
H
L
R
R
R
X
R
R
R
X
...
...
...
...
...
R
R
R
X
R
R
R
X
R
R
R
X
1
1
2
2
2
3
N-2
N-2
N-1
N-1
N-1
N
N-1
N-1
N
X
R
1
X
L
R
R
R
...
...
...
R
R
1
2
3
N-1
N
P
P
P
P
P
P
H
P
X
P
X
P
X
P
X
P
L
P
L
P
L
P
L
... P
... L
P
N-1 N
1
2
3
N-1
N
N
1
2
3
N-1
N
1
2
3
X
H
L
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
UCN5818AF
Dimensions in Inches
(controlling dimensions)
0.015
0.008
40
21
0.700
MAX
0.580
0.485
0.600
BSC
1
2
20
0.100
BSC
3
4
0.070
0.005
MIN
2.095
0.030
1.980
0.250
MAX
0.015
MIN
0.200
0.115
0.022
0.014
Dwg. MA-003-40 in
Dimensions in Millimeters
(for reference only)
0.381
0.204
40
21
17.78
MAX
14.73
12.32
15.24
BSC
1
2
20
2.54
BSC
3
4
0.13
MIN
1.77
0.77
53.2
50.3
6.35
MAX
0.39
MIN
5.08
2.93
0.558
0.356
Dwg. MA-003-40 mm
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Lead thickness is measured at seating plane or below.
4. Supplied in standard sticks/tubes of 9 devices.
www.allegromicro.com
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
UCN5818EPF
Dimensions in Inches
(controlling dimensions)
18
28
29
17
0.032
0.026
0.319
0.291
0.695
0.685
0.021
0.013
0.656
0.650
0.319
0.291
INDEX AREA
0.050
BSC
39
7
44
1
2
40
6
0.020
MIN
0.656
0.650
0.695
0.685
0.180
0.165
Dwg. MA-005-44A in
Dimensions in Millimeters
(for reference only)
28
18
29
17
0.812
0.661
8.10
7.39
17.65
17.40
0.533
0.331
16.662
16.510
8.10
7.39
INDEX AREA
1.27
BSC
39
7
44
1
2
40
6
16.662
16.510
0.51
MIN
4.57
4.20
17.65
17.40
Dwg. MA-005-44A mm
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Supplied in standard sticks/tubes of 27 devices or add “TR” to part number for tape and reel.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
The products described here are manufactured under one or more
U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such departures from the detail specifications as may be
required to permit improvements in the performance, reliability, or
manufacturability of its products. Before placing an order, the user is
cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components
in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no responsi-
bility for its use; nor for any infringement of patents or other rights of
third parties which may result from its use.
www.allegromicro.com
5818-F
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
POWER
INTERFACE DRIVERS
†
Function
Output Ratings*
SERIAL-INPUT LATCHED DRIVERS
Part Number
8-Bit (saturated drivers)
8-Bit
8-Bit
8-Bit
-120 mA
350 mA
350 mA
350 mA
350 mA
75 mA
250 mA
350 mA
100 mA
50 V‡
50 V
80 V
50 V‡
80 V‡
17 V
50 V
50 V‡
50 V
5895
5821
5822
5841
5842
6275
6595
6A595
6B595
8-Bit
8-Bit (constant-current LED driver)
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
10-Bit (active pull-downs)
-25 mA
-25 mA
75 mA
-25 mA
60 V
60 V
17 V
60 V
5810-F and 6809/10
5811 and 6811
6276
12-Bit (active pull-downs)
16-Bit (constant-current LED driver)
20-Bit (active pull-downs)
5812-F and 6812
32-Bit (active pull-downs)
32-Bit
32-Bit (saturated drivers)
-25 mA
100 mA
100 mA
60 V
30 V
40 V
5818-F and 6818
5833
5832
PARALLEL-INPUT LATCHED DRIVERS
4-Bit
350 mA
50 V‡
5800
8-Bit
8-Bit
-25 mA
350 mA
100 mA
250 mA
60 V
50 V‡
50 V
50 V
5815
5801
6B273
6273
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
SPECIAL-PURPOSE DEVICES
Unipolar Stepper Motor Translator/Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 28-Line Decoder/Driver
1.25 A
250 mA
350 mA
100 mA
450 mA
50 V‡
5804
6259
6A259
6B259
6817
50 V
50 V‡
50 V
30 V
*
Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits.
Negative current is defined as coming out of (sourcing) the output.
†
‡
Complete part number includes additional characters to indicate operating temperature range and package style.
Internal transient-suppression diodes included for inductive-load protection.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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